irqchip/armada-xp: Consolidate hotplug state space
authorThomas Gleixner <tglx@linutronix.de>
Wed, 21 Dec 2016 19:19:57 +0000 (20:19 +0100)
committerThomas Gleixner <tglx@linutronix.de>
Sun, 25 Dec 2016 09:47:44 +0000 (10:47 +0100)
The mpic is either the main interrupt controller or is cascaded behind a
GIC. The mpic is single instance and the modes are mutually exclusive, so
there is no reason to have seperate cpu hotplug states.

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Cc: Sebastian Siewior <bigeasy@linutronix.de>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Link: http://lkml.kernel.org/r/20161221192112.333161745@linutronix.de
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
drivers/irqchip/irq-armada-370-xp.c
include/linux/cpuhotplug.h

index 9d9c2c45916aea18945e2455b1133a4afe55fb0f..eb0d4d41b15691721ee8b3a6da87d1fada27248a 100644 (file)
@@ -583,7 +583,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
 #endif
        } else {
 #ifdef CONFIG_SMP
-               cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
+               cpuhp_setup_state_nocalls(CPUHP_AP_IRQ_ARMADA_XP_STARTING,
                                          "irqchip/armada/cascade:starting",
                                          mpic_cascaded_starting_cpu, NULL);
 #endif
index 45c786cbb324cdc5f0c7579b1930bb4b41c208cc..20bfefbe75941627c25c30621d4d9b09606c720c 100644 (file)
@@ -82,7 +82,6 @@ enum cpuhp_state {
        CPUHP_AP_IRQ_GIC_STARTING,
        CPUHP_AP_IRQ_HIP04_STARTING,
        CPUHP_AP_IRQ_ARMADA_XP_STARTING,
-       CPUHP_AP_IRQ_ARMADA_CASC_STARTING,
        CPUHP_AP_IRQ_BCM2836_STARTING,
        CPUHP_AP_ARM_MVEBU_COHERENCY,
        CPUHP_AP_PERF_X86_UNCORE_STARTING,