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PCI: keystone: Add support to set the max link speed from DT
authorKishon Vijay Abraham I <kishon@ti.com>
Mon, 25 Mar 2019 09:39:38 +0000 (15:09 +0530)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Mon, 15 Apr 2019 12:24:02 +0000 (13:24 +0100)
commitfbb2de891cc4d69c0c80c4116cf870a99235cfe8
tree8350691cfa445dd87fd190f40ad52bc23a744a9btree | snapshot
parent40e5d614a0cdbf50dc3caa7eb10bd838edcb3ba5commit | diff
PCI: keystone: Add support to set the max link speed from DT

PCIe in TI's AM654 devices is by default configured to work in GEN3 mode.

However PCIe does not work reliably in GEN3 mode because of SERDES
configuration.

Add support to set the link speed to GEN1, GEN2 or GEN3 based on
"max-link-speed" DT property with GEN2 as the default speed if
"max-link-speed" is absent.

Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
drivers/pci/controller/dwc/pci-keystone.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)