clk: keystone: use clkod register bits for postdiv
authorMurali Karicheri <m-karicheri2@ti.com>
Sat, 23 Nov 2013 21:26:52 +0000 (16:26 -0500)
committerSantosh Shilimkar <santosh.shilimkar@ti.com>
Tue, 10 Dec 2013 16:08:20 +0000 (11:08 -0500)
commitdbb4e67fe7088f963007453ee07e453c4e1fab28
treea5e0fc1fbb0ad4f659f2acc47b00d35cbe7a5506
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae
clk: keystone: use clkod register bits for postdiv

DDR3A/B, ARM and PA PLL controllers have clkod register bits for
configuring postdiv values. So use it instead of using fixed
post dividers for these pll controllers. Assume that if fixed-postdiv
attribute is not present, use clkod register value for pistdiv.

Also update the Documentation of bindings to reflect the same.

Cc: Mike Turquette <mturquette@linaro.org
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Documentation/devicetree/bindings/clock/keystone-pll.txt
drivers/clk/keystone/pll.c