clk: rockchip: add watchdog pclk on rk3328
authorHeiko Stuebner <heiko@sntech.de>
Sat, 15 Jun 2019 12:23:28 +0000 (14:23 +0200)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 27 Jun 2019 09:02:17 +0000 (11:02 +0200)
commitd59fca075cf829bb972359f48b9b5b2cee863432
tree5ff16966438438748bb41d6f99f590e9a125b55c
parent92de4cecf7d1302682b04a0eb01b957830efd5bd
clk: rockchip: add watchdog pclk on rk3328

The watchdog pclk is controlled from the secure GRF but we still
want to mention it explicitly to not use arbitary parent clocks
in the devicetree wdt node, so add a SGRF_GATE for it.

Suggested-by: Leonidas P. Papadakos <papadakospan@gmail.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3328.c