MIPS: math-emu: Implement the FCCR, FEXR and FENR registers
authorMaciej W. Rozycki <macro@linux-mips.org>
Fri, 3 Apr 2015 22:27:33 +0000 (23:27 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Tue, 7 Apr 2015 23:10:28 +0000 (01:10 +0200)
commitc491cfa2ca804e58f4e88386736c1608c82da08a
tree4563578a985b1ceb09e067c76936510eeac6d4e8
parentf684362689ddc4a4e055be438d6416cc280a1372
MIPS: math-emu: Implement the FCCR, FEXR and FENR registers

Implement the FCCR, FEXR and FENR "shadow" FPU registers for the
architecture levels that include them, for the CFC1 and CTC1
instructions in the full emulation mode.

For completeness add macros for the CP1 UFR and UNFR registers too, no
actual implementation though.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9708/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/include/asm/mipsregs.h
arch/mips/math-emu/cp1emu.c