perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints
authorAndi Kleen <ak@linux.intel.com>
Mon, 9 Mar 2015 18:20:22 +0000 (11:20 -0700)
committerIngo Molnar <mingo@kernel.org>
Thu, 2 Apr 2015 15:07:43 +0000 (17:07 +0200)
commitc420f19b9cdc59662dbb56677417487efc1729ec
tree4b043401d2146c2055d393ece7d57ce0a6350928
parent687805e4a60fe83a11556c041840161f8016a367
perf/x86/intel: Fix Haswell CYCLE_ACTIVITY.* counter constraints

Some of the CYCLE_ACTIVITY.* events can only be scheduled on
counter 2.  Due to a typo Haswell matched those with
INTEL_EVENT_CONSTRAINT, which lead to the events never
matching as the comparison does not expect anything
in the umask too. Fix the typo.

Signed-off-by: Andi Kleen <ak@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: http://lkml.kernel.org/r/1425925222-32361-1-git-send-email-andi@firstfloor.org
Signed-off-by: Ingo Molnar <mingo@kernel.org>
arch/x86/kernel/cpu/perf_event_intel.c