irqchip: mips-cpu: Replace magic 0x100 with IE_SW0
authorPaul Burton <paul.burton@imgtec.com>
Thu, 30 Mar 2017 19:06:09 +0000 (12:06 -0700)
committerRalf Baechle <ralf@linux-mips.org>
Wed, 12 Apr 2017 21:11:15 +0000 (23:11 +0200)
commitc0cfbe6941085f2ebd58e645c10f8836b6d28fe9
tree8e1d1dc544959e1a936363f7c03b08153e28b76d
parentca452b95e3be1cbd86ee60165de640d27ddca8b7
irqchip: mips-cpu: Replace magic 0x100 with IE_SW0

Replace use of the magic number 0x100 (ie. bit 8) with the more
explanatory IE_SW0 (ie. interrupt enable for software interrupt 0) or
C_SW0 (ie. cause bit for software interrupt 0) as appropriate.

Signed-off-by: Paul Burton <paul.burton@imgtec.com>
Acked-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/15834/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
drivers/irqchip/irq-mips-cpu.c