MIPS: Actually decode JALX in `__compute_return_epc_for_insn'
authorMaciej W. Rozycki <macro@imgtec.com>
Thu, 15 Jun 2017 23:06:19 +0000 (00:06 +0100)
committerRalf Baechle <ralf@linux-mips.org>
Thu, 29 Jun 2017 00:42:26 +0000 (02:42 +0200)
commita9db101b735a9d49295326ae41f610f6da62b08c
tree6aa5c53e12c5b7a346bc99f51288f6bbfec0714d
parent13769ebad0c42738831787e27c7c7f982e7da579
MIPS: Actually decode JALX in `__compute_return_epc_for_insn'

Complement commit fb6883e5809c ("MIPS: microMIPS: Support handling of
delay slots.") and actually decode the regular MIPS JALX major
instruction opcode, the handling of which has been added with the said
commit for EPC calculation in `__compute_return_epc_for_insn'.

Fixes: fb6883e5809c ("MIPS: microMIPS: Support handling of delay slots.")
Signed-off-by: Maciej W. Rozycki <macro@imgtec.com>
Cc: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: stable@vger.kernel.org # 3.9+
Patchwork: https://patchwork.linux-mips.org/patch/16394/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
arch/mips/kernel/branch.c