drm/i915: Move swizzle_bit under i915_ggtt
authorChris Wilson <chris@chris-wilson.co.uk>
Wed, 16 Oct 2019 14:32:34 +0000 (15:32 +0100)
committerChris Wilson <chris@chris-wilson.co.uk>
Wed, 16 Oct 2019 18:42:19 +0000 (19:42 +0100)
commit972c646f1cfed31ec9661ee7abc161b3ccf21fdd
treef800925a17bdf55a28fe579312bd7f79963cfcfa
parente9d4c9245f54cd50b9bdbdf216a9c0d6404ced7b
drm/i915: Move swizzle_bit under i915_ggtt

The HW performs swizzling as part of its fence tiling inside the Global
GTT. We already do the probing of the HW settings from the GGTT setup,
complete the picture by storing the information as part of the GGTT. The
primary benefit is the consistency of our probe routines do not break
the i915_ggtt encapsulation.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20191016143234.4075-2-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/gem/i915_gem_tiling.c
drivers/gpu/drm/i915/gem/selftests/i915_gem_mman.c
drivers/gpu/drm/i915/i915_debugfs.c
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_gem_fence_reg.c
drivers/gpu/drm/i915/i915_gem_gtt.h