clk: rockchip: fix wrong mmc sample phase shift for rk3328
authorZiyuan Xu <xzy.xu@rock-chips.com>
Thu, 11 Oct 2018 07:26:43 +0000 (15:26 +0800)
committerHeiko Stuebner <heiko@sntech.de>
Thu, 11 Oct 2018 12:36:01 +0000 (14:36 +0200)
commit82f4b67f018c88a7cc9337f0067ed3d6ec352648
tree5cca1de112a03a24227f12a8d5cf8dfbab40373c
parentc14d28e86d3c70720622e1d517968c1721f23214
clk: rockchip: fix wrong mmc sample phase shift for rk3328

mmc sample shift is 0 for RK3328 referring to the TRM.
So fix them.

Fixes: fe3511ad8a1c ("clk: rockchip: add clock controller for rk3328")
Cc: stable@vger.kernel.org
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
drivers/clk/rockchip/clk-rk3328.c