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pinctrl: sunxi: Fix A64 UART mux value
authorAndre Przywara <andre.przywara@arm.com>
Sat, 25 Nov 2017 12:12:30 +0000 (12:12 +0000)
committerLinus Walleij <linus.walleij@linaro.org>
Thu, 30 Nov 2017 15:48:54 +0000 (16:48 +0100)
commit7c5c2c2d18d778e51fd8b899965097168306031c
tree4282688a294cc22cf771dc57feab4a28e0beb4e3tree | snapshot
parent6ad4cc8d1ac483e0fd33f605fb2788b0ecf51ed4commit | diff
pinctrl: sunxi: Fix A64 UART mux value

To use pin PF4 as the RX signal of UART0, we have to write 0b011 into
the respective pin controller register.
Fix the wrong value we had in our table so far.

Fixes: 96851d391d02 ("drivers: pinctrl: add driver for Allwinner A64 SoC")
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
drivers/pinctrl/sunxi/pinctrl-sun50i-a64.c diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)