ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting
authorAnson Huang <b20788@freescale.com>
Tue, 12 Aug 2014 09:26:03 +0000 (17:26 +0800)
committerShawn Guo <shawn.guo@freescale.com>
Mon, 18 Aug 2014 07:05:22 +0000 (15:05 +0800)
commit6248c273eb305fb4fa3240cc0b840118c44cd122
tree5c6ff9f529781694e1102f1032993ae47edcd084
parent2f643105e53256058d53bc26867c441fe70f21fc
ARM: imx: correct gpu2d_axi and gpu3d_axi clock setting

On i.MX6Q, gpu2d_axi and gpu3d_axi are either from AXI or
AHB clock, but on i.MX6DL, gpu2d_axi and gpu3d_axi are
from mmdc_ch0_axi_podf, and they can NOT be gated by mmdc_ch0_axi
's clock gate, the mux option register field(CCM_CBCMR)
is marked as "Reserved" now on i.MX6DL RM, so correct these
two clks setting.

Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
arch/arm/mach-imx/clk-imx6q.c