PCI: dwc: Fix EP link notification implementation
authorGustavo Pimentel <gustavo.pimentel@synopsys.com>
Thu, 19 Jul 2018 08:32:11 +0000 (10:32 +0200)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 19 Jul 2018 10:33:58 +0000 (11:33 +0100)
commit4e965ede1856ed62c7ac8b7ad905a4a285e4a9f3
tree38d418faf5edaac16c3991f8ce09f0d63193ac63
parent53dd0c51f16be5f215d3ecad435062df99ee29ae
PCI: dwc: Fix EP link notification implementation

Move specific features settings from EP shared code
(pcie-designware-ep.c) to the driver (pcie-designware-plat.c).

Previous implementation disables the EP link notification
by default for all SoCs that uses EP DesignWare IP, which affects
directly the dra7xx and artpec6 SoCs.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/pci/controller/dwc/pcie-designware-ep.c
drivers/pci/controller/dwc/pcie-designware-plat.c