drm/i915/skl: Enabling PSR2 SU with frame sync
authorSonika Jindal <sonika.jindal@intel.com>
Thu, 2 Apr 2015 05:32:44 +0000 (11:02 +0530)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 7 Apr 2015 08:06:38 +0000 (10:06 +0200)
commit474d1ec4a3d7775b071e60fdbe431cae37b84ff3
tree4a53aca8d67a522d82e69086ba04d33cfc294587
parent2d1070b21e004609a5bebafdb4303bb021f5477c
drm/i915/skl: Enabling PSR2 SU with frame sync

We make use of HW tracking for Selective update region and enable frame sync on
sink. We use hardware's hardcoded data values for frame sync and GTC.

v2: Add 3200x2000 resolution restriction with PSR2, move psr2_support to i915_psr
struct, add aux_frame_sync to independently control aux frame sync, rename the
TP2 TIME macro for 2500us (Rodrigo, Siva)
v3: Moving the resolution restriction to intel_psr_enable so that we check it
only once(Durga)

Cc: Durgadoss R <durgadoss.r@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Sonika Jindal <sonika.jindal@intel.com>
Reviewed-by: Durgadoss R <durgadoss.r@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_drv.h
drivers/gpu/drm/i915/i915_reg.h
drivers/gpu/drm/i915/intel_dp.c
drivers/gpu/drm/i915/intel_psr.c