drm/i915: Set crtc_state->lane_count for HDMI
authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Wed, 27 Apr 2016 12:44:16 +0000 (15:44 +0300)
committerJani Nikula <jani.nikula@intel.com>
Mon, 23 May 2016 08:17:31 +0000 (11:17 +0300)
commit2bae0304684cab917f348ec411cae600130fa6a9
treef811f7416a5ded6f5806a15a8079c6219d665cf8
parent130b62f74af3600897714045fcab553f01f46df4
drm/i915: Set crtc_state->lane_count for HDMI

Set the lane count for HDMI to 4. This will make it easier to
unduplicate CHV phy code.

This also fixes the the soft reset programming for HDMI with CHV. After
commit a8f327fb8464 ("drm/i915: Clean up CHV lane soft reset
programming"), it wouldn't set the right bits for PCS23 since it relied
on a lane count that was never set.

v2: Set lane_count in *_get_config() to please state checker. (0day)
v3: Set lane_count for DDI in DVI mode too. (CI)
v4: Add note about CHV soft lane reset. (Ander)

Fixes: a8f327fb8464 ("drm/i915: Clean up CHV lane soft reset programming")
Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
Reviewed-by: Jim Bride <jim.bride@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1461761065-21195-2-git-send-email-ander.conselvan.de.oliveira@intel.com
(cherry picked from commit d4d6279abe9a4a2d52115bad122118db4995df17)
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_hdmi.c