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ARM: dts: arria10: update NAND clocking
authorDinh Nguyen <dinguyen@kernel.org>
Mon, 9 Jul 2018 18:47:20 +0000 (13:47 -0500)
committerDinh Nguyen <dinguyen@kernel.org>
Thu, 30 Aug 2018 13:38:26 +0000 (08:38 -0500)
commit12b2982a1f72ce453d76da977e1dad422b2f34ad
tree7d0039f6f439f8ad135e9db9bbbe27f4886ff24ctree | snapshot
parent9a8e3cfd3469a7c083c013963ca5282aec63b1e8commit | diff
ARM: dts: arria10: update NAND clocking

The NAND IP needs 3 clocks(nand_x_clk, nand_clk, and nand_ecc_clk). This
patch adds a nand_clk, which is derived from the nand_x_clk, but has a
fixed divider of 4, and the nand_ecc_clk, which is derived from the
nand_x_clk.

Update the NAND node to use the additional clocks.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
---
v2: add nand_ecc_clk and update commit message
arch/arm/boot/dts/socfpga_arria10.dtsi diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)