PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signatures
authorGustavo Pimentel <gustavo.pimentel@synopsys.com>
Thu, 19 Jul 2018 08:32:13 +0000 (10:32 +0200)
committerLorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Thu, 19 Jul 2018 10:34:42 +0000 (11:34 +0100)
commitd3c70a98d7d63cae02d50ebfafea04264a767401
treef430393cdc4af823044656f2a2bfee4b8ca93b04
parent8963106eabdc56911e9b65258eb5e9a6b7b3dfda
PCI: Update xxx_pcie_ep_raise_irq() and pci_epc_raise_irq() signatures

Change {cdns, dra7xx, artpec6, dw, rockchip}_pcie_ep_raise_irq() and
pci_epc_raise_irq() signature, namely the interrupt_num variable type
from u8 to u16 to accommodate 2048 maximum MSI-X interrupts.

Signed-off-by: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Alan Douglas <adouglas@cadence.com>
Acked-by: Shawn Lin <shawn.lin@rock-chips.com>
Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
Acked-by: Joao Pinto <jpinto@synopsys.com>
Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
drivers/pci/controller/dwc/pci-dra7xx.c
drivers/pci/controller/dwc/pcie-artpec6.c
drivers/pci/controller/dwc/pcie-designware-ep.c
drivers/pci/controller/dwc/pcie-designware-plat.c
drivers/pci/controller/dwc/pcie-designware.h
drivers/pci/controller/pcie-cadence-ep.c
drivers/pci/controller/pcie-rockchip-ep.c
drivers/pci/endpoint/pci-epc-core.c
include/linux/pci-epc.h