x86/tsc: Provide a means to disable TSC ART
authormike.travis@hpe.com <mike.travis@hpe.com>
Thu, 12 Oct 2017 16:32:05 +0000 (11:32 -0500)
committerThomas Gleixner <tglx@linutronix.de>
Mon, 16 Oct 2017 20:50:37 +0000 (22:50 +0200)
commit6c66350d0a482892793b888b07c1177fc6d4b344
tree8fedc0ec845df896ee11b0fa0715bf4fb8d8fb2a
parent41e7864ab5ce4ec36e89a9f55d8d9dfe19b0392c
x86/tsc: Provide a means to disable TSC ART

On systems where multiple chassis are reset asynchronously, and thus
the TSC counters are started asynchronously, the offset needed to
convert to TSC to ART would be different.  Disable ART in that case
and rely on the TSC counters to supply the accurate time.

Signed-off-by: Mike Travis <mike.travis@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Dimitri Sivanich <dimitri.sivanich@hpe.com>
Cc: Russ Anderson <russ.anderson@hpe.com>
Cc: Andrew Banman <andrew.banman@hpe.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Bin Gao <bin.gao@linux.intel.com>
Link: https://lkml.kernel.org/r/20171012163202.289397994@stormcage.americas.sgi.com
arch/x86/kernel/tsc.c