powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX
authorChristophe Leroy <christophe.leroy@c-s.fr>
Thu, 21 Feb 2019 19:08:51 +0000 (19:08 +0000)
committerMichael Ellerman <mpe@ellerman.id.au>
Sat, 23 Feb 2019 10:04:32 +0000 (21:04 +1100)
commitd5f17ee96447736a84bc44ffc4b0dddb1b519222
tree6cd30783636f3e54bdec42c13b3e95af096762c6
parent0f4a9041c7a77240fa1ff927775620b574151f34
powerpc/8xx: don't disable large TLBs with CONFIG_STRICT_KERNEL_RWX

This patch implements handling of STRICT_KERNEL_RWX with
large TLBs directly in the TLB miss handlers.

To do so, etext and sinittext are aligned on 512kB boundaries
and the miss handlers use 512kB pages instead of 8Mb pages for
addresses close to the boundaries.

It sets RO PP flags for addresses under sinittext.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
arch/powerpc/Kconfig
arch/powerpc/include/asm/nohash/32/mmu-8xx.h
arch/powerpc/kernel/head_8xx.S
arch/powerpc/mm/8xx_mmu.c
arch/powerpc/mm/init_32.c
arch/powerpc/mm/mmu_decl.h