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arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node
authorGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 30 Sep 2015 13:22:15 +0000 (15:22 +0200)
committerSimon Horman <horms+renesas@verge.net.au>
Wed, 17 Feb 2016 05:53:08 +0000 (14:53 +0900)
commita528b4bf1a2ecb756aa65548fd5518fe82fb4648
treef715e062d0bd2879e69ad2bebb30203b01b53ec3tree | snapshot
parent52b541abbc02f64e2105dff278c8b4e7e75041f4commit | diff
arm64: dts: r8a7795: Add missing properties to CA57 L2 cache node

Add the missing "cache-unified" and "cache-level" properties to the
Cortex-A57 cache-controller node.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
arch/arm64/boot/dts/renesas/r8a7795.dtsi diff | blob | blame | history
Linux 6.x block layer and io_uring tree(s)