qedr: Add RoCE driver framework

[linux-2.6-block.git] / include / uapi / linux / pci_regs.h

diff --git a/include/uapi/linux/pci_regs.h b/include/uapi/linux/pci_regs.h
index 404095124ae203c7d8ca0e4e206416368af39cb5..e5a2e68b2236e51e5b7bab0a143a02763054dac6 100644 (file)
--- a/include/uapi/linux/pci_regs.h
+++ b/include/uapi/linux/pci_regs.h
@@ -612,6 +612,8 @@
  */
 #define PCI_EXP_DEVCAP2                36      /* Device Capabilities 2 */
 #define  PCI_EXP_DEVCAP2_ARI           0x00000020 /* Alternative Routing-ID */
+#define  PCI_EXP_DEVCAP2_ATOMIC_ROUTE  0x00000040 /* Atomic Op routing */
+#define PCI_EXP_DEVCAP2_ATOMIC_COMP64  0x00000100 /* Atomic 64-bit compare */
 #define  PCI_EXP_DEVCAP2_LTR           0x00000800 /* Latency tolerance reporting */
 #define  PCI_EXP_DEVCAP2_OBFF_MASK     0x000c0000 /* OBFF support mechanism */
 #define  PCI_EXP_DEVCAP2_OBFF_MSG      0x00040000 /* New message signaling */
@@ -619,6 +621,7 @@
 #define PCI_EXP_DEVCTL2                40      /* Device Control 2 */
 #define  PCI_EXP_DEVCTL2_COMP_TIMEOUT  0x000f  /* Completion Timeout Value */
 #define  PCI_EXP_DEVCTL2_ARI           0x0020  /* Alternative Routing-ID */
+#define PCI_EXP_DEVCTL2_ATOMIC_REQ     0x0040  /* Set Atomic requests */
 #define  PCI_EXP_DEVCTL2_IDO_REQ_EN    0x0100  /* Allow IDO for requests */
 #define  PCI_EXP_DEVCTL2_IDO_CMP_EN    0x0200  /* Allow IDO for completions */
 #define  PCI_EXP_DEVCTL2_LTR_EN                0x0400  /* Enable LTR mechanism */
@@ -671,7 +674,8 @@
 #define PCI_EXT_CAP_ID_PMUX    0x1A    /* Protocol Multiplexing */
 #define PCI_EXT_CAP_ID_PASID   0x1B    /* Process Address Space ID */
 #define PCI_EXT_CAP_ID_DPC     0x1D    /* Downstream Port Containment */
-#define PCI_EXT_CAP_ID_MAX     PCI_EXT_CAP_ID_DPC
+#define PCI_EXT_CAP_ID_PTM     0x1F    /* Precision Time Measurement */
+#define PCI_EXT_CAP_ID_MAX     PCI_EXT_CAP_ID_PTM
 
 #define PCI_EXT_CAP_DSN_SIZEOF 12
 #define PCI_EXT_CAP_MCAST_ENDPOINT_SIZEOF 40
@@ -964,4 +968,13 @@
 
 #define PCI_EXP_DPC_SOURCE_ID          10      /* DPC Source Identifier */
 
+/* Precision Time Measurement */
+#define PCI_PTM_CAP                    0x04        /* PTM Capability */
+#define  PCI_PTM_CAP_REQ               0x00000001  /* Requester capable */
+#define  PCI_PTM_CAP_ROOT              0x00000004  /* Root capable */
+#define  PCI_PTM_GRANULARITY_MASK      0x0000FF00  /* Clock granularity */
+#define PCI_PTM_CTRL                   0x08        /* PTM Control */
+#define  PCI_PTM_CTRL_ENABLE           0x00000001  /* PTM enable */
+#define  PCI_PTM_CTRL_ROOT             0x00000002  /* Root select */
+
 #endif /* LINUX_PCI_REGS_H */