Merge branch 'mlx5-next' of git://git.kernel.org/pub/scm/linux/kernel/git/mellanox...

[linux-2.6-block.git] / drivers / net / ethernet / mellanox / mlx5 / core / main.c

diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c
index bda9c4bd17e6a97f8a0a2e0f1f4946692836c9a8..b200a29d142057cd4e407b61fdccb1df074a01e2 100644 (file)
--- a/drivers/net/ethernet/mellanox/mlx5/core/main.c
+++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c
@@ -465,6 +465,7 @@ static int handle_hca_cap_odp(struct mlx5_core_dev *dev)
        void *set_hca_cap;
        void *set_ctx;
        int set_sz;
+       bool do_set = false;
        int err;
 
        if (!IS_ENABLED(CONFIG_INFINIBAND_ON_DEMAND_PAGING) ||
@@ -475,11 +476,6 @@ static int handle_hca_cap_odp(struct mlx5_core_dev *dev)
        if (err)
                return err;
 
-       if (!(MLX5_CAP_ODP_MAX(dev, ud_odp_caps.srq_receive) ||
-             MLX5_CAP_ODP_MAX(dev, rc_odp_caps.srq_receive) ||
-             MLX5_CAP_ODP_MAX(dev, xrc_odp_caps.srq_receive)))
-               return 0;
-
        set_sz = MLX5_ST_SZ_BYTES(set_hca_cap_in);
        set_ctx = kzalloc(set_sz, GFP_KERNEL);
        if (!set_ctx)
@@ -489,19 +485,30 @@ static int handle_hca_cap_odp(struct mlx5_core_dev *dev)
        memcpy(set_hca_cap, dev->caps.hca_cur[MLX5_CAP_ODP],
               MLX5_ST_SZ_BYTES(odp_cap));
 
-       /* set ODP SRQ support for RC/UD and XRC transports */
-       MLX5_SET(odp_cap, set_hca_cap, ud_odp_caps.srq_receive,
-                MLX5_CAP_ODP_MAX(dev, ud_odp_caps.srq_receive));
-
-       MLX5_SET(odp_cap, set_hca_cap, rc_odp_caps.srq_receive,
-                MLX5_CAP_ODP_MAX(dev, rc_odp_caps.srq_receive));
-
-       MLX5_SET(odp_cap, set_hca_cap, xrc_odp_caps.srq_receive,
-                MLX5_CAP_ODP_MAX(dev, xrc_odp_caps.srq_receive));
-
-       err = set_caps(dev, set_ctx, set_sz, MLX5_SET_HCA_CAP_OP_MOD_ODP);
+#define ODP_CAP_SET_MAX(dev, field)                                            \
+       do {                                                                   \
+               u32 _res = MLX5_CAP_ODP_MAX(dev, field);                       \
+               if (_res) {                                                    \
+                       do_set = true;                                         \
+                       MLX5_SET(odp_cap, set_hca_cap, field, _res);           \
+               }                                                              \
+       } while (0)
+
+       ODP_CAP_SET_MAX(dev, ud_odp_caps.srq_receive);
+       ODP_CAP_SET_MAX(dev, rc_odp_caps.srq_receive);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.srq_receive);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.send);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.receive);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.write);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.read);
+       ODP_CAP_SET_MAX(dev, xrc_odp_caps.atomic);
+
+       if (do_set)
+               err = set_caps(dev, set_ctx, set_sz,
+                              MLX5_SET_HCA_CAP_OP_MOD_ODP);
 
        kfree(set_ctx);
+
        return err;
 }
 
@@ -1535,6 +1542,8 @@ static const struct pci_device_id mlx5_core_pci_table[] = {
        { PCI_VDEVICE(MELLANOX, 0x101a), MLX5_PCI_DEV_IS_VF},   /* ConnectX-5 Ex VF */
        { PCI_VDEVICE(MELLANOX, 0x101b) },                      /* ConnectX-6 */
        { PCI_VDEVICE(MELLANOX, 0x101c), MLX5_PCI_DEV_IS_VF},   /* ConnectX-6 VF */
+       { PCI_VDEVICE(MELLANOX, 0x101d) },                      /* ConnectX-6 Dx */
+       { PCI_VDEVICE(MELLANOX, 0x101e), MLX5_PCI_DEV_IS_VF},   /* ConnectX Family mlx5Gen Virtual Function */
        { PCI_VDEVICE(MELLANOX, 0xa2d2) },                      /* BlueField integrated ConnectX-5 network controller */
        { PCI_VDEVICE(MELLANOX, 0xa2d3), MLX5_PCI_DEV_IS_VF},   /* BlueField integrated ConnectX-5 network controller VF */
        { 0, }