Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc

[linux-2.6-block.git] / arch / arm / boot / dts / armada-370.dtsi

diff --git a/arch/arm/boot/dts/armada-370.dtsi b/arch/arm/boot/dts/armada-370.dtsi
index a195debb67d35297292b43c1a9e7fc45c4908a2c..18f6eb47cc50b492ad8e8cb2b01eb3bc8b3785f9 100644 (file)
--- a/arch/arm/boot/dts/armada-370.dtsi
+++ b/arch/arm/boot/dts/armada-370.dtsi
@@ -159,5 +159,63 @@
                        clocks = <&coreclk 0>;
                };
 
+               thermal@d0018300 {
+                       compatible = "marvell,armada370-thermal";
+                       reg = <0xd0018300 0x4
+                              0xd0018304 0x4>;
+                       status = "okay";
+               };
+
+               pcie-controller {
+                       compatible = "marvell,armada-370-pcie";
+                       status = "disabled";
+                       device_type = "pci";
+
+                       #address-cells = <3>;
+                       #size-cells = <2>;
+
+                       bus-range = <0x00 0xff>;
+
+                       reg = <0xd0040000 0x2000>, <0xd0080000 0x2000>;
+
+                       reg-names = "pcie0.0", "pcie1.0";
+
+                       ranges = <0x82000000 0 0xd0040000 0xd0040000 0 0x00002000   /* Port 0.0 registers */
+                                 0x82000000 0 0xd0080000 0xd0080000 0 0x00002000   /* Port 1.0 registers */
+                                 0x82000000 0 0xe0000000 0xe0000000 0 0x08000000   /* non-prefetchable memory */
+                                 0x81000000 0 0          0xe8000000 0 0x00100000>; /* downstream I/O */
+
+                       pcie@1,0 {
+                               device_type = "pci";
+                               assigned-addresses = <0x82000800 0 0xd0040000 0 0x2000>;
+                               reg = <0x0800 0 0 0 0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               #interrupt-cells = <1>;
+                               ranges;
+                               interrupt-map-mask = <0 0 0 0>;
+                               interrupt-map = <0 0 0 0 &mpic 58>;
+                               marvell,pcie-port = <0>;
+                               marvell,pcie-lane = <0>;
+                               clocks = <&gateclk 5>;
+                               status = "disabled";
+                       };
+
+                       pcie@2,0 {
+                               device_type = "pci";
+                               assigned-addresses = <0x82002800 0 0xd0080000 0 0x2000>;
+                               reg = <0x1000 0 0 0 0>;
+                               #address-cells = <3>;
+                               #size-cells = <2>;
+                               #interrupt-cells = <1>;
+                               ranges;
+                               interrupt-map-mask = <0 0 0 0>;
+                               interrupt-map = <0 0 0 0 &mpic 62>;
+                               marvell,pcie-port = <1>;
+                               marvell,pcie-lane = <0>;
+                               clocks = <&gateclk 9>;
+                               status = "disabled";
+                       };
+               };
        };
 };