2 * arizona.c - Wolfson Arizona class device shared support
4 * Copyright 2012 Wolfson Microelectronics plc
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/delay.h>
14 #include <linux/gcd.h>
15 #include <linux/module.h>
16 #include <linux/pm_runtime.h>
17 #include <sound/pcm.h>
18 #include <sound/pcm_params.h>
19 #include <sound/tlv.h>
21 #include <linux/mfd/arizona/core.h>
22 #include <linux/mfd/arizona/registers.h>
26 #define ARIZONA_AIF_BCLK_CTRL 0x00
27 #define ARIZONA_AIF_TX_PIN_CTRL 0x01
28 #define ARIZONA_AIF_RX_PIN_CTRL 0x02
29 #define ARIZONA_AIF_RATE_CTRL 0x03
30 #define ARIZONA_AIF_FORMAT 0x04
31 #define ARIZONA_AIF_TX_BCLK_RATE 0x05
32 #define ARIZONA_AIF_RX_BCLK_RATE 0x06
33 #define ARIZONA_AIF_FRAME_CTRL_1 0x07
34 #define ARIZONA_AIF_FRAME_CTRL_2 0x08
35 #define ARIZONA_AIF_FRAME_CTRL_3 0x09
36 #define ARIZONA_AIF_FRAME_CTRL_4 0x0A
37 #define ARIZONA_AIF_FRAME_CTRL_5 0x0B
38 #define ARIZONA_AIF_FRAME_CTRL_6 0x0C
39 #define ARIZONA_AIF_FRAME_CTRL_7 0x0D
40 #define ARIZONA_AIF_FRAME_CTRL_8 0x0E
41 #define ARIZONA_AIF_FRAME_CTRL_9 0x0F
42 #define ARIZONA_AIF_FRAME_CTRL_10 0x10
43 #define ARIZONA_AIF_FRAME_CTRL_11 0x11
44 #define ARIZONA_AIF_FRAME_CTRL_12 0x12
45 #define ARIZONA_AIF_FRAME_CTRL_13 0x13
46 #define ARIZONA_AIF_FRAME_CTRL_14 0x14
47 #define ARIZONA_AIF_FRAME_CTRL_15 0x15
48 #define ARIZONA_AIF_FRAME_CTRL_16 0x16
49 #define ARIZONA_AIF_FRAME_CTRL_17 0x17
50 #define ARIZONA_AIF_FRAME_CTRL_18 0x18
51 #define ARIZONA_AIF_TX_ENABLES 0x19
52 #define ARIZONA_AIF_RX_ENABLES 0x1A
53 #define ARIZONA_AIF_FORCE_WRITE 0x1B
55 #define ARIZONA_FLL_VCO_CORNER 141900000
56 #define ARIZONA_FLL_MAX_FREF 13500000
57 #define ARIZONA_FLL_MIN_FVCO 90000000
58 #define ARIZONA_FLL_MAX_FRATIO 16
59 #define ARIZONA_FLL_MAX_REFDIV 8
60 #define ARIZONA_FLL_MIN_OUTDIV 2
61 #define ARIZONA_FLL_MAX_OUTDIV 7
63 #define ARIZONA_FMT_DSP_MODE_A 0
64 #define ARIZONA_FMT_DSP_MODE_B 1
65 #define ARIZONA_FMT_I2S_MODE 2
66 #define ARIZONA_FMT_LEFT_JUSTIFIED_MODE 3
68 #define arizona_fll_err(_fll, fmt, ...) \
69 dev_err(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
70 #define arizona_fll_warn(_fll, fmt, ...) \
71 dev_warn(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
72 #define arizona_fll_dbg(_fll, fmt, ...) \
73 dev_dbg(_fll->arizona->dev, "FLL%d: " fmt, _fll->id, ##__VA_ARGS__)
75 #define arizona_aif_err(_dai, fmt, ...) \
76 dev_err(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
77 #define arizona_aif_warn(_dai, fmt, ...) \
78 dev_warn(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
79 #define arizona_aif_dbg(_dai, fmt, ...) \
80 dev_dbg(_dai->dev, "AIF%d: " fmt, _dai->id, ##__VA_ARGS__)
82 static int arizona_spk_ev(struct snd_soc_dapm_widget *w,
83 struct snd_kcontrol *kcontrol,
86 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
87 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
91 case SND_SOC_DAPM_POST_PMU:
92 val = snd_soc_read(codec, ARIZONA_INTERRUPT_RAW_STATUS_3);
93 if (val & ARIZONA_SPK_OVERHEAT_STS) {
94 dev_crit(arizona->dev,
95 "Speaker not enabled due to temperature\n");
99 regmap_update_bits_async(arizona->regmap,
100 ARIZONA_OUTPUT_ENABLES_1,
101 1 << w->shift, 1 << w->shift);
103 case SND_SOC_DAPM_PRE_PMD:
104 regmap_update_bits_async(arizona->regmap,
105 ARIZONA_OUTPUT_ENABLES_1,
112 return arizona_out_ev(w, kcontrol, event);
115 static irqreturn_t arizona_thermal_warn(int irq, void *data)
117 struct arizona *arizona = data;
121 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
124 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
126 } else if (val & ARIZONA_SPK_OVERHEAT_WARN_STS) {
127 dev_crit(arizona->dev, "Thermal warning\n");
133 static irqreturn_t arizona_thermal_shutdown(int irq, void *data)
135 struct arizona *arizona = data;
139 ret = regmap_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_3,
142 dev_err(arizona->dev, "Failed to read thermal status: %d\n",
144 } else if (val & ARIZONA_SPK_OVERHEAT_STS) {
145 dev_crit(arizona->dev, "Thermal shutdown\n");
146 ret = regmap_update_bits(arizona->regmap,
147 ARIZONA_OUTPUT_ENABLES_1,
149 ARIZONA_OUT4R_ENA, 0);
151 dev_crit(arizona->dev,
152 "Failed to disable speaker outputs: %d\n",
159 static const struct snd_soc_dapm_widget arizona_spkl =
160 SND_SOC_DAPM_PGA_E("OUT4L", SND_SOC_NOPM,
161 ARIZONA_OUT4L_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
162 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
163 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD);
165 static const struct snd_soc_dapm_widget arizona_spkr =
166 SND_SOC_DAPM_PGA_E("OUT4R", SND_SOC_NOPM,
167 ARIZONA_OUT4R_ENA_SHIFT, 0, NULL, 0, arizona_spk_ev,
168 SND_SOC_DAPM_PRE_PMU | SND_SOC_DAPM_POST_PMU |
169 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMD);
171 int arizona_init_spk(struct snd_soc_codec *codec)
173 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
174 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
175 struct arizona *arizona = priv->arizona;
178 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkl, 1);
182 switch (arizona->type) {
188 ret = snd_soc_dapm_new_controls(dapm, &arizona_spkr, 1);
194 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN,
195 "Thermal warning", arizona_thermal_warn,
198 dev_err(arizona->dev,
199 "Failed to get thermal warning IRQ: %d\n",
202 ret = arizona_request_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT,
203 "Thermal shutdown", arizona_thermal_shutdown,
206 dev_err(arizona->dev,
207 "Failed to get thermal shutdown IRQ: %d\n",
212 EXPORT_SYMBOL_GPL(arizona_init_spk);
214 int arizona_free_spk(struct snd_soc_codec *codec)
216 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
217 struct arizona *arizona = priv->arizona;
219 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT_WARN, arizona);
220 arizona_free_irq(arizona, ARIZONA_IRQ_SPK_OVERHEAT, arizona);
224 EXPORT_SYMBOL_GPL(arizona_free_spk);
226 static const struct snd_soc_dapm_route arizona_mono_routes[] = {
227 { "OUT1R", NULL, "OUT1L" },
228 { "OUT2R", NULL, "OUT2L" },
229 { "OUT3R", NULL, "OUT3L" },
230 { "OUT4R", NULL, "OUT4L" },
231 { "OUT5R", NULL, "OUT5L" },
232 { "OUT6R", NULL, "OUT6L" },
235 int arizona_init_mono(struct snd_soc_codec *codec)
237 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
238 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
239 struct arizona *arizona = priv->arizona;
242 for (i = 0; i < ARIZONA_MAX_OUTPUT; ++i) {
243 if (arizona->pdata.out_mono[i])
244 snd_soc_dapm_add_routes(dapm,
245 &arizona_mono_routes[i], 1);
250 EXPORT_SYMBOL_GPL(arizona_init_mono);
252 int arizona_init_gpio(struct snd_soc_codec *codec)
254 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
255 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
256 struct arizona *arizona = priv->arizona;
259 switch (arizona->type) {
262 snd_soc_dapm_disable_pin(dapm, "DRC2 Signal Activity");
268 snd_soc_dapm_disable_pin(dapm, "DRC1 Signal Activity");
270 for (i = 0; i < ARRAY_SIZE(arizona->pdata.gpio_defaults); i++) {
271 switch (arizona->pdata.gpio_defaults[i] & ARIZONA_GPN_FN_MASK) {
272 case ARIZONA_GP_FN_DRC1_SIGNAL_DETECT:
273 snd_soc_dapm_enable_pin(dapm, "DRC1 Signal Activity");
275 case ARIZONA_GP_FN_DRC2_SIGNAL_DETECT:
276 snd_soc_dapm_enable_pin(dapm, "DRC2 Signal Activity");
285 EXPORT_SYMBOL_GPL(arizona_init_gpio);
287 int arizona_init_notifiers(struct snd_soc_codec *codec)
289 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
290 struct arizona *arizona = priv->arizona;
292 BLOCKING_INIT_NOTIFIER_HEAD(&arizona->notifier);
296 EXPORT_SYMBOL_GPL(arizona_init_notifiers);
298 const char * const arizona_mixer_texts[ARIZONA_NUM_MIXER_INPUTS] = {
404 EXPORT_SYMBOL_GPL(arizona_mixer_texts);
406 unsigned int arizona_mixer_values[ARIZONA_NUM_MIXER_INPUTS] = {
413 0x0c, /* Noise mixer */
414 0x0d, /* Comfort noise */
487 0xa0, /* ISRC1INT1 */
491 0xa4, /* ISRC1DEC1 */
495 0xa8, /* ISRC2DEC1 */
499 0xac, /* ISRC2INT1 */
503 0xb0, /* ISRC3DEC1 */
507 0xb4, /* ISRC3INT1 */
512 EXPORT_SYMBOL_GPL(arizona_mixer_values);
514 const DECLARE_TLV_DB_SCALE(arizona_mixer_tlv, -3200, 100, 0);
515 EXPORT_SYMBOL_GPL(arizona_mixer_tlv);
517 const char * const arizona_sample_rate_text[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
518 "12kHz", "24kHz", "48kHz", "96kHz", "192kHz",
519 "11.025kHz", "22.05kHz", "44.1kHz", "88.2kHz", "176.4kHz",
520 "4kHz", "8kHz", "16kHz", "32kHz",
522 EXPORT_SYMBOL_GPL(arizona_sample_rate_text);
524 const unsigned int arizona_sample_rate_val[ARIZONA_SAMPLE_RATE_ENUM_SIZE] = {
525 0x01, 0x02, 0x03, 0x04, 0x05, 0x09, 0x0A, 0x0B, 0x0C, 0x0D,
526 0x10, 0x11, 0x12, 0x13,
528 EXPORT_SYMBOL_GPL(arizona_sample_rate_val);
530 const char *arizona_sample_rate_val_to_name(unsigned int rate_val)
534 for (i = 0; i < ARRAY_SIZE(arizona_sample_rate_val); ++i) {
535 if (arizona_sample_rate_val[i] == rate_val)
536 return arizona_sample_rate_text[i];
541 EXPORT_SYMBOL_GPL(arizona_sample_rate_val_to_name);
543 const char * const arizona_rate_text[ARIZONA_RATE_ENUM_SIZE] = {
544 "SYNCCLK rate", "8kHz", "16kHz", "ASYNCCLK rate",
546 EXPORT_SYMBOL_GPL(arizona_rate_text);
548 const unsigned int arizona_rate_val[ARIZONA_RATE_ENUM_SIZE] = {
551 EXPORT_SYMBOL_GPL(arizona_rate_val);
554 const struct soc_enum arizona_isrc_fsh[] = {
555 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_1,
556 ARIZONA_ISRC1_FSH_SHIFT, 0xf,
557 ARIZONA_RATE_ENUM_SIZE,
558 arizona_rate_text, arizona_rate_val),
559 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_1,
560 ARIZONA_ISRC2_FSH_SHIFT, 0xf,
561 ARIZONA_RATE_ENUM_SIZE,
562 arizona_rate_text, arizona_rate_val),
563 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_1,
564 ARIZONA_ISRC3_FSH_SHIFT, 0xf,
565 ARIZONA_RATE_ENUM_SIZE,
566 arizona_rate_text, arizona_rate_val),
568 EXPORT_SYMBOL_GPL(arizona_isrc_fsh);
570 const struct soc_enum arizona_isrc_fsl[] = {
571 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_1_CTRL_2,
572 ARIZONA_ISRC1_FSL_SHIFT, 0xf,
573 ARIZONA_RATE_ENUM_SIZE,
574 arizona_rate_text, arizona_rate_val),
575 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_2_CTRL_2,
576 ARIZONA_ISRC2_FSL_SHIFT, 0xf,
577 ARIZONA_RATE_ENUM_SIZE,
578 arizona_rate_text, arizona_rate_val),
579 SOC_VALUE_ENUM_SINGLE(ARIZONA_ISRC_3_CTRL_2,
580 ARIZONA_ISRC3_FSL_SHIFT, 0xf,
581 ARIZONA_RATE_ENUM_SIZE,
582 arizona_rate_text, arizona_rate_val),
584 EXPORT_SYMBOL_GPL(arizona_isrc_fsl);
586 const struct soc_enum arizona_asrc_rate1 =
587 SOC_VALUE_ENUM_SINGLE(ARIZONA_ASRC_RATE1,
588 ARIZONA_ASRC_RATE1_SHIFT, 0xf,
589 ARIZONA_RATE_ENUM_SIZE - 1,
590 arizona_rate_text, arizona_rate_val);
591 EXPORT_SYMBOL_GPL(arizona_asrc_rate1);
593 static const char * const arizona_vol_ramp_text[] = {
594 "0ms/6dB", "0.5ms/6dB", "1ms/6dB", "2ms/6dB", "4ms/6dB", "8ms/6dB",
595 "15ms/6dB", "30ms/6dB",
598 SOC_ENUM_SINGLE_DECL(arizona_in_vd_ramp,
599 ARIZONA_INPUT_VOLUME_RAMP,
600 ARIZONA_IN_VD_RAMP_SHIFT,
601 arizona_vol_ramp_text);
602 EXPORT_SYMBOL_GPL(arizona_in_vd_ramp);
604 SOC_ENUM_SINGLE_DECL(arizona_in_vi_ramp,
605 ARIZONA_INPUT_VOLUME_RAMP,
606 ARIZONA_IN_VI_RAMP_SHIFT,
607 arizona_vol_ramp_text);
608 EXPORT_SYMBOL_GPL(arizona_in_vi_ramp);
610 SOC_ENUM_SINGLE_DECL(arizona_out_vd_ramp,
611 ARIZONA_OUTPUT_VOLUME_RAMP,
612 ARIZONA_OUT_VD_RAMP_SHIFT,
613 arizona_vol_ramp_text);
614 EXPORT_SYMBOL_GPL(arizona_out_vd_ramp);
616 SOC_ENUM_SINGLE_DECL(arizona_out_vi_ramp,
617 ARIZONA_OUTPUT_VOLUME_RAMP,
618 ARIZONA_OUT_VI_RAMP_SHIFT,
619 arizona_vol_ramp_text);
620 EXPORT_SYMBOL_GPL(arizona_out_vi_ramp);
622 static const char * const arizona_lhpf_mode_text[] = {
623 "Low-pass", "High-pass"
626 SOC_ENUM_SINGLE_DECL(arizona_lhpf1_mode,
628 ARIZONA_LHPF1_MODE_SHIFT,
629 arizona_lhpf_mode_text);
630 EXPORT_SYMBOL_GPL(arizona_lhpf1_mode);
632 SOC_ENUM_SINGLE_DECL(arizona_lhpf2_mode,
634 ARIZONA_LHPF2_MODE_SHIFT,
635 arizona_lhpf_mode_text);
636 EXPORT_SYMBOL_GPL(arizona_lhpf2_mode);
638 SOC_ENUM_SINGLE_DECL(arizona_lhpf3_mode,
640 ARIZONA_LHPF3_MODE_SHIFT,
641 arizona_lhpf_mode_text);
642 EXPORT_SYMBOL_GPL(arizona_lhpf3_mode);
644 SOC_ENUM_SINGLE_DECL(arizona_lhpf4_mode,
646 ARIZONA_LHPF4_MODE_SHIFT,
647 arizona_lhpf_mode_text);
648 EXPORT_SYMBOL_GPL(arizona_lhpf4_mode);
650 static const char * const arizona_ng_hold_text[] = {
651 "30ms", "120ms", "250ms", "500ms",
654 SOC_ENUM_SINGLE_DECL(arizona_ng_hold,
655 ARIZONA_NOISE_GATE_CONTROL,
656 ARIZONA_NGATE_HOLD_SHIFT,
657 arizona_ng_hold_text);
658 EXPORT_SYMBOL_GPL(arizona_ng_hold);
660 static const char * const arizona_in_hpf_cut_text[] = {
661 "2.5Hz", "5Hz", "10Hz", "20Hz", "40Hz"
664 SOC_ENUM_SINGLE_DECL(arizona_in_hpf_cut_enum,
666 ARIZONA_IN_HPF_CUT_SHIFT,
667 arizona_in_hpf_cut_text);
668 EXPORT_SYMBOL_GPL(arizona_in_hpf_cut_enum);
670 static const char * const arizona_in_dmic_osr_text[] = {
671 "1.536MHz", "3.072MHz", "6.144MHz", "768kHz",
674 const struct soc_enum arizona_in_dmic_osr[] = {
675 SOC_ENUM_SINGLE(ARIZONA_IN1L_CONTROL, ARIZONA_IN1_OSR_SHIFT,
676 ARRAY_SIZE(arizona_in_dmic_osr_text),
677 arizona_in_dmic_osr_text),
678 SOC_ENUM_SINGLE(ARIZONA_IN2L_CONTROL, ARIZONA_IN2_OSR_SHIFT,
679 ARRAY_SIZE(arizona_in_dmic_osr_text),
680 arizona_in_dmic_osr_text),
681 SOC_ENUM_SINGLE(ARIZONA_IN3L_CONTROL, ARIZONA_IN3_OSR_SHIFT,
682 ARRAY_SIZE(arizona_in_dmic_osr_text),
683 arizona_in_dmic_osr_text),
684 SOC_ENUM_SINGLE(ARIZONA_IN4L_CONTROL, ARIZONA_IN4_OSR_SHIFT,
685 ARRAY_SIZE(arizona_in_dmic_osr_text),
686 arizona_in_dmic_osr_text),
688 EXPORT_SYMBOL_GPL(arizona_in_dmic_osr);
690 static const char * const arizona_anc_input_src_text[] = {
691 "None", "IN1", "IN2", "IN3", "IN4",
694 static const char * const arizona_anc_channel_src_text[] = {
695 "None", "Left", "Right", "Combine",
698 const struct soc_enum arizona_anc_input_src[] = {
699 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
700 ARIZONA_IN_RXANCL_SEL_SHIFT,
701 ARRAY_SIZE(arizona_anc_input_src_text),
702 arizona_anc_input_src_text),
703 SOC_ENUM_SINGLE(ARIZONA_FCL_ADC_REFORMATTER_CONTROL,
704 ARIZONA_FCL_MIC_MODE_SEL,
705 ARRAY_SIZE(arizona_anc_channel_src_text),
706 arizona_anc_channel_src_text),
707 SOC_ENUM_SINGLE(ARIZONA_ANC_SRC,
708 ARIZONA_IN_RXANCR_SEL_SHIFT,
709 ARRAY_SIZE(arizona_anc_input_src_text),
710 arizona_anc_input_src_text),
711 SOC_ENUM_SINGLE(ARIZONA_FCR_ADC_REFORMATTER_CONTROL,
712 ARIZONA_FCR_MIC_MODE_SEL,
713 ARRAY_SIZE(arizona_anc_channel_src_text),
714 arizona_anc_channel_src_text),
716 EXPORT_SYMBOL_GPL(arizona_anc_input_src);
718 static const char * const arizona_anc_ng_texts[] = {
724 SOC_ENUM_SINGLE_DECL(arizona_anc_ng_enum, SND_SOC_NOPM, 0,
725 arizona_anc_ng_texts);
726 EXPORT_SYMBOL_GPL(arizona_anc_ng_enum);
728 static const char * const arizona_output_anc_src_text[] = {
729 "None", "RXANCL", "RXANCR",
732 const struct soc_enum arizona_output_anc_src[] = {
733 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1L,
734 ARIZONA_OUT1L_ANC_SRC_SHIFT,
735 ARRAY_SIZE(arizona_output_anc_src_text),
736 arizona_output_anc_src_text),
737 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_1R,
738 ARIZONA_OUT1R_ANC_SRC_SHIFT,
739 ARRAY_SIZE(arizona_output_anc_src_text),
740 arizona_output_anc_src_text),
741 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2L,
742 ARIZONA_OUT2L_ANC_SRC_SHIFT,
743 ARRAY_SIZE(arizona_output_anc_src_text),
744 arizona_output_anc_src_text),
745 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_2R,
746 ARIZONA_OUT2R_ANC_SRC_SHIFT,
747 ARRAY_SIZE(arizona_output_anc_src_text),
748 arizona_output_anc_src_text),
749 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_3L,
750 ARIZONA_OUT3L_ANC_SRC_SHIFT,
751 ARRAY_SIZE(arizona_output_anc_src_text),
752 arizona_output_anc_src_text),
753 SOC_ENUM_SINGLE(ARIZONA_DAC_VOLUME_LIMIT_3R,
754 ARIZONA_OUT3R_ANC_SRC_SHIFT,
755 ARRAY_SIZE(arizona_output_anc_src_text),
756 arizona_output_anc_src_text),
757 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4L,
758 ARIZONA_OUT4L_ANC_SRC_SHIFT,
759 ARRAY_SIZE(arizona_output_anc_src_text),
760 arizona_output_anc_src_text),
761 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_4R,
762 ARIZONA_OUT4R_ANC_SRC_SHIFT,
763 ARRAY_SIZE(arizona_output_anc_src_text),
764 arizona_output_anc_src_text),
765 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5L,
766 ARIZONA_OUT5L_ANC_SRC_SHIFT,
767 ARRAY_SIZE(arizona_output_anc_src_text),
768 arizona_output_anc_src_text),
769 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_5R,
770 ARIZONA_OUT5R_ANC_SRC_SHIFT,
771 ARRAY_SIZE(arizona_output_anc_src_text),
772 arizona_output_anc_src_text),
773 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6L,
774 ARIZONA_OUT6L_ANC_SRC_SHIFT,
775 ARRAY_SIZE(arizona_output_anc_src_text),
776 arizona_output_anc_src_text),
777 SOC_ENUM_SINGLE(ARIZONA_OUTPUT_PATH_CONFIG_6R,
778 ARIZONA_OUT6R_ANC_SRC_SHIFT,
779 ARRAY_SIZE(arizona_output_anc_src_text),
780 arizona_output_anc_src_text),
782 EXPORT_SYMBOL_GPL(arizona_output_anc_src);
784 const struct snd_kcontrol_new arizona_voice_trigger_switch[] = {
785 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 0, 1, 0),
786 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 1, 1, 0),
787 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 2, 1, 0),
788 SOC_DAPM_SINGLE("Switch", SND_SOC_NOPM, 3, 1, 0),
790 EXPORT_SYMBOL_GPL(arizona_voice_trigger_switch);
792 static void arizona_in_set_vu(struct snd_soc_codec *codec, int ena)
794 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
803 for (i = 0; i < priv->num_inputs; i++)
804 snd_soc_update_bits(codec,
805 ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 4),
809 bool arizona_input_analog(struct snd_soc_codec *codec, int shift)
811 unsigned int reg = ARIZONA_IN1L_CONTROL + ((shift / 2) * 8);
812 unsigned int val = snd_soc_read(codec, reg);
814 return !(val & ARIZONA_IN1_MODE_MASK);
816 EXPORT_SYMBOL_GPL(arizona_input_analog);
818 int arizona_in_ev(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol,
821 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
822 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
826 reg = ARIZONA_ADC_DIGITAL_VOLUME_1L + ((w->shift / 2) * 8);
828 reg = ARIZONA_ADC_DIGITAL_VOLUME_1R + ((w->shift / 2) * 8);
831 case SND_SOC_DAPM_PRE_PMU:
834 case SND_SOC_DAPM_POST_PMU:
835 snd_soc_update_bits(codec, reg, ARIZONA_IN1L_MUTE, 0);
837 /* If this is the last input pending then allow VU */
839 if (priv->in_pending == 0) {
841 arizona_in_set_vu(codec, 1);
844 case SND_SOC_DAPM_PRE_PMD:
845 snd_soc_update_bits(codec, reg,
846 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU,
847 ARIZONA_IN1L_MUTE | ARIZONA_IN_VU);
849 case SND_SOC_DAPM_POST_PMD:
850 /* Disable volume updates if no inputs are enabled */
851 reg = snd_soc_read(codec, ARIZONA_INPUT_ENABLES);
853 arizona_in_set_vu(codec, 0);
861 EXPORT_SYMBOL_GPL(arizona_in_ev);
863 int arizona_out_ev(struct snd_soc_dapm_widget *w,
864 struct snd_kcontrol *kcontrol,
867 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
868 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
869 struct arizona *arizona = priv->arizona;
872 case SND_SOC_DAPM_PRE_PMU:
874 case ARIZONA_OUT1L_ENA_SHIFT:
875 case ARIZONA_OUT1R_ENA_SHIFT:
876 case ARIZONA_OUT2L_ENA_SHIFT:
877 case ARIZONA_OUT2R_ENA_SHIFT:
878 case ARIZONA_OUT3L_ENA_SHIFT:
879 case ARIZONA_OUT3R_ENA_SHIFT:
880 priv->out_up_pending++;
881 priv->out_up_delay += 17;
883 case ARIZONA_OUT4L_ENA_SHIFT:
884 case ARIZONA_OUT4R_ENA_SHIFT:
885 priv->out_up_pending++;
886 switch (arizona->type) {
891 priv->out_up_delay += 10;
899 case SND_SOC_DAPM_POST_PMU:
901 case ARIZONA_OUT1L_ENA_SHIFT:
902 case ARIZONA_OUT1R_ENA_SHIFT:
903 case ARIZONA_OUT2L_ENA_SHIFT:
904 case ARIZONA_OUT2R_ENA_SHIFT:
905 case ARIZONA_OUT3L_ENA_SHIFT:
906 case ARIZONA_OUT3R_ENA_SHIFT:
907 case ARIZONA_OUT4L_ENA_SHIFT:
908 case ARIZONA_OUT4R_ENA_SHIFT:
909 priv->out_up_pending--;
910 if (!priv->out_up_pending && priv->out_up_delay) {
911 dev_dbg(codec->dev, "Power up delay: %d\n",
913 msleep(priv->out_up_delay);
914 priv->out_up_delay = 0;
922 case SND_SOC_DAPM_PRE_PMD:
924 case ARIZONA_OUT1L_ENA_SHIFT:
925 case ARIZONA_OUT1R_ENA_SHIFT:
926 case ARIZONA_OUT2L_ENA_SHIFT:
927 case ARIZONA_OUT2R_ENA_SHIFT:
928 case ARIZONA_OUT3L_ENA_SHIFT:
929 case ARIZONA_OUT3R_ENA_SHIFT:
930 priv->out_down_pending++;
931 priv->out_down_delay++;
933 case ARIZONA_OUT4L_ENA_SHIFT:
934 case ARIZONA_OUT4R_ENA_SHIFT:
935 priv->out_down_pending++;
936 switch (arizona->type) {
942 priv->out_down_delay += 5;
945 priv->out_down_delay++;
952 case SND_SOC_DAPM_POST_PMD:
954 case ARIZONA_OUT1L_ENA_SHIFT:
955 case ARIZONA_OUT1R_ENA_SHIFT:
956 case ARIZONA_OUT2L_ENA_SHIFT:
957 case ARIZONA_OUT2R_ENA_SHIFT:
958 case ARIZONA_OUT3L_ENA_SHIFT:
959 case ARIZONA_OUT3R_ENA_SHIFT:
960 case ARIZONA_OUT4L_ENA_SHIFT:
961 case ARIZONA_OUT4R_ENA_SHIFT:
962 priv->out_down_pending--;
963 if (!priv->out_down_pending && priv->out_down_delay) {
964 dev_dbg(codec->dev, "Power down delay: %d\n",
965 priv->out_down_delay);
966 msleep(priv->out_down_delay);
967 priv->out_down_delay = 0;
980 EXPORT_SYMBOL_GPL(arizona_out_ev);
982 int arizona_hp_ev(struct snd_soc_dapm_widget *w,
983 struct snd_kcontrol *kcontrol,
986 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
987 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
988 struct arizona *arizona = priv->arizona;
989 unsigned int mask = 1 << w->shift;
993 case SND_SOC_DAPM_POST_PMU:
996 case SND_SOC_DAPM_PRE_PMD:
999 case SND_SOC_DAPM_PRE_PMU:
1000 case SND_SOC_DAPM_POST_PMD:
1001 return arizona_out_ev(w, kcontrol, event);
1006 /* Store the desired state for the HP outputs */
1007 priv->arizona->hp_ena &= ~mask;
1008 priv->arizona->hp_ena |= val;
1010 /* Force off if HPDET clamp is active */
1011 if (priv->arizona->hpdet_clamp)
1014 regmap_update_bits_async(arizona->regmap, ARIZONA_OUTPUT_ENABLES_1,
1017 return arizona_out_ev(w, kcontrol, event);
1019 EXPORT_SYMBOL_GPL(arizona_hp_ev);
1021 static int arizona_dvfs_enable(struct snd_soc_codec *codec)
1023 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1024 struct arizona *arizona = priv->arizona;
1027 ret = regulator_set_voltage(arizona->dcvdd, 1800000, 1800000);
1029 dev_err(codec->dev, "Failed to boost DCVDD: %d\n", ret);
1033 ret = regmap_update_bits(arizona->regmap,
1034 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
1035 ARIZONA_SUBSYS_MAX_FREQ,
1036 ARIZONA_SUBSYS_MAX_FREQ);
1038 dev_err(codec->dev, "Failed to enable subsys max: %d\n", ret);
1039 regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1046 static int arizona_dvfs_disable(struct snd_soc_codec *codec)
1048 const struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1049 struct arizona *arizona = priv->arizona;
1052 ret = regmap_update_bits(arizona->regmap,
1053 ARIZONA_DYNAMIC_FREQUENCY_SCALING_1,
1054 ARIZONA_SUBSYS_MAX_FREQ, 0);
1056 dev_err(codec->dev, "Failed to disable subsys max: %d\n", ret);
1060 ret = regulator_set_voltage(arizona->dcvdd, 1200000, 1800000);
1062 dev_err(codec->dev, "Failed to unboost DCVDD: %d\n", ret);
1069 int arizona_dvfs_up(struct snd_soc_codec *codec, unsigned int flags)
1071 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1074 mutex_lock(&priv->dvfs_lock);
1076 if (!priv->dvfs_cached && !priv->dvfs_reqs) {
1077 ret = arizona_dvfs_enable(codec);
1082 priv->dvfs_reqs |= flags;
1084 mutex_unlock(&priv->dvfs_lock);
1087 EXPORT_SYMBOL_GPL(arizona_dvfs_up);
1089 int arizona_dvfs_down(struct snd_soc_codec *codec, unsigned int flags)
1091 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1092 unsigned int old_reqs;
1095 mutex_lock(&priv->dvfs_lock);
1097 old_reqs = priv->dvfs_reqs;
1098 priv->dvfs_reqs &= ~flags;
1100 if (!priv->dvfs_cached && old_reqs && !priv->dvfs_reqs)
1101 ret = arizona_dvfs_disable(codec);
1103 mutex_unlock(&priv->dvfs_lock);
1106 EXPORT_SYMBOL_GPL(arizona_dvfs_down);
1108 int arizona_dvfs_sysclk_ev(struct snd_soc_dapm_widget *w,
1109 struct snd_kcontrol *kcontrol, int event)
1111 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1112 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1115 mutex_lock(&priv->dvfs_lock);
1118 case SND_SOC_DAPM_POST_PMU:
1119 if (priv->dvfs_reqs)
1120 ret = arizona_dvfs_enable(codec);
1122 priv->dvfs_cached = false;
1124 case SND_SOC_DAPM_PRE_PMD:
1125 /* We must ensure DVFS is disabled before the codec goes into
1126 * suspend so that we are never in an illegal state of DVFS
1127 * enabled without enough DCVDD
1129 priv->dvfs_cached = true;
1131 if (priv->dvfs_reqs)
1132 ret = arizona_dvfs_disable(codec);
1138 mutex_unlock(&priv->dvfs_lock);
1141 EXPORT_SYMBOL_GPL(arizona_dvfs_sysclk_ev);
1143 void arizona_init_dvfs(struct arizona_priv *priv)
1145 mutex_init(&priv->dvfs_lock);
1147 EXPORT_SYMBOL_GPL(arizona_init_dvfs);
1149 int arizona_anc_ev(struct snd_soc_dapm_widget *w,
1150 struct snd_kcontrol *kcontrol,
1153 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(w->dapm);
1157 case SND_SOC_DAPM_POST_PMU:
1158 val = 1 << w->shift;
1160 case SND_SOC_DAPM_PRE_PMD:
1161 val = 1 << (w->shift + 1);
1167 snd_soc_write(codec, ARIZONA_CLOCK_CONTROL, val);
1171 EXPORT_SYMBOL_GPL(arizona_anc_ev);
1173 static unsigned int arizona_opclk_ref_48k_rates[] = {
1180 static unsigned int arizona_opclk_ref_44k1_rates[] = {
1187 static int arizona_set_opclk(struct snd_soc_codec *codec, unsigned int clk,
1190 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1192 unsigned int *rates;
1193 int ref, div, refclk;
1196 case ARIZONA_CLK_OPCLK:
1197 reg = ARIZONA_OUTPUT_SYSTEM_CLOCK;
1198 refclk = priv->sysclk;
1200 case ARIZONA_CLK_ASYNC_OPCLK:
1201 reg = ARIZONA_OUTPUT_ASYNC_CLOCK;
1202 refclk = priv->asyncclk;
1209 rates = arizona_opclk_ref_44k1_rates;
1211 rates = arizona_opclk_ref_48k_rates;
1213 for (ref = 0; ref < ARRAY_SIZE(arizona_opclk_ref_48k_rates) &&
1214 rates[ref] <= refclk; ref++) {
1216 while (rates[ref] / div >= freq && div < 32) {
1217 if (rates[ref] / div == freq) {
1218 dev_dbg(codec->dev, "Configured %dHz OPCLK\n",
1220 snd_soc_update_bits(codec, reg,
1221 ARIZONA_OPCLK_DIV_MASK |
1222 ARIZONA_OPCLK_SEL_MASK,
1224 ARIZONA_OPCLK_DIV_SHIFT) |
1232 dev_err(codec->dev, "Unable to generate %dHz OPCLK\n", freq);
1236 int arizona_set_sysclk(struct snd_soc_codec *codec, int clk_id,
1237 int source, unsigned int freq, int dir)
1239 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1240 struct arizona *arizona = priv->arizona;
1243 unsigned int mask = ARIZONA_SYSCLK_FREQ_MASK | ARIZONA_SYSCLK_SRC_MASK;
1244 unsigned int val = source << ARIZONA_SYSCLK_SRC_SHIFT;
1248 case ARIZONA_CLK_SYSCLK:
1250 reg = ARIZONA_SYSTEM_CLOCK_1;
1251 clk = &priv->sysclk;
1252 mask |= ARIZONA_SYSCLK_FRAC;
1254 case ARIZONA_CLK_ASYNCCLK:
1256 reg = ARIZONA_ASYNC_CLOCK_1;
1257 clk = &priv->asyncclk;
1259 case ARIZONA_CLK_OPCLK:
1260 case ARIZONA_CLK_ASYNC_OPCLK:
1261 return arizona_set_opclk(codec, clk_id, freq);
1272 val |= ARIZONA_CLK_12MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1276 val |= ARIZONA_CLK_24MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1280 val |= ARIZONA_CLK_49MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1284 val |= ARIZONA_CLK_73MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1288 val |= ARIZONA_CLK_98MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1292 val |= ARIZONA_CLK_147MHZ << ARIZONA_SYSCLK_FREQ_SHIFT;
1295 dev_dbg(arizona->dev, "%s cleared\n", name);
1305 val |= ARIZONA_SYSCLK_FRAC;
1307 dev_dbg(arizona->dev, "%s set to %uHz", name, freq);
1309 return regmap_update_bits(arizona->regmap, reg, mask, val);
1311 EXPORT_SYMBOL_GPL(arizona_set_sysclk);
1313 static int arizona_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1315 struct snd_soc_codec *codec = dai->codec;
1316 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1317 struct arizona *arizona = priv->arizona;
1318 int lrclk, bclk, mode, base;
1320 base = dai->driver->base;
1325 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1326 case SND_SOC_DAIFMT_DSP_A:
1327 mode = ARIZONA_FMT_DSP_MODE_A;
1329 case SND_SOC_DAIFMT_DSP_B:
1330 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1331 != SND_SOC_DAIFMT_CBM_CFM) {
1332 arizona_aif_err(dai, "DSP_B not valid in slave mode\n");
1335 mode = ARIZONA_FMT_DSP_MODE_B;
1337 case SND_SOC_DAIFMT_I2S:
1338 mode = ARIZONA_FMT_I2S_MODE;
1340 case SND_SOC_DAIFMT_LEFT_J:
1341 if ((fmt & SND_SOC_DAIFMT_MASTER_MASK)
1342 != SND_SOC_DAIFMT_CBM_CFM) {
1343 arizona_aif_err(dai, "LEFT_J not valid in slave mode\n");
1346 mode = ARIZONA_FMT_LEFT_JUSTIFIED_MODE;
1349 arizona_aif_err(dai, "Unsupported DAI format %d\n",
1350 fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1354 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1355 case SND_SOC_DAIFMT_CBS_CFS:
1357 case SND_SOC_DAIFMT_CBS_CFM:
1358 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1360 case SND_SOC_DAIFMT_CBM_CFS:
1361 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1363 case SND_SOC_DAIFMT_CBM_CFM:
1364 bclk |= ARIZONA_AIF1_BCLK_MSTR;
1365 lrclk |= ARIZONA_AIF1TX_LRCLK_MSTR;
1368 arizona_aif_err(dai, "Unsupported master mode %d\n",
1369 fmt & SND_SOC_DAIFMT_MASTER_MASK);
1373 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1374 case SND_SOC_DAIFMT_NB_NF:
1376 case SND_SOC_DAIFMT_IB_IF:
1377 bclk |= ARIZONA_AIF1_BCLK_INV;
1378 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1380 case SND_SOC_DAIFMT_IB_NF:
1381 bclk |= ARIZONA_AIF1_BCLK_INV;
1383 case SND_SOC_DAIFMT_NB_IF:
1384 lrclk |= ARIZONA_AIF1TX_LRCLK_INV;
1390 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_BCLK_CTRL,
1391 ARIZONA_AIF1_BCLK_INV |
1392 ARIZONA_AIF1_BCLK_MSTR,
1394 regmap_update_bits_async(arizona->regmap, base + ARIZONA_AIF_TX_PIN_CTRL,
1395 ARIZONA_AIF1TX_LRCLK_INV |
1396 ARIZONA_AIF1TX_LRCLK_MSTR, lrclk);
1397 regmap_update_bits_async(arizona->regmap,
1398 base + ARIZONA_AIF_RX_PIN_CTRL,
1399 ARIZONA_AIF1RX_LRCLK_INV |
1400 ARIZONA_AIF1RX_LRCLK_MSTR, lrclk);
1401 regmap_update_bits(arizona->regmap, base + ARIZONA_AIF_FORMAT,
1402 ARIZONA_AIF1_FMT_MASK, mode);
1407 static const int arizona_48k_bclk_rates[] = {
1429 static const int arizona_44k1_bclk_rates[] = {
1451 static const unsigned int arizona_sr_vals[] = {
1478 #define ARIZONA_48K_RATE_MASK 0x0F003E
1479 #define ARIZONA_44K1_RATE_MASK 0x003E00
1480 #define ARIZONA_RATE_MASK (ARIZONA_48K_RATE_MASK | ARIZONA_44K1_RATE_MASK)
1482 static const struct snd_pcm_hw_constraint_list arizona_constraint = {
1483 .count = ARRAY_SIZE(arizona_sr_vals),
1484 .list = arizona_sr_vals,
1487 static int arizona_startup(struct snd_pcm_substream *substream,
1488 struct snd_soc_dai *dai)
1490 struct snd_soc_codec *codec = dai->codec;
1491 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1492 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1493 unsigned int base_rate;
1495 if (!substream->runtime)
1498 switch (dai_priv->clk) {
1499 case ARIZONA_CLK_SYSCLK:
1500 base_rate = priv->sysclk;
1502 case ARIZONA_CLK_ASYNCCLK:
1503 base_rate = priv->asyncclk;
1510 dai_priv->constraint.mask = ARIZONA_RATE_MASK;
1511 else if (base_rate % 8000)
1512 dai_priv->constraint.mask = ARIZONA_44K1_RATE_MASK;
1514 dai_priv->constraint.mask = ARIZONA_48K_RATE_MASK;
1516 return snd_pcm_hw_constraint_list(substream->runtime, 0,
1517 SNDRV_PCM_HW_PARAM_RATE,
1518 &dai_priv->constraint);
1521 static void arizona_wm5102_set_dac_comp(struct snd_soc_codec *codec,
1524 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1525 struct arizona *arizona = priv->arizona;
1526 struct reg_sequence dac_comp[] = {
1528 { ARIZONA_DAC_COMP_1, 0 },
1529 { ARIZONA_DAC_COMP_2, 0 },
1533 mutex_lock(&arizona->dac_comp_lock);
1535 dac_comp[1].def = arizona->dac_comp_coeff;
1537 dac_comp[2].def = arizona->dac_comp_enabled;
1539 mutex_unlock(&arizona->dac_comp_lock);
1541 regmap_multi_reg_write(arizona->regmap,
1543 ARRAY_SIZE(dac_comp));
1546 static int arizona_hw_params_rate(struct snd_pcm_substream *substream,
1547 struct snd_pcm_hw_params *params,
1548 struct snd_soc_dai *dai)
1550 struct snd_soc_codec *codec = dai->codec;
1551 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1552 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1553 int base = dai->driver->base;
1557 * We will need to be more flexible than this in future,
1558 * currently we use a single sample rate for SYSCLK.
1560 for (i = 0; i < ARRAY_SIZE(arizona_sr_vals); i++)
1561 if (arizona_sr_vals[i] == params_rate(params))
1563 if (i == ARRAY_SIZE(arizona_sr_vals)) {
1564 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1565 params_rate(params));
1570 switch (priv->arizona->type) {
1573 if (arizona_sr_vals[sr_val] >= 88200)
1574 ret = arizona_dvfs_up(codec, ARIZONA_DVFS_SR1_RQ);
1576 ret = arizona_dvfs_down(codec, ARIZONA_DVFS_SR1_RQ);
1579 arizona_aif_err(dai, "Failed to change DVFS %d\n", ret);
1587 switch (dai_priv->clk) {
1588 case ARIZONA_CLK_SYSCLK:
1589 switch (priv->arizona->type) {
1591 arizona_wm5102_set_dac_comp(codec,
1592 params_rate(params));
1598 snd_soc_update_bits(codec, ARIZONA_SAMPLE_RATE_1,
1599 ARIZONA_SAMPLE_RATE_1_MASK, sr_val);
1601 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1602 ARIZONA_AIF1_RATE_MASK, 0);
1604 case ARIZONA_CLK_ASYNCCLK:
1605 snd_soc_update_bits(codec, ARIZONA_ASYNC_SAMPLE_RATE_1,
1606 ARIZONA_ASYNC_SAMPLE_RATE_1_MASK, sr_val);
1608 snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1609 ARIZONA_AIF1_RATE_MASK,
1610 8 << ARIZONA_AIF1_RATE_SHIFT);
1613 arizona_aif_err(dai, "Invalid clock %d\n", dai_priv->clk);
1620 static bool arizona_aif_cfg_changed(struct snd_soc_codec *codec,
1621 int base, int bclk, int lrclk, int frame)
1625 val = snd_soc_read(codec, base + ARIZONA_AIF_BCLK_CTRL);
1626 if (bclk != (val & ARIZONA_AIF1_BCLK_FREQ_MASK))
1629 val = snd_soc_read(codec, base + ARIZONA_AIF_TX_BCLK_RATE);
1630 if (lrclk != (val & ARIZONA_AIF1TX_BCPF_MASK))
1633 val = snd_soc_read(codec, base + ARIZONA_AIF_FRAME_CTRL_1);
1634 if (frame != (val & (ARIZONA_AIF1TX_WL_MASK |
1635 ARIZONA_AIF1TX_SLOT_LEN_MASK)))
1641 static int arizona_hw_params(struct snd_pcm_substream *substream,
1642 struct snd_pcm_hw_params *params,
1643 struct snd_soc_dai *dai)
1645 struct snd_soc_codec *codec = dai->codec;
1646 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1647 struct arizona *arizona = priv->arizona;
1648 int base = dai->driver->base;
1651 int channels = params_channels(params);
1652 int chan_limit = arizona->pdata.max_channels_clocked[dai->id - 1];
1653 int tdm_width = arizona->tdm_width[dai->id - 1];
1654 int tdm_slots = arizona->tdm_slots[dai->id - 1];
1655 int bclk, lrclk, wl, frame, bclk_target;
1657 unsigned int aif_tx_state, aif_rx_state;
1659 if (params_rate(params) % 4000)
1660 rates = &arizona_44k1_bclk_rates[0];
1662 rates = &arizona_48k_bclk_rates[0];
1664 wl = params_width(params);
1667 arizona_aif_dbg(dai, "Configuring for %d %d bit TDM slots\n",
1668 tdm_slots, tdm_width);
1669 bclk_target = tdm_slots * tdm_width * params_rate(params);
1670 channels = tdm_slots;
1672 bclk_target = snd_soc_params_to_bclk(params);
1676 if (chan_limit && chan_limit < channels) {
1677 arizona_aif_dbg(dai, "Limiting to %d channels\n", chan_limit);
1678 bclk_target /= channels;
1679 bclk_target *= chan_limit;
1682 /* Force multiple of 2 channels for I2S mode */
1683 val = snd_soc_read(codec, base + ARIZONA_AIF_FORMAT);
1684 val &= ARIZONA_AIF1_FMT_MASK;
1685 if ((channels & 1) && (val == ARIZONA_FMT_I2S_MODE)) {
1686 arizona_aif_dbg(dai, "Forcing stereo mode\n");
1687 bclk_target /= channels;
1688 bclk_target *= channels + 1;
1691 for (i = 0; i < ARRAY_SIZE(arizona_44k1_bclk_rates); i++) {
1692 if (rates[i] >= bclk_target &&
1693 rates[i] % params_rate(params) == 0) {
1698 if (i == ARRAY_SIZE(arizona_44k1_bclk_rates)) {
1699 arizona_aif_err(dai, "Unsupported sample rate %dHz\n",
1700 params_rate(params));
1704 lrclk = rates[bclk] / params_rate(params);
1706 arizona_aif_dbg(dai, "BCLK %dHz LRCLK %dHz\n",
1707 rates[bclk], rates[bclk] / lrclk);
1709 frame = wl << ARIZONA_AIF1TX_WL_SHIFT | tdm_width;
1711 reconfig = arizona_aif_cfg_changed(codec, base, bclk, lrclk, frame);
1714 /* Save AIF TX/RX state */
1715 aif_tx_state = snd_soc_read(codec,
1716 base + ARIZONA_AIF_TX_ENABLES);
1717 aif_rx_state = snd_soc_read(codec,
1718 base + ARIZONA_AIF_RX_ENABLES);
1719 /* Disable AIF TX/RX before reconfiguring it */
1720 regmap_update_bits_async(arizona->regmap,
1721 base + ARIZONA_AIF_TX_ENABLES, 0xff, 0x0);
1722 regmap_update_bits(arizona->regmap,
1723 base + ARIZONA_AIF_RX_ENABLES, 0xff, 0x0);
1726 ret = arizona_hw_params_rate(substream, params, dai);
1731 regmap_update_bits_async(arizona->regmap,
1732 base + ARIZONA_AIF_BCLK_CTRL,
1733 ARIZONA_AIF1_BCLK_FREQ_MASK, bclk);
1734 regmap_update_bits_async(arizona->regmap,
1735 base + ARIZONA_AIF_TX_BCLK_RATE,
1736 ARIZONA_AIF1TX_BCPF_MASK, lrclk);
1737 regmap_update_bits_async(arizona->regmap,
1738 base + ARIZONA_AIF_RX_BCLK_RATE,
1739 ARIZONA_AIF1RX_BCPF_MASK, lrclk);
1740 regmap_update_bits_async(arizona->regmap,
1741 base + ARIZONA_AIF_FRAME_CTRL_1,
1742 ARIZONA_AIF1TX_WL_MASK |
1743 ARIZONA_AIF1TX_SLOT_LEN_MASK, frame);
1744 regmap_update_bits(arizona->regmap,
1745 base + ARIZONA_AIF_FRAME_CTRL_2,
1746 ARIZONA_AIF1RX_WL_MASK |
1747 ARIZONA_AIF1RX_SLOT_LEN_MASK, frame);
1752 /* Restore AIF TX/RX state */
1753 regmap_update_bits_async(arizona->regmap,
1754 base + ARIZONA_AIF_TX_ENABLES,
1755 0xff, aif_tx_state);
1756 regmap_update_bits(arizona->regmap,
1757 base + ARIZONA_AIF_RX_ENABLES,
1758 0xff, aif_rx_state);
1763 static const char *arizona_dai_clk_str(int clk_id)
1766 case ARIZONA_CLK_SYSCLK:
1768 case ARIZONA_CLK_ASYNCCLK:
1771 return "Unknown clock";
1775 static int arizona_dai_set_sysclk(struct snd_soc_dai *dai,
1776 int clk_id, unsigned int freq, int dir)
1778 struct snd_soc_codec *codec = dai->codec;
1779 struct snd_soc_dapm_context *dapm = snd_soc_codec_get_dapm(codec);
1780 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1781 struct arizona_dai_priv *dai_priv = &priv->dai[dai->id - 1];
1782 struct snd_soc_dapm_route routes[2];
1785 case ARIZONA_CLK_SYSCLK:
1786 case ARIZONA_CLK_ASYNCCLK:
1792 if (clk_id == dai_priv->clk)
1796 dev_err(codec->dev, "Can't change clock on active DAI %d\n",
1801 dev_dbg(codec->dev, "Setting AIF%d to %s\n", dai->id + 1,
1802 arizona_dai_clk_str(clk_id));
1804 memset(&routes, 0, sizeof(routes));
1805 routes[0].sink = dai->driver->capture.stream_name;
1806 routes[1].sink = dai->driver->playback.stream_name;
1808 routes[0].source = arizona_dai_clk_str(dai_priv->clk);
1809 routes[1].source = arizona_dai_clk_str(dai_priv->clk);
1810 snd_soc_dapm_del_routes(dapm, routes, ARRAY_SIZE(routes));
1812 routes[0].source = arizona_dai_clk_str(clk_id);
1813 routes[1].source = arizona_dai_clk_str(clk_id);
1814 snd_soc_dapm_add_routes(dapm, routes, ARRAY_SIZE(routes));
1816 dai_priv->clk = clk_id;
1818 return snd_soc_dapm_sync(dapm);
1821 static int arizona_set_tristate(struct snd_soc_dai *dai, int tristate)
1823 struct snd_soc_codec *codec = dai->codec;
1824 int base = dai->driver->base;
1828 reg = ARIZONA_AIF1_TRI;
1832 return snd_soc_update_bits(codec, base + ARIZONA_AIF_RATE_CTRL,
1833 ARIZONA_AIF1_TRI, reg);
1836 static void arizona_set_channels_to_mask(struct snd_soc_dai *dai,
1838 int channels, unsigned int mask)
1840 struct snd_soc_codec *codec = dai->codec;
1841 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1842 struct arizona *arizona = priv->arizona;
1845 for (i = 0; i < channels; ++i) {
1846 slot = ffs(mask) - 1;
1850 regmap_write(arizona->regmap, base + i, slot);
1852 mask &= ~(1 << slot);
1856 arizona_aif_warn(dai, "Too many channels in TDM mask\n");
1859 static int arizona_set_tdm_slot(struct snd_soc_dai *dai, unsigned int tx_mask,
1860 unsigned int rx_mask, int slots, int slot_width)
1862 struct snd_soc_codec *codec = dai->codec;
1863 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
1864 struct arizona *arizona = priv->arizona;
1865 int base = dai->driver->base;
1866 int rx_max_chan = dai->driver->playback.channels_max;
1867 int tx_max_chan = dai->driver->capture.channels_max;
1869 /* Only support TDM for the physical AIFs */
1870 if (dai->id > ARIZONA_MAX_AIF)
1874 tx_mask = (1 << tx_max_chan) - 1;
1875 rx_mask = (1 << rx_max_chan) - 1;
1878 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_3,
1879 tx_max_chan, tx_mask);
1880 arizona_set_channels_to_mask(dai, base + ARIZONA_AIF_FRAME_CTRL_11,
1881 rx_max_chan, rx_mask);
1883 arizona->tdm_width[dai->id - 1] = slot_width;
1884 arizona->tdm_slots[dai->id - 1] = slots;
1889 const struct snd_soc_dai_ops arizona_dai_ops = {
1890 .startup = arizona_startup,
1891 .set_fmt = arizona_set_fmt,
1892 .set_tdm_slot = arizona_set_tdm_slot,
1893 .hw_params = arizona_hw_params,
1894 .set_sysclk = arizona_dai_set_sysclk,
1895 .set_tristate = arizona_set_tristate,
1897 EXPORT_SYMBOL_GPL(arizona_dai_ops);
1899 const struct snd_soc_dai_ops arizona_simple_dai_ops = {
1900 .startup = arizona_startup,
1901 .hw_params = arizona_hw_params_rate,
1902 .set_sysclk = arizona_dai_set_sysclk,
1904 EXPORT_SYMBOL_GPL(arizona_simple_dai_ops);
1906 int arizona_init_dai(struct arizona_priv *priv, int id)
1908 struct arizona_dai_priv *dai_priv = &priv->dai[id];
1910 dai_priv->clk = ARIZONA_CLK_SYSCLK;
1911 dai_priv->constraint = arizona_constraint;
1915 EXPORT_SYMBOL_GPL(arizona_init_dai);
1923 { 0, 64000, 4, 16 },
1924 { 64000, 128000, 3, 8 },
1925 { 128000, 256000, 2, 4 },
1926 { 256000, 1000000, 1, 2 },
1927 { 1000000, 13500000, 0, 1 },
1930 static const unsigned int pseudo_fref_max[ARIZONA_FLL_MAX_FRATIO] = {
1955 { 256000, 1000000, 2 },
1956 { 1000000, 13500000, 4 },
1959 struct arizona_fll_cfg {
1969 static int arizona_validate_fll(struct arizona_fll *fll,
1973 unsigned int Fvco_min;
1975 if (fll->fout && Fout != fll->fout) {
1976 arizona_fll_err(fll,
1977 "Can't change output on active FLL\n");
1981 if (Fref / ARIZONA_FLL_MAX_REFDIV > ARIZONA_FLL_MAX_FREF) {
1982 arizona_fll_err(fll,
1983 "Can't scale %dMHz in to <=13.5MHz\n",
1988 Fvco_min = ARIZONA_FLL_MIN_FVCO * fll->vco_mult;
1989 if (Fout * ARIZONA_FLL_MAX_OUTDIV < Fvco_min) {
1990 arizona_fll_err(fll, "No FLL_OUTDIV for Fout=%uHz\n",
1998 static int arizona_find_fratio(unsigned int Fref, int *fratio)
2002 /* Find an appropriate FLL_FRATIO */
2003 for (i = 0; i < ARRAY_SIZE(fll_fratios); i++) {
2004 if (fll_fratios[i].min <= Fref && Fref <= fll_fratios[i].max) {
2006 *fratio = fll_fratios[i].fratio;
2007 return fll_fratios[i].ratio;
2014 static int arizona_calc_fratio(struct arizona_fll *fll,
2015 struct arizona_fll_cfg *cfg,
2016 unsigned int target,
2017 unsigned int Fref, bool sync)
2019 int init_ratio, ratio;
2022 /* Fref must be <=13.5MHz, find initial refdiv */
2025 while (Fref > ARIZONA_FLL_MAX_FREF) {
2030 if (div > ARIZONA_FLL_MAX_REFDIV)
2034 /* Find an appropriate FLL_FRATIO */
2035 init_ratio = arizona_find_fratio(Fref, &cfg->fratio);
2036 if (init_ratio < 0) {
2037 arizona_fll_err(fll, "Unable to find FRATIO for Fref=%uHz\n",
2042 switch (fll->arizona->type) {
2048 if (fll->arizona->rev < 3 || sync)
2057 cfg->fratio = init_ratio - 1;
2059 /* Adjust FRATIO/refdiv to avoid integer mode if possible */
2060 refdiv = cfg->refdiv;
2062 arizona_fll_dbg(fll, "pseudo: initial ratio=%u fref=%u refdiv=%u\n",
2063 init_ratio, Fref, refdiv);
2065 while (div <= ARIZONA_FLL_MAX_REFDIV) {
2066 /* start from init_ratio because this may already give a
2069 for (ratio = init_ratio; ratio > 0; ratio--) {
2070 if (target % (ratio * Fref)) {
2071 cfg->refdiv = refdiv;
2072 cfg->fratio = ratio - 1;
2073 arizona_fll_dbg(fll,
2074 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2075 Fref, refdiv, div, ratio);
2080 for (ratio = init_ratio + 1; ratio <= ARIZONA_FLL_MAX_FRATIO;
2082 if ((ARIZONA_FLL_VCO_CORNER / 2) /
2083 (fll->vco_mult * ratio) < Fref) {
2084 arizona_fll_dbg(fll, "pseudo: hit VCO corner\n");
2088 if (Fref > pseudo_fref_max[ratio - 1]) {
2089 arizona_fll_dbg(fll,
2090 "pseudo: exceeded max fref(%u) for ratio=%u\n",
2091 pseudo_fref_max[ratio - 1],
2096 if (target % (ratio * Fref)) {
2097 cfg->refdiv = refdiv;
2098 cfg->fratio = ratio - 1;
2099 arizona_fll_dbg(fll,
2100 "pseudo: found fref=%u refdiv=%d(%d) ratio=%d\n",
2101 Fref, refdiv, div, ratio);
2109 init_ratio = arizona_find_fratio(Fref, NULL);
2110 arizona_fll_dbg(fll,
2111 "pseudo: change fref=%u refdiv=%d(%d) ratio=%u\n",
2112 Fref, refdiv, div, init_ratio);
2115 arizona_fll_warn(fll, "Falling back to integer mode operation\n");
2116 return cfg->fratio + 1;
2119 static int arizona_calc_fll(struct arizona_fll *fll,
2120 struct arizona_fll_cfg *cfg,
2121 unsigned int Fref, bool sync)
2123 unsigned int target, div, gcd_fll;
2126 arizona_fll_dbg(fll, "Fref=%u Fout=%u\n", Fref, fll->fout);
2128 /* Fvco should be over the targt; don't check the upper bound */
2129 div = ARIZONA_FLL_MIN_OUTDIV;
2130 while (fll->fout * div < ARIZONA_FLL_MIN_FVCO * fll->vco_mult) {
2132 if (div > ARIZONA_FLL_MAX_OUTDIV)
2135 target = fll->fout * div / fll->vco_mult;
2138 arizona_fll_dbg(fll, "Fvco=%dHz\n", target);
2140 /* Find an appropriate FLL_FRATIO and refdiv */
2141 ratio = arizona_calc_fratio(fll, cfg, target, Fref, sync);
2145 /* Apply the division for our remaining calculations */
2146 Fref = Fref / (1 << cfg->refdiv);
2148 cfg->n = target / (ratio * Fref);
2150 if (target % (ratio * Fref)) {
2151 gcd_fll = gcd(target, ratio * Fref);
2152 arizona_fll_dbg(fll, "GCD=%u\n", gcd_fll);
2154 cfg->theta = (target - (cfg->n * ratio * Fref))
2156 cfg->lambda = (ratio * Fref) / gcd_fll;
2162 /* Round down to 16bit range with cost of accuracy lost.
2163 * Denominator must be bigger than numerator so we only
2166 while (cfg->lambda >= (1 << 16)) {
2171 for (i = 0; i < ARRAY_SIZE(fll_gains); i++) {
2172 if (fll_gains[i].min <= Fref && Fref <= fll_gains[i].max) {
2173 cfg->gain = fll_gains[i].gain;
2177 if (i == ARRAY_SIZE(fll_gains)) {
2178 arizona_fll_err(fll, "Unable to find gain for Fref=%uHz\n",
2183 arizona_fll_dbg(fll, "N=%d THETA=%d LAMBDA=%d\n",
2184 cfg->n, cfg->theta, cfg->lambda);
2185 arizona_fll_dbg(fll, "FRATIO=0x%x(%d) OUTDIV=%d REFCLK_DIV=0x%x(%d)\n",
2186 cfg->fratio, ratio, cfg->outdiv,
2187 cfg->refdiv, 1 << cfg->refdiv);
2188 arizona_fll_dbg(fll, "GAIN=0x%x(%d)\n", cfg->gain, 1 << cfg->gain);
2194 static void arizona_apply_fll(struct arizona *arizona, unsigned int base,
2195 struct arizona_fll_cfg *cfg, int source,
2198 regmap_update_bits_async(arizona->regmap, base + 3,
2199 ARIZONA_FLL1_THETA_MASK, cfg->theta);
2200 regmap_update_bits_async(arizona->regmap, base + 4,
2201 ARIZONA_FLL1_LAMBDA_MASK, cfg->lambda);
2202 regmap_update_bits_async(arizona->regmap, base + 5,
2203 ARIZONA_FLL1_FRATIO_MASK,
2204 cfg->fratio << ARIZONA_FLL1_FRATIO_SHIFT);
2205 regmap_update_bits_async(arizona->regmap, base + 6,
2206 ARIZONA_FLL1_CLK_REF_DIV_MASK |
2207 ARIZONA_FLL1_CLK_REF_SRC_MASK,
2208 cfg->refdiv << ARIZONA_FLL1_CLK_REF_DIV_SHIFT |
2209 source << ARIZONA_FLL1_CLK_REF_SRC_SHIFT);
2212 regmap_update_bits(arizona->regmap, base + 0x7,
2213 ARIZONA_FLL1_GAIN_MASK,
2214 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2216 regmap_update_bits(arizona->regmap, base + 0x5,
2217 ARIZONA_FLL1_OUTDIV_MASK,
2218 cfg->outdiv << ARIZONA_FLL1_OUTDIV_SHIFT);
2219 regmap_update_bits(arizona->regmap, base + 0x9,
2220 ARIZONA_FLL1_GAIN_MASK,
2221 cfg->gain << ARIZONA_FLL1_GAIN_SHIFT);
2224 regmap_update_bits_async(arizona->regmap, base + 2,
2225 ARIZONA_FLL1_CTRL_UPD | ARIZONA_FLL1_N_MASK,
2226 ARIZONA_FLL1_CTRL_UPD | cfg->n);
2229 static int arizona_is_enabled_fll(struct arizona_fll *fll, int base)
2231 struct arizona *arizona = fll->arizona;
2235 ret = regmap_read(arizona->regmap, base + 1, ®);
2237 arizona_fll_err(fll, "Failed to read current state: %d\n",
2242 return reg & ARIZONA_FLL1_ENA;
2245 static int arizona_enable_fll(struct arizona_fll *fll)
2247 struct arizona *arizona = fll->arizona;
2248 bool use_sync = false;
2249 int already_enabled = arizona_is_enabled_fll(fll, fll->base);
2250 int sync_enabled = arizona_is_enabled_fll(fll, fll->base + 0x10);
2251 struct arizona_fll_cfg cfg;
2255 if (already_enabled < 0)
2256 return already_enabled;
2257 if (sync_enabled < 0)
2258 return sync_enabled;
2260 if (already_enabled) {
2261 /* Facilitate smooth refclk across the transition */
2262 regmap_update_bits_async(fll->arizona->regmap, fll->base + 0x9,
2263 ARIZONA_FLL1_GAIN_MASK, 0);
2264 regmap_update_bits(fll->arizona->regmap, fll->base + 1,
2265 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2270 * If we have both REFCLK and SYNCCLK then enable both,
2271 * otherwise apply the SYNCCLK settings to REFCLK.
2273 if (fll->ref_src >= 0 && fll->ref_freq &&
2274 fll->ref_src != fll->sync_src) {
2275 arizona_calc_fll(fll, &cfg, fll->ref_freq, false);
2277 arizona_apply_fll(arizona, fll->base, &cfg, fll->ref_src,
2279 if (fll->sync_src >= 0) {
2280 arizona_calc_fll(fll, &cfg, fll->sync_freq, true);
2282 arizona_apply_fll(arizona, fll->base + 0x10, &cfg,
2283 fll->sync_src, true);
2286 } else if (fll->sync_src >= 0) {
2287 arizona_calc_fll(fll, &cfg, fll->sync_freq, false);
2289 arizona_apply_fll(arizona, fll->base, &cfg,
2290 fll->sync_src, false);
2292 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2293 ARIZONA_FLL1_SYNC_ENA, 0);
2295 arizona_fll_err(fll, "No clocks provided\n");
2299 if (already_enabled && !!sync_enabled != use_sync)
2300 arizona_fll_warn(fll, "Synchroniser changed on active FLL\n");
2303 * Increase the bandwidth if we're not using a low frequency
2306 if (use_sync && fll->sync_freq > 100000)
2307 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2308 ARIZONA_FLL1_SYNC_BW, 0);
2310 regmap_update_bits_async(arizona->regmap, fll->base + 0x17,
2311 ARIZONA_FLL1_SYNC_BW,
2312 ARIZONA_FLL1_SYNC_BW);
2314 if (!already_enabled)
2315 pm_runtime_get(arizona->dev);
2318 regmap_update_bits_async(arizona->regmap, fll->base + 0x11,
2319 ARIZONA_FLL1_SYNC_ENA,
2320 ARIZONA_FLL1_SYNC_ENA);
2321 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2322 ARIZONA_FLL1_ENA, ARIZONA_FLL1_ENA);
2324 if (already_enabled)
2325 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2326 ARIZONA_FLL1_FREERUN, 0);
2328 arizona_fll_dbg(fll, "Waiting for FLL lock...\n");
2330 for (i = 0; i < 15; i++) {
2332 usleep_range(200, 400);
2336 regmap_read(arizona->regmap,
2337 ARIZONA_INTERRUPT_RAW_STATUS_5,
2339 if (val & (ARIZONA_FLL1_CLOCK_OK_STS << (fll->id - 1)))
2343 arizona_fll_warn(fll, "Timed out waiting for lock\n");
2345 arizona_fll_dbg(fll, "FLL locked (%d polls)\n", i);
2350 static void arizona_disable_fll(struct arizona_fll *fll)
2352 struct arizona *arizona = fll->arizona;
2355 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2356 ARIZONA_FLL1_FREERUN, ARIZONA_FLL1_FREERUN);
2357 regmap_update_bits_check(arizona->regmap, fll->base + 1,
2358 ARIZONA_FLL1_ENA, 0, &change);
2359 regmap_update_bits(arizona->regmap, fll->base + 0x11,
2360 ARIZONA_FLL1_SYNC_ENA, 0);
2361 regmap_update_bits_async(arizona->regmap, fll->base + 1,
2362 ARIZONA_FLL1_FREERUN, 0);
2365 pm_runtime_put_autosuspend(arizona->dev);
2368 int arizona_set_fll_refclk(struct arizona_fll *fll, int source,
2369 unsigned int Fref, unsigned int Fout)
2373 if (fll->ref_src == source && fll->ref_freq == Fref)
2376 if (fll->fout && Fref > 0) {
2377 ret = arizona_validate_fll(fll, Fref, fll->fout);
2382 fll->ref_src = source;
2383 fll->ref_freq = Fref;
2385 if (fll->fout && Fref > 0) {
2386 ret = arizona_enable_fll(fll);
2391 EXPORT_SYMBOL_GPL(arizona_set_fll_refclk);
2393 int arizona_set_fll(struct arizona_fll *fll, int source,
2394 unsigned int Fref, unsigned int Fout)
2398 if (fll->sync_src == source &&
2399 fll->sync_freq == Fref && fll->fout == Fout)
2403 if (fll->ref_src >= 0) {
2404 ret = arizona_validate_fll(fll, fll->ref_freq, Fout);
2409 ret = arizona_validate_fll(fll, Fref, Fout);
2414 fll->sync_src = source;
2415 fll->sync_freq = Fref;
2419 ret = arizona_enable_fll(fll);
2421 arizona_disable_fll(fll);
2425 EXPORT_SYMBOL_GPL(arizona_set_fll);
2427 int arizona_init_fll(struct arizona *arizona, int id, int base, int lock_irq,
2428 int ok_irq, struct arizona_fll *fll)
2434 fll->arizona = arizona;
2435 fll->sync_src = ARIZONA_FLL_SRC_NONE;
2437 /* Configure default refclk to 32kHz if we have one */
2438 regmap_read(arizona->regmap, ARIZONA_CLOCK_32K_1, &val);
2439 switch (val & ARIZONA_CLK_32K_SRC_MASK) {
2440 case ARIZONA_CLK_SRC_MCLK1:
2441 case ARIZONA_CLK_SRC_MCLK2:
2442 fll->ref_src = val & ARIZONA_CLK_32K_SRC_MASK;
2445 fll->ref_src = ARIZONA_FLL_SRC_NONE;
2447 fll->ref_freq = 32768;
2449 snprintf(fll->lock_name, sizeof(fll->lock_name), "FLL%d lock", id);
2450 snprintf(fll->clock_ok_name, sizeof(fll->clock_ok_name),
2451 "FLL%d clock OK", id);
2453 regmap_update_bits(arizona->regmap, fll->base + 1,
2454 ARIZONA_FLL1_FREERUN, 0);
2458 EXPORT_SYMBOL_GPL(arizona_init_fll);
2461 * arizona_set_output_mode - Set the mode of the specified output
2463 * @codec: Device to configure
2464 * @output: Output number
2465 * @diff: True to set the output to differential mode
2467 * Some systems use external analogue switches to connect more
2468 * analogue devices to the CODEC than are supported by the device. In
2469 * some systems this requires changing the switched output from single
2470 * ended to differential mode dynamically at runtime, an operation
2471 * supported using this function.
2473 * Most systems have a single static configuration and should use
2474 * platform data instead.
2476 int arizona_set_output_mode(struct snd_soc_codec *codec, int output, bool diff)
2478 unsigned int reg, val;
2480 if (output < 1 || output > 6)
2483 reg = ARIZONA_OUTPUT_PATH_CONFIG_1L + (output - 1) * 8;
2486 val = ARIZONA_OUT1_MONO;
2490 return snd_soc_update_bits(codec, reg, ARIZONA_OUT1_MONO, val);
2492 EXPORT_SYMBOL_GPL(arizona_set_output_mode);
2494 static const struct soc_enum arizona_adsp2_rate_enum[] = {
2495 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP1_CONTROL_1,
2496 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2497 ARIZONA_RATE_ENUM_SIZE,
2498 arizona_rate_text, arizona_rate_val),
2499 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP2_CONTROL_1,
2500 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2501 ARIZONA_RATE_ENUM_SIZE,
2502 arizona_rate_text, arizona_rate_val),
2503 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP3_CONTROL_1,
2504 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2505 ARIZONA_RATE_ENUM_SIZE,
2506 arizona_rate_text, arizona_rate_val),
2507 SOC_VALUE_ENUM_SINGLE(ARIZONA_DSP4_CONTROL_1,
2508 ARIZONA_DSP1_RATE_SHIFT, 0xf,
2509 ARIZONA_RATE_ENUM_SIZE,
2510 arizona_rate_text, arizona_rate_val),
2513 const struct snd_kcontrol_new arizona_adsp2_rate_controls[] = {
2514 SOC_ENUM("DSP1 Rate", arizona_adsp2_rate_enum[0]),
2515 SOC_ENUM("DSP2 Rate", arizona_adsp2_rate_enum[1]),
2516 SOC_ENUM("DSP3 Rate", arizona_adsp2_rate_enum[2]),
2517 SOC_ENUM("DSP4 Rate", arizona_adsp2_rate_enum[3]),
2519 EXPORT_SYMBOL_GPL(arizona_adsp2_rate_controls);
2521 static bool arizona_eq_filter_unstable(bool mode, __be16 _a, __be16 _b)
2523 s16 a = be16_to_cpu(_a);
2524 s16 b = be16_to_cpu(_b);
2527 return abs(a) >= 4096;
2532 return (abs((a << 16) / (4096 - b)) >= 4096 << 4);
2536 int arizona_eq_coeff_put(struct snd_kcontrol *kcontrol,
2537 struct snd_ctl_elem_value *ucontrol)
2539 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2540 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2541 struct soc_bytes *params = (void *)kcontrol->private_value;
2547 len = params->num_regs * regmap_get_val_bytes(arizona->regmap);
2549 data = kmemdup(ucontrol->value.bytes.data, len, GFP_KERNEL | GFP_DMA);
2553 data[0] &= cpu_to_be16(ARIZONA_EQ1_B1_MODE);
2555 if (arizona_eq_filter_unstable(!!data[0], data[1], data[2]) ||
2556 arizona_eq_filter_unstable(true, data[4], data[5]) ||
2557 arizona_eq_filter_unstable(true, data[8], data[9]) ||
2558 arizona_eq_filter_unstable(true, data[12], data[13]) ||
2559 arizona_eq_filter_unstable(false, data[16], data[17])) {
2560 dev_err(arizona->dev, "Rejecting unstable EQ coefficients\n");
2565 ret = regmap_read(arizona->regmap, params->base, &val);
2569 val &= ~ARIZONA_EQ1_B1_MODE;
2570 data[0] |= cpu_to_be16(val);
2572 ret = regmap_raw_write(arizona->regmap, params->base, data, len);
2578 EXPORT_SYMBOL_GPL(arizona_eq_coeff_put);
2580 int arizona_lhpf_coeff_put(struct snd_kcontrol *kcontrol,
2581 struct snd_ctl_elem_value *ucontrol)
2583 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
2584 struct arizona *arizona = dev_get_drvdata(codec->dev->parent);
2585 __be16 *data = (__be16 *)ucontrol->value.bytes.data;
2586 s16 val = be16_to_cpu(*data);
2588 if (abs(val) >= 4096) {
2589 dev_err(arizona->dev, "Rejecting unstable LHPF coefficients\n");
2593 return snd_soc_bytes_put(kcontrol, ucontrol);
2595 EXPORT_SYMBOL_GPL(arizona_lhpf_coeff_put);
2597 int arizona_register_notifier(struct snd_soc_codec *codec,
2598 struct notifier_block *nb,
2599 int (*notify)(struct notifier_block *nb,
2600 unsigned long action, void *data))
2602 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2603 struct arizona *arizona = priv->arizona;
2605 nb->notifier_call = notify;
2607 return blocking_notifier_chain_register(&arizona->notifier, nb);
2609 EXPORT_SYMBOL_GPL(arizona_register_notifier);
2611 int arizona_unregister_notifier(struct snd_soc_codec *codec,
2612 struct notifier_block *nb)
2614 struct arizona_priv *priv = snd_soc_codec_get_drvdata(codec);
2615 struct arizona *arizona = priv->arizona;
2617 return blocking_notifier_chain_unregister(&arizona->notifier, nb);
2619 EXPORT_SYMBOL_GPL(arizona_unregister_notifier);
2621 MODULE_DESCRIPTION("ASoC Wolfson Arizona class device support");
2622 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
2623 MODULE_LICENSE("GPL");