sound/pci/hda/patch_hdmi.c

   1 /*
   2  *
   3  *  patch_hdmi.c - routines for HDMI/DisplayPort codecs
   4  *
   5  *  Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
   6  *  Copyright (c) 2006 ATI Technologies Inc.
   7  *  Copyright (c) 2008 NVIDIA Corp.  All rights reserved.
   8  *  Copyright (c) 2008 Wei Ni <wni@nvidia.com>
   9  *  Copyright (c) 2013 Anssi Hannula <anssi.hannula@iki.fi>
  10  *
  11  *  Authors:
  12  *                      Wu Fengguang <wfg@linux.intel.com>
  13  *
  14  *  Maintained by:
  15  *                      Wu Fengguang <wfg@linux.intel.com>
  16  *
  17  *  This program is free software; you can redistribute it and/or modify it
  18  *  under the terms of the GNU General Public License as published by the Free
  19  *  Software Foundation; either version 2 of the License, or (at your option)
  20  *  any later version.
  21  *
  22  *  This program is distributed in the hope that it will be useful, but
  23  *  WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  24  *  or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  25  *  for more details.
  26  *
  27  *  You should have received a copy of the GNU General Public License
  28  *  along with this program; if not, write to the Free Software Foundation,
  29  *  Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  30  */
  31
  32 #include <linux/init.h>
  33 #include <linux/delay.h>
  34 #include <linux/slab.h>
  35 #include <linux/module.h>
  36 #include <sound/core.h>
  37 #include <sound/jack.h>
  38 #include <sound/asoundef.h>
  39 #include <sound/tlv.h>
  40 #include <sound/hdaudio.h>
  41 #include <sound/hda_i915.h>
  42 #include <sound/hda_chmap.h>
  43 #include "hda_codec.h"
  44 #include "hda_local.h"
  45 #include "hda_jack.h"
  46
  47 static bool static_hdmi_pcm;
  48 module_param(static_hdmi_pcm, bool, 0644);
  49 MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  50
  51 #define is_haswell(codec)  ((codec)->core.vendor_id == 0x80862807)
  52 #define is_broadwell(codec)    ((codec)->core.vendor_id == 0x80862808)
  53 #define is_skylake(codec) ((codec)->core.vendor_id == 0x80862809)
  54 #define is_broxton(codec) ((codec)->core.vendor_id == 0x8086280a)
  55 #define is_kabylake(codec) ((codec)->core.vendor_id == 0x8086280b)
  56 #define is_haswell_plus(codec) (is_haswell(codec) || is_broadwell(codec) \
  57                                 || is_skylake(codec) || is_broxton(codec) \
  58                                 || is_kabylake(codec))
  59
  60 #define is_valleyview(codec) ((codec)->core.vendor_id == 0x80862882)
  61 #define is_cherryview(codec) ((codec)->core.vendor_id == 0x80862883)
  62 #define is_valleyview_plus(codec) (is_valleyview(codec) || is_cherryview(codec))
  63
  64 struct hdmi_spec_per_cvt {
  65         hda_nid_t cvt_nid;
  66         int assigned;
  67         unsigned int channels_min;
  68         unsigned int channels_max;
  69         u32 rates;
  70         u64 formats;
  71         unsigned int maxbps;
  72 };
  73
  74 /* max. connections to a widget */
  75 #define HDA_MAX_CONNECTIONS     32
  76
  77 struct hdmi_spec_per_pin {
  78         hda_nid_t pin_nid;
  79         /* pin idx, different device entries on the same pin use the same idx */
  80         int pin_nid_idx;
  81         int num_mux_nids;
  82         hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  83         int mux_idx;
  84         hda_nid_t cvt_nid;
  85
  86         struct hda_codec *codec;
  87         struct hdmi_eld sink_eld;
  88         struct mutex lock;
  89         struct delayed_work work;
  90         struct hdmi_pcm *pcm; /* pointer to spec->pcm_rec[n] dynamically*/
  91         int pcm_idx; /* which pcm is attached. -1 means no pcm is attached */
  92         int repoll_count;
  93         bool setup; /* the stream has been set up by prepare callback */
  94         int channels; /* current number of channels */
  95         bool non_pcm;
  96         bool chmap_set;         /* channel-map override by ALSA API? */
  97         unsigned char chmap[8]; /* ALSA API channel-map */
  98 #ifdef CONFIG_SND_PROC_FS
  99         struct snd_info_entry *proc_entry;
 100 #endif
 101 };
 102
 103 /* operations used by generic code that can be overridden by patches */
 104 struct hdmi_ops {
 105         int (*pin_get_eld)(struct hda_codec *codec, hda_nid_t pin_nid,
 106                            unsigned char *buf, int *eld_size);
 107
 108         void (*pin_setup_infoframe)(struct hda_codec *codec, hda_nid_t pin_nid,
 109                                     int ca, int active_channels, int conn_type);
 110
 111         /* enable/disable HBR (HD passthrough) */
 112         int (*pin_hbr_setup)(struct hda_codec *codec, hda_nid_t pin_nid, bool hbr);
 113
 114         int (*setup_stream)(struct hda_codec *codec, hda_nid_t cvt_nid,
 115                             hda_nid_t pin_nid, u32 stream_tag, int format);
 116
 117 };
 118
 119 struct hdmi_pcm {
 120         struct hda_pcm *pcm;
 121         struct snd_jack *jack;
 122         struct snd_kcontrol *eld_ctl;
 123 };
 124
 125 struct hdmi_spec {
 126         int num_cvts;
 127         struct snd_array cvts; /* struct hdmi_spec_per_cvt */
 128         hda_nid_t cvt_nids[4]; /* only for haswell fix */
 129
 130         int num_pins;
 131         struct snd_array pins; /* struct hdmi_spec_per_pin */
 132         struct hdmi_pcm pcm_rec[16];
 133         struct mutex pcm_lock;
 134         /* pcm_bitmap means which pcms have been assigned to pins*/
 135         unsigned long pcm_bitmap;
 136         int pcm_used;   /* counter of pcm_rec[] */
 137         /* bitmap shows whether the pcm is opened in user space
 138          * bit 0 means the first playback PCM (PCM3);
 139          * bit 1 means the second playback PCM, and so on.
 140          */
 141         unsigned long pcm_in_use;
 142
 143         struct hdmi_eld temp_eld;
 144         struct hdmi_ops ops;
 145
 146         bool dyn_pin_out;
 147         bool dyn_pcm_assign;
 148         /*
 149          * Non-generic VIA/NVIDIA specific
 150          */
 151         struct hda_multi_out multiout;
 152         struct hda_pcm_stream pcm_playback;
 153
 154         /* i915/powerwell (Haswell+/Valleyview+) specific */
 155         bool use_acomp_notifier; /* use i915 eld_notify callback for hotplug */
 156         struct i915_audio_component_audio_ops i915_audio_ops;
 157         bool i915_bound; /* was i915 bound in this driver? */
 158
 159         struct hdac_chmap chmap;
 160 };
 161
 162 #ifdef CONFIG_SND_HDA_I915
 163 static inline bool codec_has_acomp(struct hda_codec *codec)
 164 {
 165         struct hdmi_spec *spec = codec->spec;
 166         return spec->use_acomp_notifier;
 167 }
 168 #else
 169 #define codec_has_acomp(codec)  false
 170 #endif
 171
 172 struct hdmi_audio_infoframe {
 173         u8 type; /* 0x84 */
 174         u8 ver;  /* 0x01 */
 175         u8 len;  /* 0x0a */
 176
 177         u8 checksum;
 178
 179         u8 CC02_CT47;   /* CC in bits 0:2, CT in 4:7 */
 180         u8 SS01_SF24;
 181         u8 CXT04;
 182         u8 CA;
 183         u8 LFEPBL01_LSV36_DM_INH7;
 184 };
 185
 186 struct dp_audio_infoframe {
 187         u8 type; /* 0x84 */
 188         u8 len;  /* 0x1b */
 189         u8 ver;  /* 0x11 << 2 */
 190
 191         u8 CC02_CT47;   /* match with HDMI infoframe from this on */
 192         u8 SS01_SF24;
 193         u8 CXT04;
 194         u8 CA;
 195         u8 LFEPBL01_LSV36_DM_INH7;
 196 };
 197
 198 union audio_infoframe {
 199         struct hdmi_audio_infoframe hdmi;
 200         struct dp_audio_infoframe dp;
 201         u8 bytes[0];
 202 };
 203
 204 /*
 205  * HDMI routines
 206  */
 207
 208 #define get_pin(spec, idx) \
 209         ((struct hdmi_spec_per_pin *)snd_array_elem(&spec->pins, idx))
 210 #define get_cvt(spec, idx) \
 211         ((struct hdmi_spec_per_cvt  *)snd_array_elem(&spec->cvts, idx))
 212 /* obtain hdmi_pcm object assigned to idx */
 213 #define get_hdmi_pcm(spec, idx) (&(spec)->pcm_rec[idx])
 214 /* obtain hda_pcm object assigned to idx */
 215 #define get_pcm_rec(spec, idx)  (get_hdmi_pcm(spec, idx)->pcm)
 216
 217 static int pin_nid_to_pin_index(struct hda_codec *codec, hda_nid_t pin_nid)
 218 {
 219         struct hdmi_spec *spec = codec->spec;
 220         int pin_idx;
 221
 222         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
 223                 if (get_pin(spec, pin_idx)->pin_nid == pin_nid)
 224                         return pin_idx;
 225
 226         codec_warn(codec, "HDMI: pin nid %d not registered\n", pin_nid);
 227         return -EINVAL;
 228 }
 229
 230 static int hinfo_to_pcm_index(struct hda_codec *codec,
 231                         struct hda_pcm_stream *hinfo)
 232 {
 233         struct hdmi_spec *spec = codec->spec;
 234         int pcm_idx;
 235
 236         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++)
 237                 if (get_pcm_rec(spec, pcm_idx)->stream == hinfo)
 238                         return pcm_idx;
 239
 240         codec_warn(codec, "HDMI: hinfo %p not registered\n", hinfo);
 241         return -EINVAL;
 242 }
 243
 244 static int hinfo_to_pin_index(struct hda_codec *codec,
 245                               struct hda_pcm_stream *hinfo)
 246 {
 247         struct hdmi_spec *spec = codec->spec;
 248         struct hdmi_spec_per_pin *per_pin;
 249         int pin_idx;
 250
 251         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
 252                 per_pin = get_pin(spec, pin_idx);
 253                 if (per_pin->pcm &&
 254                         per_pin->pcm->pcm->stream == hinfo)
 255                         return pin_idx;
 256         }
 257
 258         codec_dbg(codec, "HDMI: hinfo %p not registered\n", hinfo);
 259         return -EINVAL;
 260 }
 261
 262 static struct hdmi_spec_per_pin *pcm_idx_to_pin(struct hdmi_spec *spec,
 263                                                 int pcm_idx)
 264 {
 265         int i;
 266         struct hdmi_spec_per_pin *per_pin;
 267
 268         for (i = 0; i < spec->num_pins; i++) {
 269                 per_pin = get_pin(spec, i);
 270                 if (per_pin->pcm_idx == pcm_idx)
 271                         return per_pin;
 272         }
 273         return NULL;
 274 }
 275
 276 static int cvt_nid_to_cvt_index(struct hda_codec *codec, hda_nid_t cvt_nid)
 277 {
 278         struct hdmi_spec *spec = codec->spec;
 279         int cvt_idx;
 280
 281         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
 282                 if (get_cvt(spec, cvt_idx)->cvt_nid == cvt_nid)
 283                         return cvt_idx;
 284
 285         codec_warn(codec, "HDMI: cvt nid %d not registered\n", cvt_nid);
 286         return -EINVAL;
 287 }
 288
 289 static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
 290                         struct snd_ctl_elem_info *uinfo)
 291 {
 292         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 293         struct hdmi_spec *spec = codec->spec;
 294         struct hdmi_spec_per_pin *per_pin;
 295         struct hdmi_eld *eld;
 296         int pcm_idx;
 297
 298         uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
 299
 300         pcm_idx = kcontrol->private_value;
 301         mutex_lock(&spec->pcm_lock);
 302         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 303         if (!per_pin) {
 304                 /* no pin is bound to the pcm */
 305                 uinfo->count = 0;
 306                 mutex_unlock(&spec->pcm_lock);
 307                 return 0;
 308         }
 309         eld = &per_pin->sink_eld;
 310         uinfo->count = eld->eld_valid ? eld->eld_size : 0;
 311         mutex_unlock(&spec->pcm_lock);
 312
 313         return 0;
 314 }
 315
 316 static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
 317                         struct snd_ctl_elem_value *ucontrol)
 318 {
 319         struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
 320         struct hdmi_spec *spec = codec->spec;
 321         struct hdmi_spec_per_pin *per_pin;
 322         struct hdmi_eld *eld;
 323         int pcm_idx;
 324
 325         pcm_idx = kcontrol->private_value;
 326         mutex_lock(&spec->pcm_lock);
 327         per_pin = pcm_idx_to_pin(spec, pcm_idx);
 328         if (!per_pin) {
 329                 /* no pin is bound to the pcm */
 330                 memset(ucontrol->value.bytes.data, 0,
 331                        ARRAY_SIZE(ucontrol->value.bytes.data));
 332                 mutex_unlock(&spec->pcm_lock);
 333                 return 0;
 334         }
 335         eld = &per_pin->sink_eld;
 336
 337         if (eld->eld_size > ARRAY_SIZE(ucontrol->value.bytes.data) ||
 338             eld->eld_size > ELD_MAX_SIZE) {
 339                 mutex_unlock(&spec->pcm_lock);
 340                 snd_BUG();
 341                 return -EINVAL;
 342         }
 343
 344         memset(ucontrol->value.bytes.data, 0,
 345                ARRAY_SIZE(ucontrol->value.bytes.data));
 346         if (eld->eld_valid)
 347                 memcpy(ucontrol->value.bytes.data, eld->eld_buffer,
 348                        eld->eld_size);
 349         mutex_unlock(&spec->pcm_lock);
 350
 351         return 0;
 352 }
 353
 354 static struct snd_kcontrol_new eld_bytes_ctl = {
 355         .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
 356         .iface = SNDRV_CTL_ELEM_IFACE_PCM,
 357         .name = "ELD",
 358         .info = hdmi_eld_ctl_info,
 359         .get = hdmi_eld_ctl_get,
 360 };
 361
 362 static int hdmi_create_eld_ctl(struct hda_codec *codec, int pcm_idx,
 363                         int device)
 364 {
 365         struct snd_kcontrol *kctl;
 366         struct hdmi_spec *spec = codec->spec;
 367         int err;
 368
 369         kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
 370         if (!kctl)
 371                 return -ENOMEM;
 372         kctl->private_value = pcm_idx;
 373         kctl->id.device = device;
 374
 375         /* no pin nid is associated with the kctl now
 376          * tbd: associate pin nid to eld ctl later
 377          */
 378         err = snd_hda_ctl_add(codec, 0, kctl);
 379         if (err < 0)
 380                 return err;
 381
 382         get_hdmi_pcm(spec, pcm_idx)->eld_ctl = kctl;
 383         return 0;
 384 }
 385
 386 #ifdef BE_PARANOID
 387 static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 388                                 int *packet_index, int *byte_index)
 389 {
 390         int val;
 391
 392         val = snd_hda_codec_read(codec, pin_nid, 0,
 393                                  AC_VERB_GET_HDMI_DIP_INDEX, 0);
 394
 395         *packet_index = val >> 5;
 396         *byte_index = val & 0x1f;
 397 }
 398 #endif
 399
 400 static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
 401                                 int packet_index, int byte_index)
 402 {
 403         int val;
 404
 405         val = (packet_index << 5) | (byte_index & 0x1f);
 406
 407         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
 408 }
 409
 410 static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
 411                                 unsigned char val)
 412 {
 413         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
 414 }
 415
 416 static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
 417 {
 418         struct hdmi_spec *spec = codec->spec;
 419         int pin_out;
 420
 421         /* Unmute */
 422         if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
 423                 snd_hda_codec_write(codec, pin_nid, 0,
 424                                 AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
 425
 426         if (spec->dyn_pin_out)
 427                 /* Disable pin out until stream is active */
 428                 pin_out = 0;
 429         else
 430                 /* Enable pin out: some machines with GM965 gets broken output
 431                  * when the pin is disabled or changed while using with HDMI
 432                  */
 433                 pin_out = PIN_OUT;
 434
 435         snd_hda_codec_write(codec, pin_nid, 0,
 436                             AC_VERB_SET_PIN_WIDGET_CONTROL, pin_out);
 437 }
 438
 439 /*
 440  * ELD proc files
 441  */
 442
 443 #ifdef CONFIG_SND_PROC_FS
 444 static void print_eld_info(struct snd_info_entry *entry,
 445                            struct snd_info_buffer *buffer)
 446 {
 447         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 448
 449         mutex_lock(&per_pin->lock);
 450         snd_hdmi_print_eld_info(&per_pin->sink_eld, buffer);
 451         mutex_unlock(&per_pin->lock);
 452 }
 453
 454 static void write_eld_info(struct snd_info_entry *entry,
 455                            struct snd_info_buffer *buffer)
 456 {
 457         struct hdmi_spec_per_pin *per_pin = entry->private_data;
 458
 459         mutex_lock(&per_pin->lock);
 460         snd_hdmi_write_eld_info(&per_pin->sink_eld, buffer);
 461         mutex_unlock(&per_pin->lock);
 462 }
 463
 464 static int eld_proc_new(struct hdmi_spec_per_pin *per_pin, int index)
 465 {
 466         char name[32];
 467         struct hda_codec *codec = per_pin->codec;
 468         struct snd_info_entry *entry;
 469         int err;
 470
 471         snprintf(name, sizeof(name), "eld#%d.%d", codec->addr, index);
 472         err = snd_card_proc_new(codec->card, name, &entry);
 473         if (err < 0)
 474                 return err;
 475
 476         snd_info_set_text_ops(entry, per_pin, print_eld_info);
 477         entry->c.text.write = write_eld_info;
 478         entry->mode |= S_IWUSR;
 479         per_pin->proc_entry = entry;
 480
 481         return 0;
 482 }
 483
 484 static void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 485 {
 486         if (!per_pin->codec->bus->shutdown) {
 487                 snd_info_free_entry(per_pin->proc_entry);
 488                 per_pin->proc_entry = NULL;
 489         }
 490 }
 491 #else
 492 static inline int eld_proc_new(struct hdmi_spec_per_pin *per_pin,
 493                                int index)
 494 {
 495         return 0;
 496 }
 497 static inline void eld_proc_free(struct hdmi_spec_per_pin *per_pin)
 498 {
 499 }
 500 #endif
 501
 502 /*
 503  * Audio InfoFrame routines
 504  */
 505
 506 /*
 507  * Enable Audio InfoFrame Transmission
 508  */
 509 static void hdmi_start_infoframe_trans(struct hda_codec *codec,
 510                                        hda_nid_t pin_nid)
 511 {
 512         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 513         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 514                                                 AC_DIPXMIT_BEST);
 515 }
 516
 517 /*
 518  * Disable Audio InfoFrame Transmission
 519  */
 520 static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
 521                                       hda_nid_t pin_nid)
 522 {
 523         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 524         snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
 525                                                 AC_DIPXMIT_DISABLE);
 526 }
 527
 528 static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
 529 {
 530 #ifdef CONFIG_SND_DEBUG_VERBOSE
 531         int i;
 532         int size;
 533
 534         size = snd_hdmi_get_eld_size(codec, pin_nid);
 535         codec_dbg(codec, "HDMI: ELD buf size is %d\n", size);
 536
 537         for (i = 0; i < 8; i++) {
 538                 size = snd_hda_codec_read(codec, pin_nid, 0,
 539                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 540                 codec_dbg(codec, "HDMI: DIP GP[%d] buf size is %d\n", i, size);
 541         }
 542 #endif
 543 }
 544
 545 static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
 546 {
 547 #ifdef BE_PARANOID
 548         int i, j;
 549         int size;
 550         int pi, bi;
 551         for (i = 0; i < 8; i++) {
 552                 size = snd_hda_codec_read(codec, pin_nid, 0,
 553                                                 AC_VERB_GET_HDMI_DIP_SIZE, i);
 554                 if (size == 0)
 555                         continue;
 556
 557                 hdmi_set_dip_index(codec, pin_nid, i, 0x0);
 558                 for (j = 1; j < 1000; j++) {
 559                         hdmi_write_dip_byte(codec, pin_nid, 0x0);
 560                         hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
 561                         if (pi != i)
 562                                 codec_dbg(codec, "dip index %d: %d != %d\n",
 563                                                 bi, pi, i);
 564                         if (bi == 0) /* byte index wrapped around */
 565                                 break;
 566                 }
 567                 codec_dbg(codec,
 568                         "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
 569                         i, size, j);
 570         }
 571 #endif
 572 }
 573
 574 static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
 575 {
 576         u8 *bytes = (u8 *)hdmi_ai;
 577         u8 sum = 0;
 578         int i;
 579
 580         hdmi_ai->checksum = 0;
 581
 582         for (i = 0; i < sizeof(*hdmi_ai); i++)
 583                 sum += bytes[i];
 584
 585         hdmi_ai->checksum = -sum;
 586 }
 587
 588 static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
 589                                       hda_nid_t pin_nid,
 590                                       u8 *dip, int size)
 591 {
 592         int i;
 593
 594         hdmi_debug_dip_size(codec, pin_nid);
 595         hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
 596
 597         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 598         for (i = 0; i < size; i++)
 599                 hdmi_write_dip_byte(codec, pin_nid, dip[i]);
 600 }
 601
 602 static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
 603                                     u8 *dip, int size)
 604 {
 605         u8 val;
 606         int i;
 607
 608         if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
 609                                                             != AC_DIPXMIT_BEST)
 610                 return false;
 611
 612         hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
 613         for (i = 0; i < size; i++) {
 614                 val = snd_hda_codec_read(codec, pin_nid, 0,
 615                                          AC_VERB_GET_HDMI_DIP_DATA, 0);
 616                 if (val != dip[i])
 617                         return false;
 618         }
 619
 620         return true;
 621 }
 622
 623 static void hdmi_pin_setup_infoframe(struct hda_codec *codec,
 624                                      hda_nid_t pin_nid,
 625                                      int ca, int active_channels,
 626                                      int conn_type)
 627 {
 628         union audio_infoframe ai;
 629
 630         memset(&ai, 0, sizeof(ai));
 631         if (conn_type == 0) { /* HDMI */
 632                 struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
 633
 634                 hdmi_ai->type           = 0x84;
 635                 hdmi_ai->ver            = 0x01;
 636                 hdmi_ai->len            = 0x0a;
 637                 hdmi_ai->CC02_CT47      = active_channels - 1;
 638                 hdmi_ai->CA             = ca;
 639                 hdmi_checksum_audio_infoframe(hdmi_ai);
 640         } else if (conn_type == 1) { /* DisplayPort */
 641                 struct dp_audio_infoframe *dp_ai = &ai.dp;
 642
 643                 dp_ai->type             = 0x84;
 644                 dp_ai->len              = 0x1b;
 645                 dp_ai->ver              = 0x11 << 2;
 646                 dp_ai->CC02_CT47        = active_channels - 1;
 647                 dp_ai->CA               = ca;
 648         } else {
 649                 codec_dbg(codec, "HDMI: unknown connection type at pin %d\n",
 650                             pin_nid);
 651                 return;
 652         }
 653
 654         /*
 655          * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
 656          * sizeof(*dp_ai) to avoid partial match/update problems when
 657          * the user switches between HDMI/DP monitors.
 658          */
 659         if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
 660                                         sizeof(ai))) {
 661                 codec_dbg(codec,
 662                           "hdmi_pin_setup_infoframe: pin=%d channels=%d ca=0x%02x\n",
 663                             pin_nid,
 664                             active_channels, ca);
 665                 hdmi_stop_infoframe_trans(codec, pin_nid);
 666                 hdmi_fill_audio_infoframe(codec, pin_nid,
 667                                             ai.bytes, sizeof(ai));
 668                 hdmi_start_infoframe_trans(codec, pin_nid);
 669         }
 670 }
 671
 672 static void hdmi_setup_audio_infoframe(struct hda_codec *codec,
 673                                        struct hdmi_spec_per_pin *per_pin,
 674                                        bool non_pcm)
 675 {
 676         struct hdmi_spec *spec = codec->spec;
 677         struct hdac_chmap *chmap = &spec->chmap;
 678         hda_nid_t pin_nid = per_pin->pin_nid;
 679         int channels = per_pin->channels;
 680         int active_channels;
 681         struct hdmi_eld *eld;
 682         int ca;
 683
 684         if (!channels)
 685                 return;
 686
 687         if (is_haswell_plus(codec))
 688                 snd_hda_codec_write(codec, pin_nid, 0,
 689                                             AC_VERB_SET_AMP_GAIN_MUTE,
 690                                             AMP_OUT_UNMUTE);
 691
 692         eld = &per_pin->sink_eld;
 693
 694         ca = snd_hdac_channel_allocation(&codec->core,
 695                         eld->info.spk_alloc, channels,
 696                         per_pin->chmap_set, non_pcm, per_pin->chmap);
 697
 698         active_channels = snd_hdac_get_active_channels(ca);
 699
 700         chmap->ops.set_channel_count(&codec->core, per_pin->cvt_nid,
 701                                                 active_channels);
 702
 703         /*
 704          * always configure channel mapping, it may have been changed by the
 705          * user in the meantime
 706          */
 707         snd_hdac_setup_channel_mapping(&spec->chmap,
 708                                 pin_nid, non_pcm, ca, channels,
 709                                 per_pin->chmap, per_pin->chmap_set);
 710
 711         spec->ops.pin_setup_infoframe(codec, pin_nid, ca, active_channels,
 712                                       eld->info.conn_type);
 713
 714         per_pin->non_pcm = non_pcm;
 715 }
 716
 717 /*
 718  * Unsolicited events
 719  */
 720
 721 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
 722
 723 static void check_presence_and_report(struct hda_codec *codec, hda_nid_t nid)
 724 {
 725         struct hdmi_spec *spec = codec->spec;
 726         int pin_idx = pin_nid_to_pin_index(codec, nid);
 727
 728         if (pin_idx < 0)
 729                 return;
 730         if (hdmi_present_sense(get_pin(spec, pin_idx), 1))
 731                 snd_hda_jack_report_sync(codec);
 732 }
 733
 734 static void jack_callback(struct hda_codec *codec,
 735                           struct hda_jack_callback *jack)
 736 {
 737         check_presence_and_report(codec, jack->nid);
 738 }
 739
 740 static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
 741 {
 742         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 743         struct hda_jack_tbl *jack;
 744         int dev_entry = (res & AC_UNSOL_RES_DE) >> AC_UNSOL_RES_DE_SHIFT;
 745
 746         jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
 747         if (!jack)
 748                 return;
 749         jack->jack_dirty = 1;
 750
 751         codec_dbg(codec,
 752                 "HDMI hot plug event: Codec=%d Pin=%d Device=%d Inactive=%d Presence_Detect=%d ELD_Valid=%d\n",
 753                 codec->addr, jack->nid, dev_entry, !!(res & AC_UNSOL_RES_IA),
 754                 !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
 755
 756         check_presence_and_report(codec, jack->nid);
 757 }
 758
 759 static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
 760 {
 761         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 762         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 763         int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
 764         int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
 765
 766         codec_info(codec,
 767                 "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
 768                 codec->addr,
 769                 tag,
 770                 subtag,
 771                 cp_state,
 772                 cp_ready);
 773
 774         /* TODO */
 775         if (cp_state)
 776                 ;
 777         if (cp_ready)
 778                 ;
 779 }
 780
 781
 782 static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
 783 {
 784         int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
 785         int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
 786
 787         if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
 788                 codec_dbg(codec, "Unexpected HDMI event tag 0x%x\n", tag);
 789                 return;
 790         }
 791
 792         if (subtag == 0)
 793                 hdmi_intrinsic_event(codec, res);
 794         else
 795                 hdmi_non_intrinsic_event(codec, res);
 796 }
 797
 798 static void haswell_verify_D0(struct hda_codec *codec,
 799                 hda_nid_t cvt_nid, hda_nid_t nid)
 800 {
 801         int pwr;
 802
 803         /* For Haswell, the converter 1/2 may keep in D3 state after bootup,
 804          * thus pins could only choose converter 0 for use. Make sure the
 805          * converters are in correct power state */
 806         if (!snd_hda_check_power_state(codec, cvt_nid, AC_PWRST_D0))
 807                 snd_hda_codec_write(codec, cvt_nid, 0, AC_VERB_SET_POWER_STATE, AC_PWRST_D0);
 808
 809         if (!snd_hda_check_power_state(codec, nid, AC_PWRST_D0)) {
 810                 snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_POWER_STATE,
 811                                     AC_PWRST_D0);
 812                 msleep(40);
 813                 pwr = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_POWER_STATE, 0);
 814                 pwr = (pwr & AC_PWRST_ACTUAL) >> AC_PWRST_ACTUAL_SHIFT;
 815                 codec_dbg(codec, "Haswell HDMI audio: Power for pin 0x%x is now D%d\n", nid, pwr);
 816         }
 817 }
 818
 819 /*
 820  * Callbacks
 821  */
 822
 823 /* HBR should be Non-PCM, 8 channels */
 824 #define is_hbr_format(format) \
 825         ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
 826
 827 static int hdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
 828                               bool hbr)
 829 {
 830         int pinctl, new_pinctl;
 831
 832         if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
 833                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
 834                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
 835
 836                 if (pinctl < 0)
 837                         return hbr ? -EINVAL : 0;
 838
 839                 new_pinctl = pinctl & ~AC_PINCTL_EPT;
 840                 if (hbr)
 841                         new_pinctl |= AC_PINCTL_EPT_HBR;
 842                 else
 843                         new_pinctl |= AC_PINCTL_EPT_NATIVE;
 844
 845                 codec_dbg(codec,
 846                           "hdmi_pin_hbr_setup: NID=0x%x, %spinctl=0x%x\n",
 847                             pin_nid,
 848                             pinctl == new_pinctl ? "" : "new-",
 849                             new_pinctl);
 850
 851                 if (pinctl != new_pinctl)
 852                         snd_hda_codec_write(codec, pin_nid, 0,
 853                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
 854                                             new_pinctl);
 855         } else if (hbr)
 856                 return -EINVAL;
 857
 858         return 0;
 859 }
 860
 861 static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
 862                               hda_nid_t pin_nid, u32 stream_tag, int format)
 863 {
 864         struct hdmi_spec *spec = codec->spec;
 865         int err;
 866
 867         if (is_haswell_plus(codec))
 868                 haswell_verify_D0(codec, cvt_nid, pin_nid);
 869
 870         err = spec->ops.pin_hbr_setup(codec, pin_nid, is_hbr_format(format));
 871
 872         if (err) {
 873                 codec_dbg(codec, "hdmi_setup_stream: HBR is not supported\n");
 874                 return err;
 875         }
 876
 877         snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
 878         return 0;
 879 }
 880
 881 /* Try to find an available converter
 882  * If pin_idx is less then zero, just try to find an available converter.
 883  * Otherwise, try to find an available converter and get the cvt mux index
 884  * of the pin.
 885  */
 886 static int hdmi_choose_cvt(struct hda_codec *codec,
 887                         int pin_idx, int *cvt_id, int *mux_id)
 888 {
 889         struct hdmi_spec *spec = codec->spec;
 890         struct hdmi_spec_per_pin *per_pin;
 891         struct hdmi_spec_per_cvt *per_cvt = NULL;
 892         int cvt_idx, mux_idx = 0;
 893
 894         /* pin_idx < 0 means no pin will be bound to the converter */
 895         if (pin_idx < 0)
 896                 per_pin = NULL;
 897         else
 898                 per_pin = get_pin(spec, pin_idx);
 899
 900         /* Dynamically assign converter to stream */
 901         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
 902                 per_cvt = get_cvt(spec, cvt_idx);
 903
 904                 /* Must not already be assigned */
 905                 if (per_cvt->assigned)
 906                         continue;
 907                 if (per_pin == NULL)
 908                         break;
 909                 /* Must be in pin's mux's list of converters */
 910                 for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
 911                         if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
 912                                 break;
 913                 /* Not in mux list */
 914                 if (mux_idx == per_pin->num_mux_nids)
 915                         continue;
 916                 break;
 917         }
 918
 919         /* No free converters */
 920         if (cvt_idx == spec->num_cvts)
 921                 return -EBUSY;
 922
 923         if (per_pin != NULL)
 924                 per_pin->mux_idx = mux_idx;
 925
 926         if (cvt_id)
 927                 *cvt_id = cvt_idx;
 928         if (mux_id)
 929                 *mux_id = mux_idx;
 930
 931         return 0;
 932 }
 933
 934 /* Assure the pin select the right convetor */
 935 static void intel_verify_pin_cvt_connect(struct hda_codec *codec,
 936                         struct hdmi_spec_per_pin *per_pin)
 937 {
 938         hda_nid_t pin_nid = per_pin->pin_nid;
 939         int mux_idx, curr;
 940
 941         mux_idx = per_pin->mux_idx;
 942         curr = snd_hda_codec_read(codec, pin_nid, 0,
 943                                           AC_VERB_GET_CONNECT_SEL, 0);
 944         if (curr != mux_idx)
 945                 snd_hda_codec_write_cache(codec, pin_nid, 0,
 946                                             AC_VERB_SET_CONNECT_SEL,
 947                                             mux_idx);
 948 }
 949
 950 /* get the mux index for the converter of the pins
 951  * converter's mux index is the same for all pins on Intel platform
 952  */
 953 static int intel_cvt_id_to_mux_idx(struct hdmi_spec *spec,
 954                         hda_nid_t cvt_nid)
 955 {
 956         int i;
 957
 958         for (i = 0; i < spec->num_cvts; i++)
 959                 if (spec->cvt_nids[i] == cvt_nid)
 960                         return i;
 961         return -EINVAL;
 962 }
 963
 964 /* Intel HDMI workaround to fix audio routing issue:
 965  * For some Intel display codecs, pins share the same connection list.
 966  * So a conveter can be selected by multiple pins and playback on any of these
 967  * pins will generate sound on the external display, because audio flows from
 968  * the same converter to the display pipeline. Also muting one pin may make
 969  * other pins have no sound output.
 970  * So this function assures that an assigned converter for a pin is not selected
 971  * by any other pins.
 972  */
 973 static void intel_not_share_assigned_cvt(struct hda_codec *codec,
 974                         hda_nid_t pin_nid, int mux_idx)
 975 {
 976         struct hdmi_spec *spec = codec->spec;
 977         hda_nid_t nid;
 978         int cvt_idx, curr;
 979         struct hdmi_spec_per_cvt *per_cvt;
 980
 981         /* configure all pins, including "no physical connection" ones */
 982         for_each_hda_codec_node(nid, codec) {
 983                 unsigned int wid_caps = get_wcaps(codec, nid);
 984                 unsigned int wid_type = get_wcaps_type(wid_caps);
 985
 986                 if (wid_type != AC_WID_PIN)
 987                         continue;
 988
 989                 if (nid == pin_nid)
 990                         continue;
 991
 992                 curr = snd_hda_codec_read(codec, nid, 0,
 993                                           AC_VERB_GET_CONNECT_SEL, 0);
 994                 if (curr != mux_idx)
 995                         continue;
 996
 997                 /* choose an unassigned converter. The conveters in the
 998                  * connection list are in the same order as in the codec.
 999                  */
1000                 for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
1001                         per_cvt = get_cvt(spec, cvt_idx);
1002                         if (!per_cvt->assigned) {
1003                                 codec_dbg(codec,
1004                                           "choose cvt %d for pin nid %d\n",
1005                                         cvt_idx, nid);
1006                                 snd_hda_codec_write_cache(codec, nid, 0,
1007                                             AC_VERB_SET_CONNECT_SEL,
1008                                             cvt_idx);
1009                                 break;
1010                         }
1011                 }
1012         }
1013 }
1014
1015 /* A wrapper of intel_not_share_asigned_cvt() */
1016 static void intel_not_share_assigned_cvt_nid(struct hda_codec *codec,
1017                         hda_nid_t pin_nid, hda_nid_t cvt_nid)
1018 {
1019         int mux_idx;
1020         struct hdmi_spec *spec = codec->spec;
1021
1022         if (!is_haswell_plus(codec) && !is_valleyview_plus(codec))
1023                 return;
1024
1025         /* On Intel platform, the mapping of converter nid to
1026          * mux index of the pins are always the same.
1027          * The pin nid may be 0, this means all pins will not
1028          * share the converter.
1029          */
1030         mux_idx = intel_cvt_id_to_mux_idx(spec, cvt_nid);
1031         if (mux_idx >= 0)
1032                 intel_not_share_assigned_cvt(codec, pin_nid, mux_idx);
1033 }
1034
1035 /* called in hdmi_pcm_open when no pin is assigned to the PCM
1036  * in dyn_pcm_assign mode.
1037  */
1038 static int hdmi_pcm_open_no_pin(struct hda_pcm_stream *hinfo,
1039                          struct hda_codec *codec,
1040                          struct snd_pcm_substream *substream)
1041 {
1042         struct hdmi_spec *spec = codec->spec;
1043         struct snd_pcm_runtime *runtime = substream->runtime;
1044         int cvt_idx, pcm_idx;
1045         struct hdmi_spec_per_cvt *per_cvt = NULL;
1046         int err;
1047
1048         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1049         if (pcm_idx < 0)
1050                 return -EINVAL;
1051
1052         err = hdmi_choose_cvt(codec, -1, &cvt_idx, NULL);
1053         if (err)
1054                 return err;
1055
1056         per_cvt = get_cvt(spec, cvt_idx);
1057         per_cvt->assigned = 1;
1058         hinfo->nid = per_cvt->cvt_nid;
1059
1060         intel_not_share_assigned_cvt_nid(codec, 0, per_cvt->cvt_nid);
1061
1062         set_bit(pcm_idx, &spec->pcm_in_use);
1063         /* todo: setup spdif ctls assign */
1064
1065         /* Initially set the converter's capabilities */
1066         hinfo->channels_min = per_cvt->channels_min;
1067         hinfo->channels_max = per_cvt->channels_max;
1068         hinfo->rates = per_cvt->rates;
1069         hinfo->formats = per_cvt->formats;
1070         hinfo->maxbps = per_cvt->maxbps;
1071
1072         /* Store the updated parameters */
1073         runtime->hw.channels_min = hinfo->channels_min;
1074         runtime->hw.channels_max = hinfo->channels_max;
1075         runtime->hw.formats = hinfo->formats;
1076         runtime->hw.rates = hinfo->rates;
1077
1078         snd_pcm_hw_constraint_step(substream->runtime, 0,
1079                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1080         return 0;
1081 }
1082
1083 /*
1084  * HDA PCM callbacks
1085  */
1086 static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
1087                          struct hda_codec *codec,
1088                          struct snd_pcm_substream *substream)
1089 {
1090         struct hdmi_spec *spec = codec->spec;
1091         struct snd_pcm_runtime *runtime = substream->runtime;
1092         int pin_idx, cvt_idx, pcm_idx, mux_idx = 0;
1093         struct hdmi_spec_per_pin *per_pin;
1094         struct hdmi_eld *eld;
1095         struct hdmi_spec_per_cvt *per_cvt = NULL;
1096         int err;
1097
1098         /* Validate hinfo */
1099         pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1100         if (pcm_idx < 0)
1101                 return -EINVAL;
1102
1103         mutex_lock(&spec->pcm_lock);
1104         pin_idx = hinfo_to_pin_index(codec, hinfo);
1105         if (!spec->dyn_pcm_assign) {
1106                 if (snd_BUG_ON(pin_idx < 0)) {
1107                         mutex_unlock(&spec->pcm_lock);
1108                         return -EINVAL;
1109                 }
1110         } else {
1111                 /* no pin is assigned to the PCM
1112                  * PA need pcm open successfully when probe
1113                  */
1114                 if (pin_idx < 0) {
1115                         err = hdmi_pcm_open_no_pin(hinfo, codec, substream);
1116                         mutex_unlock(&spec->pcm_lock);
1117                         return err;
1118                 }
1119         }
1120
1121         err = hdmi_choose_cvt(codec, pin_idx, &cvt_idx, &mux_idx);
1122         if (err < 0) {
1123                 mutex_unlock(&spec->pcm_lock);
1124                 return err;
1125         }
1126
1127         per_cvt = get_cvt(spec, cvt_idx);
1128         /* Claim converter */
1129         per_cvt->assigned = 1;
1130
1131         set_bit(pcm_idx, &spec->pcm_in_use);
1132         per_pin = get_pin(spec, pin_idx);
1133         per_pin->cvt_nid = per_cvt->cvt_nid;
1134         hinfo->nid = per_cvt->cvt_nid;
1135
1136         snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1137                             AC_VERB_SET_CONNECT_SEL,
1138                             mux_idx);
1139
1140         /* configure unused pins to choose other converters */
1141         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
1142                 intel_not_share_assigned_cvt(codec, per_pin->pin_nid, mux_idx);
1143
1144         snd_hda_spdif_ctls_assign(codec, pcm_idx, per_cvt->cvt_nid);
1145
1146         /* Initially set the converter's capabilities */
1147         hinfo->channels_min = per_cvt->channels_min;
1148         hinfo->channels_max = per_cvt->channels_max;
1149         hinfo->rates = per_cvt->rates;
1150         hinfo->formats = per_cvt->formats;
1151         hinfo->maxbps = per_cvt->maxbps;
1152
1153         eld = &per_pin->sink_eld;
1154         /* Restrict capabilities by ELD if this isn't disabled */
1155         if (!static_hdmi_pcm && eld->eld_valid) {
1156                 snd_hdmi_eld_update_pcm_info(&eld->info, hinfo);
1157                 if (hinfo->channels_min > hinfo->channels_max ||
1158                     !hinfo->rates || !hinfo->formats) {
1159                         per_cvt->assigned = 0;
1160                         hinfo->nid = 0;
1161                         snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1162                         mutex_unlock(&spec->pcm_lock);
1163                         return -ENODEV;
1164                 }
1165         }
1166
1167         mutex_unlock(&spec->pcm_lock);
1168         /* Store the updated parameters */
1169         runtime->hw.channels_min = hinfo->channels_min;
1170         runtime->hw.channels_max = hinfo->channels_max;
1171         runtime->hw.formats = hinfo->formats;
1172         runtime->hw.rates = hinfo->rates;
1173
1174         snd_pcm_hw_constraint_step(substream->runtime, 0,
1175                                    SNDRV_PCM_HW_PARAM_CHANNELS, 2);
1176         return 0;
1177 }
1178
1179 /*
1180  * HDA/HDMI auto parsing
1181  */
1182 static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
1183 {
1184         struct hdmi_spec *spec = codec->spec;
1185         struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
1186         hda_nid_t pin_nid = per_pin->pin_nid;
1187
1188         if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
1189                 codec_warn(codec,
1190                            "HDMI: pin %d wcaps %#x does not support connection list\n",
1191                            pin_nid, get_wcaps(codec, pin_nid));
1192                 return -EINVAL;
1193         }
1194
1195         per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
1196                                                         per_pin->mux_nids,
1197                                                         HDA_MAX_CONNECTIONS);
1198
1199         return 0;
1200 }
1201
1202 static int hdmi_find_pcm_slot(struct hdmi_spec *spec,
1203                                 struct hdmi_spec_per_pin *per_pin)
1204 {
1205         int i;
1206
1207         /* try the prefer PCM */
1208         if (!test_bit(per_pin->pin_nid_idx, &spec->pcm_bitmap))
1209                 return per_pin->pin_nid_idx;
1210
1211         /* have a second try; check the "reserved area" over num_pins */
1212         for (i = spec->num_pins; i < spec->pcm_used; i++) {
1213                 if (!test_bit(i, &spec->pcm_bitmap))
1214                         return i;
1215         }
1216
1217         /* the last try; check the empty slots in pins */
1218         for (i = 0; i < spec->num_pins; i++) {
1219                 if (!test_bit(i, &spec->pcm_bitmap))
1220                         return i;
1221         }
1222         return -EBUSY;
1223 }
1224
1225 static void hdmi_attach_hda_pcm(struct hdmi_spec *spec,
1226                                 struct hdmi_spec_per_pin *per_pin)
1227 {
1228         int idx;
1229
1230         /* pcm already be attached to the pin */
1231         if (per_pin->pcm)
1232                 return;
1233         idx = hdmi_find_pcm_slot(spec, per_pin);
1234         if (idx == -EBUSY)
1235                 return;
1236         per_pin->pcm_idx = idx;
1237         per_pin->pcm = get_hdmi_pcm(spec, idx);
1238         set_bit(idx, &spec->pcm_bitmap);
1239 }
1240
1241 static void hdmi_detach_hda_pcm(struct hdmi_spec *spec,
1242                                 struct hdmi_spec_per_pin *per_pin)
1243 {
1244         int idx;
1245
1246         /* pcm already be detached from the pin */
1247         if (!per_pin->pcm)
1248                 return;
1249         idx = per_pin->pcm_idx;
1250         per_pin->pcm_idx = -1;
1251         per_pin->pcm = NULL;
1252         if (idx >= 0 && idx < spec->pcm_used)
1253                 clear_bit(idx, &spec->pcm_bitmap);
1254 }
1255
1256 static int hdmi_get_pin_cvt_mux(struct hdmi_spec *spec,
1257                 struct hdmi_spec_per_pin *per_pin, hda_nid_t cvt_nid)
1258 {
1259         int mux_idx;
1260
1261         for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
1262                 if (per_pin->mux_nids[mux_idx] == cvt_nid)
1263                         break;
1264         return mux_idx;
1265 }
1266
1267 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid);
1268
1269 static void hdmi_pcm_setup_pin(struct hdmi_spec *spec,
1270                            struct hdmi_spec_per_pin *per_pin)
1271 {
1272         struct hda_codec *codec = per_pin->codec;
1273         struct hda_pcm *pcm;
1274         struct hda_pcm_stream *hinfo;
1275         struct snd_pcm_substream *substream;
1276         int mux_idx;
1277         bool non_pcm;
1278
1279         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1280                 pcm = get_pcm_rec(spec, per_pin->pcm_idx);
1281         else
1282                 return;
1283         if (!test_bit(per_pin->pcm_idx, &spec->pcm_in_use))
1284                 return;
1285
1286         /* hdmi audio only uses playback and one substream */
1287         hinfo = pcm->stream;
1288         substream = pcm->pcm->streams[0].substream;
1289
1290         per_pin->cvt_nid = hinfo->nid;
1291
1292         mux_idx = hdmi_get_pin_cvt_mux(spec, per_pin, hinfo->nid);
1293         if (mux_idx < per_pin->num_mux_nids)
1294                 snd_hda_codec_write_cache(codec, per_pin->pin_nid, 0,
1295                                 AC_VERB_SET_CONNECT_SEL,
1296                                 mux_idx);
1297         snd_hda_spdif_ctls_assign(codec, per_pin->pcm_idx, hinfo->nid);
1298
1299         non_pcm = check_non_pcm_per_cvt(codec, hinfo->nid);
1300         if (substream->runtime)
1301                 per_pin->channels = substream->runtime->channels;
1302         per_pin->setup = true;
1303         per_pin->mux_idx = mux_idx;
1304
1305         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1306 }
1307
1308 static void hdmi_pcm_reset_pin(struct hdmi_spec *spec,
1309                            struct hdmi_spec_per_pin *per_pin)
1310 {
1311         if (per_pin->pcm_idx >= 0 && per_pin->pcm_idx < spec->pcm_used)
1312                 snd_hda_spdif_ctls_unassign(per_pin->codec, per_pin->pcm_idx);
1313
1314         per_pin->chmap_set = false;
1315         memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1316
1317         per_pin->setup = false;
1318         per_pin->channels = 0;
1319 }
1320
1321 /* update per_pin ELD from the given new ELD;
1322  * setup info frame and notification accordingly
1323  */
1324 static void update_eld(struct hda_codec *codec,
1325                        struct hdmi_spec_per_pin *per_pin,
1326                        struct hdmi_eld *eld)
1327 {
1328         struct hdmi_eld *pin_eld = &per_pin->sink_eld;
1329         struct hdmi_spec *spec = codec->spec;
1330         bool old_eld_valid = pin_eld->eld_valid;
1331         bool eld_changed;
1332         int pcm_idx = -1;
1333
1334         /* for monitor disconnection, save pcm_idx firstly */
1335         pcm_idx = per_pin->pcm_idx;
1336         if (spec->dyn_pcm_assign) {
1337                 if (eld->eld_valid) {
1338                         hdmi_attach_hda_pcm(spec, per_pin);
1339                         hdmi_pcm_setup_pin(spec, per_pin);
1340                 } else {
1341                         hdmi_pcm_reset_pin(spec, per_pin);
1342                         hdmi_detach_hda_pcm(spec, per_pin);
1343                 }
1344         }
1345         /* if pcm_idx == -1, it means this is in monitor connection event
1346          * we can get the correct pcm_idx now.
1347          */
1348         if (pcm_idx == -1)
1349                 pcm_idx = per_pin->pcm_idx;
1350
1351         if (eld->eld_valid)
1352                 snd_hdmi_show_eld(codec, &eld->info);
1353
1354         eld_changed = (pin_eld->eld_valid != eld->eld_valid);
1355         if (eld->eld_valid && pin_eld->eld_valid)
1356                 if (pin_eld->eld_size != eld->eld_size ||
1357                     memcmp(pin_eld->eld_buffer, eld->eld_buffer,
1358                            eld->eld_size) != 0)
1359                         eld_changed = true;
1360
1361         pin_eld->monitor_present = eld->monitor_present;
1362         pin_eld->eld_valid = eld->eld_valid;
1363         pin_eld->eld_size = eld->eld_size;
1364         if (eld->eld_valid)
1365                 memcpy(pin_eld->eld_buffer, eld->eld_buffer, eld->eld_size);
1366         pin_eld->info = eld->info;
1367
1368         /*
1369          * Re-setup pin and infoframe. This is needed e.g. when
1370          * - sink is first plugged-in
1371          * - transcoder can change during stream playback on Haswell
1372          *   and this can make HW reset converter selection on a pin.
1373          */
1374         if (eld->eld_valid && !old_eld_valid && per_pin->setup) {
1375                 if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1376                         intel_verify_pin_cvt_connect(codec, per_pin);
1377                         intel_not_share_assigned_cvt(codec, per_pin->pin_nid,
1378                                                      per_pin->mux_idx);
1379                 }
1380
1381                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1382         }
1383
1384         if (eld_changed && pcm_idx >= 0)
1385                 snd_ctl_notify(codec->card,
1386                                SNDRV_CTL_EVENT_MASK_VALUE |
1387                                SNDRV_CTL_EVENT_MASK_INFO,
1388                                &get_hdmi_pcm(spec, pcm_idx)->eld_ctl->id);
1389 }
1390
1391 /* update ELD and jack state via HD-audio verbs */
1392 static bool hdmi_present_sense_via_verbs(struct hdmi_spec_per_pin *per_pin,
1393                                          int repoll)
1394 {
1395         struct hda_jack_tbl *jack;
1396         struct hda_codec *codec = per_pin->codec;
1397         struct hdmi_spec *spec = codec->spec;
1398         struct hdmi_eld *eld = &spec->temp_eld;
1399         hda_nid_t pin_nid = per_pin->pin_nid;
1400         /*
1401          * Always execute a GetPinSense verb here, even when called from
1402          * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
1403          * response's PD bit is not the real PD value, but indicates that
1404          * the real PD value changed. An older version of the HD-audio
1405          * specification worked this way. Hence, we just ignore the data in
1406          * the unsolicited response to avoid custom WARs.
1407          */
1408         int present;
1409         bool ret;
1410         bool do_repoll = false;
1411
1412         present = snd_hda_pin_sense(codec, pin_nid);
1413
1414         mutex_lock(&per_pin->lock);
1415         eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
1416         if (eld->monitor_present)
1417                 eld->eld_valid  = !!(present & AC_PINSENSE_ELDV);
1418         else
1419                 eld->eld_valid = false;
1420
1421         codec_dbg(codec,
1422                 "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
1423                 codec->addr, pin_nid, eld->monitor_present, eld->eld_valid);
1424
1425         if (eld->eld_valid) {
1426                 if (spec->ops.pin_get_eld(codec, pin_nid, eld->eld_buffer,
1427                                                      &eld->eld_size) < 0)
1428                         eld->eld_valid = false;
1429                 else {
1430                         if (snd_hdmi_parse_eld(codec, &eld->info, eld->eld_buffer,
1431                                                     eld->eld_size) < 0)
1432                                 eld->eld_valid = false;
1433                 }
1434                 if (!eld->eld_valid && repoll)
1435                         do_repoll = true;
1436         }
1437
1438         if (do_repoll)
1439                 schedule_delayed_work(&per_pin->work, msecs_to_jiffies(300));
1440         else
1441                 update_eld(codec, per_pin, eld);
1442
1443         ret = !repoll || !eld->monitor_present || eld->eld_valid;
1444
1445         jack = snd_hda_jack_tbl_get(codec, pin_nid);
1446         if (jack)
1447                 jack->block_report = !ret;
1448
1449         mutex_unlock(&per_pin->lock);
1450         return ret;
1451 }
1452
1453 static struct snd_jack *pin_idx_to_jack(struct hda_codec *codec,
1454                                  struct hdmi_spec_per_pin *per_pin)
1455 {
1456         struct hdmi_spec *spec = codec->spec;
1457         struct snd_jack *jack = NULL;
1458         struct hda_jack_tbl *jack_tbl;
1459
1460         /* if !dyn_pcm_assign, get jack from hda_jack_tbl
1461          * in !dyn_pcm_assign case, spec->pcm_rec[].jack is not
1462          * NULL even after snd_hda_jack_tbl_clear() is called to
1463          * free snd_jack. This may cause access invalid memory
1464          * when calling snd_jack_report
1465          */
1466         if (per_pin->pcm_idx >= 0 && spec->dyn_pcm_assign)
1467                 jack = spec->pcm_rec[per_pin->pcm_idx].jack;
1468         else if (!spec->dyn_pcm_assign) {
1469                 jack_tbl = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1470                 if (jack_tbl)
1471                         jack = jack_tbl->jack;
1472         }
1473         return jack;
1474 }
1475
1476 /* update ELD and jack state via audio component */
1477 static void sync_eld_via_acomp(struct hda_codec *codec,
1478                                struct hdmi_spec_per_pin *per_pin)
1479 {
1480         struct hdmi_spec *spec = codec->spec;
1481         struct hdmi_eld *eld = &spec->temp_eld;
1482         struct snd_jack *jack = NULL;
1483         int size;
1484
1485         mutex_lock(&per_pin->lock);
1486         eld->monitor_present = false;
1487         size = snd_hdac_acomp_get_eld(&codec->bus->core, per_pin->pin_nid,
1488                                       &eld->monitor_present, eld->eld_buffer,
1489                                       ELD_MAX_SIZE);
1490         if (size > 0) {
1491                 size = min(size, ELD_MAX_SIZE);
1492                 if (snd_hdmi_parse_eld(codec, &eld->info,
1493                                        eld->eld_buffer, size) < 0)
1494                         size = -EINVAL;
1495         }
1496
1497         if (size > 0) {
1498                 eld->eld_valid = true;
1499                 eld->eld_size = size;
1500         } else {
1501                 eld->eld_valid = false;
1502                 eld->eld_size = 0;
1503         }
1504
1505         /* pcm_idx >=0 before update_eld() means it is in monitor
1506          * disconnected event. Jack must be fetched before update_eld()
1507          */
1508         jack = pin_idx_to_jack(codec, per_pin);
1509         update_eld(codec, per_pin, eld);
1510         if (jack == NULL)
1511                 jack = pin_idx_to_jack(codec, per_pin);
1512         if (jack == NULL)
1513                 goto unlock;
1514         snd_jack_report(jack,
1515                         eld->monitor_present ? SND_JACK_AVOUT : 0);
1516  unlock:
1517         mutex_unlock(&per_pin->lock);
1518 }
1519
1520 static bool hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
1521 {
1522         struct hda_codec *codec = per_pin->codec;
1523         struct hdmi_spec *spec = codec->spec;
1524         int ret;
1525
1526         /* no temporary power up/down needed for component notifier */
1527         if (!codec_has_acomp(codec))
1528                 snd_hda_power_up_pm(codec);
1529
1530         mutex_lock(&spec->pcm_lock);
1531         if (codec_has_acomp(codec)) {
1532                 sync_eld_via_acomp(codec, per_pin);
1533                 ret = false; /* don't call snd_hda_jack_report_sync() */
1534         } else {
1535                 ret = hdmi_present_sense_via_verbs(per_pin, repoll);
1536         }
1537         mutex_unlock(&spec->pcm_lock);
1538
1539         if (!codec_has_acomp(codec))
1540                 snd_hda_power_down_pm(codec);
1541
1542         return ret;
1543 }
1544
1545 static void hdmi_repoll_eld(struct work_struct *work)
1546 {
1547         struct hdmi_spec_per_pin *per_pin =
1548         container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
1549
1550         if (per_pin->repoll_count++ > 6)
1551                 per_pin->repoll_count = 0;
1552
1553         if (hdmi_present_sense(per_pin, per_pin->repoll_count))
1554                 snd_hda_jack_report_sync(per_pin->codec);
1555 }
1556
1557 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
1558                                              hda_nid_t nid);
1559
1560 static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
1561 {
1562         struct hdmi_spec *spec = codec->spec;
1563         unsigned int caps, config;
1564         int pin_idx;
1565         struct hdmi_spec_per_pin *per_pin;
1566         int err;
1567
1568         caps = snd_hda_query_pin_caps(codec, pin_nid);
1569         if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
1570                 return 0;
1571
1572         config = snd_hda_codec_get_pincfg(codec, pin_nid);
1573         if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
1574                 return 0;
1575
1576         if (is_haswell_plus(codec))
1577                 intel_haswell_fixup_connect_list(codec, pin_nid);
1578
1579         pin_idx = spec->num_pins;
1580         per_pin = snd_array_new(&spec->pins);
1581         if (!per_pin)
1582                 return -ENOMEM;
1583
1584         per_pin->pin_nid = pin_nid;
1585         per_pin->non_pcm = false;
1586         if (spec->dyn_pcm_assign)
1587                 per_pin->pcm_idx = -1;
1588         else {
1589                 per_pin->pcm = get_hdmi_pcm(spec, pin_idx);
1590                 per_pin->pcm_idx = pin_idx;
1591         }
1592         per_pin->pin_nid_idx = pin_idx;
1593
1594         err = hdmi_read_pin_conn(codec, pin_idx);
1595         if (err < 0)
1596                 return err;
1597
1598         spec->num_pins++;
1599
1600         return 0;
1601 }
1602
1603 static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1604 {
1605         struct hdmi_spec *spec = codec->spec;
1606         struct hdmi_spec_per_cvt *per_cvt;
1607         unsigned int chans;
1608         int err;
1609
1610         chans = get_wcaps(codec, cvt_nid);
1611         chans = get_wcaps_channels(chans);
1612
1613         per_cvt = snd_array_new(&spec->cvts);
1614         if (!per_cvt)
1615                 return -ENOMEM;
1616
1617         per_cvt->cvt_nid = cvt_nid;
1618         per_cvt->channels_min = 2;
1619         if (chans <= 16) {
1620                 per_cvt->channels_max = chans;
1621                 if (chans > spec->chmap.channels_max)
1622                         spec->chmap.channels_max = chans;
1623         }
1624
1625         err = snd_hda_query_supported_pcm(codec, cvt_nid,
1626                                           &per_cvt->rates,
1627                                           &per_cvt->formats,
1628                                           &per_cvt->maxbps);
1629         if (err < 0)
1630                 return err;
1631
1632         if (spec->num_cvts < ARRAY_SIZE(spec->cvt_nids))
1633                 spec->cvt_nids[spec->num_cvts] = cvt_nid;
1634         spec->num_cvts++;
1635
1636         return 0;
1637 }
1638
1639 static int hdmi_parse_codec(struct hda_codec *codec)
1640 {
1641         hda_nid_t nid;
1642         int i, nodes;
1643
1644         nodes = snd_hda_get_sub_nodes(codec, codec->core.afg, &nid);
1645         if (!nid || nodes < 0) {
1646                 codec_warn(codec, "HDMI: failed to get afg sub nodes\n");
1647                 return -EINVAL;
1648         }
1649
1650         for (i = 0; i < nodes; i++, nid++) {
1651                 unsigned int caps;
1652                 unsigned int type;
1653
1654                 caps = get_wcaps(codec, nid);
1655                 type = get_wcaps_type(caps);
1656
1657                 if (!(caps & AC_WCAP_DIGITAL))
1658                         continue;
1659
1660                 switch (type) {
1661                 case AC_WID_AUD_OUT:
1662                         hdmi_add_cvt(codec, nid);
1663                         break;
1664                 case AC_WID_PIN:
1665                         hdmi_add_pin(codec, nid);
1666                         break;
1667                 }
1668         }
1669
1670         return 0;
1671 }
1672
1673 /*
1674  */
1675 static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
1676 {
1677         struct hda_spdif_out *spdif;
1678         bool non_pcm;
1679
1680         mutex_lock(&codec->spdif_mutex);
1681         spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
1682         non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
1683         mutex_unlock(&codec->spdif_mutex);
1684         return non_pcm;
1685 }
1686
1687 /*
1688  * HDMI callbacks
1689  */
1690
1691 static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
1692                                            struct hda_codec *codec,
1693                                            unsigned int stream_tag,
1694                                            unsigned int format,
1695                                            struct snd_pcm_substream *substream)
1696 {
1697         hda_nid_t cvt_nid = hinfo->nid;
1698         struct hdmi_spec *spec = codec->spec;
1699         int pin_idx;
1700         struct hdmi_spec_per_pin *per_pin;
1701         hda_nid_t pin_nid;
1702         struct snd_pcm_runtime *runtime = substream->runtime;
1703         bool non_pcm;
1704         int pinctl;
1705         int err;
1706
1707         mutex_lock(&spec->pcm_lock);
1708         pin_idx = hinfo_to_pin_index(codec, hinfo);
1709         if (spec->dyn_pcm_assign && pin_idx < 0) {
1710                 /* when dyn_pcm_assign and pcm is not bound to a pin
1711                  * skip pin setup and return 0 to make audio playback
1712                  * be ongoing
1713                  */
1714                 intel_not_share_assigned_cvt_nid(codec, 0, cvt_nid);
1715                 snd_hda_codec_setup_stream(codec, cvt_nid,
1716                                         stream_tag, 0, format);
1717                 mutex_unlock(&spec->pcm_lock);
1718                 return 0;
1719         }
1720
1721         if (snd_BUG_ON(pin_idx < 0)) {
1722                 mutex_unlock(&spec->pcm_lock);
1723                 return -EINVAL;
1724         }
1725         per_pin = get_pin(spec, pin_idx);
1726         pin_nid = per_pin->pin_nid;
1727         if (is_haswell_plus(codec) || is_valleyview_plus(codec)) {
1728                 /* Verify pin:cvt selections to avoid silent audio after S3.
1729                  * After S3, the audio driver restores pin:cvt selections
1730                  * but this can happen before gfx is ready and such selection
1731                  * is overlooked by HW. Thus multiple pins can share a same
1732                  * default convertor and mute control will affect each other,
1733                  * which can cause a resumed audio playback become silent
1734                  * after S3.
1735                  */
1736                 intel_verify_pin_cvt_connect(codec, per_pin);
1737                 intel_not_share_assigned_cvt(codec, pin_nid, per_pin->mux_idx);
1738         }
1739
1740         /* Call sync_audio_rate to set the N/CTS/M manually if necessary */
1741         /* Todo: add DP1.2 MST audio support later */
1742         if (codec_has_acomp(codec))
1743                 snd_hdac_sync_audio_rate(&codec->bus->core, pin_nid, runtime->rate);
1744
1745         non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
1746         mutex_lock(&per_pin->lock);
1747         per_pin->channels = substream->runtime->channels;
1748         per_pin->setup = true;
1749
1750         hdmi_setup_audio_infoframe(codec, per_pin, non_pcm);
1751         mutex_unlock(&per_pin->lock);
1752         if (spec->dyn_pin_out) {
1753                 pinctl = snd_hda_codec_read(codec, pin_nid, 0,
1754                                             AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1755                 snd_hda_codec_write(codec, pin_nid, 0,
1756                                     AC_VERB_SET_PIN_WIDGET_CONTROL,
1757                                     pinctl | PIN_OUT);
1758         }
1759
1760         err = spec->ops.setup_stream(codec, cvt_nid, pin_nid,
1761                                  stream_tag, format);
1762         mutex_unlock(&spec->pcm_lock);
1763         return err;
1764 }
1765
1766 static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
1767                                              struct hda_codec *codec,
1768                                              struct snd_pcm_substream *substream)
1769 {
1770         snd_hda_codec_cleanup_stream(codec, hinfo->nid);
1771         return 0;
1772 }
1773
1774 static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
1775                           struct hda_codec *codec,
1776                           struct snd_pcm_substream *substream)
1777 {
1778         struct hdmi_spec *spec = codec->spec;
1779         int cvt_idx, pin_idx, pcm_idx;
1780         struct hdmi_spec_per_cvt *per_cvt;
1781         struct hdmi_spec_per_pin *per_pin;
1782         int pinctl;
1783
1784         if (hinfo->nid) {
1785                 pcm_idx = hinfo_to_pcm_index(codec, hinfo);
1786                 if (snd_BUG_ON(pcm_idx < 0))
1787                         return -EINVAL;
1788                 cvt_idx = cvt_nid_to_cvt_index(codec, hinfo->nid);
1789                 if (snd_BUG_ON(cvt_idx < 0))
1790                         return -EINVAL;
1791                 per_cvt = get_cvt(spec, cvt_idx);
1792
1793                 snd_BUG_ON(!per_cvt->assigned);
1794                 per_cvt->assigned = 0;
1795                 hinfo->nid = 0;
1796
1797                 mutex_lock(&spec->pcm_lock);
1798                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
1799                 clear_bit(pcm_idx, &spec->pcm_in_use);
1800                 pin_idx = hinfo_to_pin_index(codec, hinfo);
1801                 if (spec->dyn_pcm_assign && pin_idx < 0) {
1802                         mutex_unlock(&spec->pcm_lock);
1803                         return 0;
1804                 }
1805
1806                 if (snd_BUG_ON(pin_idx < 0)) {
1807                         mutex_unlock(&spec->pcm_lock);
1808                         return -EINVAL;
1809                 }
1810                 per_pin = get_pin(spec, pin_idx);
1811
1812                 if (spec->dyn_pin_out) {
1813                         pinctl = snd_hda_codec_read(codec, per_pin->pin_nid, 0,
1814                                         AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
1815                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
1816                                             AC_VERB_SET_PIN_WIDGET_CONTROL,
1817                                             pinctl & ~PIN_OUT);
1818                 }
1819
1820                 mutex_lock(&per_pin->lock);
1821                 per_pin->chmap_set = false;
1822                 memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
1823
1824                 per_pin->setup = false;
1825                 per_pin->channels = 0;
1826                 mutex_unlock(&per_pin->lock);
1827                 mutex_unlock(&spec->pcm_lock);
1828         }
1829
1830         return 0;
1831 }
1832
1833 static const struct hda_pcm_ops generic_ops = {
1834         .open = hdmi_pcm_open,
1835         .close = hdmi_pcm_close,
1836         .prepare = generic_hdmi_playback_pcm_prepare,
1837         .cleanup = generic_hdmi_playback_pcm_cleanup,
1838 };
1839
1840 static void hdmi_get_chmap(struct hdac_device *hdac, int pcm_idx,
1841                                         unsigned char *chmap)
1842 {
1843         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1844         struct hdmi_spec *spec = codec->spec;
1845         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1846
1847         /* chmap is already set to 0 in caller */
1848         if (!per_pin)
1849                 return;
1850
1851         memcpy(chmap, per_pin->chmap, ARRAY_SIZE(per_pin->chmap));
1852 }
1853
1854 static void hdmi_set_chmap(struct hdac_device *hdac, int pcm_idx,
1855                                 unsigned char *chmap, int prepared)
1856 {
1857         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1858         struct hdmi_spec *spec = codec->spec;
1859         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1860
1861         mutex_lock(&per_pin->lock);
1862         per_pin->chmap_set = true;
1863         memcpy(per_pin->chmap, chmap, ARRAY_SIZE(per_pin->chmap));
1864         if (prepared)
1865                 hdmi_setup_audio_infoframe(codec, per_pin, per_pin->non_pcm);
1866         mutex_unlock(&per_pin->lock);
1867 }
1868
1869 static bool is_hdmi_pcm_attached(struct hdac_device *hdac, int pcm_idx)
1870 {
1871         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
1872         struct hdmi_spec *spec = codec->spec;
1873         struct hdmi_spec_per_pin *per_pin = pcm_idx_to_pin(spec, pcm_idx);
1874
1875         return per_pin ? true:false;
1876 }
1877
1878 static int generic_hdmi_build_pcms(struct hda_codec *codec)
1879 {
1880         struct hdmi_spec *spec = codec->spec;
1881         int pin_idx;
1882
1883         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
1884                 struct hda_pcm *info;
1885                 struct hda_pcm_stream *pstr;
1886
1887                 info = snd_hda_codec_pcm_new(codec, "HDMI %d", pin_idx);
1888                 if (!info)
1889                         return -ENOMEM;
1890
1891                 spec->pcm_rec[pin_idx].pcm = info;
1892                 spec->pcm_used++;
1893                 info->pcm_type = HDA_PCM_TYPE_HDMI;
1894                 info->own_chmap = true;
1895
1896                 pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
1897                 pstr->substreams = 1;
1898                 pstr->ops = generic_ops;
1899                 /* other pstr fields are set in open */
1900         }
1901
1902         return 0;
1903 }
1904
1905 static void free_hdmi_jack_priv(struct snd_jack *jack)
1906 {
1907         struct hdmi_pcm *pcm = jack->private_data;
1908
1909         pcm->jack = NULL;
1910 }
1911
1912 static int add_hdmi_jack_kctl(struct hda_codec *codec,
1913                                struct hdmi_spec *spec,
1914                                int pcm_idx,
1915                                const char *name)
1916 {
1917         struct snd_jack *jack;
1918         int err;
1919
1920         err = snd_jack_new(codec->card, name, SND_JACK_AVOUT, &jack,
1921                            true, false);
1922         if (err < 0)
1923                 return err;
1924
1925         spec->pcm_rec[pcm_idx].jack = jack;
1926         jack->private_data = &spec->pcm_rec[pcm_idx];
1927         jack->private_free = free_hdmi_jack_priv;
1928         return 0;
1929 }
1930
1931 static int generic_hdmi_build_jack(struct hda_codec *codec, int pcm_idx)
1932 {
1933         char hdmi_str[32] = "HDMI/DP";
1934         struct hdmi_spec *spec = codec->spec;
1935         struct hdmi_spec_per_pin *per_pin;
1936         struct hda_jack_tbl *jack;
1937         int pcmdev = get_pcm_rec(spec, pcm_idx)->device;
1938         bool phantom_jack;
1939         int ret;
1940
1941         if (pcmdev > 0)
1942                 sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
1943
1944         if (spec->dyn_pcm_assign)
1945                 return add_hdmi_jack_kctl(codec, spec, pcm_idx, hdmi_str);
1946
1947         /* for !dyn_pcm_assign, we still use hda_jack for compatibility */
1948         /* if !dyn_pcm_assign, it must be non-MST mode.
1949          * This means pcms and pins are statically mapped.
1950          * And pcm_idx is pin_idx.
1951          */
1952         per_pin = get_pin(spec, pcm_idx);
1953         phantom_jack = !is_jack_detectable(codec, per_pin->pin_nid);
1954         if (phantom_jack)
1955                 strncat(hdmi_str, " Phantom",
1956                         sizeof(hdmi_str) - strlen(hdmi_str) - 1);
1957         ret = snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str,
1958                                     phantom_jack);
1959         if (ret < 0)
1960                 return ret;
1961         jack = snd_hda_jack_tbl_get(codec, per_pin->pin_nid);
1962         if (jack == NULL)
1963                 return 0;
1964         /* assign jack->jack to pcm_rec[].jack to
1965          * align with dyn_pcm_assign mode
1966          */
1967         spec->pcm_rec[pcm_idx].jack = jack->jack;
1968         return 0;
1969 }
1970
1971 static int generic_hdmi_build_controls(struct hda_codec *codec)
1972 {
1973         struct hdmi_spec *spec = codec->spec;
1974         int err;
1975         int pin_idx, pcm_idx;
1976
1977
1978         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
1979                 err = generic_hdmi_build_jack(codec, pcm_idx);
1980                 if (err < 0)
1981                         return err;
1982
1983                 /* create the spdif for each pcm
1984                  * pin will be bound when monitor is connected
1985                  */
1986                 if (spec->dyn_pcm_assign)
1987                         err = snd_hda_create_dig_out_ctls(codec,
1988                                           0, spec->cvt_nids[0],
1989                                           HDA_PCM_TYPE_HDMI);
1990                 else {
1991                         struct hdmi_spec_per_pin *per_pin =
1992                                 get_pin(spec, pcm_idx);
1993                         err = snd_hda_create_dig_out_ctls(codec,
1994                                                   per_pin->pin_nid,
1995                                                   per_pin->mux_nids[0],
1996                                                   HDA_PCM_TYPE_HDMI);
1997                 }
1998                 if (err < 0)
1999                         return err;
2000                 snd_hda_spdif_ctls_unassign(codec, pcm_idx);
2001
2002                 /* add control for ELD Bytes */
2003                 err = hdmi_create_eld_ctl(codec, pcm_idx,
2004                                         get_pcm_rec(spec, pcm_idx)->device);
2005                 if (err < 0)
2006                         return err;
2007         }
2008
2009         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2010                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2011
2012                 hdmi_present_sense(per_pin, 0);
2013         }
2014
2015         /* add channel maps */
2016         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2017                 struct hda_pcm *pcm;
2018
2019                 pcm = get_pcm_rec(spec, pcm_idx);
2020                 if (!pcm || !pcm->pcm)
2021                         break;
2022                 err = snd_hdac_add_chmap_ctls(pcm->pcm, pcm_idx, &spec->chmap);
2023                 if (err < 0)
2024                         return err;
2025         }
2026
2027         return 0;
2028 }
2029
2030 static int generic_hdmi_init_per_pins(struct hda_codec *codec)
2031 {
2032         struct hdmi_spec *spec = codec->spec;
2033         int pin_idx;
2034
2035         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2036                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2037
2038                 per_pin->codec = codec;
2039                 mutex_init(&per_pin->lock);
2040                 INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
2041                 eld_proc_new(per_pin, pin_idx);
2042         }
2043         return 0;
2044 }
2045
2046 static int generic_hdmi_init(struct hda_codec *codec)
2047 {
2048         struct hdmi_spec *spec = codec->spec;
2049         int pin_idx;
2050
2051         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2052                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2053                 hda_nid_t pin_nid = per_pin->pin_nid;
2054
2055                 hdmi_init_pin(codec, pin_nid);
2056                 if (!codec_has_acomp(codec))
2057                         snd_hda_jack_detect_enable_callback(codec, pin_nid,
2058                                 codec->jackpoll_interval > 0 ?
2059                                 jack_callback : NULL);
2060         }
2061         return 0;
2062 }
2063
2064 static void hdmi_array_init(struct hdmi_spec *spec, int nums)
2065 {
2066         snd_array_init(&spec->pins, sizeof(struct hdmi_spec_per_pin), nums);
2067         snd_array_init(&spec->cvts, sizeof(struct hdmi_spec_per_cvt), nums);
2068 }
2069
2070 static void hdmi_array_free(struct hdmi_spec *spec)
2071 {
2072         snd_array_free(&spec->pins);
2073         snd_array_free(&spec->cvts);
2074 }
2075
2076 static void generic_hdmi_free(struct hda_codec *codec)
2077 {
2078         struct hdmi_spec *spec = codec->spec;
2079         int pin_idx, pcm_idx;
2080
2081         if (codec_has_acomp(codec))
2082                 snd_hdac_i915_register_notifier(NULL);
2083
2084         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2085                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2086                 cancel_delayed_work_sync(&per_pin->work);
2087                 eld_proc_free(per_pin);
2088         }
2089
2090         for (pcm_idx = 0; pcm_idx < spec->pcm_used; pcm_idx++) {
2091                 if (spec->pcm_rec[pcm_idx].jack == NULL)
2092                         continue;
2093                 if (spec->dyn_pcm_assign)
2094                         snd_device_free(codec->card,
2095                                         spec->pcm_rec[pcm_idx].jack);
2096                 else
2097                         spec->pcm_rec[pcm_idx].jack = NULL;
2098         }
2099
2100         if (spec->i915_bound)
2101                 snd_hdac_i915_exit(&codec->bus->core);
2102         hdmi_array_free(spec);
2103         kfree(spec);
2104 }
2105
2106 #ifdef CONFIG_PM
2107 static int generic_hdmi_resume(struct hda_codec *codec)
2108 {
2109         struct hdmi_spec *spec = codec->spec;
2110         int pin_idx;
2111
2112         codec->patch_ops.init(codec);
2113         regcache_sync(codec->core.regmap);
2114
2115         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
2116                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
2117                 hdmi_present_sense(per_pin, 1);
2118         }
2119         return 0;
2120 }
2121 #endif
2122
2123 static const struct hda_codec_ops generic_hdmi_patch_ops = {
2124         .init                   = generic_hdmi_init,
2125         .free                   = generic_hdmi_free,
2126         .build_pcms             = generic_hdmi_build_pcms,
2127         .build_controls         = generic_hdmi_build_controls,
2128         .unsol_event            = hdmi_unsol_event,
2129 #ifdef CONFIG_PM
2130         .resume                 = generic_hdmi_resume,
2131 #endif
2132 };
2133
2134 static const struct hdmi_ops generic_standard_hdmi_ops = {
2135         .pin_get_eld                            = snd_hdmi_get_eld,
2136         .pin_setup_infoframe                    = hdmi_pin_setup_infoframe,
2137         .pin_hbr_setup                          = hdmi_pin_hbr_setup,
2138         .setup_stream                           = hdmi_setup_stream,
2139 };
2140
2141 static void intel_haswell_fixup_connect_list(struct hda_codec *codec,
2142                                              hda_nid_t nid)
2143 {
2144         struct hdmi_spec *spec = codec->spec;
2145         hda_nid_t conns[4];
2146         int nconns;
2147
2148         nconns = snd_hda_get_connections(codec, nid, conns, ARRAY_SIZE(conns));
2149         if (nconns == spec->num_cvts &&
2150             !memcmp(conns, spec->cvt_nids, spec->num_cvts * sizeof(hda_nid_t)))
2151                 return;
2152
2153         /* override pins connection list */
2154         codec_dbg(codec, "hdmi: haswell: override pin connection 0x%x\n", nid);
2155         snd_hda_override_conn_list(codec, nid, spec->num_cvts, spec->cvt_nids);
2156 }
2157
2158 #define INTEL_VENDOR_NID 0x08
2159 #define INTEL_GET_VENDOR_VERB 0xf81
2160 #define INTEL_SET_VENDOR_VERB 0x781
2161 #define INTEL_EN_DP12                   0x02 /* enable DP 1.2 features */
2162 #define INTEL_EN_ALL_PIN_CVTS   0x01 /* enable 2nd & 3rd pins and convertors */
2163
2164 static void intel_haswell_enable_all_pins(struct hda_codec *codec,
2165                                           bool update_tree)
2166 {
2167         unsigned int vendor_param;
2168
2169         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2170                                 INTEL_GET_VENDOR_VERB, 0);
2171         if (vendor_param == -1 || vendor_param & INTEL_EN_ALL_PIN_CVTS)
2172                 return;
2173
2174         vendor_param |= INTEL_EN_ALL_PIN_CVTS;
2175         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2176                                 INTEL_SET_VENDOR_VERB, vendor_param);
2177         if (vendor_param == -1)
2178                 return;
2179
2180         if (update_tree)
2181                 snd_hda_codec_update_widgets(codec);
2182 }
2183
2184 static void intel_haswell_fixup_enable_dp12(struct hda_codec *codec)
2185 {
2186         unsigned int vendor_param;
2187
2188         vendor_param = snd_hda_codec_read(codec, INTEL_VENDOR_NID, 0,
2189                                 INTEL_GET_VENDOR_VERB, 0);
2190         if (vendor_param == -1 || vendor_param & INTEL_EN_DP12)
2191                 return;
2192
2193         /* enable DP1.2 mode */
2194         vendor_param |= INTEL_EN_DP12;
2195         snd_hdac_regmap_add_vendor_verb(&codec->core, INTEL_SET_VENDOR_VERB);
2196         snd_hda_codec_write_cache(codec, INTEL_VENDOR_NID, 0,
2197                                 INTEL_SET_VENDOR_VERB, vendor_param);
2198 }
2199
2200 /* Haswell needs to re-issue the vendor-specific verbs before turning to D0.
2201  * Otherwise you may get severe h/w communication errors.
2202  */
2203 static void haswell_set_power_state(struct hda_codec *codec, hda_nid_t fg,
2204                                 unsigned int power_state)
2205 {
2206         if (power_state == AC_PWRST_D0) {
2207                 intel_haswell_enable_all_pins(codec, false);
2208                 intel_haswell_fixup_enable_dp12(codec);
2209         }
2210
2211         snd_hda_codec_read(codec, fg, 0, AC_VERB_SET_POWER_STATE, power_state);
2212         snd_hda_codec_set_power_to_all(codec, fg, power_state);
2213 }
2214
2215 static void intel_pin_eld_notify(void *audio_ptr, int port)
2216 {
2217         struct hda_codec *codec = audio_ptr;
2218         int pin_nid = port + 0x04;
2219
2220         /* we assume only from port-B to port-D */
2221         if (port < 1 || port > 3)
2222                 return;
2223
2224         /* skip notification during system suspend (but not in runtime PM);
2225          * the state will be updated at resume
2226          */
2227         if (snd_power_get_state(codec->card) != SNDRV_CTL_POWER_D0)
2228                 return;
2229         /* ditto during suspend/resume process itself */
2230         if (atomic_read(&(codec)->core.in_pm))
2231                 return;
2232
2233         check_presence_and_report(codec, pin_nid);
2234 }
2235
2236 static int patch_generic_hdmi(struct hda_codec *codec)
2237 {
2238         struct hdmi_spec *spec;
2239
2240         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2241         if (spec == NULL)
2242                 return -ENOMEM;
2243
2244         spec->ops = generic_standard_hdmi_ops;
2245         mutex_init(&spec->pcm_lock);
2246         snd_hdac_register_chmap_ops(&codec->core, &spec->chmap);
2247
2248         spec->chmap.ops.get_chmap = hdmi_get_chmap;
2249         spec->chmap.ops.set_chmap = hdmi_set_chmap;
2250         spec->chmap.ops.is_pcm_attached = is_hdmi_pcm_attached;
2251
2252         codec->spec = spec;
2253         hdmi_array_init(spec, 4);
2254
2255 #ifdef CONFIG_SND_HDA_I915
2256         /* Try to bind with i915 for Intel HSW+ codecs (if not done yet) */
2257         if ((codec->core.vendor_id >> 16) == 0x8086 &&
2258             is_haswell_plus(codec)) {
2259 #if 0
2260                 /* on-demand binding leads to an unbalanced refcount when
2261                  * both i915 and hda drivers are probed concurrently;
2262                  * disabled temporarily for now
2263                  */
2264                 if (!codec->bus->core.audio_component)
2265                         if (!snd_hdac_i915_init(&codec->bus->core))
2266                                 spec->i915_bound = true;
2267 #endif
2268                 /* use i915 audio component notifier for hotplug */
2269                 if (codec->bus->core.audio_component)
2270                         spec->use_acomp_notifier = true;
2271         }
2272 #endif
2273
2274         if (is_haswell_plus(codec)) {
2275                 intel_haswell_enable_all_pins(codec, true);
2276                 intel_haswell_fixup_enable_dp12(codec);
2277         }
2278
2279         /* For Valleyview/Cherryview, only the display codec is in the display
2280          * power well and can use link_power ops to request/release the power.
2281          * For Haswell/Broadwell, the controller is also in the power well and
2282          * can cover the codec power request, and so need not set this flag.
2283          * For previous platforms, there is no such power well feature.
2284          */
2285         if (is_valleyview_plus(codec) || is_skylake(codec) ||
2286                         is_broxton(codec))
2287                 codec->core.link_power_control = 1;
2288
2289         if (hdmi_parse_codec(codec) < 0) {
2290                 if (spec->i915_bound)
2291                         snd_hdac_i915_exit(&codec->bus->core);
2292                 codec->spec = NULL;
2293                 kfree(spec);
2294                 return -EINVAL;
2295         }
2296         codec->patch_ops = generic_hdmi_patch_ops;
2297         if (is_haswell_plus(codec)) {
2298                 codec->patch_ops.set_power_state = haswell_set_power_state;
2299                 codec->dp_mst = true;
2300         }
2301
2302         /* Enable runtime pm for HDMI audio codec of HSW/BDW/SKL/BYT/BSW */
2303         if (is_haswell_plus(codec) || is_valleyview_plus(codec))
2304                 codec->auto_runtime_pm = 1;
2305
2306         generic_hdmi_init_per_pins(codec);
2307
2308
2309         if (codec_has_acomp(codec)) {
2310                 codec->depop_delay = 0;
2311                 spec->i915_audio_ops.audio_ptr = codec;
2312                 /* intel_audio_codec_enable() or intel_audio_codec_disable()
2313                  * will call pin_eld_notify with using audio_ptr pointer
2314                  * We need make sure audio_ptr is really setup
2315                  */
2316                 wmb();
2317                 spec->i915_audio_ops.pin_eld_notify = intel_pin_eld_notify;
2318                 snd_hdac_i915_register_notifier(&spec->i915_audio_ops);
2319         }
2320
2321         WARN_ON(spec->dyn_pcm_assign && !codec_has_acomp(codec));
2322         return 0;
2323 }
2324
2325 /*
2326  * Shared non-generic implementations
2327  */
2328
2329 static int simple_playback_build_pcms(struct hda_codec *codec)
2330 {
2331         struct hdmi_spec *spec = codec->spec;
2332         struct hda_pcm *info;
2333         unsigned int chans;
2334         struct hda_pcm_stream *pstr;
2335         struct hdmi_spec_per_cvt *per_cvt;
2336
2337         per_cvt = get_cvt(spec, 0);
2338         chans = get_wcaps(codec, per_cvt->cvt_nid);
2339         chans = get_wcaps_channels(chans);
2340
2341         info = snd_hda_codec_pcm_new(codec, "HDMI 0");
2342         if (!info)
2343                 return -ENOMEM;
2344         spec->pcm_rec[0].pcm = info;
2345         info->pcm_type = HDA_PCM_TYPE_HDMI;
2346         pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
2347         *pstr = spec->pcm_playback;
2348         pstr->nid = per_cvt->cvt_nid;
2349         if (pstr->channels_max <= 2 && chans && chans <= 16)
2350                 pstr->channels_max = chans;
2351
2352         return 0;
2353 }
2354
2355 /* unsolicited event for jack sensing */
2356 static void simple_hdmi_unsol_event(struct hda_codec *codec,
2357                                     unsigned int res)
2358 {
2359         snd_hda_jack_set_dirty_all(codec);
2360         snd_hda_jack_report_sync(codec);
2361 }
2362
2363 /* generic_hdmi_build_jack can be used for simple_hdmi, too,
2364  * as long as spec->pins[] is set correctly
2365  */
2366 #define simple_hdmi_build_jack  generic_hdmi_build_jack
2367
2368 static int simple_playback_build_controls(struct hda_codec *codec)
2369 {
2370         struct hdmi_spec *spec = codec->spec;
2371         struct hdmi_spec_per_cvt *per_cvt;
2372         int err;
2373
2374         per_cvt = get_cvt(spec, 0);
2375         err = snd_hda_create_dig_out_ctls(codec, per_cvt->cvt_nid,
2376                                           per_cvt->cvt_nid,
2377                                           HDA_PCM_TYPE_HDMI);
2378         if (err < 0)
2379                 return err;
2380         return simple_hdmi_build_jack(codec, 0);
2381 }
2382
2383 static int simple_playback_init(struct hda_codec *codec)
2384 {
2385         struct hdmi_spec *spec = codec->spec;
2386         struct hdmi_spec_per_pin *per_pin = get_pin(spec, 0);
2387         hda_nid_t pin = per_pin->pin_nid;
2388
2389         snd_hda_codec_write(codec, pin, 0,
2390                             AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
2391         /* some codecs require to unmute the pin */
2392         if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
2393                 snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
2394                                     AMP_OUT_UNMUTE);
2395         snd_hda_jack_detect_enable(codec, pin);
2396         return 0;
2397 }
2398
2399 static void simple_playback_free(struct hda_codec *codec)
2400 {
2401         struct hdmi_spec *spec = codec->spec;
2402
2403         hdmi_array_free(spec);
2404         kfree(spec);
2405 }
2406
2407 /*
2408  * Nvidia specific implementations
2409  */
2410
2411 #define Nv_VERB_SET_Channel_Allocation          0xF79
2412 #define Nv_VERB_SET_Info_Frame_Checksum         0xF7A
2413 #define Nv_VERB_SET_Audio_Protection_On         0xF98
2414 #define Nv_VERB_SET_Audio_Protection_Off        0xF99
2415
2416 #define nvhdmi_master_con_nid_7x        0x04
2417 #define nvhdmi_master_pin_nid_7x        0x05
2418
2419 static const hda_nid_t nvhdmi_con_nids_7x[4] = {
2420         /*front, rear, clfe, rear_surr */
2421         0x6, 0x8, 0xa, 0xc,
2422 };
2423
2424 static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
2425         /* set audio protect on */
2426         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2427         /* enable digital output on pin widget */
2428         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2429         {} /* terminator */
2430 };
2431
2432 static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
2433         /* set audio protect on */
2434         { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
2435         /* enable digital output on pin widget */
2436         { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2437         { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2438         { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2439         { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2440         { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
2441         {} /* terminator */
2442 };
2443
2444 #ifdef LIMITED_RATE_FMT_SUPPORT
2445 /* support only the safe format and rate */
2446 #define SUPPORTED_RATES         SNDRV_PCM_RATE_48000
2447 #define SUPPORTED_MAXBPS        16
2448 #define SUPPORTED_FORMATS       SNDRV_PCM_FMTBIT_S16_LE
2449 #else
2450 /* support all rates and formats */
2451 #define SUPPORTED_RATES \
2452         (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
2453         SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
2454          SNDRV_PCM_RATE_192000)
2455 #define SUPPORTED_MAXBPS        24
2456 #define SUPPORTED_FORMATS \
2457         (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
2458 #endif
2459
2460 static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
2461 {
2462         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
2463         return 0;
2464 }
2465
2466 static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
2467 {
2468         snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
2469         return 0;
2470 }
2471
2472 static unsigned int channels_2_6_8[] = {
2473         2, 6, 8
2474 };
2475
2476 static unsigned int channels_2_8[] = {
2477         2, 8
2478 };
2479
2480 static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
2481         .count = ARRAY_SIZE(channels_2_6_8),
2482         .list = channels_2_6_8,
2483         .mask = 0,
2484 };
2485
2486 static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
2487         .count = ARRAY_SIZE(channels_2_8),
2488         .list = channels_2_8,
2489         .mask = 0,
2490 };
2491
2492 static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
2493                                     struct hda_codec *codec,
2494                                     struct snd_pcm_substream *substream)
2495 {
2496         struct hdmi_spec *spec = codec->spec;
2497         struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
2498
2499         switch (codec->preset->vendor_id) {
2500         case 0x10de0002:
2501         case 0x10de0003:
2502         case 0x10de0005:
2503         case 0x10de0006:
2504                 hw_constraints_channels = &hw_constraints_2_8_channels;
2505                 break;
2506         case 0x10de0007:
2507                 hw_constraints_channels = &hw_constraints_2_6_8_channels;
2508                 break;
2509         default:
2510                 break;
2511         }
2512
2513         if (hw_constraints_channels != NULL) {
2514                 snd_pcm_hw_constraint_list(substream->runtime, 0,
2515                                 SNDRV_PCM_HW_PARAM_CHANNELS,
2516                                 hw_constraints_channels);
2517         } else {
2518                 snd_pcm_hw_constraint_step(substream->runtime, 0,
2519                                            SNDRV_PCM_HW_PARAM_CHANNELS, 2);
2520         }
2521
2522         return snd_hda_multi_out_dig_open(codec, &spec->multiout);
2523 }
2524
2525 static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
2526                                      struct hda_codec *codec,
2527                                      struct snd_pcm_substream *substream)
2528 {
2529         struct hdmi_spec *spec = codec->spec;
2530         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2531 }
2532
2533 static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
2534                                        struct hda_codec *codec,
2535                                        unsigned int stream_tag,
2536                                        unsigned int format,
2537                                        struct snd_pcm_substream *substream)
2538 {
2539         struct hdmi_spec *spec = codec->spec;
2540         return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
2541                                              stream_tag, format, substream);
2542 }
2543
2544 static const struct hda_pcm_stream simple_pcm_playback = {
2545         .substreams = 1,
2546         .channels_min = 2,
2547         .channels_max = 2,
2548         .ops = {
2549                 .open = simple_playback_pcm_open,
2550                 .close = simple_playback_pcm_close,
2551                 .prepare = simple_playback_pcm_prepare
2552         },
2553 };
2554
2555 static const struct hda_codec_ops simple_hdmi_patch_ops = {
2556         .build_controls = simple_playback_build_controls,
2557         .build_pcms = simple_playback_build_pcms,
2558         .init = simple_playback_init,
2559         .free = simple_playback_free,
2560         .unsol_event = simple_hdmi_unsol_event,
2561 };
2562
2563 static int patch_simple_hdmi(struct hda_codec *codec,
2564                              hda_nid_t cvt_nid, hda_nid_t pin_nid)
2565 {
2566         struct hdmi_spec *spec;
2567         struct hdmi_spec_per_cvt *per_cvt;
2568         struct hdmi_spec_per_pin *per_pin;
2569
2570         spec = kzalloc(sizeof(*spec), GFP_KERNEL);
2571         if (!spec)
2572                 return -ENOMEM;
2573
2574         codec->spec = spec;
2575         hdmi_array_init(spec, 1);
2576
2577         spec->multiout.num_dacs = 0;  /* no analog */
2578         spec->multiout.max_channels = 2;
2579         spec->multiout.dig_out_nid = cvt_nid;
2580         spec->num_cvts = 1;
2581         spec->num_pins = 1;
2582         per_pin = snd_array_new(&spec->pins);
2583         per_cvt = snd_array_new(&spec->cvts);
2584         if (!per_pin || !per_cvt) {
2585                 simple_playback_free(codec);
2586                 return -ENOMEM;
2587         }
2588         per_cvt->cvt_nid = cvt_nid;
2589         per_pin->pin_nid = pin_nid;
2590         spec->pcm_playback = simple_pcm_playback;
2591
2592         codec->patch_ops = simple_hdmi_patch_ops;
2593
2594         return 0;
2595 }
2596
2597 static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
2598                                                     int channels)
2599 {
2600         unsigned int chanmask;
2601         int chan = channels ? (channels - 1) : 1;
2602
2603         switch (channels) {
2604         default:
2605         case 0:
2606         case 2:
2607                 chanmask = 0x00;
2608                 break;
2609         case 4:
2610                 chanmask = 0x08;
2611                 break;
2612         case 6:
2613                 chanmask = 0x0b;
2614                 break;
2615         case 8:
2616                 chanmask = 0x13;
2617                 break;
2618         }
2619
2620         /* Set the audio infoframe channel allocation and checksum fields.  The
2621          * channel count is computed implicitly by the hardware. */
2622         snd_hda_codec_write(codec, 0x1, 0,
2623                         Nv_VERB_SET_Channel_Allocation, chanmask);
2624
2625         snd_hda_codec_write(codec, 0x1, 0,
2626                         Nv_VERB_SET_Info_Frame_Checksum,
2627                         (0x71 - chan - chanmask));
2628 }
2629
2630 static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
2631                                    struct hda_codec *codec,
2632                                    struct snd_pcm_substream *substream)
2633 {
2634         struct hdmi_spec *spec = codec->spec;
2635         int i;
2636
2637         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
2638                         0, AC_VERB_SET_CHANNEL_STREAMID, 0);
2639         for (i = 0; i < 4; i++) {
2640                 /* set the stream id */
2641                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2642                                 AC_VERB_SET_CHANNEL_STREAMID, 0);
2643                 /* set the stream format */
2644                 snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
2645                                 AC_VERB_SET_STREAM_FORMAT, 0);
2646         }
2647
2648         /* The audio hardware sends a channel count of 0x7 (8ch) when all the
2649          * streams are disabled. */
2650         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2651
2652         return snd_hda_multi_out_dig_close(codec, &spec->multiout);
2653 }
2654
2655 static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
2656                                      struct hda_codec *codec,
2657                                      unsigned int stream_tag,
2658                                      unsigned int format,
2659                                      struct snd_pcm_substream *substream)
2660 {
2661         int chs;
2662         unsigned int dataDCC2, channel_id;
2663         int i;
2664         struct hdmi_spec *spec = codec->spec;
2665         struct hda_spdif_out *spdif;
2666         struct hdmi_spec_per_cvt *per_cvt;
2667
2668         mutex_lock(&codec->spdif_mutex);
2669         per_cvt = get_cvt(spec, 0);
2670         spdif = snd_hda_spdif_out_of_nid(codec, per_cvt->cvt_nid);
2671
2672         chs = substream->runtime->channels;
2673
2674         dataDCC2 = 0x2;
2675
2676         /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
2677         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
2678                 snd_hda_codec_write(codec,
2679                                 nvhdmi_master_con_nid_7x,
2680                                 0,
2681                                 AC_VERB_SET_DIGI_CONVERT_1,
2682                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2683
2684         /* set the stream id */
2685         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2686                         AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
2687
2688         /* set the stream format */
2689         snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
2690                         AC_VERB_SET_STREAM_FORMAT, format);
2691
2692         /* turn on again (if needed) */
2693         /* enable and set the channel status audio/data flag */
2694         if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
2695                 snd_hda_codec_write(codec,
2696                                 nvhdmi_master_con_nid_7x,
2697                                 0,
2698                                 AC_VERB_SET_DIGI_CONVERT_1,
2699                                 spdif->ctls & 0xff);
2700                 snd_hda_codec_write(codec,
2701                                 nvhdmi_master_con_nid_7x,
2702                                 0,
2703                                 AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2704         }
2705
2706         for (i = 0; i < 4; i++) {
2707                 if (chs == 2)
2708                         channel_id = 0;
2709                 else
2710                         channel_id = i * 2;
2711
2712                 /* turn off SPDIF once;
2713                  *otherwise the IEC958 bits won't be updated
2714                  */
2715                 if (codec->spdif_status_reset &&
2716                 (spdif->ctls & AC_DIG1_ENABLE))
2717                         snd_hda_codec_write(codec,
2718                                 nvhdmi_con_nids_7x[i],
2719                                 0,
2720                                 AC_VERB_SET_DIGI_CONVERT_1,
2721                                 spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
2722                 /* set the stream id */
2723                 snd_hda_codec_write(codec,
2724                                 nvhdmi_con_nids_7x[i],
2725                                 0,
2726                                 AC_VERB_SET_CHANNEL_STREAMID,
2727                                 (stream_tag << 4) | channel_id);
2728                 /* set the stream format */
2729                 snd_hda_codec_write(codec,
2730                                 nvhdmi_con_nids_7x[i],
2731                                 0,
2732                                 AC_VERB_SET_STREAM_FORMAT,
2733                                 format);
2734                 /* turn on again (if needed) */
2735                 /* enable and set the channel status audio/data flag */
2736                 if (codec->spdif_status_reset &&
2737                 (spdif->ctls & AC_DIG1_ENABLE)) {
2738                         snd_hda_codec_write(codec,
2739                                         nvhdmi_con_nids_7x[i],
2740                                         0,
2741                                         AC_VERB_SET_DIGI_CONVERT_1,
2742                                         spdif->ctls & 0xff);
2743                         snd_hda_codec_write(codec,
2744                                         nvhdmi_con_nids_7x[i],
2745                                         0,
2746                                         AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
2747                 }
2748         }
2749
2750         nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
2751
2752         mutex_unlock(&codec->spdif_mutex);
2753         return 0;
2754 }
2755
2756 static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
2757         .substreams = 1,
2758         .channels_min = 2,
2759         .channels_max = 8,
2760         .nid = nvhdmi_master_con_nid_7x,
2761         .rates = SUPPORTED_RATES,
2762         .maxbps = SUPPORTED_MAXBPS,
2763         .formats = SUPPORTED_FORMATS,
2764         .ops = {
2765                 .open = simple_playback_pcm_open,
2766                 .close = nvhdmi_8ch_7x_pcm_close,
2767                 .prepare = nvhdmi_8ch_7x_pcm_prepare
2768         },
2769 };
2770
2771 static int patch_nvhdmi_2ch(struct hda_codec *codec)
2772 {
2773         struct hdmi_spec *spec;
2774         int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
2775                                     nvhdmi_master_pin_nid_7x);
2776         if (err < 0)
2777                 return err;
2778
2779         codec->patch_ops.init = nvhdmi_7x_init_2ch;
2780         /* override the PCM rates, etc, as the codec doesn't give full list */
2781         spec = codec->spec;
2782         spec->pcm_playback.rates = SUPPORTED_RATES;
2783         spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
2784         spec->pcm_playback.formats = SUPPORTED_FORMATS;
2785         return 0;
2786 }
2787
2788 static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
2789 {
2790         struct hdmi_spec *spec = codec->spec;
2791         int err = simple_playback_build_pcms(codec);
2792         if (!err) {
2793                 struct hda_pcm *info = get_pcm_rec(spec, 0);
2794                 info->own_chmap = true;
2795         }
2796         return err;
2797 }
2798
2799 static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
2800 {
2801         struct hdmi_spec *spec = codec->spec;
2802         struct hda_pcm *info;
2803         struct snd_pcm_chmap *chmap;
2804         int err;
2805
2806         err = simple_playback_build_controls(codec);
2807         if (err < 0)
2808                 return err;
2809
2810         /* add channel maps */
2811         info = get_pcm_rec(spec, 0);
2812         err = snd_pcm_add_chmap_ctls(info->pcm,
2813                                      SNDRV_PCM_STREAM_PLAYBACK,
2814                                      snd_pcm_alt_chmaps, 8, 0, &chmap);
2815         if (err < 0)
2816                 return err;
2817         switch (codec->preset->vendor_id) {
2818         case 0x10de0002:
2819         case 0x10de0003:
2820         case 0x10de0005:
2821         case 0x10de0006:
2822                 chmap->channel_mask = (1U << 2) | (1U << 8);
2823                 break;
2824         case 0x10de0007:
2825                 chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
2826         }
2827         return 0;
2828 }
2829
2830 static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
2831 {
2832         struct hdmi_spec *spec;
2833         int err = patch_nvhdmi_2ch(codec);
2834         if (err < 0)
2835                 return err;
2836         spec = codec->spec;
2837         spec->multiout.max_channels = 8;
2838         spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
2839         codec->patch_ops.init = nvhdmi_7x_init_8ch;
2840         codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
2841         codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
2842
2843         /* Initialize the audio infoframe channel mask and checksum to something
2844          * valid */
2845         nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
2846
2847         return 0;
2848 }
2849
2850 /*
2851  * NVIDIA codecs ignore ASP mapping for 2ch - confirmed on:
2852  * - 0x10de0015
2853  * - 0x10de0040
2854  */
2855 static int nvhdmi_chmap_cea_alloc_validate_get_type(struct hdac_chmap *chmap,
2856                 struct hdac_cea_channel_speaker_allocation *cap, int channels)
2857 {
2858         if (cap->ca_index == 0x00 && channels == 2)
2859                 return SNDRV_CTL_TLVT_CHMAP_FIXED;
2860
2861         /* If the speaker allocation matches the channel count, it is OK. */
2862         if (cap->channels != channels)
2863                 return -1;
2864
2865         /* all channels are remappable freely */
2866         return SNDRV_CTL_TLVT_CHMAP_VAR;
2867 }
2868
2869 static int nvhdmi_chmap_validate(struct hdac_chmap *chmap,
2870                 int ca, int chs, unsigned char *map)
2871 {
2872         if (ca == 0x00 && (map[0] != SNDRV_CHMAP_FL || map[1] != SNDRV_CHMAP_FR))
2873                 return -EINVAL;
2874
2875         return 0;
2876 }
2877
2878 static int patch_nvhdmi(struct hda_codec *codec)
2879 {
2880         struct hdmi_spec *spec;
2881         int err;
2882
2883         err = patch_generic_hdmi(codec);
2884         if (err)
2885                 return err;
2886
2887         spec = codec->spec;
2888         spec->dyn_pin_out = true;
2889
2890         spec->chmap.ops.chmap_cea_alloc_validate_get_type =
2891                 nvhdmi_chmap_cea_alloc_validate_get_type;
2892         spec->chmap.ops.chmap_validate = nvhdmi_chmap_validate;
2893
2894         return 0;
2895 }
2896
2897 /*
2898  * The HDA codec on NVIDIA Tegra contains two scratch registers that are
2899  * accessed using vendor-defined verbs. These registers can be used for
2900  * interoperability between the HDA and HDMI drivers.
2901  */
2902
2903 /* Audio Function Group node */
2904 #define NVIDIA_AFG_NID 0x01
2905
2906 /*
2907  * The SCRATCH0 register is used to notify the HDMI codec of changes in audio
2908  * format. On Tegra, bit 31 is used as a trigger that causes an interrupt to
2909  * be raised in the HDMI codec. The remainder of the bits is arbitrary. This
2910  * implementation stores the HDA format (see AC_FMT_*) in bits [15:0] and an
2911  * additional bit (at position 30) to signal the validity of the format.
2912  *
2913  * | 31      | 30    | 29  16 | 15   0 |
2914  * +---------+-------+--------+--------+
2915  * | TRIGGER | VALID | UNUSED | FORMAT |
2916  * +-----------------------------------|
2917  *
2918  * Note that for the trigger bit to take effect it needs to change value
2919  * (i.e. it needs to be toggled).
2920  */
2921 #define NVIDIA_GET_SCRATCH0             0xfa6
2922 #define NVIDIA_SET_SCRATCH0_BYTE0       0xfa7
2923 #define NVIDIA_SET_SCRATCH0_BYTE1       0xfa8
2924 #define NVIDIA_SET_SCRATCH0_BYTE2       0xfa9
2925 #define NVIDIA_SET_SCRATCH0_BYTE3       0xfaa
2926 #define NVIDIA_SCRATCH_TRIGGER (1 << 7)
2927 #define NVIDIA_SCRATCH_VALID   (1 << 6)
2928
2929 #define NVIDIA_GET_SCRATCH1             0xfab
2930 #define NVIDIA_SET_SCRATCH1_BYTE0       0xfac
2931 #define NVIDIA_SET_SCRATCH1_BYTE1       0xfad
2932 #define NVIDIA_SET_SCRATCH1_BYTE2       0xfae
2933 #define NVIDIA_SET_SCRATCH1_BYTE3       0xfaf
2934
2935 /*
2936  * The format parameter is the HDA audio format (see AC_FMT_*). If set to 0,
2937  * the format is invalidated so that the HDMI codec can be disabled.
2938  */
2939 static void tegra_hdmi_set_format(struct hda_codec *codec, unsigned int format)
2940 {
2941         unsigned int value;
2942
2943         /* bits [31:30] contain the trigger and valid bits */
2944         value = snd_hda_codec_read(codec, NVIDIA_AFG_NID, 0,
2945                                    NVIDIA_GET_SCRATCH0, 0);
2946         value = (value >> 24) & 0xff;
2947
2948         /* bits [15:0] are used to store the HDA format */
2949         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2950                             NVIDIA_SET_SCRATCH0_BYTE0,
2951                             (format >> 0) & 0xff);
2952         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2953                             NVIDIA_SET_SCRATCH0_BYTE1,
2954                             (format >> 8) & 0xff);
2955
2956         /* bits [16:24] are unused */
2957         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2958                             NVIDIA_SET_SCRATCH0_BYTE2, 0);
2959
2960         /*
2961          * Bit 30 signals that the data is valid and hence that HDMI audio can
2962          * be enabled.
2963          */
2964         if (format == 0)
2965                 value &= ~NVIDIA_SCRATCH_VALID;
2966         else
2967                 value |= NVIDIA_SCRATCH_VALID;
2968
2969         /*
2970          * Whenever the trigger bit is toggled, an interrupt is raised in the
2971          * HDMI codec. The HDMI driver will use that as trigger to update its
2972          * configuration.
2973          */
2974         value ^= NVIDIA_SCRATCH_TRIGGER;
2975
2976         snd_hda_codec_write(codec, NVIDIA_AFG_NID, 0,
2977                             NVIDIA_SET_SCRATCH0_BYTE3, value);
2978 }
2979
2980 static int tegra_hdmi_pcm_prepare(struct hda_pcm_stream *hinfo,
2981                                   struct hda_codec *codec,
2982                                   unsigned int stream_tag,
2983                                   unsigned int format,
2984                                   struct snd_pcm_substream *substream)
2985 {
2986         int err;
2987
2988         err = generic_hdmi_playback_pcm_prepare(hinfo, codec, stream_tag,
2989                                                 format, substream);
2990         if (err < 0)
2991                 return err;
2992
2993         /* notify the HDMI codec of the format change */
2994         tegra_hdmi_set_format(codec, format);
2995
2996         return 0;
2997 }
2998
2999 static int tegra_hdmi_pcm_cleanup(struct hda_pcm_stream *hinfo,
3000                                   struct hda_codec *codec,
3001                                   struct snd_pcm_substream *substream)
3002 {
3003         /* invalidate the format in the HDMI codec */
3004         tegra_hdmi_set_format(codec, 0);
3005
3006         return generic_hdmi_playback_pcm_cleanup(hinfo, codec, substream);
3007 }
3008
3009 static struct hda_pcm *hda_find_pcm_by_type(struct hda_codec *codec, int type)
3010 {
3011         struct hdmi_spec *spec = codec->spec;
3012         unsigned int i;
3013
3014         for (i = 0; i < spec->num_pins; i++) {
3015                 struct hda_pcm *pcm = get_pcm_rec(spec, i);
3016
3017                 if (pcm->pcm_type == type)
3018                         return pcm;
3019         }
3020
3021         return NULL;
3022 }
3023
3024 static int tegra_hdmi_build_pcms(struct hda_codec *codec)
3025 {
3026         struct hda_pcm_stream *stream;
3027         struct hda_pcm *pcm;
3028         int err;
3029
3030         err = generic_hdmi_build_pcms(codec);
3031         if (err < 0)
3032                 return err;
3033
3034         pcm = hda_find_pcm_by_type(codec, HDA_PCM_TYPE_HDMI);
3035         if (!pcm)
3036                 return -ENODEV;
3037
3038         /*
3039          * Override ->prepare() and ->cleanup() operations to notify the HDMI
3040          * codec about format changes.
3041          */
3042         stream = &pcm->stream[SNDRV_PCM_STREAM_PLAYBACK];
3043         stream->ops.prepare = tegra_hdmi_pcm_prepare;
3044         stream->ops.cleanup = tegra_hdmi_pcm_cleanup;
3045
3046         return 0;
3047 }
3048
3049 static int patch_tegra_hdmi(struct hda_codec *codec)
3050 {
3051         int err;
3052
3053         err = patch_generic_hdmi(codec);
3054         if (err)
3055                 return err;
3056
3057         codec->patch_ops.build_pcms = tegra_hdmi_build_pcms;
3058
3059         return 0;
3060 }
3061
3062 /*
3063  * ATI/AMD-specific implementations
3064  */
3065
3066 #define is_amdhdmi_rev3_or_later(codec) \
3067         ((codec)->core.vendor_id == 0x1002aa01 && \
3068          ((codec)->core.revision_id & 0xff00) >= 0x0300)
3069 #define has_amd_full_remap_support(codec) is_amdhdmi_rev3_or_later(codec)
3070
3071 /* ATI/AMD specific HDA pin verbs, see the AMD HDA Verbs specification */
3072 #define ATI_VERB_SET_CHANNEL_ALLOCATION 0x771
3073 #define ATI_VERB_SET_DOWNMIX_INFO       0x772
3074 #define ATI_VERB_SET_MULTICHANNEL_01    0x777
3075 #define ATI_VERB_SET_MULTICHANNEL_23    0x778
3076 #define ATI_VERB_SET_MULTICHANNEL_45    0x779
3077 #define ATI_VERB_SET_MULTICHANNEL_67    0x77a
3078 #define ATI_VERB_SET_HBR_CONTROL        0x77c
3079 #define ATI_VERB_SET_MULTICHANNEL_1     0x785
3080 #define ATI_VERB_SET_MULTICHANNEL_3     0x786
3081 #define ATI_VERB_SET_MULTICHANNEL_5     0x787
3082 #define ATI_VERB_SET_MULTICHANNEL_7     0x788
3083 #define ATI_VERB_SET_MULTICHANNEL_MODE  0x789
3084 #define ATI_VERB_GET_CHANNEL_ALLOCATION 0xf71
3085 #define ATI_VERB_GET_DOWNMIX_INFO       0xf72
3086 #define ATI_VERB_GET_MULTICHANNEL_01    0xf77
3087 #define ATI_VERB_GET_MULTICHANNEL_23    0xf78
3088 #define ATI_VERB_GET_MULTICHANNEL_45    0xf79
3089 #define ATI_VERB_GET_MULTICHANNEL_67    0xf7a
3090 #define ATI_VERB_GET_HBR_CONTROL        0xf7c
3091 #define ATI_VERB_GET_MULTICHANNEL_1     0xf85
3092 #define ATI_VERB_GET_MULTICHANNEL_3     0xf86
3093 #define ATI_VERB_GET_MULTICHANNEL_5     0xf87
3094 #define ATI_VERB_GET_MULTICHANNEL_7     0xf88
3095 #define ATI_VERB_GET_MULTICHANNEL_MODE  0xf89
3096
3097 /* AMD specific HDA cvt verbs */
3098 #define ATI_VERB_SET_RAMP_RATE          0x770
3099 #define ATI_VERB_GET_RAMP_RATE          0xf70
3100
3101 #define ATI_OUT_ENABLE 0x1
3102
3103 #define ATI_MULTICHANNEL_MODE_PAIRED    0
3104 #define ATI_MULTICHANNEL_MODE_SINGLE    1
3105
3106 #define ATI_HBR_CAPABLE 0x01
3107 #define ATI_HBR_ENABLE 0x10
3108
3109 static int atihdmi_pin_get_eld(struct hda_codec *codec, hda_nid_t nid,
3110                            unsigned char *buf, int *eld_size)
3111 {
3112         /* call hda_eld.c ATI/AMD-specific function */
3113         return snd_hdmi_get_eld_ati(codec, nid, buf, eld_size,
3114                                     is_amdhdmi_rev3_or_later(codec));
3115 }
3116
3117 static void atihdmi_pin_setup_infoframe(struct hda_codec *codec, hda_nid_t pin_nid, int ca,
3118                                         int active_channels, int conn_type)
3119 {
3120         snd_hda_codec_write(codec, pin_nid, 0, ATI_VERB_SET_CHANNEL_ALLOCATION, ca);
3121 }
3122
3123 static int atihdmi_paired_swap_fc_lfe(int pos)
3124 {
3125         /*
3126          * ATI/AMD have automatic FC/LFE swap built-in
3127          * when in pairwise mapping mode.
3128          */
3129
3130         switch (pos) {
3131                 /* see channel_allocations[].speakers[] */
3132                 case 2: return 3;
3133                 case 3: return 2;
3134                 default: break;
3135         }
3136
3137         return pos;
3138 }
3139
3140 static int atihdmi_paired_chmap_validate(struct hdac_chmap *chmap,
3141                         int ca, int chs, unsigned char *map)
3142 {
3143         struct hdac_cea_channel_speaker_allocation *cap;
3144         int i, j;
3145
3146         /* check that only channel pairs need to be remapped on old pre-rev3 ATI/AMD */
3147
3148         cap = snd_hdac_get_ch_alloc_from_ca(ca);
3149         for (i = 0; i < chs; ++i) {
3150                 int mask = snd_hdac_chmap_to_spk_mask(map[i]);
3151                 bool ok = false;
3152                 bool companion_ok = false;
3153
3154                 if (!mask)
3155                         continue;
3156
3157                 for (j = 0 + i % 2; j < 8; j += 2) {
3158                         int chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j);
3159                         if (cap->speakers[chan_idx] == mask) {
3160                                 /* channel is in a supported position */
3161                                 ok = true;
3162
3163                                 if (i % 2 == 0 && i + 1 < chs) {
3164                                         /* even channel, check the odd companion */
3165                                         int comp_chan_idx = 7 - atihdmi_paired_swap_fc_lfe(j + 1);
3166                                         int comp_mask_req = snd_hdac_chmap_to_spk_mask(map[i+1]);
3167                                         int comp_mask_act = cap->speakers[comp_chan_idx];
3168
3169                                         if (comp_mask_req == comp_mask_act)
3170                                                 companion_ok = true;
3171                                         else
3172                                                 return -EINVAL;
3173                                 }
3174                                 break;
3175                         }
3176                 }
3177
3178                 if (!ok)
3179                         return -EINVAL;
3180
3181                 if (companion_ok)
3182                         i++; /* companion channel already checked */
3183         }
3184
3185         return 0;
3186 }
3187
3188 static int atihdmi_pin_set_slot_channel(struct hdac_device *hdac,
3189                 hda_nid_t pin_nid, int hdmi_slot, int stream_channel)
3190 {
3191         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3192         int verb;
3193         int ati_channel_setup = 0;
3194
3195         if (hdmi_slot > 7)
3196                 return -EINVAL;
3197
3198         if (!has_amd_full_remap_support(codec)) {
3199                 hdmi_slot = atihdmi_paired_swap_fc_lfe(hdmi_slot);
3200
3201                 /* In case this is an odd slot but without stream channel, do not
3202                  * disable the slot since the corresponding even slot could have a
3203                  * channel. In case neither have a channel, the slot pair will be
3204                  * disabled when this function is called for the even slot. */
3205                 if (hdmi_slot % 2 != 0 && stream_channel == 0xf)
3206                         return 0;
3207
3208                 hdmi_slot -= hdmi_slot % 2;
3209
3210                 if (stream_channel != 0xf)
3211                         stream_channel -= stream_channel % 2;
3212         }
3213
3214         verb = ATI_VERB_SET_MULTICHANNEL_01 + hdmi_slot/2 + (hdmi_slot % 2) * 0x00e;
3215
3216         /* ati_channel_setup format: [7..4] = stream_channel_id, [1] = mute, [0] = enable */
3217
3218         if (stream_channel != 0xf)
3219                 ati_channel_setup = (stream_channel << 4) | ATI_OUT_ENABLE;
3220
3221         return snd_hda_codec_write(codec, pin_nid, 0, verb, ati_channel_setup);
3222 }
3223
3224 static int atihdmi_pin_get_slot_channel(struct hdac_device *hdac,
3225                                 hda_nid_t pin_nid, int asp_slot)
3226 {
3227         struct hda_codec *codec = container_of(hdac, struct hda_codec, core);
3228         bool was_odd = false;
3229         int ati_asp_slot = asp_slot;
3230         int verb;
3231         int ati_channel_setup;
3232
3233         if (asp_slot > 7)
3234                 return -EINVAL;
3235
3236         if (!has_amd_full_remap_support(codec)) {
3237                 ati_asp_slot = atihdmi_paired_swap_fc_lfe(asp_slot);
3238                 if (ati_asp_slot % 2 != 0) {
3239                         ati_asp_slot -= 1;
3240                         was_odd = true;
3241                 }
3242         }
3243
3244         verb = ATI_VERB_GET_MULTICHANNEL_01 + ati_asp_slot/2 + (ati_asp_slot % 2) * 0x00e;
3245
3246         ati_channel_setup = snd_hda_codec_read(codec, pin_nid, 0, verb, 0);
3247
3248         if (!(ati_channel_setup & ATI_OUT_ENABLE))
3249                 return 0xf;
3250
3251         return ((ati_channel_setup & 0xf0) >> 4) + !!was_odd;
3252 }
3253
3254 static int atihdmi_paired_chmap_cea_alloc_validate_get_type(
3255                 struct hdac_chmap *chmap,
3256                 struct hdac_cea_channel_speaker_allocation *cap,
3257                 int channels)
3258 {
3259         int c;
3260
3261         /*
3262          * Pre-rev3 ATI/AMD codecs operate in a paired channel mode, so
3263          * we need to take that into account (a single channel may take 2
3264          * channel slots if we need to carry a silent channel next to it).
3265          * On Rev3+ AMD codecs this function is not used.
3266          */
3267         int chanpairs = 0;
3268
3269         /* We only produce even-numbered channel count TLVs */
3270         if ((channels % 2) != 0)
3271                 return -1;
3272
3273         for (c = 0; c < 7; c += 2) {
3274                 if (cap->speakers[c] || cap->speakers[c+1])
3275                         chanpairs++;
3276         }
3277
3278         if (chanpairs * 2 != channels)
3279                 return -1;
3280
3281         return SNDRV_CTL_TLVT_CHMAP_PAIRED;
3282 }
3283
3284 static void atihdmi_paired_cea_alloc_to_tlv_chmap(struct hdac_chmap *hchmap,
3285                 struct hdac_cea_channel_speaker_allocation *cap,
3286                 unsigned int *chmap, int channels)
3287 {
3288         /* produce paired maps for pre-rev3 ATI/AMD codecs */
3289         int count = 0;
3290         int c;
3291
3292         for (c = 7; c >= 0; c--) {
3293                 int chan = 7 - atihdmi_paired_swap_fc_lfe(7 - c);
3294                 int spk = cap->speakers[chan];
3295                 if (!spk) {
3296                         /* add N/A channel if the companion channel is occupied */
3297                         if (cap->speakers[chan + (chan % 2 ? -1 : 1)])
3298                                 chmap[count++] = SNDRV_CHMAP_NA;
3299
3300                         continue;
3301                 }
3302
3303                 chmap[count++] = snd_hdac_spk_to_chmap(spk);
3304         }
3305
3306         WARN_ON(count != channels);
3307 }
3308
3309 static int atihdmi_pin_hbr_setup(struct hda_codec *codec, hda_nid_t pin_nid,
3310                                  bool hbr)
3311 {
3312         int hbr_ctl, hbr_ctl_new;
3313
3314         hbr_ctl = snd_hda_codec_read(codec, pin_nid, 0, ATI_VERB_GET_HBR_CONTROL, 0);
3315         if (hbr_ctl >= 0 && (hbr_ctl & ATI_HBR_CAPABLE)) {
3316                 if (hbr)
3317                         hbr_ctl_new = hbr_ctl | ATI_HBR_ENABLE;
3318                 else
3319                         hbr_ctl_new = hbr_ctl & ~ATI_HBR_ENABLE;
3320
3321                 codec_dbg(codec,
3322                           "atihdmi_pin_hbr_setup: NID=0x%x, %shbr-ctl=0x%x\n",
3323                                 pin_nid,
3324                                 hbr_ctl == hbr_ctl_new ? "" : "new-",
3325                                 hbr_ctl_new);
3326
3327                 if (hbr_ctl != hbr_ctl_new)
3328                         snd_hda_codec_write(codec, pin_nid, 0,
3329                                                 ATI_VERB_SET_HBR_CONTROL,
3330                                                 hbr_ctl_new);
3331
3332         } else if (hbr)
3333                 return -EINVAL;
3334
3335         return 0;
3336 }
3337
3338 static int atihdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
3339                                 hda_nid_t pin_nid, u32 stream_tag, int format)
3340 {
3341
3342         if (is_amdhdmi_rev3_or_later(codec)) {
3343                 int ramp_rate = 180; /* default as per AMD spec */
3344                 /* disable ramp-up/down for non-pcm as per AMD spec */
3345                 if (format & AC_FMT_TYPE_NON_PCM)
3346                         ramp_rate = 0;
3347
3348                 snd_hda_codec_write(codec, cvt_nid, 0, ATI_VERB_SET_RAMP_RATE, ramp_rate);
3349         }
3350
3351         return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
3352 }
3353
3354
3355 static int atihdmi_init(struct hda_codec *codec)
3356 {
3357         struct hdmi_spec *spec = codec->spec;
3358         int pin_idx, err;
3359
3360         err = generic_hdmi_init(codec);
3361
3362         if (err)
3363                 return err;
3364
3365         for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
3366                 struct hdmi_spec_per_pin *per_pin = get_pin(spec, pin_idx);
3367
3368                 /* make sure downmix information in infoframe is zero */
3369                 snd_hda_codec_write(codec, per_pin->pin_nid, 0, ATI_VERB_SET_DOWNMIX_INFO, 0);
3370
3371                 /* enable channel-wise remap mode if supported */
3372                 if (has_amd_full_remap_support(codec))
3373                         snd_hda_codec_write(codec, per_pin->pin_nid, 0,
3374                                             ATI_VERB_SET_MULTICHANNEL_MODE,
3375                                             ATI_MULTICHANNEL_MODE_SINGLE);
3376         }
3377
3378         return 0;
3379 }
3380
3381 static int patch_atihdmi(struct hda_codec *codec)
3382 {
3383         struct hdmi_spec *spec;
3384         struct hdmi_spec_per_cvt *per_cvt;
3385         int err, cvt_idx;
3386
3387         err = patch_generic_hdmi(codec);
3388
3389         if (err)
3390                 return err;
3391
3392         codec->patch_ops.init = atihdmi_init;
3393
3394         spec = codec->spec;
3395
3396         spec->ops.pin_get_eld = atihdmi_pin_get_eld;
3397         spec->ops.pin_setup_infoframe = atihdmi_pin_setup_infoframe;
3398         spec->ops.pin_hbr_setup = atihdmi_pin_hbr_setup;
3399         spec->ops.setup_stream = atihdmi_setup_stream;
3400
3401         if (!has_amd_full_remap_support(codec)) {
3402                 /* override to ATI/AMD-specific versions with pairwise mapping */
3403                 spec->chmap.ops.chmap_cea_alloc_validate_get_type =
3404                         atihdmi_paired_chmap_cea_alloc_validate_get_type;
3405                 spec->chmap.ops.cea_alloc_to_tlv_chmap =
3406                                 atihdmi_paired_cea_alloc_to_tlv_chmap;
3407                 spec->chmap.ops.chmap_validate = atihdmi_paired_chmap_validate;
3408                 spec->chmap.ops.pin_get_slot_channel =
3409                                 atihdmi_pin_get_slot_channel;
3410                 spec->chmap.ops.pin_set_slot_channel =
3411                                 atihdmi_pin_set_slot_channel;
3412         }
3413
3414         /* ATI/AMD converters do not advertise all of their capabilities */
3415         for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
3416                 per_cvt = get_cvt(spec, cvt_idx);
3417                 per_cvt->channels_max = max(per_cvt->channels_max, 8u);
3418                 per_cvt->rates |= SUPPORTED_RATES;
3419                 per_cvt->formats |= SUPPORTED_FORMATS;
3420                 per_cvt->maxbps = max(per_cvt->maxbps, 24u);
3421         }
3422
3423         spec->chmap.channels_max = max(spec->chmap.channels_max, 8u);
3424
3425         return 0;
3426 }
3427
3428 /* VIA HDMI Implementation */
3429 #define VIAHDMI_CVT_NID 0x02    /* audio converter1 */
3430 #define VIAHDMI_PIN_NID 0x03    /* HDMI output pin1 */
3431
3432 static int patch_via_hdmi(struct hda_codec *codec)
3433 {
3434         return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
3435 }
3436
3437 /*
3438  * patch entries
3439  */
3440 static const struct hda_device_id snd_hda_id_hdmi[] = {
3441 HDA_CODEC_ENTRY(0x1002793c, "RS600 HDMI",       patch_atihdmi),
3442 HDA_CODEC_ENTRY(0x10027919, "RS600 HDMI",       patch_atihdmi),
3443 HDA_CODEC_ENTRY(0x1002791a, "RS690/780 HDMI",   patch_atihdmi),
3444 HDA_CODEC_ENTRY(0x1002aa01, "R6xx HDMI",        patch_atihdmi),
3445 HDA_CODEC_ENTRY(0x10951390, "SiI1390 HDMI",     patch_generic_hdmi),
3446 HDA_CODEC_ENTRY(0x10951392, "SiI1392 HDMI",     patch_generic_hdmi),
3447 HDA_CODEC_ENTRY(0x17e80047, "Chrontel HDMI",    patch_generic_hdmi),
3448 HDA_CODEC_ENTRY(0x10de0002, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3449 HDA_CODEC_ENTRY(0x10de0003, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3450 HDA_CODEC_ENTRY(0x10de0005, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3451 HDA_CODEC_ENTRY(0x10de0006, "MCP77/78 HDMI",    patch_nvhdmi_8ch_7x),
3452 HDA_CODEC_ENTRY(0x10de0007, "MCP79/7A HDMI",    patch_nvhdmi_8ch_7x),
3453 HDA_CODEC_ENTRY(0x10de000a, "GPU 0a HDMI/DP",   patch_nvhdmi),
3454 HDA_CODEC_ENTRY(0x10de000b, "GPU 0b HDMI/DP",   patch_nvhdmi),
3455 HDA_CODEC_ENTRY(0x10de000c, "MCP89 HDMI",       patch_nvhdmi),
3456 HDA_CODEC_ENTRY(0x10de000d, "GPU 0d HDMI/DP",   patch_nvhdmi),
3457 HDA_CODEC_ENTRY(0x10de0010, "GPU 10 HDMI/DP",   patch_nvhdmi),
3458 HDA_CODEC_ENTRY(0x10de0011, "GPU 11 HDMI/DP",   patch_nvhdmi),
3459 HDA_CODEC_ENTRY(0x10de0012, "GPU 12 HDMI/DP",   patch_nvhdmi),
3460 HDA_CODEC_ENTRY(0x10de0013, "GPU 13 HDMI/DP",   patch_nvhdmi),
3461 HDA_CODEC_ENTRY(0x10de0014, "GPU 14 HDMI/DP",   patch_nvhdmi),
3462 HDA_CODEC_ENTRY(0x10de0015, "GPU 15 HDMI/DP",   patch_nvhdmi),
3463 HDA_CODEC_ENTRY(0x10de0016, "GPU 16 HDMI/DP",   patch_nvhdmi),
3464 /* 17 is known to be absent */
3465 HDA_CODEC_ENTRY(0x10de0018, "GPU 18 HDMI/DP",   patch_nvhdmi),
3466 HDA_CODEC_ENTRY(0x10de0019, "GPU 19 HDMI/DP",   patch_nvhdmi),
3467 HDA_CODEC_ENTRY(0x10de001a, "GPU 1a HDMI/DP",   patch_nvhdmi),
3468 HDA_CODEC_ENTRY(0x10de001b, "GPU 1b HDMI/DP",   patch_nvhdmi),
3469 HDA_CODEC_ENTRY(0x10de001c, "GPU 1c HDMI/DP",   patch_nvhdmi),
3470 HDA_CODEC_ENTRY(0x10de0020, "Tegra30 HDMI",     patch_tegra_hdmi),
3471 HDA_CODEC_ENTRY(0x10de0022, "Tegra114 HDMI",    patch_tegra_hdmi),
3472 HDA_CODEC_ENTRY(0x10de0028, "Tegra124 HDMI",    patch_tegra_hdmi),
3473 HDA_CODEC_ENTRY(0x10de0029, "Tegra210 HDMI/DP", patch_tegra_hdmi),
3474 HDA_CODEC_ENTRY(0x10de0040, "GPU 40 HDMI/DP",   patch_nvhdmi),
3475 HDA_CODEC_ENTRY(0x10de0041, "GPU 41 HDMI/DP",   patch_nvhdmi),
3476 HDA_CODEC_ENTRY(0x10de0042, "GPU 42 HDMI/DP",   patch_nvhdmi),
3477 HDA_CODEC_ENTRY(0x10de0043, "GPU 43 HDMI/DP",   patch_nvhdmi),
3478 HDA_CODEC_ENTRY(0x10de0044, "GPU 44 HDMI/DP",   patch_nvhdmi),
3479 HDA_CODEC_ENTRY(0x10de0051, "GPU 51 HDMI/DP",   patch_nvhdmi),
3480 HDA_CODEC_ENTRY(0x10de0060, "GPU 60 HDMI/DP",   patch_nvhdmi),
3481 HDA_CODEC_ENTRY(0x10de0067, "MCP67 HDMI",       patch_nvhdmi_2ch),
3482 HDA_CODEC_ENTRY(0x10de0070, "GPU 70 HDMI/DP",   patch_nvhdmi),
3483 HDA_CODEC_ENTRY(0x10de0071, "GPU 71 HDMI/DP",   patch_nvhdmi),
3484 HDA_CODEC_ENTRY(0x10de0072, "GPU 72 HDMI/DP",   patch_nvhdmi),
3485 HDA_CODEC_ENTRY(0x10de007d, "GPU 7d HDMI/DP",   patch_nvhdmi),
3486 HDA_CODEC_ENTRY(0x10de0082, "GPU 82 HDMI/DP",   patch_nvhdmi),
3487 HDA_CODEC_ENTRY(0x10de0083, "GPU 83 HDMI/DP",   patch_nvhdmi),
3488 HDA_CODEC_ENTRY(0x10de8001, "MCP73 HDMI",       patch_nvhdmi_2ch),
3489 HDA_CODEC_ENTRY(0x11069f80, "VX900 HDMI/DP",    patch_via_hdmi),
3490 HDA_CODEC_ENTRY(0x11069f81, "VX900 HDMI/DP",    patch_via_hdmi),
3491 HDA_CODEC_ENTRY(0x11069f84, "VX11 HDMI/DP",     patch_generic_hdmi),
3492 HDA_CODEC_ENTRY(0x11069f85, "VX11 HDMI/DP",     patch_generic_hdmi),
3493 HDA_CODEC_ENTRY(0x80860054, "IbexPeak HDMI",    patch_generic_hdmi),
3494 HDA_CODEC_ENTRY(0x80862801, "Bearlake HDMI",    patch_generic_hdmi),
3495 HDA_CODEC_ENTRY(0x80862802, "Cantiga HDMI",     patch_generic_hdmi),
3496 HDA_CODEC_ENTRY(0x80862803, "Eaglelake HDMI",   patch_generic_hdmi),
3497 HDA_CODEC_ENTRY(0x80862804, "IbexPeak HDMI",    patch_generic_hdmi),
3498 HDA_CODEC_ENTRY(0x80862805, "CougarPoint HDMI", patch_generic_hdmi),
3499 HDA_CODEC_ENTRY(0x80862806, "PantherPoint HDMI", patch_generic_hdmi),
3500 HDA_CODEC_ENTRY(0x80862807, "Haswell HDMI",     patch_generic_hdmi),
3501 HDA_CODEC_ENTRY(0x80862808, "Broadwell HDMI",   patch_generic_hdmi),
3502 HDA_CODEC_ENTRY(0x80862809, "Skylake HDMI",     patch_generic_hdmi),
3503 HDA_CODEC_ENTRY(0x8086280a, "Broxton HDMI",     patch_generic_hdmi),
3504 HDA_CODEC_ENTRY(0x8086280b, "Kabylake HDMI",    patch_generic_hdmi),
3505 HDA_CODEC_ENTRY(0x80862880, "CedarTrail HDMI",  patch_generic_hdmi),
3506 HDA_CODEC_ENTRY(0x80862882, "Valleyview2 HDMI", patch_generic_hdmi),
3507 HDA_CODEC_ENTRY(0x80862883, "Braswell HDMI",    patch_generic_hdmi),
3508 HDA_CODEC_ENTRY(0x808629fb, "Crestline HDMI",   patch_generic_hdmi),
3509 /* special ID for generic HDMI */
3510 HDA_CODEC_ENTRY(HDA_CODEC_ID_GENERIC_HDMI, "Generic HDMI", patch_generic_hdmi),
3511 {} /* terminator */
3512 };
3513 MODULE_DEVICE_TABLE(hdaudio, snd_hda_id_hdmi);
3514
3515 MODULE_LICENSE("GPL");
3516 MODULE_DESCRIPTION("HDMI HD-audio codec");
3517 MODULE_ALIAS("snd-hda-codec-intelhdmi");
3518 MODULE_ALIAS("snd-hda-codec-nvhdmi");
3519 MODULE_ALIAS("snd-hda-codec-atihdmi");
3520
3521 static struct hda_codec_driver hdmi_driver = {
3522         .id = snd_hda_id_hdmi,
3523 };
3524
3525 module_hda_codec_driver(hdmi_driver);