drivers/watchdog/intel_scu_watchdog.c

   1 /*
   2  *      Intel_SCU 0.2:  An Intel SCU IOH Based Watchdog Device
   3  *                      for Intel part #(s):
   4  *                              - AF82MP20 PCH
   5  *
   6  *      Copyright (C) 2009-2010 Intel Corporation. All rights reserved.
   7  *
   8  *      This program is free software; you can redistribute it and/or
   9  *      modify it under the terms of version 2 of the GNU General
  10  *      Public License as published by the Free Software Foundation.
  11  *
  12  *      This program is distributed in the hope that it will be
  13  *      useful, but WITHOUT ANY WARRANTY; without even the implied
  14  *      warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR
  15  *      PURPOSE.  See the GNU General Public License for more details.
  16  *      You should have received a copy of the GNU General Public
  17  *      License along with this program; if not, write to the Free
  18  *      Software Foundation, Inc., 59 Temple Place - Suite 330,
  19  *      Boston, MA  02111-1307, USA.
  20  *      The full GNU General Public License is included in this
  21  *      distribution in the file called COPYING.
  22  *
  23  */
  24
  25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  26
  27 #include <linux/compiler.h>
  28 #include <linux/kernel.h>
  29 #include <linux/moduleparam.h>
  30 #include <linux/types.h>
  31 #include <linux/miscdevice.h>
  32 #include <linux/watchdog.h>
  33 #include <linux/fs.h>
  34 #include <linux/notifier.h>
  35 #include <linux/reboot.h>
  36 #include <linux/init.h>
  37 #include <linux/jiffies.h>
  38 #include <linux/uaccess.h>
  39 #include <linux/slab.h>
  40 #include <linux/io.h>
  41 #include <linux/interrupt.h>
  42 #include <linux/delay.h>
  43 #include <linux/sched.h>
  44 #include <linux/signal.h>
  45 #include <linux/sfi.h>
  46 #include <asm/irq.h>
  47 #include <linux/atomic.h>
  48 #include <asm/intel_scu_ipc.h>
  49 #include <asm/apb_timer.h>
  50 #include <asm/intel-mid.h>
  51
  52 #include "intel_scu_watchdog.h"
  53
  54 /* Bounds number of times we will retry loading time count */
  55 /* This retry is a work around for a silicon bug.          */
  56 #define MAX_RETRY 16
  57
  58 #define IPC_SET_WATCHDOG_TIMER  0xF8
  59
  60 static int timer_margin = DEFAULT_SOFT_TO_HARD_MARGIN;
  61 module_param(timer_margin, int, 0);
  62 MODULE_PARM_DESC(timer_margin,
  63                 "Watchdog timer margin"
  64                 "Time between interrupt and resetting the system"
  65                 "The range is from 1 to 160"
  66                 "This is the time for all keep alives to arrive");
  67
  68 static int timer_set = DEFAULT_TIME;
  69 module_param(timer_set, int, 0);
  70 MODULE_PARM_DESC(timer_set,
  71                 "Default Watchdog timer setting"
  72                 "Complete cycle time"
  73                 "The range is from 1 to 170"
  74                 "This is the time for all keep alives to arrive");
  75
  76 /* After watchdog device is closed, check force_boot. If:
  77  * force_boot == 0, then force boot on next watchdog interrupt after close,
  78  * force_boot == 1, then force boot immediately when device is closed.
  79  */
  80 static int force_boot;
  81 module_param(force_boot, int, 0);
  82 MODULE_PARM_DESC(force_boot,
  83                 "A value of 1 means that the driver will reboot"
  84                 "the system immediately if the /dev/watchdog device is closed"
  85                 "A value of 0 means that when /dev/watchdog device is closed"
  86                 "the watchdog timer will be refreshed for one more interval"
  87                 "of length: timer_set. At the end of this interval, the"
  88                 "watchdog timer will reset the system."
  89                 );
  90
  91 /* there is only one device in the system now; this can be made into
  92  * an array in the future if we have more than one device */
  93
  94 static struct intel_scu_watchdog_dev watchdog_device;
  95
  96 /* Forces restart, if force_reboot is set */
  97 static void watchdog_fire(void)
  98 {
  99         if (force_boot) {
 100                 pr_crit("Initiating system reboot\n");
 101                 emergency_restart();
 102                 pr_crit("Reboot didn't ?????\n");
 103         }
 104
 105         else {
 106                 pr_crit("Immediate Reboot Disabled\n");
 107                 pr_crit("System will reset when watchdog timer times out!\n");
 108         }
 109 }
 110
 111 static int check_timer_margin(int new_margin)
 112 {
 113         if ((new_margin < MIN_TIME_CYCLE) ||
 114             (new_margin > MAX_TIME - timer_set)) {
 115                 pr_debug("value of new_margin %d is out of the range %d to %d\n",
 116                          new_margin, MIN_TIME_CYCLE, MAX_TIME - timer_set);
 117                 return -EINVAL;
 118         }
 119         return 0;
 120 }
 121
 122 /*
 123  * IPC operations
 124  */
 125 static int watchdog_set_ipc(int soft_threshold, int threshold)
 126 {
 127         u32     *ipc_wbuf;
 128         u8       cbuf[16] = { '\0' };
 129         int      ipc_ret = 0;
 130
 131         ipc_wbuf = (u32 *)&cbuf;
 132         ipc_wbuf[0] = soft_threshold;
 133         ipc_wbuf[1] = threshold;
 134
 135         ipc_ret = intel_scu_ipc_command(
 136                         IPC_SET_WATCHDOG_TIMER,
 137                         0,
 138                         ipc_wbuf,
 139                         2,
 140                         NULL,
 141                         0);
 142
 143         if (ipc_ret != 0)
 144                 pr_err("Error setting SCU watchdog timer: %x\n", ipc_ret);
 145
 146         return ipc_ret;
 147 };
 148
 149 /*
 150  *      Intel_SCU operations
 151  */
 152
 153 /* timer interrupt handler */
 154 static irqreturn_t watchdog_timer_interrupt(int irq, void *dev_id)
 155 {
 156         int int_status;
 157         int_status = ioread32(watchdog_device.timer_interrupt_status_addr);
 158
 159         pr_debug("irq, int_status: %x\n", int_status);
 160
 161         if (int_status != 0)
 162                 return IRQ_NONE;
 163
 164         /* has the timer been started? If not, then this is spurious */
 165         if (watchdog_device.timer_started == 0) {
 166                 pr_debug("spurious interrupt received\n");
 167                 return IRQ_HANDLED;
 168         }
 169
 170         /* temporarily disable the timer */
 171         iowrite32(0x00000002, watchdog_device.timer_control_addr);
 172
 173         /* set the timer to the threshold */
 174         iowrite32(watchdog_device.threshold,
 175                   watchdog_device.timer_load_count_addr);
 176
 177         /* allow the timer to run */
 178         iowrite32(0x00000003, watchdog_device.timer_control_addr);
 179
 180         return IRQ_HANDLED;
 181 }
 182
 183 static int intel_scu_keepalive(void)
 184 {
 185
 186         /* read eoi register - clears interrupt */
 187         ioread32(watchdog_device.timer_clear_interrupt_addr);
 188
 189         /* temporarily disable the timer */
 190         iowrite32(0x00000002, watchdog_device.timer_control_addr);
 191
 192         /* set the timer to the soft_threshold */
 193         iowrite32(watchdog_device.soft_threshold,
 194                   watchdog_device.timer_load_count_addr);
 195
 196         /* allow the timer to run */
 197         iowrite32(0x00000003, watchdog_device.timer_control_addr);
 198
 199         return 0;
 200 }
 201
 202 static int intel_scu_stop(void)
 203 {
 204         iowrite32(0, watchdog_device.timer_control_addr);
 205         return 0;
 206 }
 207
 208 static int intel_scu_set_heartbeat(u32 t)
 209 {
 210         int                      ipc_ret;
 211         int                      retry_count;
 212         u32                      soft_value;
 213         u32                      hw_value;
 214
 215         watchdog_device.timer_set = t;
 216         watchdog_device.threshold =
 217                 timer_margin * watchdog_device.timer_tbl_ptr->freq_hz;
 218         watchdog_device.soft_threshold =
 219                 (watchdog_device.timer_set - timer_margin)
 220                 * watchdog_device.timer_tbl_ptr->freq_hz;
 221
 222         pr_debug("set_heartbeat: timer freq is %d\n",
 223                  watchdog_device.timer_tbl_ptr->freq_hz);
 224         pr_debug("set_heartbeat: timer_set is %x (hex)\n",
 225                  watchdog_device.timer_set);
 226         pr_debug("set_heartbeat: timer_margin is %x (hex)\n", timer_margin);
 227         pr_debug("set_heartbeat: threshold is %x (hex)\n",
 228                  watchdog_device.threshold);
 229         pr_debug("set_heartbeat: soft_threshold is %x (hex)\n",
 230                  watchdog_device.soft_threshold);
 231
 232         /* Adjust thresholds by FREQ_ADJUSTMENT factor, to make the */
 233         /* watchdog timing come out right. */
 234         watchdog_device.threshold =
 235                 watchdog_device.threshold / FREQ_ADJUSTMENT;
 236         watchdog_device.soft_threshold =
 237                 watchdog_device.soft_threshold / FREQ_ADJUSTMENT;
 238
 239         /* temporarily disable the timer */
 240         iowrite32(0x00000002, watchdog_device.timer_control_addr);
 241
 242         /* send the threshold and soft_threshold via IPC to the processor */
 243         ipc_ret = watchdog_set_ipc(watchdog_device.soft_threshold,
 244                                    watchdog_device.threshold);
 245
 246         if (ipc_ret != 0) {
 247                 /* Make sure the watchdog timer is stopped */
 248                 intel_scu_stop();
 249                 return ipc_ret;
 250         }
 251
 252         /* Soft Threshold set loop. Early versions of silicon did */
 253         /* not always set this count correctly.  This loop checks */
 254         /* the value and retries if it was not set correctly.     */
 255
 256         retry_count = 0;
 257         soft_value = watchdog_device.soft_threshold & 0xFFFF0000;
 258         do {
 259
 260                 /* Make sure timer is stopped */
 261                 intel_scu_stop();
 262
 263                 if (MAX_RETRY < retry_count++) {
 264                         /* Unable to set timer value */
 265                         pr_err("Unable to set timer\n");
 266                         return -ENODEV;
 267                 }
 268
 269                 /* set the timer to the soft threshold */
 270                 iowrite32(watchdog_device.soft_threshold,
 271                         watchdog_device.timer_load_count_addr);
 272
 273                 /* read count value before starting timer */
 274                 ioread32(watchdog_device.timer_load_count_addr);
 275
 276                 /* Start the timer */
 277                 iowrite32(0x00000003, watchdog_device.timer_control_addr);
 278
 279                 /* read the value the time loaded into its count reg */
 280                 hw_value = ioread32(watchdog_device.timer_load_count_addr);
 281                 hw_value = hw_value & 0xFFFF0000;
 282
 283
 284         } while (soft_value != hw_value);
 285
 286         watchdog_device.timer_started = 1;
 287
 288         return 0;
 289 }
 290
 291 /*
 292  * /dev/watchdog handling
 293  */
 294
 295 static int intel_scu_open(struct inode *inode, struct file *file)
 296 {
 297
 298         /* Set flag to indicate that watchdog device is open */
 299         if (test_and_set_bit(0, &watchdog_device.driver_open))
 300                 return -EBUSY;
 301
 302         /* Check for reopen of driver. Reopens are not allowed */
 303         if (watchdog_device.driver_closed)
 304                 return -EPERM;
 305
 306         return stream_open(inode, file);
 307 }
 308
 309 static int intel_scu_release(struct inode *inode, struct file *file)
 310 {
 311         /*
 312          * This watchdog should not be closed, after the timer
 313          * is started with the WDIPC_SETTIMEOUT ioctl
 314          * If force_boot is set watchdog_fire() will cause an
 315          * immediate reset. If force_boot is not set, the watchdog
 316          * timer is refreshed for one more interval. At the end
 317          * of that interval, the watchdog timer will reset the system.
 318          */
 319
 320         if (!test_and_clear_bit(0, &watchdog_device.driver_open)) {
 321                 pr_debug("intel_scu_release, without open\n");
 322                 return -ENOTTY;
 323         }
 324
 325         if (!watchdog_device.timer_started) {
 326                 /* Just close, since timer has not been started */
 327                 pr_debug("closed, without starting timer\n");
 328                 return 0;
 329         }
 330
 331         pr_crit("Unexpected close of /dev/watchdog!\n");
 332
 333         /* Since the timer was started, prevent future reopens */
 334         watchdog_device.driver_closed = 1;
 335
 336         /* Refresh the timer for one more interval */
 337         intel_scu_keepalive();
 338
 339         /* Reboot system (if force_boot is set) */
 340         watchdog_fire();
 341
 342         /* We should only reach this point if force_boot is not set */
 343         return 0;
 344 }
 345
 346 static ssize_t intel_scu_write(struct file *file,
 347                               char const *data,
 348                               size_t len,
 349                               loff_t *ppos)
 350 {
 351
 352         if (watchdog_device.timer_started)
 353                 /* Watchdog already started, keep it alive */
 354                 intel_scu_keepalive();
 355         else
 356                 /* Start watchdog with timer value set by init */
 357                 intel_scu_set_heartbeat(watchdog_device.timer_set);
 358
 359         return len;
 360 }
 361
 362 static long intel_scu_ioctl(struct file *file,
 363                            unsigned int cmd,
 364                            unsigned long arg)
 365 {
 366         void __user *argp = (void __user *)arg;
 367         u32 __user *p = argp;
 368         u32 new_margin;
 369
 370
 371         static const struct watchdog_info ident = {
 372                 .options =          WDIOF_SETTIMEOUT
 373                                     | WDIOF_KEEPALIVEPING,
 374                 .firmware_version = 0,  /* @todo Get from SCU via
 375                                                  ipc_get_scu_fw_version()? */
 376                 .identity =         "Intel_SCU IOH Watchdog"  /* len < 32 */
 377         };
 378
 379         switch (cmd) {
 380         case WDIOC_GETSUPPORT:
 381                 return copy_to_user(argp,
 382                                     &ident,
 383                                     sizeof(ident)) ? -EFAULT : 0;
 384         case WDIOC_GETSTATUS:
 385         case WDIOC_GETBOOTSTATUS:
 386                 return put_user(0, p);
 387         case WDIOC_KEEPALIVE:
 388                 intel_scu_keepalive();
 389
 390                 return 0;
 391         case WDIOC_SETTIMEOUT:
 392                 if (get_user(new_margin, p))
 393                         return -EFAULT;
 394
 395                 if (check_timer_margin(new_margin))
 396                         return -EINVAL;
 397
 398                 if (intel_scu_set_heartbeat(new_margin))
 399                         return -EINVAL;
 400                 return 0;
 401         case WDIOC_GETTIMEOUT:
 402                 return put_user(watchdog_device.soft_threshold, p);
 403
 404         default:
 405                 return -ENOTTY;
 406         }
 407 }
 408
 409 /*
 410  *      Notifier for system down
 411  */
 412 static int intel_scu_notify_sys(struct notifier_block *this,
 413                                unsigned long code,
 414                                void *another_unused)
 415 {
 416         if (code == SYS_DOWN || code == SYS_HALT)
 417                 /* Turn off the watchdog timer. */
 418                 intel_scu_stop();
 419         return NOTIFY_DONE;
 420 }
 421
 422 /*
 423  *      Kernel Interfaces
 424  */
 425 static const struct file_operations intel_scu_fops = {
 426         .owner          = THIS_MODULE,
 427         .llseek         = no_llseek,
 428         .write          = intel_scu_write,
 429         .unlocked_ioctl = intel_scu_ioctl,
 430         .open           = intel_scu_open,
 431         .release        = intel_scu_release,
 432 };
 433
 434 static int __init intel_scu_watchdog_init(void)
 435 {
 436         int ret;
 437         u32 __iomem *tmp_addr;
 438
 439         /*
 440          * We don't really need to check this as the SFI timer get will fail
 441          * but if we do so we can exit with a clearer reason and no noise.
 442          *
 443          * If it isn't an intel MID device then it doesn't have this watchdog
 444          */
 445         if (!intel_mid_identify_cpu())
 446                 return -ENODEV;
 447
 448         /* Check boot parameters to verify that their initial values */
 449         /* are in range. */
 450         /* Check value of timer_set boot parameter */
 451         if ((timer_set < MIN_TIME_CYCLE) ||
 452             (timer_set > MAX_TIME - MIN_TIME_CYCLE)) {
 453                 pr_err("value of timer_set %x (hex) is out of range from %x to %x (hex)\n",
 454                        timer_set, MIN_TIME_CYCLE, MAX_TIME - MIN_TIME_CYCLE);
 455                 return -EINVAL;
 456         }
 457
 458         /* Check value of timer_margin boot parameter */
 459         if (check_timer_margin(timer_margin))
 460                 return -EINVAL;
 461
 462         watchdog_device.timer_tbl_ptr = sfi_get_mtmr(sfi_mtimer_num-1);
 463
 464         if (watchdog_device.timer_tbl_ptr == NULL) {
 465                 pr_debug("timer is not available\n");
 466                 return -ENODEV;
 467         }
 468         /* make sure the timer exists */
 469         if (watchdog_device.timer_tbl_ptr->phys_addr == 0) {
 470                 pr_debug("timer %d does not have valid physical memory\n",
 471                          sfi_mtimer_num);
 472                 return -ENODEV;
 473         }
 474
 475         if (watchdog_device.timer_tbl_ptr->irq == 0) {
 476                 pr_debug("timer %d invalid irq\n", sfi_mtimer_num);
 477                 return -ENODEV;
 478         }
 479
 480         tmp_addr = ioremap_nocache(watchdog_device.timer_tbl_ptr->phys_addr,
 481                         20);
 482
 483         if (tmp_addr == NULL) {
 484                 pr_debug("timer unable to ioremap\n");
 485                 return -ENOMEM;
 486         }
 487
 488         watchdog_device.timer_load_count_addr = tmp_addr++;
 489         watchdog_device.timer_current_value_addr = tmp_addr++;
 490         watchdog_device.timer_control_addr = tmp_addr++;
 491         watchdog_device.timer_clear_interrupt_addr = tmp_addr++;
 492         watchdog_device.timer_interrupt_status_addr = tmp_addr++;
 493
 494         /* Set the default time values in device structure */
 495
 496         watchdog_device.timer_set = timer_set;
 497         watchdog_device.threshold =
 498                 timer_margin * watchdog_device.timer_tbl_ptr->freq_hz;
 499         watchdog_device.soft_threshold =
 500                 (watchdog_device.timer_set - timer_margin)
 501                 * watchdog_device.timer_tbl_ptr->freq_hz;
 502
 503
 504         watchdog_device.intel_scu_notifier.notifier_call =
 505                 intel_scu_notify_sys;
 506
 507         ret = register_reboot_notifier(&watchdog_device.intel_scu_notifier);
 508         if (ret) {
 509                 pr_err("cannot register notifier %d)\n", ret);
 510                 goto register_reboot_error;
 511         }
 512
 513         watchdog_device.miscdev.minor = WATCHDOG_MINOR;
 514         watchdog_device.miscdev.name = "watchdog";
 515         watchdog_device.miscdev.fops = &intel_scu_fops;
 516
 517         ret = misc_register(&watchdog_device.miscdev);
 518         if (ret) {
 519                 pr_err("cannot register miscdev %d err =%d\n",
 520                        WATCHDOG_MINOR, ret);
 521                 goto misc_register_error;
 522         }
 523
 524         ret = request_irq((unsigned int)watchdog_device.timer_tbl_ptr->irq,
 525                 watchdog_timer_interrupt,
 526                 IRQF_SHARED, "watchdog",
 527                 &watchdog_device.timer_load_count_addr);
 528         if (ret) {
 529                 pr_err("error requesting irq %d\n", ret);
 530                 goto request_irq_error;
 531         }
 532         /* Make sure timer is disabled before returning */
 533         intel_scu_stop();
 534         return 0;
 535
 536 /* error cleanup */
 537
 538 request_irq_error:
 539         misc_deregister(&watchdog_device.miscdev);
 540 misc_register_error:
 541         unregister_reboot_notifier(&watchdog_device.intel_scu_notifier);
 542 register_reboot_error:
 543         intel_scu_stop();
 544         iounmap(watchdog_device.timer_load_count_addr);
 545         return ret;
 546 }
 547 late_initcall(intel_scu_watchdog_init);