2 * Driver for 8250/16550-type serial ports
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
6 * Copyright (C) 2001 Russell King.
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * A note about mapbase / membase
15 * mapbase is the physical address of the IO port.
16 * membase is an 'ioremapped' cookie.
19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
23 #include <linux/module.h>
24 #include <linux/moduleparam.h>
25 #include <linux/ioport.h>
26 #include <linux/init.h>
27 #include <linux/console.h>
28 #include <linux/sysrq.h>
29 #include <linux/delay.h>
30 #include <linux/platform_device.h>
31 #include <linux/tty.h>
32 #include <linux/ratelimit.h>
33 #include <linux/tty_flip.h>
34 #include <linux/serial_core.h>
35 #include <linux/serial.h>
36 #include <linux/serial_8250.h>
37 #include <linux/nmi.h>
38 #include <linux/mutex.h>
39 #include <linux/slab.h>
40 #include <linux/uaccess.h>
41 #include <linux/pm_runtime.h>
43 #include <linux/sunserialcore.h>
53 * share_irqs - whether we pass IRQF_SHARED to request_irq(). This option
54 * is unsafe when used on edge-triggered interrupts.
56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
60 static struct uart_driver serial8250_reg;
62 static int serial_index(struct uart_port *port)
64 return port->minor - 64;
67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
73 #define DEBUG_AUTOCONF(fmt...) printk(fmt)
75 #define DEBUG_AUTOCONF(fmt...) do { } while (0)
79 #define DEBUG_INTR(fmt...) printk(fmt)
81 #define DEBUG_INTR(fmt...) do { } while (0)
84 #define PASS_LIMIT 512
86 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
90 #define CONFIG_SERIAL_DETECT_IRQ 1
92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
93 #define CONFIG_SERIAL_MANY_PORTS 1
97 * HUB6 is always on. This will be removed once the header
98 * files have been cleaned.
100 #define CONFIG_HUB6 1
102 #include <asm/serial.h>
104 * SERIAL_PORT_DFNS tells us about built-in ports that have no
105 * standard enumeration mechanism. Platforms that can find all
106 * serial ports via mechanisms like ACPI or PCI need not supply it.
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
112 static const struct old_serial_port old_serial_port[] = {
113 SERIAL_PORT_DFNS /* defined in asm/serial.h */
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
118 #ifdef CONFIG_SERIAL_8250_RSA
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA */
126 struct hlist_node node;
128 spinlock_t lock; /* Protects list not the hash */
129 struct list_head *head;
132 #define NR_IRQ_HASH 32 /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */
137 * Here we define the default xmit fifo size used for each type of UART.
139 static const struct serial8250_config uart_config[] = {
164 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165 .rxtrig_bytes = {1, 4, 8, 14},
166 .flags = UART_CAP_FIFO,
177 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
183 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
185 .rxtrig_bytes = {8, 16, 24, 28},
186 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
192 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
194 .rxtrig_bytes = {1, 16, 32, 56},
195 .flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
203 .name = "16C950/954",
206 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208 .flags = UART_CAP_FIFO | UART_CAP_SLEEP,
214 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
216 .rxtrig_bytes = {8, 16, 56, 60},
217 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
223 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224 .flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
230 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231 .flags = UART_CAP_FIFO,
237 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238 .flags = UART_CAP_FIFO | UART_NATSEMI,
244 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245 .flags = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
251 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252 .flags = UART_CAP_FIFO,
258 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259 .flags = UART_CAP_FIFO | UART_CAP_AFE,
265 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266 .flags = UART_CAP_FIFO | UART_CAP_AFE,
272 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
274 .rxtrig_bytes = {1, 4, 8, 14},
275 .flags = UART_CAP_FIFO | UART_CAP_RTOIE,
281 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
289 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
291 .flags = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
298 .fcr = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299 UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300 .flags = UART_CAP_FIFO,
302 [PORT_BRCM_TRUMANAGE] = {
306 .flags = UART_CAP_HFIFO,
311 [PORT_ALTR_16550_F32] = {
312 .name = "Altera 16550 FIFO32",
315 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316 .flags = UART_CAP_FIFO | UART_CAP_AFE,
318 [PORT_ALTR_16550_F64] = {
319 .name = "Altera 16550 FIFO64",
322 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323 .flags = UART_CAP_FIFO | UART_CAP_AFE,
325 [PORT_ALTR_16550_F128] = {
326 .name = "Altera 16550 FIFO128",
329 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330 .flags = UART_CAP_FIFO | UART_CAP_AFE,
332 /* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
333 workaround of errata A-008006 which states that tx_loadsz should be
334 configured less than Maximum supported fifo bytes */
335 [PORT_16550A_FSL64] = {
336 .name = "16550A_FSL64",
339 .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
341 .flags = UART_CAP_FIFO,
345 /* Uart divisor latch read */
346 static int default_serial_dl_read(struct uart_8250_port *up)
348 return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
351 /* Uart divisor latch write */
352 static void default_serial_dl_write(struct uart_8250_port *up, int value)
354 serial_out(up, UART_DLL, value & 0xff);
355 serial_out(up, UART_DLM, value >> 8 & 0xff);
358 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
360 /* Au1x00/RT288x UART hardware has a weird register layout */
361 static const u8 au_io_in_map[] = {
371 static const u8 au_io_out_map[] = {
379 static unsigned int au_serial_in(struct uart_port *p, int offset)
381 offset = au_io_in_map[offset] << p->regshift;
382 return __raw_readl(p->membase + offset);
385 static void au_serial_out(struct uart_port *p, int offset, int value)
387 offset = au_io_out_map[offset] << p->regshift;
388 __raw_writel(value, p->membase + offset);
391 /* Au1x00 haven't got a standard divisor latch */
392 static int au_serial_dl_read(struct uart_8250_port *up)
394 return __raw_readl(up->port.membase + 0x28);
397 static void au_serial_dl_write(struct uart_8250_port *up, int value)
399 __raw_writel(value, up->port.membase + 0x28);
404 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
406 offset = offset << p->regshift;
407 outb(p->hub6 - 1 + offset, p->iobase);
408 return inb(p->iobase + 1);
411 static void hub6_serial_out(struct uart_port *p, int offset, int value)
413 offset = offset << p->regshift;
414 outb(p->hub6 - 1 + offset, p->iobase);
415 outb(value, p->iobase + 1);
418 static unsigned int mem_serial_in(struct uart_port *p, int offset)
420 offset = offset << p->regshift;
421 return readb(p->membase + offset);
424 static void mem_serial_out(struct uart_port *p, int offset, int value)
426 offset = offset << p->regshift;
427 writeb(value, p->membase + offset);
430 static void mem32_serial_out(struct uart_port *p, int offset, int value)
432 offset = offset << p->regshift;
433 writel(value, p->membase + offset);
436 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
438 offset = offset << p->regshift;
439 return readl(p->membase + offset);
442 static unsigned int io_serial_in(struct uart_port *p, int offset)
444 offset = offset << p->regshift;
445 return inb(p->iobase + offset);
448 static void io_serial_out(struct uart_port *p, int offset, int value)
450 offset = offset << p->regshift;
451 outb(value, p->iobase + offset);
454 static int serial8250_default_handle_irq(struct uart_port *port);
455 static int exar_handle_irq(struct uart_port *port);
457 static void set_io_from_upio(struct uart_port *p)
459 struct uart_8250_port *up = up_to_u8250p(p);
461 up->dl_read = default_serial_dl_read;
462 up->dl_write = default_serial_dl_write;
466 p->serial_in = hub6_serial_in;
467 p->serial_out = hub6_serial_out;
471 p->serial_in = mem_serial_in;
472 p->serial_out = mem_serial_out;
476 p->serial_in = mem32_serial_in;
477 p->serial_out = mem32_serial_out;
480 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
482 p->serial_in = au_serial_in;
483 p->serial_out = au_serial_out;
484 up->dl_read = au_serial_dl_read;
485 up->dl_write = au_serial_dl_write;
490 p->serial_in = io_serial_in;
491 p->serial_out = io_serial_out;
494 /* Remember loaded iotype */
495 up->cur_iotype = p->iotype;
496 p->handle_irq = serial8250_default_handle_irq;
500 serial_port_out_sync(struct uart_port *p, int offset, int value)
506 p->serial_out(p, offset, value);
507 p->serial_in(p, UART_LCR); /* safe, no side-effects */
510 p->serial_out(p, offset, value);
517 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
519 serial_out(up, UART_SCR, offset);
520 serial_out(up, UART_ICR, value);
523 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
527 serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
528 serial_out(up, UART_SCR, offset);
529 value = serial_in(up, UART_ICR);
530 serial_icr_write(up, UART_ACR, up->acr);
538 static void serial8250_clear_fifos(struct uart_8250_port *p)
540 if (p->capabilities & UART_CAP_FIFO) {
541 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
542 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
543 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
544 serial_out(p, UART_FCR, 0);
548 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
550 serial8250_clear_fifos(p);
551 serial_out(p, UART_FCR, p->fcr);
553 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
555 void serial8250_rpm_get(struct uart_8250_port *p)
557 if (!(p->capabilities & UART_CAP_RPM))
559 pm_runtime_get_sync(p->port.dev);
561 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
563 void serial8250_rpm_put(struct uart_8250_port *p)
565 if (!(p->capabilities & UART_CAP_RPM))
567 pm_runtime_mark_last_busy(p->port.dev);
568 pm_runtime_put_autosuspend(p->port.dev);
570 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
573 * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
574 * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
575 * empty and the HW can idle again.
577 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
579 unsigned char rpm_active;
581 if (!(p->capabilities & UART_CAP_RPM))
584 rpm_active = xchg(&p->rpm_tx_active, 1);
587 pm_runtime_get_sync(p->port.dev);
590 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
592 unsigned char rpm_active;
594 if (!(p->capabilities & UART_CAP_RPM))
597 rpm_active = xchg(&p->rpm_tx_active, 0);
600 pm_runtime_mark_last_busy(p->port.dev);
601 pm_runtime_put_autosuspend(p->port.dev);
605 * IER sleep support. UARTs which have EFRs need the "extended
606 * capability" bit enabled. Note that on XR16C850s, we need to
607 * reset LCR to write to IER.
609 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
611 unsigned char lcr = 0, efr = 0;
613 * Exar UARTs have a SLEEP register that enables or disables
614 * each UART to enter sleep mode separately. On the XR17V35x the
615 * register is accessible to each UART at the UART_EXAR_SLEEP
616 * offset but the UART channel may only write to the corresponding
619 serial8250_rpm_get(p);
620 if ((p->port.type == PORT_XR17V35X) ||
621 (p->port.type == PORT_XR17D15X)) {
622 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
626 if (p->capabilities & UART_CAP_SLEEP) {
627 if (p->capabilities & UART_CAP_EFR) {
628 lcr = serial_in(p, UART_LCR);
629 efr = serial_in(p, UART_EFR);
630 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
631 serial_out(p, UART_EFR, UART_EFR_ECB);
632 serial_out(p, UART_LCR, 0);
634 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
635 if (p->capabilities & UART_CAP_EFR) {
636 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
637 serial_out(p, UART_EFR, efr);
638 serial_out(p, UART_LCR, lcr);
642 serial8250_rpm_put(p);
645 #ifdef CONFIG_SERIAL_8250_RSA
647 * Attempts to turn on the RSA FIFO. Returns zero on failure.
648 * We set the port uart clock rate if we succeed.
650 static int __enable_rsa(struct uart_8250_port *up)
655 mode = serial_in(up, UART_RSA_MSR);
656 result = mode & UART_RSA_MSR_FIFO;
659 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
660 mode = serial_in(up, UART_RSA_MSR);
661 result = mode & UART_RSA_MSR_FIFO;
665 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
670 static void enable_rsa(struct uart_8250_port *up)
672 if (up->port.type == PORT_RSA) {
673 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
674 spin_lock_irq(&up->port.lock);
676 spin_unlock_irq(&up->port.lock);
678 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
679 serial_out(up, UART_RSA_FRR, 0);
684 * Attempts to turn off the RSA FIFO. Returns zero on failure.
685 * It is unknown why interrupts were disabled in here. However,
686 * the caller is expected to preserve this behaviour by grabbing
687 * the spinlock before calling this function.
689 static void disable_rsa(struct uart_8250_port *up)
694 if (up->port.type == PORT_RSA &&
695 up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
696 spin_lock_irq(&up->port.lock);
698 mode = serial_in(up, UART_RSA_MSR);
699 result = !(mode & UART_RSA_MSR_FIFO);
702 serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
703 mode = serial_in(up, UART_RSA_MSR);
704 result = !(mode & UART_RSA_MSR_FIFO);
708 up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
709 spin_unlock_irq(&up->port.lock);
712 #endif /* CONFIG_SERIAL_8250_RSA */
715 * This is a quickie test to see how big the FIFO is.
716 * It doesn't work at all the time, more's the pity.
718 static int size_fifo(struct uart_8250_port *up)
720 unsigned char old_fcr, old_mcr, old_lcr;
721 unsigned short old_dl;
724 old_lcr = serial_in(up, UART_LCR);
725 serial_out(up, UART_LCR, 0);
726 old_fcr = serial_in(up, UART_FCR);
727 old_mcr = serial_in(up, UART_MCR);
728 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
729 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
730 serial_out(up, UART_MCR, UART_MCR_LOOP);
731 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
732 old_dl = serial_dl_read(up);
733 serial_dl_write(up, 0x0001);
734 serial_out(up, UART_LCR, 0x03);
735 for (count = 0; count < 256; count++)
736 serial_out(up, UART_TX, count);
737 mdelay(20);/* FIXME - schedule_timeout */
738 for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
739 (count < 256); count++)
740 serial_in(up, UART_RX);
741 serial_out(up, UART_FCR, old_fcr);
742 serial_out(up, UART_MCR, old_mcr);
743 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
744 serial_dl_write(up, old_dl);
745 serial_out(up, UART_LCR, old_lcr);
751 * Read UART ID using the divisor method - set DLL and DLM to zero
752 * and the revision will be in DLL and device type in DLM. We
753 * preserve the device state across this.
755 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
757 unsigned char old_dll, old_dlm, old_lcr;
760 old_lcr = serial_in(p, UART_LCR);
761 serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
763 old_dll = serial_in(p, UART_DLL);
764 old_dlm = serial_in(p, UART_DLM);
766 serial_out(p, UART_DLL, 0);
767 serial_out(p, UART_DLM, 0);
769 id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
771 serial_out(p, UART_DLL, old_dll);
772 serial_out(p, UART_DLM, old_dlm);
773 serial_out(p, UART_LCR, old_lcr);
779 * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
780 * When this function is called we know it is at least a StarTech
781 * 16650 V2, but it might be one of several StarTech UARTs, or one of
782 * its clones. (We treat the broken original StarTech 16650 V1 as a
783 * 16550, and why not? Startech doesn't seem to even acknowledge its
786 * What evil have men's minds wrought...
788 static void autoconfig_has_efr(struct uart_8250_port *up)
790 unsigned int id1, id2, id3, rev;
793 * Everything with an EFR has SLEEP
795 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
798 * First we check to see if it's an Oxford Semiconductor UART.
800 * If we have to do this here because some non-National
801 * Semiconductor clone chips lock up if you try writing to the
802 * LSR register (which serial_icr_read does)
806 * Check for Oxford Semiconductor 16C950.
808 * EFR [4] must be set else this test fails.
810 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
811 * claims that it's needed for 952 dual UART's (which are not
812 * recommended for new designs).
815 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
816 serial_out(up, UART_EFR, UART_EFR_ECB);
817 serial_out(up, UART_LCR, 0x00);
818 id1 = serial_icr_read(up, UART_ID1);
819 id2 = serial_icr_read(up, UART_ID2);
820 id3 = serial_icr_read(up, UART_ID3);
821 rev = serial_icr_read(up, UART_REV);
823 DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
825 if (id1 == 0x16 && id2 == 0xC9 &&
826 (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
827 up->port.type = PORT_16C950;
830 * Enable work around for the Oxford Semiconductor 952 rev B
831 * chip which causes it to seriously miscalculate baud rates
834 if (id3 == 0x52 && rev == 0x01)
835 up->bugs |= UART_BUG_QUOT;
840 * We check for a XR16C850 by setting DLL and DLM to 0, and then
841 * reading back DLL and DLM. The chip type depends on the DLM
843 * 0x10 - XR16C850 and the DLL contains the chip revision.
847 id1 = autoconfig_read_divisor_id(up);
848 DEBUG_AUTOCONF("850id=%04x ", id1);
851 if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
852 up->port.type = PORT_16850;
857 * It wasn't an XR16C850.
859 * We distinguish between the '654 and the '650 by counting
860 * how many bytes are in the FIFO. I'm using this for now,
861 * since that's the technique that was sent to me in the
862 * serial driver update, but I'm not convinced this works.
863 * I've had problems doing this in the past. -TYT
865 if (size_fifo(up) == 64)
866 up->port.type = PORT_16654;
868 up->port.type = PORT_16650V2;
872 * We detected a chip without a FIFO. Only two fall into
873 * this category - the original 8250 and the 16450. The
874 * 16450 has a scratch register (accessible with LCR=0)
876 static void autoconfig_8250(struct uart_8250_port *up)
878 unsigned char scratch, status1, status2;
880 up->port.type = PORT_8250;
882 scratch = serial_in(up, UART_SCR);
883 serial_out(up, UART_SCR, 0xa5);
884 status1 = serial_in(up, UART_SCR);
885 serial_out(up, UART_SCR, 0x5a);
886 status2 = serial_in(up, UART_SCR);
887 serial_out(up, UART_SCR, scratch);
889 if (status1 == 0xa5 && status2 == 0x5a)
890 up->port.type = PORT_16450;
893 static int broken_efr(struct uart_8250_port *up)
896 * Exar ST16C2550 "A2" devices incorrectly detect as
897 * having an EFR, and report an ID of 0x0201. See
898 * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html
900 if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
907 * We know that the chip has FIFOs. Does it have an EFR? The
908 * EFR is located in the same register position as the IIR and
909 * we know the top two bits of the IIR are currently set. The
910 * EFR should contain zero. Try to read the EFR.
912 static void autoconfig_16550a(struct uart_8250_port *up)
914 unsigned char status1, status2;
915 unsigned int iersave;
917 up->port.type = PORT_16550A;
918 up->capabilities |= UART_CAP_FIFO;
921 * XR17V35x UARTs have an extra divisor register, DLD
922 * that gets enabled with when DLAB is set which will
923 * cause the device to incorrectly match and assign
924 * port type to PORT_16650. The EFR for this UART is
925 * found at offset 0x09. Instead check the Deice ID (DVID)
926 * register for a 2, 4 or 8 port UART.
928 if (up->port.flags & UPF_EXAR_EFR) {
929 status1 = serial_in(up, UART_EXAR_DVID);
930 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
931 DEBUG_AUTOCONF("Exar XR17V35x ");
932 up->port.type = PORT_XR17V35X;
933 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
942 * Check for presence of the EFR when DLAB is set.
943 * Only ST16C650V1 UARTs pass this test.
945 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
946 if (serial_in(up, UART_EFR) == 0) {
947 serial_out(up, UART_EFR, 0xA8);
948 if (serial_in(up, UART_EFR) != 0) {
949 DEBUG_AUTOCONF("EFRv1 ");
950 up->port.type = PORT_16650;
951 up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
953 serial_out(up, UART_LCR, 0);
954 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
956 status1 = serial_in(up, UART_IIR) >> 5;
957 serial_out(up, UART_FCR, 0);
958 serial_out(up, UART_LCR, 0);
961 up->port.type = PORT_16550A_FSL64;
963 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
965 serial_out(up, UART_EFR, 0);
970 * Maybe it requires 0xbf to be written to the LCR.
971 * (other ST16C650V2 UARTs, TI16C752A, etc)
973 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
974 if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
975 DEBUG_AUTOCONF("EFRv2 ");
976 autoconfig_has_efr(up);
981 * Check for a National Semiconductor SuperIO chip.
982 * Attempt to switch to bank 2, read the value of the LOOP bit
983 * from EXCR1. Switch back to bank 0, change it in MCR. Then
984 * switch back to bank 2, read it from EXCR1 again and check
985 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
987 serial_out(up, UART_LCR, 0);
988 status1 = serial_in(up, UART_MCR);
989 serial_out(up, UART_LCR, 0xE0);
990 status2 = serial_in(up, 0x02); /* EXCR1 */
992 if (!((status2 ^ status1) & UART_MCR_LOOP)) {
993 serial_out(up, UART_LCR, 0);
994 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
995 serial_out(up, UART_LCR, 0xE0);
996 status2 = serial_in(up, 0x02); /* EXCR1 */
997 serial_out(up, UART_LCR, 0);
998 serial_out(up, UART_MCR, status1);
1000 if ((status2 ^ status1) & UART_MCR_LOOP) {
1001 unsigned short quot;
1003 serial_out(up, UART_LCR, 0xE0);
1005 quot = serial_dl_read(up);
1008 if (ns16550a_goto_highspeed(up))
1009 serial_dl_write(up, quot);
1011 serial_out(up, UART_LCR, 0);
1013 up->port.uartclk = 921600*16;
1014 up->port.type = PORT_NS16550A;
1015 up->capabilities |= UART_NATSEMI;
1021 * No EFR. Try to detect a TI16750, which only sets bit 5 of
1022 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1023 * Try setting it with and without DLAB set. Cheap clones
1024 * set bit 5 without DLAB set.
1026 serial_out(up, UART_LCR, 0);
1027 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1028 status1 = serial_in(up, UART_IIR) >> 5;
1029 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1030 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1031 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1032 status2 = serial_in(up, UART_IIR) >> 5;
1033 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1034 serial_out(up, UART_LCR, 0);
1036 DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1038 if (status1 == 6 && status2 == 7) {
1039 up->port.type = PORT_16750;
1040 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1045 * Try writing and reading the UART_IER_UUE bit (b6).
1046 * If it works, this is probably one of the Xscale platform's
1048 * We're going to explicitly set the UUE bit to 0 before
1049 * trying to write and read a 1 just to make sure it's not
1050 * already a 1 and maybe locked there before we even start start.
1052 iersave = serial_in(up, UART_IER);
1053 serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1054 if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1056 * OK it's in a known zero state, try writing and reading
1057 * without disturbing the current state of the other bits.
1059 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1060 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1063 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1065 DEBUG_AUTOCONF("Xscale ");
1066 up->port.type = PORT_XSCALE;
1067 up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1072 * If we got here we couldn't force the IER_UUE bit to 0.
1073 * Log it and continue.
1075 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1077 serial_out(up, UART_IER, iersave);
1080 * Exar uarts have EFR in a weird location
1082 if (up->port.flags & UPF_EXAR_EFR) {
1083 DEBUG_AUTOCONF("Exar XR17D15x ");
1084 up->port.type = PORT_XR17D15X;
1085 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1092 * We distinguish between 16550A and U6 16550A by counting
1093 * how many bytes are in the FIFO.
1095 if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1096 up->port.type = PORT_U6_16550A;
1097 up->capabilities |= UART_CAP_AFE;
1102 * This routine is called by rs_init() to initialize a specific serial
1103 * port. It determines what type of UART chip this serial port is
1104 * using: 8250, 16450, 16550, 16550A. The important question is
1105 * whether or not this UART is a 16550A or not, since this will
1106 * determine whether or not we can use its FIFO features or not.
1108 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1110 unsigned char status1, scratch, scratch2, scratch3;
1111 unsigned char save_lcr, save_mcr;
1112 struct uart_port *port = &up->port;
1113 unsigned long flags;
1114 unsigned int old_capabilities;
1116 if (!port->iobase && !port->mapbase && !port->membase)
1119 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1120 serial_index(port), port->iobase, port->membase);
1123 * We really do need global IRQs disabled here - we're going to
1124 * be frobbing the chips IRQ enable register to see if it exists.
1126 spin_lock_irqsave(&port->lock, flags);
1128 up->capabilities = 0;
1131 if (!(port->flags & UPF_BUGGY_UART)) {
1133 * Do a simple existence test first; if we fail this,
1134 * there's no point trying anything else.
1136 * 0x80 is used as a nonsense port to prevent against
1137 * false positives due to ISA bus float. The
1138 * assumption is that 0x80 is a non-existent port;
1139 * which should be safe since include/asm/io.h also
1140 * makes this assumption.
1142 * Note: this is safe as long as MCR bit 4 is clear
1143 * and the device is in "PC" mode.
1145 scratch = serial_in(up, UART_IER);
1146 serial_out(up, UART_IER, 0);
1151 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1152 * 16C754B) allow only to modify them if an EFR bit is set.
1154 scratch2 = serial_in(up, UART_IER) & 0x0f;
1155 serial_out(up, UART_IER, 0x0F);
1159 scratch3 = serial_in(up, UART_IER) & 0x0f;
1160 serial_out(up, UART_IER, scratch);
1161 if (scratch2 != 0 || scratch3 != 0x0F) {
1163 * We failed; there's nothing here
1165 spin_unlock_irqrestore(&port->lock, flags);
1166 DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1167 scratch2, scratch3);
1172 save_mcr = serial_in(up, UART_MCR);
1173 save_lcr = serial_in(up, UART_LCR);
1176 * Check to see if a UART is really there. Certain broken
1177 * internal modems based on the Rockwell chipset fail this
1178 * test, because they apparently don't implement the loopback
1179 * test mode. So this test is skipped on the COM 1 through
1180 * COM 4 ports. This *should* be safe, since no board
1181 * manufacturer would be stupid enough to design a board
1182 * that conflicts with COM 1-4 --- we hope!
1184 if (!(port->flags & UPF_SKIP_TEST)) {
1185 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1186 status1 = serial_in(up, UART_MSR) & 0xF0;
1187 serial_out(up, UART_MCR, save_mcr);
1188 if (status1 != 0x90) {
1189 spin_unlock_irqrestore(&port->lock, flags);
1190 DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1197 * We're pretty sure there's a port here. Lets find out what
1198 * type of port it is. The IIR top two bits allows us to find
1199 * out if it's 8250 or 16450, 16550, 16550A or later. This
1200 * determines what we test for next.
1202 * We also initialise the EFR (if any) to zero for later. The
1203 * EFR occupies the same register location as the FCR and IIR.
1205 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1206 serial_out(up, UART_EFR, 0);
1207 serial_out(up, UART_LCR, 0);
1209 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1210 scratch = serial_in(up, UART_IIR) >> 6;
1214 autoconfig_8250(up);
1217 port->type = PORT_UNKNOWN;
1220 port->type = PORT_16550;
1223 autoconfig_16550a(up);
1227 #ifdef CONFIG_SERIAL_8250_RSA
1229 * Only probe for RSA ports if we got the region.
1231 if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1234 for (i = 0 ; i < probe_rsa_count; ++i) {
1235 if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1236 port->type = PORT_RSA;
1243 serial_out(up, UART_LCR, save_lcr);
1245 port->fifosize = uart_config[up->port.type].fifo_size;
1246 old_capabilities = up->capabilities;
1247 up->capabilities = uart_config[port->type].flags;
1248 up->tx_loadsz = uart_config[port->type].tx_loadsz;
1250 if (port->type == PORT_UNKNOWN)
1256 #ifdef CONFIG_SERIAL_8250_RSA
1257 if (port->type == PORT_RSA)
1258 serial_out(up, UART_RSA_FRR, 0);
1260 serial_out(up, UART_MCR, save_mcr);
1261 serial8250_clear_fifos(up);
1262 serial_in(up, UART_RX);
1263 if (up->capabilities & UART_CAP_UUE)
1264 serial_out(up, UART_IER, UART_IER_UUE);
1266 serial_out(up, UART_IER, 0);
1269 spin_unlock_irqrestore(&port->lock, flags);
1270 if (up->capabilities != old_capabilities) {
1272 "ttyS%d: detected caps %08x should be %08x\n",
1273 serial_index(port), old_capabilities,
1277 DEBUG_AUTOCONF("iir=%d ", scratch);
1278 DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1281 static void autoconfig_irq(struct uart_8250_port *up)
1283 struct uart_port *port = &up->port;
1284 unsigned char save_mcr, save_ier;
1285 unsigned char save_ICP = 0;
1286 unsigned int ICP = 0;
1290 if (port->flags & UPF_FOURPORT) {
1291 ICP = (port->iobase & 0xfe0) | 0x1f;
1292 save_ICP = inb_p(ICP);
1297 /* forget possible initially masked and pending IRQ */
1298 probe_irq_off(probe_irq_on());
1299 save_mcr = serial_in(up, UART_MCR);
1300 save_ier = serial_in(up, UART_IER);
1301 serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1303 irqs = probe_irq_on();
1304 serial_out(up, UART_MCR, 0);
1306 if (port->flags & UPF_FOURPORT) {
1307 serial_out(up, UART_MCR,
1308 UART_MCR_DTR | UART_MCR_RTS);
1310 serial_out(up, UART_MCR,
1311 UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1313 serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1314 serial_in(up, UART_LSR);
1315 serial_in(up, UART_RX);
1316 serial_in(up, UART_IIR);
1317 serial_in(up, UART_MSR);
1318 serial_out(up, UART_TX, 0xFF);
1320 irq = probe_irq_off(irqs);
1322 serial_out(up, UART_MCR, save_mcr);
1323 serial_out(up, UART_IER, save_ier);
1325 if (port->flags & UPF_FOURPORT)
1326 outb_p(save_ICP, ICP);
1328 port->irq = (irq > 0) ? irq : 0;
1331 static inline void __stop_tx(struct uart_8250_port *p)
1333 if (p->ier & UART_IER_THRI) {
1334 p->ier &= ~UART_IER_THRI;
1335 serial_out(p, UART_IER, p->ier);
1336 serial8250_rpm_put_tx(p);
1340 static void serial8250_stop_tx(struct uart_port *port)
1342 struct uart_8250_port *up = up_to_u8250p(port);
1344 serial8250_rpm_get(up);
1348 * We really want to stop the transmitter from sending.
1350 if (port->type == PORT_16C950) {
1351 up->acr |= UART_ACR_TXDIS;
1352 serial_icr_write(up, UART_ACR, up->acr);
1354 serial8250_rpm_put(up);
1357 static void serial8250_start_tx(struct uart_port *port)
1359 struct uart_8250_port *up = up_to_u8250p(port);
1361 serial8250_rpm_get_tx(up);
1363 if (up->dma && !up->dma->tx_dma(up))
1366 if (!(up->ier & UART_IER_THRI)) {
1367 up->ier |= UART_IER_THRI;
1368 serial_port_out(port, UART_IER, up->ier);
1370 if (up->bugs & UART_BUG_TXEN) {
1372 lsr = serial_in(up, UART_LSR);
1373 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1374 if (lsr & UART_LSR_THRE)
1375 serial8250_tx_chars(up);
1380 * Re-enable the transmitter if we disabled it.
1382 if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1383 up->acr &= ~UART_ACR_TXDIS;
1384 serial_icr_write(up, UART_ACR, up->acr);
1388 static void serial8250_throttle(struct uart_port *port)
1390 port->throttle(port);
1393 static void serial8250_unthrottle(struct uart_port *port)
1395 port->unthrottle(port);
1398 static void serial8250_stop_rx(struct uart_port *port)
1400 struct uart_8250_port *up = up_to_u8250p(port);
1402 serial8250_rpm_get(up);
1404 up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1405 up->port.read_status_mask &= ~UART_LSR_DR;
1406 serial_port_out(port, UART_IER, up->ier);
1408 serial8250_rpm_put(up);
1411 static void serial8250_disable_ms(struct uart_port *port)
1413 struct uart_8250_port *up =
1414 container_of(port, struct uart_8250_port, port);
1416 /* no MSR capabilities */
1417 if (up->bugs & UART_BUG_NOMSR)
1420 up->ier &= ~UART_IER_MSI;
1421 serial_port_out(port, UART_IER, up->ier);
1424 static void serial8250_enable_ms(struct uart_port *port)
1426 struct uart_8250_port *up = up_to_u8250p(port);
1428 /* no MSR capabilities */
1429 if (up->bugs & UART_BUG_NOMSR)
1432 up->ier |= UART_IER_MSI;
1434 serial8250_rpm_get(up);
1435 serial_port_out(port, UART_IER, up->ier);
1436 serial8250_rpm_put(up);
1440 * serial8250_rx_chars: processes according to the passed in LSR
1441 * value, and returns the remaining LSR bits not handled
1442 * by this Rx routine.
1445 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1447 struct uart_port *port = &up->port;
1449 int max_count = 256;
1453 if (likely(lsr & UART_LSR_DR))
1454 ch = serial_in(up, UART_RX);
1457 * Intel 82571 has a Serial Over Lan device that will
1458 * set UART_LSR_BI without setting UART_LSR_DR when
1459 * it receives a break. To avoid reading from the
1460 * receive buffer without UART_LSR_DR bit set, we
1461 * just force the read character to be 0
1468 lsr |= up->lsr_saved_flags;
1469 up->lsr_saved_flags = 0;
1471 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1472 if (lsr & UART_LSR_BI) {
1473 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1476 * We do the SysRQ and SAK checking
1477 * here because otherwise the break
1478 * may get masked by ignore_status_mask
1479 * or read_status_mask.
1481 if (uart_handle_break(port))
1483 } else if (lsr & UART_LSR_PE)
1484 port->icount.parity++;
1485 else if (lsr & UART_LSR_FE)
1486 port->icount.frame++;
1487 if (lsr & UART_LSR_OE)
1488 port->icount.overrun++;
1491 * Mask off conditions which should be ignored.
1493 lsr &= port->read_status_mask;
1495 if (lsr & UART_LSR_BI) {
1496 DEBUG_INTR("handling break....");
1498 } else if (lsr & UART_LSR_PE)
1500 else if (lsr & UART_LSR_FE)
1503 if (uart_handle_sysrq_char(port, ch))
1506 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1509 lsr = serial_in(up, UART_LSR);
1510 } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1511 spin_unlock(&port->lock);
1512 tty_flip_buffer_push(&port->state->port);
1513 spin_lock(&port->lock);
1516 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1518 void serial8250_tx_chars(struct uart_8250_port *up)
1520 struct uart_port *port = &up->port;
1521 struct circ_buf *xmit = &port->state->xmit;
1525 serial_out(up, UART_TX, port->x_char);
1530 if (uart_tx_stopped(port)) {
1531 serial8250_stop_tx(port);
1534 if (uart_circ_empty(xmit)) {
1539 count = up->tx_loadsz;
1541 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1542 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1544 if (uart_circ_empty(xmit))
1546 if (up->capabilities & UART_CAP_HFIFO) {
1547 if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1551 } while (--count > 0);
1553 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1554 uart_write_wakeup(port);
1556 DEBUG_INTR("THRE...");
1559 * With RPM enabled, we have to wait until the FIFO is empty before the
1560 * HW can go idle. So we get here once again with empty FIFO and disable
1561 * the interrupt and RPM in __stop_tx()
1563 if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1566 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1568 /* Caller holds uart port lock */
1569 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1571 struct uart_port *port = &up->port;
1572 unsigned int status = serial_in(up, UART_MSR);
1574 status |= up->msr_saved_flags;
1575 up->msr_saved_flags = 0;
1576 if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1577 port->state != NULL) {
1578 if (status & UART_MSR_TERI)
1580 if (status & UART_MSR_DDSR)
1582 if (status & UART_MSR_DDCD)
1583 uart_handle_dcd_change(port, status & UART_MSR_DCD);
1584 if (status & UART_MSR_DCTS)
1585 uart_handle_cts_change(port, status & UART_MSR_CTS);
1587 wake_up_interruptible(&port->state->port.delta_msr_wait);
1592 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1595 * This handles the interrupt from one port.
1597 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1599 unsigned char status;
1600 unsigned long flags;
1601 struct uart_8250_port *up = up_to_u8250p(port);
1604 if (iir & UART_IIR_NO_INT)
1607 spin_lock_irqsave(&port->lock, flags);
1609 status = serial_port_in(port, UART_LSR);
1611 DEBUG_INTR("status = %x...", status);
1613 if (status & (UART_LSR_DR | UART_LSR_BI)) {
1615 dma_err = up->dma->rx_dma(up, iir);
1617 if (!up->dma || dma_err)
1618 status = serial8250_rx_chars(up, status);
1620 serial8250_modem_status(up);
1621 if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1622 (status & UART_LSR_THRE))
1623 serial8250_tx_chars(up);
1625 spin_unlock_irqrestore(&port->lock, flags);
1628 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1630 static int serial8250_default_handle_irq(struct uart_port *port)
1632 struct uart_8250_port *up = up_to_u8250p(port);
1636 serial8250_rpm_get(up);
1638 iir = serial_port_in(port, UART_IIR);
1639 ret = serial8250_handle_irq(port, iir);
1641 serial8250_rpm_put(up);
1646 * These Exar UARTs have an extra interrupt indicator that could
1647 * fire for a few unimplemented interrupts. One of which is a
1648 * wakeup event when coming out of sleep. Put this here just
1649 * to be on the safe side that these interrupts don't go unhandled.
1651 static int exar_handle_irq(struct uart_port *port)
1653 unsigned char int0, int1, int2, int3;
1654 unsigned int iir = serial_port_in(port, UART_IIR);
1657 ret = serial8250_handle_irq(port, iir);
1659 if ((port->type == PORT_XR17V35X) ||
1660 (port->type == PORT_XR17D15X)) {
1661 int0 = serial_port_in(port, 0x80);
1662 int1 = serial_port_in(port, 0x81);
1663 int2 = serial_port_in(port, 0x82);
1664 int3 = serial_port_in(port, 0x83);
1671 * This is the serial driver's interrupt routine.
1673 * Arjan thinks the old way was overly complex, so it got simplified.
1674 * Alan disagrees, saying that need the complexity to handle the weird
1675 * nature of ISA shared interrupts. (This is a special exception.)
1677 * In order to handle ISA shared interrupts properly, we need to check
1678 * that all ports have been serviced, and therefore the ISA interrupt
1679 * line has been de-asserted.
1681 * This means we need to loop through all ports. checking that they
1682 * don't have an interrupt pending.
1684 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1686 struct irq_info *i = dev_id;
1687 struct list_head *l, *end = NULL;
1688 int pass_counter = 0, handled = 0;
1690 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1692 spin_lock(&i->lock);
1696 struct uart_8250_port *up;
1697 struct uart_port *port;
1699 up = list_entry(l, struct uart_8250_port, list);
1702 if (port->handle_irq(port)) {
1705 } else if (end == NULL)
1710 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1711 /* If we hit this, we're dead. */
1712 printk_ratelimited(KERN_ERR
1713 "serial8250: too much work for irq%d\n", irq);
1718 spin_unlock(&i->lock);
1720 DEBUG_INTR("end.\n");
1722 return IRQ_RETVAL(handled);
1726 * To support ISA shared interrupts, we need to have one interrupt
1727 * handler that ensures that the IRQ line has been deasserted
1728 * before returning. Failing to do this will result in the IRQ
1729 * line being stuck active, and, since ISA irqs are edge triggered,
1730 * no more IRQs will be seen.
1732 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1734 spin_lock_irq(&i->lock);
1736 if (!list_empty(i->head)) {
1737 if (i->head == &up->list)
1738 i->head = i->head->next;
1739 list_del(&up->list);
1741 BUG_ON(i->head != &up->list);
1744 spin_unlock_irq(&i->lock);
1745 /* List empty so throw away the hash node */
1746 if (i->head == NULL) {
1747 hlist_del(&i->node);
1752 static int serial_link_irq_chain(struct uart_8250_port *up)
1754 struct hlist_head *h;
1755 struct hlist_node *n;
1757 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1759 mutex_lock(&hash_mutex);
1761 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1763 hlist_for_each(n, h) {
1764 i = hlist_entry(n, struct irq_info, node);
1765 if (i->irq == up->port.irq)
1770 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1772 mutex_unlock(&hash_mutex);
1775 spin_lock_init(&i->lock);
1776 i->irq = up->port.irq;
1777 hlist_add_head(&i->node, h);
1779 mutex_unlock(&hash_mutex);
1781 spin_lock_irq(&i->lock);
1784 list_add(&up->list, i->head);
1785 spin_unlock_irq(&i->lock);
1789 INIT_LIST_HEAD(&up->list);
1790 i->head = &up->list;
1791 spin_unlock_irq(&i->lock);
1792 irq_flags |= up->port.irqflags;
1793 ret = request_irq(up->port.irq, serial8250_interrupt,
1794 irq_flags, "serial", i);
1796 serial_do_unlink(i, up);
1802 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1805 * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1806 * but no, we are not going to take a patch that assigns NULL below.
1809 struct hlist_node *n;
1810 struct hlist_head *h;
1812 mutex_lock(&hash_mutex);
1814 h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1816 hlist_for_each(n, h) {
1817 i = hlist_entry(n, struct irq_info, node);
1818 if (i->irq == up->port.irq)
1823 BUG_ON(i->head == NULL);
1825 if (list_empty(i->head))
1826 free_irq(up->port.irq, i);
1828 serial_do_unlink(i, up);
1829 mutex_unlock(&hash_mutex);
1833 * This function is used to handle ports that do not have an
1834 * interrupt. This doesn't work very well for 16450's, but gives
1835 * barely passable results for a 16550A. (Although at the expense
1836 * of much CPU overhead).
1838 static void serial8250_timeout(unsigned long data)
1840 struct uart_8250_port *up = (struct uart_8250_port *)data;
1842 up->port.handle_irq(&up->port);
1843 mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1846 static void serial8250_backup_timeout(unsigned long data)
1848 struct uart_8250_port *up = (struct uart_8250_port *)data;
1849 unsigned int iir, ier = 0, lsr;
1850 unsigned long flags;
1852 spin_lock_irqsave(&up->port.lock, flags);
1855 * Must disable interrupts or else we risk racing with the interrupt
1859 ier = serial_in(up, UART_IER);
1860 serial_out(up, UART_IER, 0);
1863 iir = serial_in(up, UART_IIR);
1866 * This should be a safe test for anyone who doesn't trust the
1867 * IIR bits on their UART, but it's specifically designed for
1868 * the "Diva" UART used on the management processor on many HP
1869 * ia64 and parisc boxes.
1871 lsr = serial_in(up, UART_LSR);
1872 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1873 if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1874 (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1875 (lsr & UART_LSR_THRE)) {
1876 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1877 iir |= UART_IIR_THRI;
1880 if (!(iir & UART_IIR_NO_INT))
1881 serial8250_tx_chars(up);
1884 serial_out(up, UART_IER, ier);
1886 spin_unlock_irqrestore(&up->port.lock, flags);
1888 /* Standard timer interval plus 0.2s to keep the port running */
1889 mod_timer(&up->timer,
1890 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1893 static unsigned int serial8250_tx_empty(struct uart_port *port)
1895 struct uart_8250_port *up = up_to_u8250p(port);
1896 unsigned long flags;
1899 serial8250_rpm_get(up);
1901 spin_lock_irqsave(&port->lock, flags);
1902 lsr = serial_port_in(port, UART_LSR);
1903 up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1904 spin_unlock_irqrestore(&port->lock, flags);
1906 serial8250_rpm_put(up);
1908 return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1911 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1913 struct uart_8250_port *up = up_to_u8250p(port);
1914 unsigned int status;
1917 serial8250_rpm_get(up);
1918 status = serial8250_modem_status(up);
1919 serial8250_rpm_put(up);
1922 if (status & UART_MSR_DCD)
1924 if (status & UART_MSR_RI)
1926 if (status & UART_MSR_DSR)
1928 if (status & UART_MSR_CTS)
1933 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
1935 struct uart_8250_port *up = up_to_u8250p(port);
1936 unsigned char mcr = 0;
1938 if (mctrl & TIOCM_RTS)
1939 mcr |= UART_MCR_RTS;
1940 if (mctrl & TIOCM_DTR)
1941 mcr |= UART_MCR_DTR;
1942 if (mctrl & TIOCM_OUT1)
1943 mcr |= UART_MCR_OUT1;
1944 if (mctrl & TIOCM_OUT2)
1945 mcr |= UART_MCR_OUT2;
1946 if (mctrl & TIOCM_LOOP)
1947 mcr |= UART_MCR_LOOP;
1949 mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1951 serial_port_out(port, UART_MCR, mcr);
1953 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
1955 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1957 if (port->set_mctrl)
1958 return port->set_mctrl(port, mctrl);
1959 return serial8250_do_set_mctrl(port, mctrl);
1962 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1964 struct uart_8250_port *up = up_to_u8250p(port);
1965 unsigned long flags;
1967 serial8250_rpm_get(up);
1968 spin_lock_irqsave(&port->lock, flags);
1969 if (break_state == -1)
1970 up->lcr |= UART_LCR_SBC;
1972 up->lcr &= ~UART_LCR_SBC;
1973 serial_port_out(port, UART_LCR, up->lcr);
1974 spin_unlock_irqrestore(&port->lock, flags);
1975 serial8250_rpm_put(up);
1979 * Wait for transmitter & holding register to empty
1981 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1983 unsigned int status, tmout = 10000;
1985 /* Wait up to 10ms for the character(s) to be sent. */
1987 status = serial_in(up, UART_LSR);
1989 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1991 if ((status & bits) == bits)
1998 /* Wait up to 1s for flow control if necessary */
1999 if (up->port.flags & UPF_CONS_FLOW) {
2001 for (tmout = 1000000; tmout; tmout--) {
2002 unsigned int msr = serial_in(up, UART_MSR);
2003 up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
2004 if (msr & UART_MSR_CTS)
2007 touch_nmi_watchdog();
2012 #ifdef CONFIG_CONSOLE_POLL
2014 * Console polling routines for writing and reading from the uart while
2015 * in an interrupt or debug context.
2018 static int serial8250_get_poll_char(struct uart_port *port)
2020 struct uart_8250_port *up = up_to_u8250p(port);
2024 serial8250_rpm_get(up);
2026 lsr = serial_port_in(port, UART_LSR);
2028 if (!(lsr & UART_LSR_DR)) {
2029 status = NO_POLL_CHAR;
2033 status = serial_port_in(port, UART_RX);
2035 serial8250_rpm_put(up);
2040 static void serial8250_put_poll_char(struct uart_port *port,
2044 struct uart_8250_port *up = up_to_u8250p(port);
2046 serial8250_rpm_get(up);
2048 * First save the IER then disable the interrupts
2050 ier = serial_port_in(port, UART_IER);
2051 if (up->capabilities & UART_CAP_UUE)
2052 serial_port_out(port, UART_IER, UART_IER_UUE);
2054 serial_port_out(port, UART_IER, 0);
2056 wait_for_xmitr(up, BOTH_EMPTY);
2058 * Send the character out.
2060 serial_port_out(port, UART_TX, c);
2063 * Finally, wait for transmitter to become empty
2064 * and restore the IER
2066 wait_for_xmitr(up, BOTH_EMPTY);
2067 serial_port_out(port, UART_IER, ier);
2068 serial8250_rpm_put(up);
2071 #endif /* CONFIG_CONSOLE_POLL */
2073 int serial8250_do_startup(struct uart_port *port)
2075 struct uart_8250_port *up = up_to_u8250p(port);
2076 unsigned long flags;
2077 unsigned char lsr, iir;
2080 if (port->type == PORT_8250_CIR)
2083 if (!port->fifosize)
2084 port->fifosize = uart_config[port->type].fifo_size;
2086 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2087 if (!up->capabilities)
2088 up->capabilities = uart_config[port->type].flags;
2091 if (port->iotype != up->cur_iotype)
2092 set_io_from_upio(port);
2094 serial8250_rpm_get(up);
2095 if (port->type == PORT_16C950) {
2096 /* Wake up and initialize UART */
2098 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2099 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2100 serial_port_out(port, UART_IER, 0);
2101 serial_port_out(port, UART_LCR, 0);
2102 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2103 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2104 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2105 serial_port_out(port, UART_LCR, 0);
2108 #ifdef CONFIG_SERIAL_8250_RSA
2110 * If this is an RSA port, see if we can kick it up to the
2111 * higher speed clock.
2116 * Clear the FIFO buffers and disable them.
2117 * (they will be reenabled in set_termios())
2119 serial8250_clear_fifos(up);
2122 * Clear the interrupt registers.
2124 serial_port_in(port, UART_LSR);
2125 serial_port_in(port, UART_RX);
2126 serial_port_in(port, UART_IIR);
2127 serial_port_in(port, UART_MSR);
2130 * At this point, there's no way the LSR could still be 0xff;
2131 * if it is, then bail out, because there's likely no UART
2134 if (!(port->flags & UPF_BUGGY_UART) &&
2135 (serial_port_in(port, UART_LSR) == 0xff)) {
2136 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2137 serial_index(port));
2143 * For a XR16C850, we need to set the trigger levels
2145 if (port->type == PORT_16850) {
2148 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2150 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2151 serial_port_out(port, UART_FCTR,
2152 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2153 serial_port_out(port, UART_TRG, UART_TRG_96);
2154 serial_port_out(port, UART_FCTR,
2155 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2156 serial_port_out(port, UART_TRG, UART_TRG_96);
2158 serial_port_out(port, UART_LCR, 0);
2164 * Test for UARTs that do not reassert THRE when the
2165 * transmitter is idle and the interrupt has already
2166 * been cleared. Real 16550s should always reassert
2167 * this interrupt whenever the transmitter is idle and
2168 * the interrupt is enabled. Delays are necessary to
2169 * allow register changes to become visible.
2171 spin_lock_irqsave(&port->lock, flags);
2172 if (up->port.irqflags & IRQF_SHARED)
2173 disable_irq_nosync(port->irq);
2175 wait_for_xmitr(up, UART_LSR_THRE);
2176 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2177 udelay(1); /* allow THRE to set */
2178 iir1 = serial_port_in(port, UART_IIR);
2179 serial_port_out(port, UART_IER, 0);
2180 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2181 udelay(1); /* allow a working UART time to re-assert THRE */
2182 iir = serial_port_in(port, UART_IIR);
2183 serial_port_out(port, UART_IER, 0);
2185 if (port->irqflags & IRQF_SHARED)
2186 enable_irq(port->irq);
2187 spin_unlock_irqrestore(&port->lock, flags);
2190 * If the interrupt is not reasserted, or we otherwise
2191 * don't trust the iir, setup a timer to kick the UART
2192 * on a regular basis.
2194 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2195 up->port.flags & UPF_BUG_THRE) {
2196 up->bugs |= UART_BUG_THRE;
2197 pr_debug("ttyS%d - using backup timer\n",
2198 serial_index(port));
2203 * The above check will only give an accurate result the first time
2204 * the port is opened so this value needs to be preserved.
2206 if (up->bugs & UART_BUG_THRE) {
2207 up->timer.function = serial8250_backup_timeout;
2208 up->timer.data = (unsigned long)up;
2209 mod_timer(&up->timer, jiffies +
2210 uart_poll_timeout(port) + HZ / 5);
2214 * If the "interrupt" for this port doesn't correspond with any
2215 * hardware interrupt, we use a timer-based system. The original
2216 * driver used to do this with IRQ0.
2219 up->timer.data = (unsigned long)up;
2220 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2222 retval = serial_link_irq_chain(up);
2228 * Now, initialize the UART
2230 serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2232 spin_lock_irqsave(&port->lock, flags);
2233 if (up->port.flags & UPF_FOURPORT) {
2235 up->port.mctrl |= TIOCM_OUT1;
2238 * Most PC uarts need OUT2 raised to enable interrupts.
2241 up->port.mctrl |= TIOCM_OUT2;
2243 serial8250_set_mctrl(port, port->mctrl);
2245 /* Serial over Lan (SoL) hack:
2246 Intel 8257x Gigabit ethernet chips have a
2247 16550 emulation, to be used for Serial Over Lan.
2248 Those chips take a longer time than a normal
2249 serial device to signalize that a transmission
2250 data was queued. Due to that, the above test generally
2251 fails. One solution would be to delay the reading of
2252 iir. However, this is not reliable, since the timeout
2253 is variable. So, let's just don't test if we receive
2254 TX irq. This way, we'll never enable UART_BUG_TXEN.
2256 if (up->port.flags & UPF_NO_TXEN_TEST)
2257 goto dont_test_tx_en;
2260 * Do a quick test to see if we receive an
2261 * interrupt when we enable the TX irq.
2263 serial_port_out(port, UART_IER, UART_IER_THRI);
2264 lsr = serial_port_in(port, UART_LSR);
2265 iir = serial_port_in(port, UART_IIR);
2266 serial_port_out(port, UART_IER, 0);
2268 if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2269 if (!(up->bugs & UART_BUG_TXEN)) {
2270 up->bugs |= UART_BUG_TXEN;
2271 pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2272 serial_index(port));
2275 up->bugs &= ~UART_BUG_TXEN;
2279 spin_unlock_irqrestore(&port->lock, flags);
2282 * Clear the interrupt registers again for luck, and clear the
2283 * saved flags to avoid getting false values from polling
2284 * routines or the previous session.
2286 serial_port_in(port, UART_LSR);
2287 serial_port_in(port, UART_RX);
2288 serial_port_in(port, UART_IIR);
2289 serial_port_in(port, UART_MSR);
2290 up->lsr_saved_flags = 0;
2291 up->msr_saved_flags = 0;
2294 * Request DMA channels for both RX and TX.
2297 retval = serial8250_request_dma(up);
2299 pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2300 serial_index(port));
2306 * Finally, enable interrupts. Note: Modem status interrupts
2307 * are set via set_termios(), which will be occurring imminently
2308 * anyway, so we don't enable them here.
2310 up->ier = UART_IER_RLSI | UART_IER_RDI;
2311 serial_port_out(port, UART_IER, up->ier);
2313 if (port->flags & UPF_FOURPORT) {
2316 * Enable interrupts on the AST Fourport board
2318 icp = (port->iobase & 0xfe0) | 0x01f;
2324 serial8250_rpm_put(up);
2327 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2329 static int serial8250_startup(struct uart_port *port)
2332 return port->startup(port);
2333 return serial8250_do_startup(port);
2336 void serial8250_do_shutdown(struct uart_port *port)
2338 struct uart_8250_port *up = up_to_u8250p(port);
2339 unsigned long flags;
2341 serial8250_rpm_get(up);
2343 * Disable interrupts from this port
2346 serial_port_out(port, UART_IER, 0);
2349 serial8250_release_dma(up);
2351 spin_lock_irqsave(&port->lock, flags);
2352 if (port->flags & UPF_FOURPORT) {
2353 /* reset interrupts on the AST Fourport board */
2354 inb((port->iobase & 0xfe0) | 0x1f);
2355 port->mctrl |= TIOCM_OUT1;
2357 port->mctrl &= ~TIOCM_OUT2;
2359 serial8250_set_mctrl(port, port->mctrl);
2360 spin_unlock_irqrestore(&port->lock, flags);
2363 * Disable break condition and FIFOs
2365 serial_port_out(port, UART_LCR,
2366 serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2367 serial8250_clear_fifos(up);
2369 #ifdef CONFIG_SERIAL_8250_RSA
2371 * Reset the RSA board back to 115kbps compat mode.
2377 * Read data port to reset things, and then unlink from
2380 serial_port_in(port, UART_RX);
2381 serial8250_rpm_put(up);
2383 del_timer_sync(&up->timer);
2384 up->timer.function = serial8250_timeout;
2386 serial_unlink_irq_chain(up);
2388 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2390 static void serial8250_shutdown(struct uart_port *port)
2393 port->shutdown(port);
2395 serial8250_do_shutdown(port);
2399 * XR17V35x UARTs have an extra fractional divisor register (DLD)
2400 * Calculate divisor with extra 4-bit fractional portion
2402 static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2406 struct uart_port *port = &up->port;
2407 unsigned int quot_16;
2409 quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2410 *frac = quot_16 & 0x0f;
2412 return quot_16 >> 4;
2415 static unsigned int serial8250_get_divisor(struct uart_8250_port *up,
2419 struct uart_port *port = &up->port;
2423 * Handle magic divisors for baud rates above baud_base on
2424 * SMSC SuperIO chips.
2427 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2428 baud == (port->uartclk/4))
2430 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2431 baud == (port->uartclk/8))
2433 else if (up->port.type == PORT_XR17V35X)
2434 quot = xr17v35x_get_divisor(up, baud, frac);
2436 quot = uart_get_divisor(port, baud);
2439 * Oxford Semi 952 rev B workaround
2441 if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2447 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up,
2452 switch (c_cflag & CSIZE) {
2454 cval = UART_LCR_WLEN5;
2457 cval = UART_LCR_WLEN6;
2460 cval = UART_LCR_WLEN7;
2464 cval = UART_LCR_WLEN8;
2468 if (c_cflag & CSTOPB)
2469 cval |= UART_LCR_STOP;
2470 if (c_cflag & PARENB) {
2471 cval |= UART_LCR_PARITY;
2472 if (up->bugs & UART_BUG_PARITY)
2473 up->fifo_bug = true;
2475 if (!(c_cflag & PARODD))
2476 cval |= UART_LCR_EPAR;
2478 if (c_cflag & CMSPAR)
2479 cval |= UART_LCR_SPAR;
2485 static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
2486 unsigned int quot, unsigned int quot_frac)
2488 struct uart_8250_port *up = up_to_u8250p(port);
2490 /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2491 if (is_omap1510_8250(up)) {
2492 if (baud == 115200) {
2494 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2496 serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2500 * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2501 * otherwise just set DLAB
2503 if (up->capabilities & UART_NATSEMI)
2504 serial_port_out(port, UART_LCR, 0xe0);
2506 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
2508 serial_dl_write(up, quot);
2510 /* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2511 if (up->port.type == PORT_XR17V35X)
2512 serial_port_out(port, 0x2, quot_frac);
2516 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2517 struct ktermios *old)
2519 struct uart_8250_port *up = up_to_u8250p(port);
2521 unsigned long flags;
2522 unsigned int baud, quot, frac = 0;
2524 cval = serial8250_compute_lcr(up, termios->c_cflag);
2527 * Ask the core to calculate the divisor for us.
2529 baud = uart_get_baud_rate(port, termios, old,
2530 port->uartclk / 16 / 0xffff,
2531 port->uartclk / 16);
2532 quot = serial8250_get_divisor(up, baud, &frac);
2535 * Ok, we're now changing the port state. Do it with
2536 * interrupts disabled.
2538 serial8250_rpm_get(up);
2539 spin_lock_irqsave(&port->lock, flags);
2541 up->lcr = cval; /* Save computed LCR */
2543 if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2544 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2545 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2546 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2547 up->fcr |= UART_FCR_TRIGGER_1;
2552 * MCR-based auto flow control. When AFE is enabled, RTS will be
2553 * deasserted when the receive FIFO contains more characters than
2554 * the trigger, or the MCR RTS bit is cleared. In the case where
2555 * the remote UART is not using CTS auto flow control, we must
2556 * have sufficient FIFO entries for the latency of the remote
2557 * UART to respond. IOW, at least 32 bytes of FIFO.
2559 if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2560 up->mcr &= ~UART_MCR_AFE;
2561 if (termios->c_cflag & CRTSCTS)
2562 up->mcr |= UART_MCR_AFE;
2566 * Update the per-port timeout.
2568 uart_update_timeout(port, termios->c_cflag, baud);
2570 port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2571 if (termios->c_iflag & INPCK)
2572 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2573 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2574 port->read_status_mask |= UART_LSR_BI;
2577 * Characteres to ignore
2579 port->ignore_status_mask = 0;
2580 if (termios->c_iflag & IGNPAR)
2581 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2582 if (termios->c_iflag & IGNBRK) {
2583 port->ignore_status_mask |= UART_LSR_BI;
2585 * If we're ignoring parity and break indicators,
2586 * ignore overruns too (for real raw support).
2588 if (termios->c_iflag & IGNPAR)
2589 port->ignore_status_mask |= UART_LSR_OE;
2593 * ignore all characters if CREAD is not set
2595 if ((termios->c_cflag & CREAD) == 0)
2596 port->ignore_status_mask |= UART_LSR_DR;
2599 * CTS flow control flag and modem status interrupts
2601 up->ier &= ~UART_IER_MSI;
2602 if (!(up->bugs & UART_BUG_NOMSR) &&
2603 UART_ENABLE_MS(&up->port, termios->c_cflag))
2604 up->ier |= UART_IER_MSI;
2605 if (up->capabilities & UART_CAP_UUE)
2606 up->ier |= UART_IER_UUE;
2607 if (up->capabilities & UART_CAP_RTOIE)
2608 up->ier |= UART_IER_RTOIE;
2610 serial_port_out(port, UART_IER, up->ier);
2612 if (up->capabilities & UART_CAP_EFR) {
2613 unsigned char efr = 0;
2615 * TI16C752/Startech hardware flow control. FIXME:
2616 * - TI16C752 requires control thresholds to be set.
2617 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2619 if (termios->c_cflag & CRTSCTS)
2620 efr |= UART_EFR_CTS;
2622 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2623 if (port->flags & UPF_EXAR_EFR)
2624 serial_port_out(port, UART_XR_EFR, efr);
2626 serial_port_out(port, UART_EFR, efr);
2629 serial8250_set_divisor(port, baud, quot, frac);
2632 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2633 * is written without DLAB set, this mode will be disabled.
2635 if (port->type == PORT_16750)
2636 serial_port_out(port, UART_FCR, up->fcr);
2638 serial_port_out(port, UART_LCR, up->lcr); /* reset DLAB */
2639 if (port->type != PORT_16750) {
2640 /* emulated UARTs (Lucent Venus 167x) need two steps */
2641 if (up->fcr & UART_FCR_ENABLE_FIFO)
2642 serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2643 serial_port_out(port, UART_FCR, up->fcr); /* set fcr */
2645 serial8250_set_mctrl(port, port->mctrl);
2646 spin_unlock_irqrestore(&port->lock, flags);
2647 serial8250_rpm_put(up);
2649 /* Don't rewrite B0 */
2650 if (tty_termios_baud_rate(termios))
2651 tty_termios_encode_baud_rate(termios, baud, baud);
2653 EXPORT_SYMBOL(serial8250_do_set_termios);
2656 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2657 struct ktermios *old)
2659 if (port->set_termios)
2660 port->set_termios(port, termios, old);
2662 serial8250_do_set_termios(port, termios, old);
2666 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2668 if (termios->c_line == N_PPS) {
2669 port->flags |= UPF_HARDPPS_CD;
2670 spin_lock_irq(&port->lock);
2671 serial8250_enable_ms(port);
2672 spin_unlock_irq(&port->lock);
2674 port->flags &= ~UPF_HARDPPS_CD;
2675 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2676 spin_lock_irq(&port->lock);
2677 serial8250_disable_ms(port);
2678 spin_unlock_irq(&port->lock);
2684 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2685 unsigned int oldstate)
2687 struct uart_8250_port *p = up_to_u8250p(port);
2689 serial8250_set_sleep(p, state != 0);
2691 EXPORT_SYMBOL(serial8250_do_pm);
2694 serial8250_pm(struct uart_port *port, unsigned int state,
2695 unsigned int oldstate)
2698 port->pm(port, state, oldstate);
2700 serial8250_do_pm(port, state, oldstate);
2703 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2705 if (pt->port.iotype == UPIO_AU) {
2706 if (pt->port.type == PORT_RT2880)
2710 if (is_omap1_8250(pt))
2711 return 0x16 << pt->port.regshift;
2713 return 8 << pt->port.regshift;
2717 * Resource handling.
2719 static int serial8250_request_std_resource(struct uart_8250_port *up)
2721 unsigned int size = serial8250_port_size(up);
2722 struct uart_port *port = &up->port;
2725 switch (port->iotype) {
2733 if (!request_mem_region(port->mapbase, size, "serial")) {
2738 if (port->flags & UPF_IOREMAP) {
2739 port->membase = ioremap_nocache(port->mapbase, size);
2740 if (!port->membase) {
2741 release_mem_region(port->mapbase, size);
2749 if (!request_region(port->iobase, size, "serial"))
2756 static void serial8250_release_std_resource(struct uart_8250_port *up)
2758 unsigned int size = serial8250_port_size(up);
2759 struct uart_port *port = &up->port;
2761 switch (port->iotype) {
2769 if (port->flags & UPF_IOREMAP) {
2770 iounmap(port->membase);
2771 port->membase = NULL;
2774 release_mem_region(port->mapbase, size);
2779 release_region(port->iobase, size);
2784 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2786 unsigned long start = UART_RSA_BASE << up->port.regshift;
2787 unsigned int size = 8 << up->port.regshift;
2788 struct uart_port *port = &up->port;
2791 switch (port->iotype) {
2794 start += port->iobase;
2795 if (request_region(start, size, "serial-rsa"))
2805 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2807 unsigned long offset = UART_RSA_BASE << up->port.regshift;
2808 unsigned int size = 8 << up->port.regshift;
2809 struct uart_port *port = &up->port;
2811 switch (port->iotype) {
2814 release_region(port->iobase + offset, size);
2819 static void serial8250_release_port(struct uart_port *port)
2821 struct uart_8250_port *up = up_to_u8250p(port);
2823 serial8250_release_std_resource(up);
2824 if (port->type == PORT_RSA)
2825 serial8250_release_rsa_resource(up);
2828 static int serial8250_request_port(struct uart_port *port)
2830 struct uart_8250_port *up = up_to_u8250p(port);
2833 if (port->type == PORT_8250_CIR)
2836 ret = serial8250_request_std_resource(up);
2837 if (ret == 0 && port->type == PORT_RSA) {
2838 ret = serial8250_request_rsa_resource(up);
2840 serial8250_release_std_resource(up);
2846 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2848 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2849 unsigned char bytes;
2851 bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2853 return bytes ? bytes : -EOPNOTSUPP;
2856 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2858 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2861 if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2864 for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2865 if (bytes < conf_type->rxtrig_bytes[i])
2866 /* Use the nearest lower value */
2867 return (--i) << UART_FCR_R_TRIG_SHIFT;
2870 return UART_FCR_R_TRIG_11;
2873 static int do_get_rxtrig(struct tty_port *port)
2875 struct uart_state *state = container_of(port, struct uart_state, port);
2876 struct uart_port *uport = state->uart_port;
2877 struct uart_8250_port *up =
2878 container_of(uport, struct uart_8250_port, port);
2880 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2883 return fcr_get_rxtrig_bytes(up);
2886 static int do_serial8250_get_rxtrig(struct tty_port *port)
2890 mutex_lock(&port->mutex);
2891 rxtrig_bytes = do_get_rxtrig(port);
2892 mutex_unlock(&port->mutex);
2894 return rxtrig_bytes;
2897 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2898 struct device_attribute *attr, char *buf)
2900 struct tty_port *port = dev_get_drvdata(dev);
2903 rxtrig_bytes = do_serial8250_get_rxtrig(port);
2904 if (rxtrig_bytes < 0)
2905 return rxtrig_bytes;
2907 return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2910 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2912 struct uart_state *state = container_of(port, struct uart_state, port);
2913 struct uart_port *uport = state->uart_port;
2914 struct uart_8250_port *up =
2915 container_of(uport, struct uart_8250_port, port);
2918 if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2922 rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2926 serial8250_clear_fifos(up);
2927 up->fcr &= ~UART_FCR_TRIGGER_MASK;
2928 up->fcr |= (unsigned char)rxtrig;
2929 serial_out(up, UART_FCR, up->fcr);
2933 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2937 mutex_lock(&port->mutex);
2938 ret = do_set_rxtrig(port, bytes);
2939 mutex_unlock(&port->mutex);
2944 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2945 struct device_attribute *attr, const char *buf, size_t count)
2947 struct tty_port *port = dev_get_drvdata(dev);
2948 unsigned char bytes;
2954 ret = kstrtou8(buf, 10, &bytes);
2958 ret = do_serial8250_set_rxtrig(port, bytes);
2965 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2966 serial8250_get_attr_rx_trig_bytes,
2967 serial8250_set_attr_rx_trig_bytes);
2969 static struct attribute *serial8250_dev_attrs[] = {
2970 &dev_attr_rx_trig_bytes.attr,
2974 static struct attribute_group serial8250_dev_attr_group = {
2975 .attrs = serial8250_dev_attrs,
2978 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2980 const struct serial8250_config *conf_type = &uart_config[up->port.type];
2982 if (conf_type->rxtrig_bytes[0])
2983 up->port.attr_group = &serial8250_dev_attr_group;
2986 static void serial8250_config_port(struct uart_port *port, int flags)
2988 struct uart_8250_port *up = up_to_u8250p(port);
2989 int probeflags = PROBE_ANY;
2992 if (port->type == PORT_8250_CIR)
2996 * Find the region that we can probe for. This in turn
2997 * tells us whether we can probe for the type of port.
2999 ret = serial8250_request_std_resource(up);
3003 ret = serial8250_request_rsa_resource(up);
3005 probeflags &= ~PROBE_RSA;
3007 if (port->iotype != up->cur_iotype)
3008 set_io_from_upio(port);
3010 if (flags & UART_CONFIG_TYPE)
3011 autoconfig(up, probeflags);
3013 /* if access method is AU, it is a 16550 with a quirk */
3014 if (port->type == PORT_16550A && port->iotype == UPIO_AU)
3015 up->bugs |= UART_BUG_NOMSR;
3017 /* HW bugs may trigger IRQ while IIR == NO_INT */
3018 if (port->type == PORT_TEGRA)
3019 up->bugs |= UART_BUG_NOMSR;
3021 if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3024 if (port->type != PORT_RSA && probeflags & PROBE_RSA)
3025 serial8250_release_rsa_resource(up);
3026 if (port->type == PORT_UNKNOWN)
3027 serial8250_release_std_resource(up);
3029 /* Fixme: probably not the best place for this */
3030 if ((port->type == PORT_XR17V35X) ||
3031 (port->type == PORT_XR17D15X))
3032 port->handle_irq = exar_handle_irq;
3034 register_dev_spec_attr_grp(up);
3035 up->fcr = uart_config[up->port.type].fcr;
3039 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3041 if (ser->irq >= nr_irqs || ser->irq < 0 ||
3042 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3043 ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3044 ser->type == PORT_STARTECH)
3050 serial8250_type(struct uart_port *port)
3052 int type = port->type;
3054 if (type >= ARRAY_SIZE(uart_config))
3056 return uart_config[type].name;
3059 static struct uart_ops serial8250_pops = {
3060 .tx_empty = serial8250_tx_empty,
3061 .set_mctrl = serial8250_set_mctrl,
3062 .get_mctrl = serial8250_get_mctrl,
3063 .stop_tx = serial8250_stop_tx,
3064 .start_tx = serial8250_start_tx,
3065 .throttle = serial8250_throttle,
3066 .unthrottle = serial8250_unthrottle,
3067 .stop_rx = serial8250_stop_rx,
3068 .enable_ms = serial8250_enable_ms,
3069 .break_ctl = serial8250_break_ctl,
3070 .startup = serial8250_startup,
3071 .shutdown = serial8250_shutdown,
3072 .set_termios = serial8250_set_termios,
3073 .set_ldisc = serial8250_set_ldisc,
3074 .pm = serial8250_pm,
3075 .type = serial8250_type,
3076 .release_port = serial8250_release_port,
3077 .request_port = serial8250_request_port,
3078 .config_port = serial8250_config_port,
3079 .verify_port = serial8250_verify_port,
3080 #ifdef CONFIG_CONSOLE_POLL
3081 .poll_get_char = serial8250_get_poll_char,
3082 .poll_put_char = serial8250_put_poll_char,
3086 static struct uart_8250_port serial8250_ports[UART_NR];
3089 * serial8250_get_port - retrieve struct uart_8250_port
3090 * @line: serial line number
3092 * This function retrieves struct uart_8250_port for the specific line.
3093 * This struct *must* *not* be used to perform a 8250 or serial core operation
3094 * which is not accessible otherwise. Its only purpose is to make the struct
3095 * accessible to the runtime-pm callbacks for context suspend/restore.
3096 * The lock assumption made here is none because runtime-pm suspend/resume
3097 * callbacks should not be invoked if there is any operation performed on the
3100 struct uart_8250_port *serial8250_get_port(int line)
3102 return &serial8250_ports[line];
3104 EXPORT_SYMBOL_GPL(serial8250_get_port);
3106 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3107 unsigned short *capabilities);
3109 void serial8250_set_isa_configurator(
3110 void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3112 serial8250_isa_config = v;
3114 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3116 static void __init serial8250_isa_init_ports(void)
3118 struct uart_8250_port *up;
3119 static int first = 1;
3126 if (nr_uarts > UART_NR)
3129 for (i = 0; i < nr_uarts; i++) {
3130 struct uart_8250_port *up = &serial8250_ports[i];
3131 struct uart_port *port = &up->port;
3134 spin_lock_init(&port->lock);
3136 init_timer(&up->timer);
3137 up->timer.function = serial8250_timeout;
3138 up->cur_iotype = 0xFF;
3141 * ALPHA_KLUDGE_MCR needs to be killed.
3143 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3144 up->mcr_force = ALPHA_KLUDGE_MCR;
3146 port->ops = &serial8250_pops;
3150 irqflag = IRQF_SHARED;
3152 for (i = 0, up = serial8250_ports;
3153 i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3155 struct uart_port *port = &up->port;
3157 port->iobase = old_serial_port[i].port;
3158 port->irq = irq_canonicalize(old_serial_port[i].irq);
3159 port->irqflags = old_serial_port[i].irqflags;
3160 port->uartclk = old_serial_port[i].baud_base * 16;
3161 port->flags = old_serial_port[i].flags;
3162 port->hub6 = old_serial_port[i].hub6;
3163 port->membase = old_serial_port[i].iomem_base;
3164 port->iotype = old_serial_port[i].io_type;
3165 port->regshift = old_serial_port[i].iomem_reg_shift;
3166 set_io_from_upio(port);
3167 port->irqflags |= irqflag;
3168 if (serial8250_isa_config != NULL)
3169 serial8250_isa_config(i, &up->port, &up->capabilities);
3175 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3177 up->port.type = type;
3178 if (!up->port.fifosize)
3179 up->port.fifosize = uart_config[type].fifo_size;
3181 up->tx_loadsz = uart_config[type].tx_loadsz;
3182 if (!up->capabilities)
3183 up->capabilities = uart_config[type].flags;
3187 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3191 for (i = 0; i < nr_uarts; i++) {
3192 struct uart_8250_port *up = &serial8250_ports[i];
3200 up->port.flags |= UPF_NO_TXEN_TEST;
3202 if (up->port.flags & UPF_FIXED_TYPE)
3203 serial8250_init_fixed_type_port(up, up->port.type);
3205 uart_add_one_port(drv, &up->port);
3209 #ifdef CONFIG_SERIAL_8250_CONSOLE
3211 static void serial8250_console_putchar(struct uart_port *port, int ch)
3213 struct uart_8250_port *up = up_to_u8250p(port);
3215 wait_for_xmitr(up, UART_LSR_THRE);
3216 serial_port_out(port, UART_TX, ch);
3220 * Print a string to the serial port trying not to disturb
3221 * any possible real use of the port...
3223 * The console_lock must be held when we get here.
3226 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3228 struct uart_8250_port *up = &serial8250_ports[co->index];
3229 struct uart_port *port = &up->port;
3230 unsigned long flags;
3234 touch_nmi_watchdog();
3236 serial8250_rpm_get(up);
3240 else if (oops_in_progress)
3241 locked = spin_trylock_irqsave(&port->lock, flags);
3243 spin_lock_irqsave(&port->lock, flags);
3246 * First save the IER then disable the interrupts
3248 ier = serial_port_in(port, UART_IER);
3250 if (up->capabilities & UART_CAP_UUE)
3251 serial_port_out(port, UART_IER, UART_IER_UUE);
3253 serial_port_out(port, UART_IER, 0);
3255 /* check scratch reg to see if port powered off during system sleep */
3256 if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
3257 struct ktermios termios;
3258 unsigned int baud, quot, frac = 0;
3260 termios.c_cflag = port->cons->cflag;
3261 if (port->state->port.tty && termios.c_cflag == 0)
3262 termios.c_cflag = port->state->port.tty->termios.c_cflag;
3264 baud = uart_get_baud_rate(port, &termios, NULL,
3265 port->uartclk / 16 / 0xffff,
3266 port->uartclk / 16);
3267 quot = serial8250_get_divisor(up, baud, &frac);
3269 serial8250_set_divisor(port, baud, quot, frac);
3270 serial_port_out(port, UART_LCR, up->lcr);
3271 serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
3276 uart_console_write(port, s, count, serial8250_console_putchar);
3279 * Finally, wait for transmitter to become empty
3280 * and restore the IER
3282 wait_for_xmitr(up, BOTH_EMPTY);
3283 serial_port_out(port, UART_IER, ier);
3286 * The receive handling will happen properly because the
3287 * receive ready bit will still be set; it is not cleared
3288 * on read. However, modem control will not, we must
3289 * call it if we have saved something in the saved flags
3290 * while processing with interrupts off.
3292 if (up->msr_saved_flags)
3293 serial8250_modem_status(up);
3296 spin_unlock_irqrestore(&port->lock, flags);
3297 serial8250_rpm_put(up);
3300 static int serial8250_console_setup(struct console *co, char *options)
3302 struct uart_port *port;
3309 * Check whether an invalid uart number has been specified, and
3310 * if so, search for the first available port that does have
3313 if (co->index >= nr_uarts)
3315 port = &serial8250_ports[co->index].port;
3316 if (!port->iobase && !port->membase)
3320 uart_parse_options(options, &baud, &parity, &bits, &flow);
3322 return uart_set_options(port, co, baud, parity, bits, flow);
3325 static int serial8250_console_early_setup(void)
3327 return serial8250_find_port_for_earlycon();
3330 static struct console serial8250_console = {
3332 .write = serial8250_console_write,
3333 .device = uart_console_device,
3334 .setup = serial8250_console_setup,
3335 .early_setup = serial8250_console_early_setup,
3336 .flags = CON_PRINTBUFFER | CON_ANYTIME,
3338 .data = &serial8250_reg,
3341 static int __init serial8250_console_init(void)
3343 serial8250_isa_init_ports();
3344 register_console(&serial8250_console);
3347 console_initcall(serial8250_console_init);
3349 int serial8250_find_port(struct uart_port *p)
3352 struct uart_port *port;
3354 for (line = 0; line < nr_uarts; line++) {
3355 port = &serial8250_ports[line].port;
3356 if (uart_match_port(p, port))
3362 #define SERIAL8250_CONSOLE &serial8250_console
3364 #define SERIAL8250_CONSOLE NULL
3367 static struct uart_driver serial8250_reg = {
3368 .owner = THIS_MODULE,
3369 .driver_name = "serial",
3373 .cons = SERIAL8250_CONSOLE,
3377 * early_serial_setup - early registration for 8250 ports
3379 * Setup an 8250 port structure prior to console initialisation. Use
3380 * after console initialisation will cause undefined behaviour.
3382 int __init early_serial_setup(struct uart_port *port)
3384 struct uart_port *p;
3386 if (port->line >= ARRAY_SIZE(serial8250_ports))
3389 serial8250_isa_init_ports();
3390 p = &serial8250_ports[port->line].port;
3391 p->iobase = port->iobase;
3392 p->membase = port->membase;
3394 p->irqflags = port->irqflags;
3395 p->uartclk = port->uartclk;
3396 p->fifosize = port->fifosize;
3397 p->regshift = port->regshift;
3398 p->iotype = port->iotype;
3399 p->flags = port->flags;
3400 p->mapbase = port->mapbase;
3401 p->private_data = port->private_data;
3402 p->type = port->type;
3403 p->line = port->line;
3405 set_io_from_upio(p);
3406 if (port->serial_in)
3407 p->serial_in = port->serial_in;
3408 if (port->serial_out)
3409 p->serial_out = port->serial_out;
3410 if (port->handle_irq)
3411 p->handle_irq = port->handle_irq;
3417 * serial8250_suspend_port - suspend one serial port
3418 * @line: serial line number
3420 * Suspend one serial port.
3422 void serial8250_suspend_port(int line)
3424 struct uart_8250_port *up = &serial8250_ports[line];
3425 struct uart_port *port = &up->port;
3427 if (!console_suspend_enabled && uart_console(port) &&
3428 port->type != PORT_8250) {
3429 unsigned char canary = 0xa5;
3430 serial_out(up, UART_SCR, canary);
3431 up->canary = canary;
3434 uart_suspend_port(&serial8250_reg, port);
3438 * serial8250_resume_port - resume one serial port
3439 * @line: serial line number
3441 * Resume one serial port.
3443 void serial8250_resume_port(int line)
3445 struct uart_8250_port *up = &serial8250_ports[line];
3446 struct uart_port *port = &up->port;
3450 if (up->capabilities & UART_NATSEMI) {
3451 /* Ensure it's still in high speed mode */
3452 serial_port_out(port, UART_LCR, 0xE0);
3454 ns16550a_goto_highspeed(up);
3456 serial_port_out(port, UART_LCR, 0);
3457 port->uartclk = 921600*16;
3459 uart_resume_port(&serial8250_reg, port);
3463 * Register a set of serial devices attached to a platform device. The
3464 * list is terminated with a zero flags entry, which means we expect
3465 * all entries to have at least UPF_BOOT_AUTOCONF set.
3467 static int serial8250_probe(struct platform_device *dev)
3469 struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3470 struct uart_8250_port uart;
3471 int ret, i, irqflag = 0;
3473 memset(&uart, 0, sizeof(uart));
3476 irqflag = IRQF_SHARED;
3478 for (i = 0; p && p->flags != 0; p++, i++) {
3479 uart.port.iobase = p->iobase;
3480 uart.port.membase = p->membase;
3481 uart.port.irq = p->irq;
3482 uart.port.irqflags = p->irqflags;
3483 uart.port.uartclk = p->uartclk;
3484 uart.port.regshift = p->regshift;
3485 uart.port.iotype = p->iotype;
3486 uart.port.flags = p->flags;
3487 uart.port.mapbase = p->mapbase;
3488 uart.port.hub6 = p->hub6;
3489 uart.port.private_data = p->private_data;
3490 uart.port.type = p->type;
3491 uart.port.serial_in = p->serial_in;
3492 uart.port.serial_out = p->serial_out;
3493 uart.port.handle_irq = p->handle_irq;
3494 uart.port.handle_break = p->handle_break;
3495 uart.port.set_termios = p->set_termios;
3496 uart.port.pm = p->pm;
3497 uart.port.dev = &dev->dev;
3498 uart.port.irqflags |= irqflag;
3499 ret = serial8250_register_8250_port(&uart);
3501 dev_err(&dev->dev, "unable to register port at index %d "
3502 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3503 p->iobase, (unsigned long long)p->mapbase,
3511 * Remove serial ports registered against a platform device.
3513 static int serial8250_remove(struct platform_device *dev)
3517 for (i = 0; i < nr_uarts; i++) {
3518 struct uart_8250_port *up = &serial8250_ports[i];
3520 if (up->port.dev == &dev->dev)
3521 serial8250_unregister_port(i);
3526 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3530 for (i = 0; i < UART_NR; i++) {
3531 struct uart_8250_port *up = &serial8250_ports[i];
3533 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3534 uart_suspend_port(&serial8250_reg, &up->port);
3540 static int serial8250_resume(struct platform_device *dev)
3544 for (i = 0; i < UART_NR; i++) {
3545 struct uart_8250_port *up = &serial8250_ports[i];
3547 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3548 serial8250_resume_port(i);
3554 static struct platform_driver serial8250_isa_driver = {
3555 .probe = serial8250_probe,
3556 .remove = serial8250_remove,
3557 .suspend = serial8250_suspend,
3558 .resume = serial8250_resume,
3560 .name = "serial8250",
3565 * This "device" covers _all_ ISA 8250-compatible serial devices listed
3566 * in the table in include/asm/serial.h
3568 static struct platform_device *serial8250_isa_devs;
3571 * serial8250_register_8250_port and serial8250_unregister_port allows for
3572 * 16x50 serial ports to be configured at run-time, to support PCMCIA
3573 * modems and PCI multiport cards.
3575 static DEFINE_MUTEX(serial_mutex);
3577 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3582 * First, find a port entry which matches.
3584 for (i = 0; i < nr_uarts; i++)
3585 if (uart_match_port(&serial8250_ports[i].port, port))
3586 return &serial8250_ports[i];
3588 /* try line number first if still available */
3590 if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3591 serial8250_ports[i].port.iobase == 0)
3592 return &serial8250_ports[i];
3594 * We didn't find a matching entry, so look for the first
3595 * free entry. We look for one which hasn't been previously
3596 * used (indicated by zero iobase).
3598 for (i = 0; i < nr_uarts; i++)
3599 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3600 serial8250_ports[i].port.iobase == 0)
3601 return &serial8250_ports[i];
3604 * That also failed. Last resort is to find any entry which
3605 * doesn't have a real port associated with it.
3607 for (i = 0; i < nr_uarts; i++)
3608 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3609 return &serial8250_ports[i];
3615 * serial8250_register_8250_port - register a serial port
3616 * @up: serial port template
3618 * Configure the serial port specified by the request. If the
3619 * port exists and is in use, it is hung up and unregistered
3622 * The port is then probed and if necessary the IRQ is autodetected
3623 * If this fails an error is returned.
3625 * On success the port is ready to use and the line number is returned.
3627 int serial8250_register_8250_port(struct uart_8250_port *up)
3629 struct uart_8250_port *uart;
3632 if (up->port.uartclk == 0)
3635 mutex_lock(&serial_mutex);
3637 uart = serial8250_find_match_or_unused(&up->port);
3638 if (uart && uart->port.type != PORT_8250_CIR) {
3640 uart_remove_one_port(&serial8250_reg, &uart->port);
3642 uart->port.iobase = up->port.iobase;
3643 uart->port.membase = up->port.membase;
3644 uart->port.irq = up->port.irq;
3645 uart->port.irqflags = up->port.irqflags;
3646 uart->port.uartclk = up->port.uartclk;
3647 uart->port.fifosize = up->port.fifosize;
3648 uart->port.regshift = up->port.regshift;
3649 uart->port.iotype = up->port.iotype;
3650 uart->port.flags = up->port.flags | UPF_BOOT_AUTOCONF;
3651 uart->bugs = up->bugs;
3652 uart->port.mapbase = up->port.mapbase;
3653 uart->port.private_data = up->port.private_data;
3654 uart->port.fifosize = up->port.fifosize;
3655 uart->tx_loadsz = up->tx_loadsz;
3656 uart->capabilities = up->capabilities;
3657 uart->port.throttle = up->port.throttle;
3658 uart->port.unthrottle = up->port.unthrottle;
3659 uart->port.rs485_config = up->port.rs485_config;
3660 uart->port.rs485 = up->port.rs485;
3662 /* Take tx_loadsz from fifosize if it wasn't set separately */
3663 if (uart->port.fifosize && !uart->tx_loadsz)
3664 uart->tx_loadsz = uart->port.fifosize;
3667 uart->port.dev = up->port.dev;
3670 uart->port.flags |= UPF_NO_TXEN_TEST;
3672 if (up->port.flags & UPF_FIXED_TYPE)
3673 serial8250_init_fixed_type_port(uart, up->port.type);
3675 set_io_from_upio(&uart->port);
3676 /* Possibly override default I/O functions. */
3677 if (up->port.serial_in)
3678 uart->port.serial_in = up->port.serial_in;
3679 if (up->port.serial_out)
3680 uart->port.serial_out = up->port.serial_out;
3681 if (up->port.handle_irq)
3682 uart->port.handle_irq = up->port.handle_irq;
3683 /* Possibly override set_termios call */
3684 if (up->port.set_termios)
3685 uart->port.set_termios = up->port.set_termios;
3686 if (up->port.set_mctrl)
3687 uart->port.set_mctrl = up->port.set_mctrl;
3688 if (up->port.startup)
3689 uart->port.startup = up->port.startup;
3690 if (up->port.shutdown)
3691 uart->port.shutdown = up->port.shutdown;
3693 uart->port.pm = up->port.pm;
3694 if (up->port.handle_break)
3695 uart->port.handle_break = up->port.handle_break;
3697 uart->dl_read = up->dl_read;
3699 uart->dl_write = up->dl_write;
3701 uart->dma = up->dma;
3702 if (!uart->dma->tx_dma)
3703 uart->dma->tx_dma = serial8250_tx_dma;
3704 if (!uart->dma->rx_dma)
3705 uart->dma->rx_dma = serial8250_rx_dma;
3708 if (serial8250_isa_config != NULL)
3709 serial8250_isa_config(0, &uart->port,
3710 &uart->capabilities);
3712 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3714 ret = uart->port.line;
3716 mutex_unlock(&serial_mutex);
3720 EXPORT_SYMBOL(serial8250_register_8250_port);
3723 * serial8250_unregister_port - remove a 16x50 serial port at runtime
3724 * @line: serial line number
3726 * Remove one serial port. This may not be called from interrupt
3727 * context. We hand the port back to the our control.
3729 void serial8250_unregister_port(int line)
3731 struct uart_8250_port *uart = &serial8250_ports[line];
3733 mutex_lock(&serial_mutex);
3734 uart_remove_one_port(&serial8250_reg, &uart->port);
3735 if (serial8250_isa_devs) {
3736 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3738 uart->port.flags |= UPF_NO_TXEN_TEST;
3739 uart->port.type = PORT_UNKNOWN;
3740 uart->port.dev = &serial8250_isa_devs->dev;
3741 uart->capabilities = 0;
3742 uart_add_one_port(&serial8250_reg, &uart->port);
3744 uart->port.dev = NULL;
3746 mutex_unlock(&serial_mutex);
3748 EXPORT_SYMBOL(serial8250_unregister_port);
3750 static int __init serial8250_init(void)
3754 serial8250_isa_init_ports();
3756 printk(KERN_INFO "Serial: 8250/16550 driver, "
3757 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3758 share_irqs ? "en" : "dis");
3761 ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3763 serial8250_reg.nr = UART_NR;
3764 ret = uart_register_driver(&serial8250_reg);
3769 ret = serial8250_pnp_init();
3771 goto unreg_uart_drv;
3773 serial8250_isa_devs = platform_device_alloc("serial8250",
3774 PLAT8250_DEV_LEGACY);
3775 if (!serial8250_isa_devs) {
3780 ret = platform_device_add(serial8250_isa_devs);
3784 serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3786 ret = platform_driver_register(&serial8250_isa_driver);
3790 platform_device_del(serial8250_isa_devs);
3792 platform_device_put(serial8250_isa_devs);
3794 serial8250_pnp_exit();
3797 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3799 uart_unregister_driver(&serial8250_reg);
3805 static void __exit serial8250_exit(void)
3807 struct platform_device *isa_dev = serial8250_isa_devs;
3810 * This tells serial8250_unregister_port() not to re-register
3811 * the ports (thereby making serial8250_isa_driver permanently
3814 serial8250_isa_devs = NULL;
3816 platform_driver_unregister(&serial8250_isa_driver);
3817 platform_device_unregister(isa_dev);
3819 serial8250_pnp_exit();
3822 sunserial_unregister_minors(&serial8250_reg, UART_NR);
3824 uart_unregister_driver(&serial8250_reg);
3828 module_init(serial8250_init);
3829 module_exit(serial8250_exit);
3831 EXPORT_SYMBOL(serial8250_suspend_port);
3832 EXPORT_SYMBOL(serial8250_resume_port);
3834 MODULE_LICENSE("GPL");
3835 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3837 module_param(share_irqs, uint, 0644);
3838 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3841 module_param(nr_uarts, uint, 0644);
3842 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3844 module_param(skip_txen_test, uint, 0644);
3845 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3847 #ifdef CONFIG_SERIAL_8250_RSA
3848 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3849 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3851 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3853 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3855 /* This module was renamed to 8250_core in 3.7. Keep the old "8250" name
3856 * working as well for the module options so we don't break people. We
3857 * need to keep the names identical and the convenient macros will happily
3858 * refuse to let us do that by failing the build with redefinition errors
3859 * of global variables. So we stick them inside a dummy function to avoid
3860 * those conflicts. The options still get parsed, and the redefined
3861 * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3863 * This is hacky. I'm sorry.
3865 static void __used s8250_options(void)
3867 #undef MODULE_PARAM_PREFIX
3868 #define MODULE_PARAM_PREFIX "8250_core."
3870 module_param_cb(share_irqs, ¶m_ops_uint, &share_irqs, 0644);
3871 module_param_cb(nr_uarts, ¶m_ops_uint, &nr_uarts, 0644);
3872 module_param_cb(skip_txen_test, ¶m_ops_uint, &skip_txen_test, 0644);
3873 #ifdef CONFIG_SERIAL_8250_RSA
3874 __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3875 ¶m_array_ops, .arr = &__param_arr_probe_rsa,
3880 MODULE_ALIAS("8250_core");