2 * Marvell EBU Armada SoCs thermal sensor driver
4 * Copyright (C) 2013 Marvell
6 * This software is licensed under the terms of the GNU General Public
7 * License version 2, as published by the Free Software Foundation, and
8 * may be copied, distributed, and modified under those terms.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
16 #include <linux/device.h>
17 #include <linux/err.h>
19 #include <linux/kernel.h>
21 #include <linux/module.h>
22 #include <linux/delay.h>
23 #include <linux/platform_device.h>
24 #include <linux/of_device.h>
25 #include <linux/thermal.h>
26 #include <linux/iopoll.h>
28 /* Thermal Manager Control and Status Register */
29 #define PMU_TDC0_SW_RST_MASK (0x1 << 1)
30 #define PMU_TM_DISABLE_OFFS 0
31 #define PMU_TM_DISABLE_MASK (0x1 << PMU_TM_DISABLE_OFFS)
32 #define PMU_TDC0_REF_CAL_CNT_OFFS 11
33 #define PMU_TDC0_REF_CAL_CNT_MASK (0x1ff << PMU_TDC0_REF_CAL_CNT_OFFS)
34 #define PMU_TDC0_OTF_CAL_MASK (0x1 << 30)
35 #define PMU_TDC0_START_CAL_MASK (0x1 << 25)
37 #define A375_UNIT_CONTROL_SHIFT 27
38 #define A375_UNIT_CONTROL_MASK 0x7
39 #define A375_READOUT_INVERT BIT(15)
40 #define A375_HW_RESETn BIT(8)
43 #define LEGACY_CONTROL_MEM_LEN 0x4
45 /* Current bindings with the 2 control registers under the same memory area */
46 #define LEGACY_CONTROL1_OFFSET 0x0
47 #define CONTROL0_OFFSET 0x0
48 #define CONTROL1_OFFSET 0x4
51 #define CONTROL0_TSEN_TC_TRIM_MASK 0x7
52 #define CONTROL0_TSEN_TC_TRIM_VAL 0x3
54 #define CONTROL0_TSEN_START BIT(0)
55 #define CONTROL0_TSEN_RESET BIT(1)
56 #define CONTROL0_TSEN_ENABLE BIT(2)
57 #define CONTROL0_TSEN_AVG_BYPASS BIT(6)
58 #define CONTROL0_TSEN_OSR_SHIFT 24
59 #define CONTROL0_TSEN_OSR_MAX 0x3
61 #define CONTROL1_TSEN_AVG_SHIFT 0
62 #define CONTROL1_TSEN_AVG_MASK 0x7
63 #define CONTROL1_EXT_TSEN_SW_RESET BIT(7)
64 #define CONTROL1_EXT_TSEN_HW_RESETn BIT(8)
66 #define STATUS_POLL_PERIOD_US 1000
67 #define STATUS_POLL_TIMEOUT_US 100000
69 struct armada_thermal_data;
71 /* Marvell EBU Thermal Sensor Dev Structure */
72 struct armada_thermal_priv {
74 void __iomem *control0;
75 void __iomem *control1;
76 char zone_name[THERMAL_NAME_LENGTH];
77 struct armada_thermal_data *data;
80 struct armada_thermal_data {
81 /* Initialize the thermal IC */
82 void (*init)(struct platform_device *pdev,
83 struct armada_thermal_priv *priv);
85 /* Test for a valid sensor value (optional) */
86 bool (*is_valid)(struct armada_thermal_priv *);
88 /* Formula coeficients: temp = (b - m * reg) / div */
95 /* Register shift and mask to access the sensor temperature */
96 unsigned int temp_shift;
97 unsigned int temp_mask;
102 static void armadaxp_init(struct platform_device *pdev,
103 struct armada_thermal_priv *priv)
107 reg = readl_relaxed(priv->control1);
108 reg |= PMU_TDC0_OTF_CAL_MASK;
110 /* Reference calibration value */
111 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
112 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
114 /* Reset the sensor */
115 reg |= PMU_TDC0_SW_RST_MASK;
117 writel(reg, priv->control1);
119 /* Enable the sensor */
120 reg = readl_relaxed(priv->status);
121 reg &= ~PMU_TM_DISABLE_MASK;
122 writel(reg, priv->status);
125 static void armada370_init(struct platform_device *pdev,
126 struct armada_thermal_priv *priv)
130 reg = readl_relaxed(priv->control1);
131 reg |= PMU_TDC0_OTF_CAL_MASK;
133 /* Reference calibration value */
134 reg &= ~PMU_TDC0_REF_CAL_CNT_MASK;
135 reg |= (0xf1 << PMU_TDC0_REF_CAL_CNT_OFFS);
137 reg &= ~PMU_TDC0_START_CAL_MASK;
139 writel(reg, priv->control1);
144 static void armada375_init(struct platform_device *pdev,
145 struct armada_thermal_priv *priv)
149 reg = readl(priv->control1);
150 reg &= ~(A375_UNIT_CONTROL_MASK << A375_UNIT_CONTROL_SHIFT);
151 reg &= ~A375_READOUT_INVERT;
152 reg &= ~A375_HW_RESETn;
154 writel(reg, priv->control1);
157 reg |= A375_HW_RESETn;
158 writel(reg, priv->control1);
162 static void armada_wait_sensor_validity(struct armada_thermal_priv *priv)
166 readl_relaxed_poll_timeout(priv->status, reg,
167 reg & priv->data->is_valid_bit,
168 STATUS_POLL_PERIOD_US,
169 STATUS_POLL_TIMEOUT_US);
172 static void armada380_init(struct platform_device *pdev,
173 struct armada_thermal_priv *priv)
175 u32 reg = readl_relaxed(priv->control1);
177 /* Disable the HW/SW reset */
178 reg |= CONTROL1_EXT_TSEN_HW_RESETn;
179 reg &= ~CONTROL1_EXT_TSEN_SW_RESET;
180 writel(reg, priv->control1);
182 /* Set Tsen Tc Trim to correct default value (errata #132698) */
183 if (priv->control0) {
184 reg = readl_relaxed(priv->control0);
185 reg &= ~CONTROL0_TSEN_TC_TRIM_MASK;
186 reg |= CONTROL0_TSEN_TC_TRIM_VAL;
187 writel(reg, priv->control0);
190 /* Wait the sensors to be valid or the core will warn the user */
191 armada_wait_sensor_validity(priv);
194 static void armada_ap806_init(struct platform_device *pdev,
195 struct armada_thermal_priv *priv)
199 reg = readl_relaxed(priv->control0);
200 reg &= ~CONTROL0_TSEN_RESET;
201 reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE;
203 /* Sample every ~2ms */
204 reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT;
206 /* Enable average (2 samples by default) */
207 reg &= ~CONTROL0_TSEN_AVG_BYPASS;
209 writel(reg, priv->control0);
211 /* Wait the sensors to be valid or the core will warn the user */
212 armada_wait_sensor_validity(priv);
215 static void armada_cp110_init(struct platform_device *pdev,
216 struct armada_thermal_priv *priv)
220 armada380_init(pdev, priv);
222 /* Sample every ~2ms */
223 reg = readl_relaxed(priv->control0);
224 reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT;
225 writel(reg, priv->control0);
227 /* Average the output value over 2^1 = 2 samples */
228 reg = readl_relaxed(priv->control1);
229 reg &= ~CONTROL1_TSEN_AVG_MASK << CONTROL1_TSEN_AVG_SHIFT;
230 reg |= 1 << CONTROL1_TSEN_AVG_SHIFT;
231 writel(reg, priv->control1);
234 static bool armada_is_valid(struct armada_thermal_priv *priv)
236 u32 reg = readl_relaxed(priv->status);
238 return reg & priv->data->is_valid_bit;
241 static int armada_get_temp(struct thermal_zone_device *thermal,
244 struct armada_thermal_priv *priv = thermal->devdata;
249 if (priv->data->is_valid && !priv->data->is_valid(priv)) {
250 dev_err(&thermal->device,
251 "Temperature sensor reading not valid\n");
255 reg = readl_relaxed(priv->status);
256 reg = (reg >> priv->data->temp_shift) & priv->data->temp_mask;
257 if (priv->data->signed_sample)
258 /* The most significant bit is the sign bit */
259 sample = sign_extend32(reg, fls(priv->data->temp_mask) - 1);
263 /* Get formula coeficients */
264 b = priv->data->coef_b;
265 m = priv->data->coef_m;
266 div = priv->data->coef_div;
268 if (priv->data->inverted)
269 *temp = div_s64((m * sample) - b, div);
271 *temp = div_s64(b - (m * sample), div);
276 static struct thermal_zone_device_ops ops = {
277 .get_temp = armada_get_temp,
280 static const struct armada_thermal_data armadaxp_data = {
281 .init = armadaxp_init,
284 .coef_b = 3153000000ULL,
285 .coef_m = 10000000ULL,
289 static const struct armada_thermal_data armada370_data = {
290 .is_valid = armada_is_valid,
291 .init = armada370_init,
292 .is_valid_bit = BIT(9),
295 .coef_b = 3153000000ULL,
296 .coef_m = 10000000ULL,
300 static const struct armada_thermal_data armada375_data = {
301 .is_valid = armada_is_valid,
302 .init = armada375_init,
303 .is_valid_bit = BIT(10),
306 .coef_b = 3171900000ULL,
307 .coef_m = 10000000ULL,
309 .needs_control0 = true,
312 static const struct armada_thermal_data armada380_data = {
313 .is_valid = armada_is_valid,
314 .init = armada380_init,
315 .is_valid_bit = BIT(10),
318 .coef_b = 1172499100ULL,
319 .coef_m = 2000096ULL,
324 static const struct armada_thermal_data armada_ap806_data = {
325 .is_valid = armada_is_valid,
326 .init = armada_ap806_init,
327 .is_valid_bit = BIT(16),
334 .signed_sample = true,
335 .needs_control0 = true,
338 static const struct armada_thermal_data armada_cp110_data = {
339 .is_valid = armada_is_valid,
340 .init = armada_cp110_init,
341 .is_valid_bit = BIT(10),
344 .coef_b = 1172499100ULL,
345 .coef_m = 2000096ULL,
348 .needs_control0 = true,
351 static const struct of_device_id armada_thermal_id_table[] = {
353 .compatible = "marvell,armadaxp-thermal",
354 .data = &armadaxp_data,
357 .compatible = "marvell,armada370-thermal",
358 .data = &armada370_data,
361 .compatible = "marvell,armada375-thermal",
362 .data = &armada375_data,
365 .compatible = "marvell,armada380-thermal",
366 .data = &armada380_data,
369 .compatible = "marvell,armada-ap806-thermal",
370 .data = &armada_ap806_data,
373 .compatible = "marvell,armada-cp110-thermal",
374 .data = &armada_cp110_data,
380 MODULE_DEVICE_TABLE(of, armada_thermal_id_table);
382 static void armada_set_sane_name(struct platform_device *pdev,
383 struct armada_thermal_priv *priv)
385 const char *name = dev_name(&pdev->dev);
388 if (strlen(name) > THERMAL_NAME_LENGTH) {
390 * When inside a system controller, the device name has the
391 * form: f06f8000.system-controller:ap-thermal so stripping
392 * after the ':' should give us a shorter but meaningful name.
394 name = strrchr(name, ':');
396 name = "armada_thermal";
401 /* Save the name locally */
402 strncpy(priv->zone_name, name, THERMAL_NAME_LENGTH - 1);
403 priv->zone_name[THERMAL_NAME_LENGTH - 1] = '\0';
405 /* Then check there are no '-' or hwmon core will complain */
407 insane_char = strpbrk(priv->zone_name, "-");
410 } while (insane_char);
413 static int armada_thermal_probe(struct platform_device *pdev)
415 void __iomem *control = NULL;
416 struct thermal_zone_device *thermal;
417 const struct of_device_id *match;
418 struct armada_thermal_priv *priv;
419 struct resource *res;
421 match = of_match_device(armada_thermal_id_table, &pdev->dev);
425 priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
429 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
430 priv->status = devm_ioremap_resource(&pdev->dev, res);
431 if (IS_ERR(priv->status))
432 return PTR_ERR(priv->status);
434 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
435 control = devm_ioremap_resource(&pdev->dev, res);
437 return PTR_ERR(control);
439 priv->data = (struct armada_thermal_data *)match->data;
441 /* Ensure device name is correct for the thermal core */
442 armada_set_sane_name(pdev, priv);
445 * Legacy DT bindings only described "control1" register (also referred
446 * as "control MSB" on old documentation). New bindings cover
447 * "control0/control LSB" and "control1/control MSB" registers within
448 * the same resource, which is then of size 8 instead of 4.
450 if (resource_size(res) == LEGACY_CONTROL_MEM_LEN) {
451 /* ->control0 unavailable in this configuration */
452 if (priv->data->needs_control0) {
453 dev_err(&pdev->dev, "No access to control0 register\n");
457 priv->control1 = control + LEGACY_CONTROL1_OFFSET;
459 priv->control0 = control + CONTROL0_OFFSET;
460 priv->control1 = control + CONTROL1_OFFSET;
463 priv->data->init(pdev, priv);
465 thermal = thermal_zone_device_register(priv->zone_name, 0, 0, priv,
467 if (IS_ERR(thermal)) {
469 "Failed to register thermal zone device\n");
470 return PTR_ERR(thermal);
473 platform_set_drvdata(pdev, thermal);
478 static int armada_thermal_exit(struct platform_device *pdev)
480 struct thermal_zone_device *armada_thermal =
481 platform_get_drvdata(pdev);
483 thermal_zone_device_unregister(armada_thermal);
488 static struct platform_driver armada_thermal_driver = {
489 .probe = armada_thermal_probe,
490 .remove = armada_thermal_exit,
492 .name = "armada_thermal",
493 .of_match_table = armada_thermal_id_table,
497 module_platform_driver(armada_thermal_driver);
499 MODULE_AUTHOR("Ezequiel Garcia <ezequiel.garcia@free-electrons.com>");
500 MODULE_DESCRIPTION("Marvell EBU Armada SoCs thermal driver");
501 MODULE_LICENSE("GPL v2");