drivers/staging/iio/meter/ade7758_core.c

   1 /*
   2  * ADE7758 Poly Phase Multifunction Energy Metering IC driver
   3  *
   4  * Copyright 2010-2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/interrupt.h>
  10 #include <linux/irq.h>
  11 #include <linux/gpio.h>
  12 #include <linux/delay.h>
  13 #include <linux/mutex.h>
  14 #include <linux/device.h>
  15 #include <linux/kernel.h>
  16 #include <linux/spi/spi.h>
  17 #include <linux/slab.h>
  18 #include <linux/sysfs.h>
  19 #include <linux/list.h>
  20 #include <linux/module.h>
  21
  22 #include "../iio.h"
  23 #include "../sysfs.h"
  24 #include "../buffer_generic.h"
  25 #include "meter.h"
  26 #include "ade7758.h"
  27
  28 int ade7758_spi_write_reg_8(struct device *dev,
  29                 u8 reg_address,
  30                 u8 val)
  31 {
  32         int ret;
  33         struct iio_dev *indio_dev = dev_get_drvdata(dev);
  34         struct ade7758_state *st = iio_priv(indio_dev);
  35
  36         mutex_lock(&st->buf_lock);
  37         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  38         st->tx[1] = val;
  39
  40         ret = spi_write(st->us, st->tx, 2);
  41         mutex_unlock(&st->buf_lock);
  42
  43         return ret;
  44 }
  45
  46 static int ade7758_spi_write_reg_16(struct device *dev,
  47                 u8 reg_address,
  48                 u16 value)
  49 {
  50         int ret;
  51         struct spi_message msg;
  52         struct iio_dev *indio_dev = dev_get_drvdata(dev);
  53         struct ade7758_state *st = iio_priv(indio_dev);
  54         struct spi_transfer xfers[] = {
  55                 {
  56                         .tx_buf = st->tx,
  57                         .bits_per_word = 8,
  58                         .len = 3,
  59                 }
  60         };
  61
  62         mutex_lock(&st->buf_lock);
  63         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  64         st->tx[1] = (value >> 8) & 0xFF;
  65         st->tx[2] = value & 0xFF;
  66
  67         spi_message_init(&msg);
  68         spi_message_add_tail(xfers, &msg);
  69         ret = spi_sync(st->us, &msg);
  70         mutex_unlock(&st->buf_lock);
  71
  72         return ret;
  73 }
  74
  75 static int ade7758_spi_write_reg_24(struct device *dev,
  76                 u8 reg_address,
  77                 u32 value)
  78 {
  79         int ret;
  80         struct spi_message msg;
  81         struct iio_dev *indio_dev = dev_get_drvdata(dev);
  82         struct ade7758_state *st = iio_priv(indio_dev);
  83         struct spi_transfer xfers[] = {
  84                 {
  85                         .tx_buf = st->tx,
  86                         .bits_per_word = 8,
  87                         .len = 4,
  88                 }
  89         };
  90
  91         mutex_lock(&st->buf_lock);
  92         st->tx[0] = ADE7758_WRITE_REG(reg_address);
  93         st->tx[1] = (value >> 16) & 0xFF;
  94         st->tx[2] = (value >> 8) & 0xFF;
  95         st->tx[3] = value & 0xFF;
  96
  97         spi_message_init(&msg);
  98         spi_message_add_tail(xfers, &msg);
  99         ret = spi_sync(st->us, &msg);
 100         mutex_unlock(&st->buf_lock);
 101
 102         return ret;
 103 }
 104
 105 int ade7758_spi_read_reg_8(struct device *dev,
 106                 u8 reg_address,
 107                 u8 *val)
 108 {
 109         struct spi_message msg;
 110         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 111         struct ade7758_state *st = iio_priv(indio_dev);
 112         int ret;
 113         struct spi_transfer xfers[] = {
 114                 {
 115                         .tx_buf = st->tx,
 116                         .bits_per_word = 8,
 117                         .len = 1,
 118                         .delay_usecs = 4,
 119                 },
 120                 {
 121                         .tx_buf = &st->tx[1],
 122                         .rx_buf = st->rx,
 123                         .bits_per_word = 8,
 124                         .len = 1,
 125                 },
 126         };
 127
 128         mutex_lock(&st->buf_lock);
 129         st->tx[0] = ADE7758_READ_REG(reg_address);
 130         st->tx[1] = 0;
 131
 132         spi_message_init(&msg);
 133         spi_message_add_tail(&xfers[0], &msg);
 134         spi_message_add_tail(&xfers[1], &msg);
 135         ret = spi_sync(st->us, &msg);
 136         if (ret) {
 137                 dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
 138                                 reg_address);
 139                 goto error_ret;
 140         }
 141         *val = st->rx[0];
 142
 143 error_ret:
 144         mutex_unlock(&st->buf_lock);
 145         return ret;
 146 }
 147
 148 static int ade7758_spi_read_reg_16(struct device *dev,
 149                 u8 reg_address,
 150                 u16 *val)
 151 {
 152         struct spi_message msg;
 153         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 154         struct ade7758_state *st = iio_priv(indio_dev);
 155         int ret;
 156         struct spi_transfer xfers[] = {
 157                 {
 158                         .tx_buf = st->tx,
 159                         .bits_per_word = 8,
 160                         .len = 1,
 161                         .delay_usecs = 4,
 162                 },
 163                 {
 164                         .tx_buf = &st->tx[1],
 165                         .rx_buf = st->rx,
 166                         .bits_per_word = 8,
 167                         .len = 2,
 168                 },
 169         };
 170
 171
 172         mutex_lock(&st->buf_lock);
 173         st->tx[0] = ADE7758_READ_REG(reg_address);
 174         st->tx[1] = 0;
 175         st->tx[2] = 0;
 176
 177         spi_message_init(&msg);
 178         spi_message_add_tail(&xfers[0], &msg);
 179         spi_message_add_tail(&xfers[1], &msg);
 180         ret = spi_sync(st->us, &msg);
 181         if (ret) {
 182                 dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
 183                                 reg_address);
 184                 goto error_ret;
 185         }
 186
 187         *val = (st->rx[0] << 8) | st->rx[1];
 188
 189 error_ret:
 190         mutex_unlock(&st->buf_lock);
 191         return ret;
 192 }
 193
 194 static int ade7758_spi_read_reg_24(struct device *dev,
 195                 u8 reg_address,
 196                 u32 *val)
 197 {
 198         struct spi_message msg;
 199         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 200         struct ade7758_state *st = iio_priv(indio_dev);
 201         int ret;
 202         struct spi_transfer xfers[] = {
 203                 {
 204                         .tx_buf = st->tx,
 205                         .bits_per_word = 8,
 206                         .len = 1,
 207                         .delay_usecs = 4,
 208                 },
 209                 {
 210                         .tx_buf = &st->tx[1],
 211                         .rx_buf = st->rx,
 212                         .bits_per_word = 8,
 213                         .len = 3,
 214                 },
 215         };
 216
 217         mutex_lock(&st->buf_lock);
 218         st->tx[0] = ADE7758_READ_REG(reg_address);
 219         st->tx[1] = 0;
 220         st->tx[2] = 0;
 221         st->tx[3] = 0;
 222
 223         spi_message_init(&msg);
 224         spi_message_add_tail(&xfers[0], &msg);
 225         spi_message_add_tail(&xfers[1], &msg);
 226         ret = spi_sync(st->us, &msg);
 227         if (ret) {
 228                 dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
 229                                 reg_address);
 230                 goto error_ret;
 231         }
 232         *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
 233
 234 error_ret:
 235         mutex_unlock(&st->buf_lock);
 236         return ret;
 237 }
 238
 239 static ssize_t ade7758_read_8bit(struct device *dev,
 240                 struct device_attribute *attr,
 241                 char *buf)
 242 {
 243         int ret;
 244         u8 val = 0;
 245         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 246
 247         ret = ade7758_spi_read_reg_8(dev, this_attr->address, &val);
 248         if (ret)
 249                 return ret;
 250
 251         return sprintf(buf, "%u\n", val);
 252 }
 253
 254 static ssize_t ade7758_read_16bit(struct device *dev,
 255                 struct device_attribute *attr,
 256                 char *buf)
 257 {
 258         int ret;
 259         u16 val = 0;
 260         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 261
 262         ret = ade7758_spi_read_reg_16(dev, this_attr->address, &val);
 263         if (ret)
 264                 return ret;
 265
 266         return sprintf(buf, "%u\n", val);
 267 }
 268
 269 static ssize_t ade7758_read_24bit(struct device *dev,
 270                 struct device_attribute *attr,
 271                 char *buf)
 272 {
 273         int ret;
 274         u32 val = 0;
 275         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 276
 277         ret = ade7758_spi_read_reg_24(dev, this_attr->address, &val);
 278         if (ret)
 279                 return ret;
 280
 281         return sprintf(buf, "%u\n", val & 0xFFFFFF);
 282 }
 283
 284 static ssize_t ade7758_write_8bit(struct device *dev,
 285                 struct device_attribute *attr,
 286                 const char *buf,
 287                 size_t len)
 288 {
 289         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 290         int ret;
 291         long val;
 292
 293         ret = strict_strtol(buf, 10, &val);
 294         if (ret)
 295                 goto error_ret;
 296         ret = ade7758_spi_write_reg_8(dev, this_attr->address, val);
 297
 298 error_ret:
 299         return ret ? ret : len;
 300 }
 301
 302 static ssize_t ade7758_write_16bit(struct device *dev,
 303                 struct device_attribute *attr,
 304                 const char *buf,
 305                 size_t len)
 306 {
 307         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 308         int ret;
 309         long val;
 310
 311         ret = strict_strtol(buf, 10, &val);
 312         if (ret)
 313                 goto error_ret;
 314         ret = ade7758_spi_write_reg_16(dev, this_attr->address, val);
 315
 316 error_ret:
 317         return ret ? ret : len;
 318 }
 319
 320 static int ade7758_reset(struct device *dev)
 321 {
 322         int ret;
 323         u8 val;
 324         ade7758_spi_read_reg_8(dev,
 325                         ADE7758_OPMODE,
 326                         &val);
 327         val |= 1 << 6; /* Software Chip Reset */
 328         ret = ade7758_spi_write_reg_8(dev,
 329                         ADE7758_OPMODE,
 330                         val);
 331
 332         return ret;
 333 }
 334
 335 static ssize_t ade7758_write_reset(struct device *dev,
 336                 struct device_attribute *attr,
 337                 const char *buf, size_t len)
 338 {
 339         if (len < 1)
 340                 return -1;
 341         switch (buf[0]) {
 342         case '1':
 343         case 'y':
 344         case 'Y':
 345                 return ade7758_reset(dev);
 346         }
 347         return len;
 348 }
 349
 350 static IIO_DEV_ATTR_VPEAK(S_IWUSR | S_IRUGO,
 351                 ade7758_read_8bit,
 352                 ade7758_write_8bit,
 353                 ADE7758_VPEAK);
 354 static IIO_DEV_ATTR_IPEAK(S_IWUSR | S_IRUGO,
 355                 ade7758_read_8bit,
 356                 ade7758_write_8bit,
 357                 ADE7758_VPEAK);
 358 static IIO_DEV_ATTR_APHCAL(S_IWUSR | S_IRUGO,
 359                 ade7758_read_8bit,
 360                 ade7758_write_8bit,
 361                 ADE7758_APHCAL);
 362 static IIO_DEV_ATTR_BPHCAL(S_IWUSR | S_IRUGO,
 363                 ade7758_read_8bit,
 364                 ade7758_write_8bit,
 365                 ADE7758_BPHCAL);
 366 static IIO_DEV_ATTR_CPHCAL(S_IWUSR | S_IRUGO,
 367                 ade7758_read_8bit,
 368                 ade7758_write_8bit,
 369                 ADE7758_CPHCAL);
 370 static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
 371                 ade7758_read_8bit,
 372                 ade7758_write_8bit,
 373                 ADE7758_WDIV);
 374 static IIO_DEV_ATTR_VADIV(S_IWUSR | S_IRUGO,
 375                 ade7758_read_8bit,
 376                 ade7758_write_8bit,
 377                 ADE7758_VADIV);
 378 static IIO_DEV_ATTR_AIRMS(S_IRUGO,
 379                 ade7758_read_24bit,
 380                 NULL,
 381                 ADE7758_AIRMS);
 382 static IIO_DEV_ATTR_BIRMS(S_IRUGO,
 383                 ade7758_read_24bit,
 384                 NULL,
 385                 ADE7758_BIRMS);
 386 static IIO_DEV_ATTR_CIRMS(S_IRUGO,
 387                 ade7758_read_24bit,
 388                 NULL,
 389                 ADE7758_CIRMS);
 390 static IIO_DEV_ATTR_AVRMS(S_IRUGO,
 391                 ade7758_read_24bit,
 392                 NULL,
 393                 ADE7758_AVRMS);
 394 static IIO_DEV_ATTR_BVRMS(S_IRUGO,
 395                 ade7758_read_24bit,
 396                 NULL,
 397                 ADE7758_BVRMS);
 398 static IIO_DEV_ATTR_CVRMS(S_IRUGO,
 399                 ade7758_read_24bit,
 400                 NULL,
 401                 ADE7758_CVRMS);
 402 static IIO_DEV_ATTR_AIRMSOS(S_IWUSR | S_IRUGO,
 403                 ade7758_read_16bit,
 404                 ade7758_write_16bit,
 405                 ADE7758_AIRMSOS);
 406 static IIO_DEV_ATTR_BIRMSOS(S_IWUSR | S_IRUGO,
 407                 ade7758_read_16bit,
 408                 ade7758_write_16bit,
 409                 ADE7758_BIRMSOS);
 410 static IIO_DEV_ATTR_CIRMSOS(S_IWUSR | S_IRUGO,
 411                 ade7758_read_16bit,
 412                 ade7758_write_16bit,
 413                 ADE7758_CIRMSOS);
 414 static IIO_DEV_ATTR_AVRMSOS(S_IWUSR | S_IRUGO,
 415                 ade7758_read_16bit,
 416                 ade7758_write_16bit,
 417                 ADE7758_AVRMSOS);
 418 static IIO_DEV_ATTR_BVRMSOS(S_IWUSR | S_IRUGO,
 419                 ade7758_read_16bit,
 420                 ade7758_write_16bit,
 421                 ADE7758_BVRMSOS);
 422 static IIO_DEV_ATTR_CVRMSOS(S_IWUSR | S_IRUGO,
 423                 ade7758_read_16bit,
 424                 ade7758_write_16bit,
 425                 ADE7758_CVRMSOS);
 426 static IIO_DEV_ATTR_AIGAIN(S_IWUSR | S_IRUGO,
 427                 ade7758_read_16bit,
 428                 ade7758_write_16bit,
 429                 ADE7758_AIGAIN);
 430 static IIO_DEV_ATTR_BIGAIN(S_IWUSR | S_IRUGO,
 431                 ade7758_read_16bit,
 432                 ade7758_write_16bit,
 433                 ADE7758_BIGAIN);
 434 static IIO_DEV_ATTR_CIGAIN(S_IWUSR | S_IRUGO,
 435                 ade7758_read_16bit,
 436                 ade7758_write_16bit,
 437                 ADE7758_CIGAIN);
 438 static IIO_DEV_ATTR_AVRMSGAIN(S_IWUSR | S_IRUGO,
 439                 ade7758_read_16bit,
 440                 ade7758_write_16bit,
 441                 ADE7758_AVRMSGAIN);
 442 static IIO_DEV_ATTR_BVRMSGAIN(S_IWUSR | S_IRUGO,
 443                 ade7758_read_16bit,
 444                 ade7758_write_16bit,
 445                 ADE7758_BVRMSGAIN);
 446 static IIO_DEV_ATTR_CVRMSGAIN(S_IWUSR | S_IRUGO,
 447                 ade7758_read_16bit,
 448                 ade7758_write_16bit,
 449                 ADE7758_CVRMSGAIN);
 450
 451 int ade7758_set_irq(struct device *dev, bool enable)
 452 {
 453         int ret;
 454         u32 irqen;
 455         ret = ade7758_spi_read_reg_24(dev, ADE7758_MASK, &irqen);
 456         if (ret)
 457                 goto error_ret;
 458
 459         if (enable)
 460                 irqen |= 1 << 16; /* Enables an interrupt when a data is
 461                                      present in the waveform register */
 462         else
 463                 irqen &= ~(1 << 16);
 464
 465         ret = ade7758_spi_write_reg_24(dev, ADE7758_MASK, irqen);
 466         if (ret)
 467                 goto error_ret;
 468
 469 error_ret:
 470         return ret;
 471 }
 472
 473 /* Power down the device */
 474 static int ade7758_stop_device(struct device *dev)
 475 {
 476         int ret;
 477         u8 val;
 478         ade7758_spi_read_reg_8(dev,
 479                         ADE7758_OPMODE,
 480                         &val);
 481         val |= 7 << 3;  /* ADE7758 powered down */
 482         ret = ade7758_spi_write_reg_8(dev,
 483                         ADE7758_OPMODE,
 484                         val);
 485
 486         return ret;
 487 }
 488
 489 static int ade7758_initial_setup(struct iio_dev *indio_dev)
 490 {
 491         struct ade7758_state *st = iio_priv(indio_dev);
 492         struct device *dev = &indio_dev->dev;
 493         int ret;
 494
 495         /* use low spi speed for init */
 496         st->us->mode = SPI_MODE_1;
 497         spi_setup(st->us);
 498
 499         /* Disable IRQ */
 500         ret = ade7758_set_irq(dev, false);
 501         if (ret) {
 502                 dev_err(dev, "disable irq failed");
 503                 goto err_ret;
 504         }
 505
 506         ade7758_reset(dev);
 507         msleep(ADE7758_STARTUP_DELAY);
 508
 509 err_ret:
 510         return ret;
 511 }
 512
 513 static ssize_t ade7758_read_frequency(struct device *dev,
 514                 struct device_attribute *attr,
 515                 char *buf)
 516 {
 517         int ret, len = 0;
 518         u8 t;
 519         int sps;
 520         ret = ade7758_spi_read_reg_8(dev,
 521                         ADE7758_WAVMODE,
 522                         &t);
 523         if (ret)
 524                 return ret;
 525
 526         t = (t >> 5) & 0x3;
 527         sps = 26040 / (1 << t);
 528
 529         len = sprintf(buf, "%d SPS\n", sps);
 530         return len;
 531 }
 532
 533 static ssize_t ade7758_write_frequency(struct device *dev,
 534                 struct device_attribute *attr,
 535                 const char *buf,
 536                 size_t len)
 537 {
 538         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 539         unsigned long val;
 540         int ret;
 541         u8 reg, t;
 542
 543         ret = strict_strtol(buf, 10, &val);
 544         if (ret)
 545                 return ret;
 546
 547         mutex_lock(&indio_dev->mlock);
 548
 549         switch (val) {
 550         case 26040:
 551                 t = 0;
 552                 break;
 553         case 13020:
 554                 t = 1;
 555                 break;
 556         case 6510:
 557                 t = 2;
 558                 break;
 559         case 3255:
 560                 t = 3;
 561                 break;
 562         default:
 563                 ret = -EINVAL;
 564                 goto out;
 565         }
 566
 567         ret = ade7758_spi_read_reg_8(dev,
 568                         ADE7758_WAVMODE,
 569                         &reg);
 570         if (ret)
 571                 goto out;
 572
 573         reg &= ~(5 << 3);
 574         reg |= t << 5;
 575
 576         ret = ade7758_spi_write_reg_8(dev,
 577                         ADE7758_WAVMODE,
 578                         reg);
 579
 580 out:
 581         mutex_unlock(&indio_dev->mlock);
 582
 583         return ret ? ret : len;
 584 }
 585
 586 static IIO_DEV_ATTR_TEMP_RAW(ade7758_read_8bit);
 587 static IIO_CONST_ATTR(in_temp_offset, "129 C");
 588 static IIO_CONST_ATTR(in_temp_scale, "4 C");
 589
 590 static IIO_DEV_ATTR_AWATTHR(ade7758_read_16bit,
 591                 ADE7758_AWATTHR);
 592 static IIO_DEV_ATTR_BWATTHR(ade7758_read_16bit,
 593                 ADE7758_BWATTHR);
 594 static IIO_DEV_ATTR_CWATTHR(ade7758_read_16bit,
 595                 ADE7758_CWATTHR);
 596 static IIO_DEV_ATTR_AVARHR(ade7758_read_16bit,
 597                 ADE7758_AVARHR);
 598 static IIO_DEV_ATTR_BVARHR(ade7758_read_16bit,
 599                 ADE7758_BVARHR);
 600 static IIO_DEV_ATTR_CVARHR(ade7758_read_16bit,
 601                 ADE7758_CVARHR);
 602 static IIO_DEV_ATTR_AVAHR(ade7758_read_16bit,
 603                 ADE7758_AVAHR);
 604 static IIO_DEV_ATTR_BVAHR(ade7758_read_16bit,
 605                 ADE7758_BVAHR);
 606 static IIO_DEV_ATTR_CVAHR(ade7758_read_16bit,
 607                 ADE7758_CVAHR);
 608
 609 static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
 610                 ade7758_read_frequency,
 611                 ade7758_write_frequency);
 612
 613 static IIO_DEV_ATTR_RESET(ade7758_write_reset);
 614
 615 static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("26040 13020 6510 3255");
 616
 617 static struct attribute *ade7758_attributes[] = {
 618         &iio_dev_attr_in_temp_raw.dev_attr.attr,
 619         &iio_const_attr_in_temp_offset.dev_attr.attr,
 620         &iio_const_attr_in_temp_scale.dev_attr.attr,
 621         &iio_dev_attr_sampling_frequency.dev_attr.attr,
 622         &iio_const_attr_sampling_frequency_available.dev_attr.attr,
 623         &iio_dev_attr_reset.dev_attr.attr,
 624         &iio_dev_attr_awatthr.dev_attr.attr,
 625         &iio_dev_attr_bwatthr.dev_attr.attr,
 626         &iio_dev_attr_cwatthr.dev_attr.attr,
 627         &iio_dev_attr_avarhr.dev_attr.attr,
 628         &iio_dev_attr_bvarhr.dev_attr.attr,
 629         &iio_dev_attr_cvarhr.dev_attr.attr,
 630         &iio_dev_attr_avahr.dev_attr.attr,
 631         &iio_dev_attr_bvahr.dev_attr.attr,
 632         &iio_dev_attr_cvahr.dev_attr.attr,
 633         &iio_dev_attr_vpeak.dev_attr.attr,
 634         &iio_dev_attr_ipeak.dev_attr.attr,
 635         &iio_dev_attr_aphcal.dev_attr.attr,
 636         &iio_dev_attr_bphcal.dev_attr.attr,
 637         &iio_dev_attr_cphcal.dev_attr.attr,
 638         &iio_dev_attr_wdiv.dev_attr.attr,
 639         &iio_dev_attr_vadiv.dev_attr.attr,
 640         &iio_dev_attr_airms.dev_attr.attr,
 641         &iio_dev_attr_birms.dev_attr.attr,
 642         &iio_dev_attr_cirms.dev_attr.attr,
 643         &iio_dev_attr_avrms.dev_attr.attr,
 644         &iio_dev_attr_bvrms.dev_attr.attr,
 645         &iio_dev_attr_cvrms.dev_attr.attr,
 646         &iio_dev_attr_aigain.dev_attr.attr,
 647         &iio_dev_attr_bigain.dev_attr.attr,
 648         &iio_dev_attr_cigain.dev_attr.attr,
 649         &iio_dev_attr_avrmsgain.dev_attr.attr,
 650         &iio_dev_attr_bvrmsgain.dev_attr.attr,
 651         &iio_dev_attr_cvrmsgain.dev_attr.attr,
 652         &iio_dev_attr_airmsos.dev_attr.attr,
 653         &iio_dev_attr_birmsos.dev_attr.attr,
 654         &iio_dev_attr_cirmsos.dev_attr.attr,
 655         &iio_dev_attr_avrmsos.dev_attr.attr,
 656         &iio_dev_attr_bvrmsos.dev_attr.attr,
 657         &iio_dev_attr_cvrmsos.dev_attr.attr,
 658         NULL,
 659 };
 660
 661 static const struct attribute_group ade7758_attribute_group = {
 662         .attrs = ade7758_attributes,
 663 };
 664
 665 static struct iio_chan_spec ade7758_channels[] = {
 666         IIO_CHAN(IIO_IN, 0, 1, 0, "raw", 0, 0,
 667                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 668                 AD7758_WT(AD7758_PHASE_A, AD7758_VOLTAGE),
 669                 0, IIO_ST('s', 24, 32, 0), 0),
 670         IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 0, 0,
 671                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 672                 AD7758_WT(AD7758_PHASE_A, AD7758_CURRENT),
 673                 1, IIO_ST('s', 24, 32, 0), 0),
 674         IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 0, 0,
 675                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 676                 AD7758_WT(AD7758_PHASE_A, AD7758_APP_PWR),
 677                 2, IIO_ST('s', 24, 32, 0), 0),
 678         IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 0, 0,
 679                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 680                 AD7758_WT(AD7758_PHASE_A, AD7758_ACT_PWR),
 681                 3, IIO_ST('s', 24, 32, 0), 0),
 682         IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 0, 0,
 683                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 684                 AD7758_WT(AD7758_PHASE_A, AD7758_REACT_PWR),
 685                 4, IIO_ST('s', 24, 32, 0), 0),
 686         IIO_CHAN(IIO_IN, 0, 1, 0, "raw", 1, 0,
 687                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 688                 AD7758_WT(AD7758_PHASE_B, AD7758_VOLTAGE),
 689                 5, IIO_ST('s', 24, 32, 0), 0),
 690         IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 1, 0,
 691                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 692                 AD7758_WT(AD7758_PHASE_B, AD7758_CURRENT),
 693                 6, IIO_ST('s', 24, 32, 0), 0),
 694         IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 1, 0,
 695                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 696                 AD7758_WT(AD7758_PHASE_B, AD7758_APP_PWR),
 697                 7, IIO_ST('s', 24, 32, 0), 0),
 698         IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 1, 0,
 699                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 700                 AD7758_WT(AD7758_PHASE_B, AD7758_ACT_PWR),
 701                 8, IIO_ST('s', 24, 32, 0), 0),
 702         IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 1, 0,
 703                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 704                 AD7758_WT(AD7758_PHASE_B, AD7758_REACT_PWR),
 705                 9, IIO_ST('s', 24, 32, 0), 0),
 706         IIO_CHAN(IIO_IN, 0, 1, 0, "raw", 2, 0,
 707                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 708                 AD7758_WT(AD7758_PHASE_C, AD7758_VOLTAGE),
 709                 10, IIO_ST('s', 24, 32, 0), 0),
 710         IIO_CHAN(IIO_CURRENT, 0, 1, 0, "raw", 2, 0,
 711                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 712                 AD7758_WT(AD7758_PHASE_C, AD7758_CURRENT),
 713                 11, IIO_ST('s', 24, 32, 0), 0),
 714         IIO_CHAN(IIO_POWER, 0, 1, 0, "apparent_raw", 2, 0,
 715                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 716                 AD7758_WT(AD7758_PHASE_C, AD7758_APP_PWR),
 717                 12, IIO_ST('s', 24, 32, 0), 0),
 718         IIO_CHAN(IIO_POWER, 0, 1, 0, "active_raw", 2, 0,
 719                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 720                 AD7758_WT(AD7758_PHASE_C, AD7758_ACT_PWR),
 721                 13, IIO_ST('s', 24, 32, 0), 0),
 722         IIO_CHAN(IIO_POWER, 0, 1, 0, "reactive_raw", 2, 0,
 723                 (1 << IIO_CHAN_INFO_SCALE_SHARED),
 724                 AD7758_WT(AD7758_PHASE_C, AD7758_REACT_PWR),
 725                 14, IIO_ST('s', 24, 32, 0), 0),
 726         IIO_CHAN_SOFT_TIMESTAMP(15),
 727 };
 728
 729 static const struct iio_info ade7758_info = {
 730         .attrs = &ade7758_attribute_group,
 731         .driver_module = THIS_MODULE,
 732 };
 733
 734 static int __devinit ade7758_probe(struct spi_device *spi)
 735 {
 736         int i, ret;
 737         struct ade7758_state *st;
 738         struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st));
 739
 740         if (indio_dev == NULL) {
 741                 ret = -ENOMEM;
 742                 goto error_ret;
 743         }
 744
 745         st = iio_priv(indio_dev);
 746         /* this is only used for removal purposes */
 747         spi_set_drvdata(spi, indio_dev);
 748
 749         /* Allocate the comms buffers */
 750         st->rx = kzalloc(sizeof(*st->rx)*ADE7758_MAX_RX, GFP_KERNEL);
 751         if (st->rx == NULL) {
 752                 ret = -ENOMEM;
 753                 goto error_free_dev;
 754         }
 755         st->tx = kzalloc(sizeof(*st->tx)*ADE7758_MAX_TX, GFP_KERNEL);
 756         if (st->tx == NULL) {
 757                 ret = -ENOMEM;
 758                 goto error_free_rx;
 759         }
 760         st->us = spi;
 761         st->ade7758_ring_channels = &ade7758_channels[0];
 762         mutex_init(&st->buf_lock);
 763
 764         indio_dev->name = spi->dev.driver->name;
 765         indio_dev->dev.parent = &spi->dev;
 766         indio_dev->info = &ade7758_info;
 767         indio_dev->modes = INDIO_DIRECT_MODE;
 768
 769         for (i = 0; i < AD7758_NUM_WAVESRC; i++)
 770                 set_bit(i, &st->available_scan_masks[i]);
 771
 772         indio_dev->available_scan_masks = st->available_scan_masks;
 773
 774         ret = ade7758_configure_ring(indio_dev);
 775         if (ret)
 776                 goto error_free_tx;
 777
 778         ret = iio_buffer_register(indio_dev,
 779                                   &ade7758_channels[0],
 780                                   ARRAY_SIZE(ade7758_channels));
 781         if (ret) {
 782                 dev_err(&spi->dev, "failed to initialize the ring\n");
 783                 goto error_unreg_ring_funcs;
 784         }
 785
 786         /* Get the device into a sane initial state */
 787         ret = ade7758_initial_setup(indio_dev);
 788         if (ret)
 789                 goto error_uninitialize_ring;
 790
 791         if (spi->irq) {
 792                 ret = ade7758_probe_trigger(indio_dev);
 793                 if (ret)
 794                         goto error_uninitialize_ring;
 795         }
 796
 797         ret = iio_device_register(indio_dev);
 798         if (ret)
 799                 goto error_remove_trigger;
 800
 801         return 0;
 802
 803 error_remove_trigger:
 804         if (indio_dev->modes & INDIO_BUFFER_TRIGGERED)
 805                 ade7758_remove_trigger(indio_dev);
 806 error_uninitialize_ring:
 807         ade7758_uninitialize_ring(indio_dev);
 808 error_unreg_ring_funcs:
 809         ade7758_unconfigure_ring(indio_dev);
 810 error_free_tx:
 811         kfree(st->tx);
 812 error_free_rx:
 813         kfree(st->rx);
 814 error_free_dev:
 815         iio_free_device(indio_dev);
 816 error_ret:
 817         return ret;
 818 }
 819
 820 static int ade7758_remove(struct spi_device *spi)
 821 {
 822         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 823         struct ade7758_state *st = iio_priv(indio_dev);
 824         int ret;
 825
 826         ret = ade7758_stop_device(&indio_dev->dev);
 827         if (ret)
 828                 goto err_ret;
 829
 830         ade7758_remove_trigger(indio_dev);
 831         ade7758_uninitialize_ring(indio_dev);
 832         ade7758_unconfigure_ring(indio_dev);
 833         kfree(st->tx);
 834         kfree(st->rx);
 835         iio_device_unregister(indio_dev);
 836
 837         return 0;
 838 err_ret:
 839         return ret;
 840 }
 841
 842 static const struct spi_device_id ade7758_id[] = {
 843         {"ade7758", 0},
 844         {}
 845 };
 846
 847 static struct spi_driver ade7758_driver = {
 848         .driver = {
 849                 .name = "ade7758",
 850                 .owner = THIS_MODULE,
 851         },
 852         .probe = ade7758_probe,
 853         .remove = __devexit_p(ade7758_remove),
 854         .id_table = ade7758_id,
 855 };
 856
 857 static __init int ade7758_init(void)
 858 {
 859         return spi_register_driver(&ade7758_driver);
 860 }
 861 module_init(ade7758_init);
 862
 863 static __exit void ade7758_exit(void)
 864 {
 865         spi_unregister_driver(&ade7758_driver);
 866 }
 867 module_exit(ade7758_exit);
 868
 869 MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
 870 MODULE_DESCRIPTION("Analog Devices ADE7758 Polyphase Multifunction Energy Metering IC Driver");
 871 MODULE_LICENSE("GPL v2");