drivers/staging/iio/adc/ad7280a.c

   1 /*
   2  * AD7280A Lithium Ion Battery Monitoring System
   3  *
   4  * Copyright 2011 Analog Devices Inc.
   5  *
   6  * Licensed under the GPL-2.
   7  */
   8
   9 #include <linux/device.h>
  10 #include <linux/kernel.h>
  11 #include <linux/slab.h>
  12 #include <linux/sysfs.h>
  13 #include <linux/spi/spi.h>
  14 #include <linux/err.h>
  15 #include <linux/delay.h>
  16 #include <linux/interrupt.h>
  17 #include <linux/module.h>
  18
  19 #include "../iio.h"
  20 #include "../sysfs.h"
  21
  22 #include "ad7280a.h"
  23
  24 /* Registers */
  25 #define AD7280A_CELL_VOLTAGE_1          0x0  /* D11 to D0, Read only */
  26 #define AD7280A_CELL_VOLTAGE_2          0x1  /* D11 to D0, Read only */
  27 #define AD7280A_CELL_VOLTAGE_3          0x2  /* D11 to D0, Read only */
  28 #define AD7280A_CELL_VOLTAGE_4          0x3  /* D11 to D0, Read only */
  29 #define AD7280A_CELL_VOLTAGE_5          0x4  /* D11 to D0, Read only */
  30 #define AD7280A_CELL_VOLTAGE_6          0x5  /* D11 to D0, Read only */
  31 #define AD7280A_AUX_ADC_1               0x6  /* D11 to D0, Read only */
  32 #define AD7280A_AUX_ADC_2               0x7  /* D11 to D0, Read only */
  33 #define AD7280A_AUX_ADC_3               0x8  /* D11 to D0, Read only */
  34 #define AD7280A_AUX_ADC_4               0x9  /* D11 to D0, Read only */
  35 #define AD7280A_AUX_ADC_5               0xA  /* D11 to D0, Read only */
  36 #define AD7280A_AUX_ADC_6               0xB  /* D11 to D0, Read only */
  37 #define AD7280A_SELF_TEST               0xC  /* D11 to D0, Read only */
  38 #define AD7280A_CONTROL_HB              0xD  /* D15 to D8, Read/write */
  39 #define AD7280A_CONTROL_LB              0xE  /* D7 to D0, Read/write */
  40 #define AD7280A_CELL_OVERVOLTAGE        0xF  /* D7 to D0, Read/write */
  41 #define AD7280A_CELL_UNDERVOLTAGE       0x10 /* D7 to D0, Read/write */
  42 #define AD7280A_AUX_ADC_OVERVOLTAGE     0x11 /* D7 to D0, Read/write */
  43 #define AD7280A_AUX_ADC_UNDERVOLTAGE    0x12 /* D7 to D0, Read/write */
  44 #define AD7280A_ALERT                   0x13 /* D7 to D0, Read/write */
  45 #define AD7280A_CELL_BALANCE            0x14 /* D7 to D0, Read/write */
  46 #define AD7280A_CB1_TIMER               0x15 /* D7 to D0, Read/write */
  47 #define AD7280A_CB2_TIMER               0x16 /* D7 to D0, Read/write */
  48 #define AD7280A_CB3_TIMER               0x17 /* D7 to D0, Read/write */
  49 #define AD7280A_CB4_TIMER               0x18 /* D7 to D0, Read/write */
  50 #define AD7280A_CB5_TIMER               0x19 /* D7 to D0, Read/write */
  51 #define AD7280A_CB6_TIMER               0x1A /* D7 to D0, Read/write */
  52 #define AD7280A_PD_TIMER                0x1B /* D7 to D0, Read/write */
  53 #define AD7280A_READ                    0x1C /* D7 to D0, Read/write */
  54 #define AD7280A_CNVST_CONTROL           0x1D /* D7 to D0, Read/write */
  55
  56 /* Bits and Masks */
  57 #define AD7280A_CTRL_HB_CONV_INPUT_ALL                  (0 << 6)
  58 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4       (1 << 6)
  59 #define AD7280A_CTRL_HB_CONV_INPUT_6CELL                (2 << 6)
  60 #define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST            (3 << 6)
  61 #define AD7280A_CTRL_HB_CONV_RES_READ_ALL               (0 << 4)
  62 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4    (1 << 4)
  63 #define AD7280A_CTRL_HB_CONV_RES_READ_6CELL             (2 << 4)
  64 #define AD7280A_CTRL_HB_CONV_RES_READ_NO                (3 << 4)
  65 #define AD7280A_CTRL_HB_CONV_START_CNVST                (0 << 3)
  66 #define AD7280A_CTRL_HB_CONV_START_CS                   (1 << 3)
  67 #define AD7280A_CTRL_HB_CONV_AVG_DIS                    (0 << 1)
  68 #define AD7280A_CTRL_HB_CONV_AVG_2                      (1 << 1)
  69 #define AD7280A_CTRL_HB_CONV_AVG_4                      (2 << 1)
  70 #define AD7280A_CTRL_HB_CONV_AVG_8                      (3 << 1)
  71 #define AD7280A_CTRL_HB_CONV_AVG(x)                     ((x) << 1)
  72 #define AD7280A_CTRL_HB_PWRDN_SW                        (1 << 0)
  73
  74 #define AD7280A_CTRL_LB_SWRST                           (1 << 7)
  75 #define AD7280A_CTRL_LB_ACQ_TIME_400ns                  (0 << 5)
  76 #define AD7280A_CTRL_LB_ACQ_TIME_800ns                  (1 << 5)
  77 #define AD7280A_CTRL_LB_ACQ_TIME_1200ns                 (2 << 5)
  78 #define AD7280A_CTRL_LB_ACQ_TIME_1600ns                 (3 << 5)
  79 #define AD7280A_CTRL_LB_ACQ_TIME(x)                     ((x) << 5)
  80 #define AD7280A_CTRL_LB_MUST_SET                        (1 << 4)
  81 #define AD7280A_CTRL_LB_THERMISTOR_EN                   (1 << 3)
  82 #define AD7280A_CTRL_LB_LOCK_DEV_ADDR                   (1 << 2)
  83 #define AD7280A_CTRL_LB_INC_DEV_ADDR                    (1 << 1)
  84 #define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN               (1 << 0)
  85
  86 #define AD7280A_ALERT_GEN_STATIC_HIGH                   (1 << 6)
  87 #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN              (3 << 6)
  88
  89 #define AD7280A_ALL_CELLS                               (0xAD << 16)
  90
  91 #define AD7280A_MAX_SPI_CLK_Hz          700000 /* < 1MHz */
  92 #define AD7280A_MAX_CHAIN               8
  93 #define AD7280A_CELLS_PER_DEV           6
  94 #define AD7280A_BITS                    12
  95 #define AD7280A_NUM_CH                  (AD7280A_AUX_ADC_6 - \
  96                                         AD7280A_CELL_VOLTAGE_1 + 1)
  97
  98 #define AD7280A_DEVADDR_MASTER          0
  99 #define AD7280A_DEVADDR_ALL             0x1F
 100 /* 5-bit device address is sent LSB first */
 101 #define AD7280A_DEVADDR(addr)   (((addr & 0x1) << 4) | ((addr & 0x2) << 3) | \
 102                                 (addr & 0x4) | ((addr & 0x8) >> 3) | \
 103                                 ((addr & 0x10) >> 4))
 104
 105 /* During a read a valid write is mandatory.
 106  * So writing to the highest available address (Address 0x1F)
 107  * and setting the address all parts bit to 0 is recommended
 108  * So the TXVAL is AD7280A_DEVADDR_ALL + CRC
 109  */
 110 #define AD7280A_READ_TXVAL      0xF800030A
 111
 112 /*
 113  * AD7280 CRC
 114  *
 115  * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F
 116  */
 117 #define POLYNOM         0x2F
 118 #define POLYNOM_ORDER   8
 119 #define HIGHBIT         1 << (POLYNOM_ORDER - 1);
 120
 121 struct ad7280_state {
 122         struct spi_device               *spi;
 123         struct iio_chan_spec            *channels;
 124         struct iio_dev_attr             *iio_attr;
 125         int                             slave_num;
 126         int                             scan_cnt;
 127         int                             readback_delay_us;
 128         unsigned char                   crc_tab[256];
 129         unsigned char                   ctrl_hb;
 130         unsigned char                   ctrl_lb;
 131         unsigned char                   cell_threshhigh;
 132         unsigned char                   cell_threshlow;
 133         unsigned char                   aux_threshhigh;
 134         unsigned char                   aux_threshlow;
 135         unsigned char                   cb_mask[AD7280A_MAX_CHAIN];
 136 };
 137
 138 static void ad7280_crc8_build_table(unsigned char *crc_tab)
 139 {
 140         unsigned char bit, crc;
 141         int cnt, i;
 142
 143         for (cnt = 0; cnt < 256; cnt++) {
 144                 crc = cnt;
 145                 for (i = 0; i < 8; i++) {
 146                         bit = crc & HIGHBIT;
 147                         crc <<= 1;
 148                         if (bit)
 149                                 crc ^= POLYNOM;
 150                 }
 151                 crc_tab[cnt] = crc;
 152         }
 153 }
 154
 155 static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned val)
 156 {
 157         unsigned char crc;
 158
 159         crc = crc_tab[val >> 16 & 0xFF];
 160         crc = crc_tab[crc ^ (val >> 8 & 0xFF)];
 161
 162         return  crc ^ (val & 0xFF);
 163 }
 164
 165 static int ad7280_check_crc(struct ad7280_state *st, unsigned val)
 166 {
 167         unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10);
 168
 169         if (crc != ((val >> 2) & 0xFF))
 170                 return -EIO;
 171
 172         return 0;
 173 }
 174
 175 /* After initiating a conversion sequence we need to wait until the
 176  * conversion is done. The delay is typically in the range of 15..30 us
 177  * however depending an the number of devices in the daisy chain and the
 178  * number of averages taken, conversion delays and acquisition time options
 179  * it may take up to 250us, in this case we better sleep instead of busy
 180  * wait.
 181  */
 182
 183 static void ad7280_delay(struct ad7280_state *st)
 184 {
 185         if (st->readback_delay_us < 50)
 186                 udelay(st->readback_delay_us);
 187         else
 188                 msleep(1);
 189 }
 190
 191 static int __ad7280_read32(struct spi_device *spi, unsigned *val)
 192 {
 193         unsigned rx_buf, tx_buf = cpu_to_be32(AD7280A_READ_TXVAL);
 194         int ret;
 195
 196         struct spi_transfer t = {
 197                 .tx_buf = &tx_buf,
 198                 .rx_buf = &rx_buf,
 199                 .len = 4,
 200         };
 201         struct spi_message m;
 202
 203         spi_message_init(&m);
 204         spi_message_add_tail(&t, &m);
 205
 206         ret = spi_sync(spi, &m);
 207         if (ret)
 208                 return ret;
 209
 210         *val = be32_to_cpu(rx_buf);
 211
 212         return 0;
 213 }
 214
 215 static int ad7280_write(struct ad7280_state *st, unsigned devaddr,
 216                         unsigned addr, bool all, unsigned val)
 217 {
 218         unsigned reg = (devaddr << 27 | addr << 21 |
 219                         (val & 0xFF) << 13 | all << 12);
 220
 221         reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2;
 222         reg = cpu_to_be32(reg);
 223
 224         return spi_write(st->spi, &reg, 4);
 225 }
 226
 227 static int ad7280_read(struct ad7280_state *st, unsigned devaddr,
 228                         unsigned addr)
 229 {
 230         int ret;
 231         unsigned tmp;
 232
 233         /* turns off the read operation on all parts */
 234         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 235                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 236                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 237                         st->ctrl_hb);
 238         if (ret)
 239                 return ret;
 240
 241         /* turns on the read operation on the addressed part */
 242         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 243                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 244                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 245                         st->ctrl_hb);
 246         if (ret)
 247                 return ret;
 248
 249         /* Set register address on the part to be read from */
 250         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 251         if (ret)
 252                 return ret;
 253
 254         __ad7280_read32(st->spi, &tmp);
 255
 256         if (ad7280_check_crc(st, tmp))
 257                 return -EIO;
 258
 259         if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr))
 260                 return -EFAULT;
 261
 262         return (tmp >> 13) & 0xFF;
 263 }
 264
 265 static int ad7280_read_channel(struct ad7280_state *st, unsigned devaddr,
 266                                unsigned addr)
 267 {
 268         int ret;
 269         unsigned tmp;
 270
 271         ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2);
 272         if (ret)
 273                 return ret;
 274
 275         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 276                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 277                         AD7280A_CTRL_HB_CONV_RES_READ_NO |
 278                         st->ctrl_hb);
 279         if (ret)
 280                 return ret;
 281
 282         ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0,
 283                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 284                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 285                         AD7280A_CTRL_HB_CONV_START_CS |
 286                         st->ctrl_hb);
 287         if (ret)
 288                 return ret;
 289
 290         ad7280_delay(st);
 291
 292         __ad7280_read32(st->spi, &tmp);
 293
 294         if (ad7280_check_crc(st, tmp))
 295                 return -EIO;
 296
 297         if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr))
 298                 return -EFAULT;
 299
 300         return (tmp >> 11) & 0xFFF;
 301 }
 302
 303 static int ad7280_read_all_channels(struct ad7280_state *st, unsigned cnt,
 304                              unsigned *array)
 305 {
 306         int i, ret;
 307         unsigned tmp, sum = 0;
 308
 309         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 310                            AD7280A_CELL_VOLTAGE_1 << 2);
 311         if (ret)
 312                 return ret;
 313
 314         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 315                         AD7280A_CTRL_HB_CONV_INPUT_ALL |
 316                         AD7280A_CTRL_HB_CONV_RES_READ_ALL |
 317                         AD7280A_CTRL_HB_CONV_START_CS |
 318                         st->ctrl_hb);
 319         if (ret)
 320                 return ret;
 321
 322         ad7280_delay(st);
 323
 324         for (i = 0; i < cnt; i++) {
 325                 __ad7280_read32(st->spi, &tmp);
 326
 327                 if (ad7280_check_crc(st, tmp))
 328                         return -EIO;
 329
 330                 if (array)
 331                         array[i] = tmp;
 332                 /* only sum cell voltages */
 333                 if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6)
 334                         sum += ((tmp >> 11) & 0xFFF);
 335         }
 336
 337         return sum;
 338 }
 339
 340 static int ad7280_chain_setup(struct ad7280_state *st)
 341 {
 342         unsigned val, n;
 343         int ret;
 344
 345         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 346                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 347                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 348                         AD7280A_CTRL_LB_MUST_SET |
 349                         AD7280A_CTRL_LB_SWRST |
 350                         st->ctrl_lb);
 351         if (ret)
 352                 return ret;
 353
 354         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1,
 355                         AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN |
 356                         AD7280A_CTRL_LB_LOCK_DEV_ADDR |
 357                         AD7280A_CTRL_LB_MUST_SET |
 358                         st->ctrl_lb);
 359         if (ret)
 360                 return ret;
 361
 362         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1,
 363                         AD7280A_CONTROL_LB << 2);
 364         if (ret)
 365                 return ret;
 366
 367         for (n = 0; n <= AD7280A_MAX_CHAIN; n++) {
 368                 __ad7280_read32(st->spi, &val);
 369                 if (val == 0)
 370                         return n - 1;
 371
 372                 if (ad7280_check_crc(st, val))
 373                         return -EIO;
 374
 375                 if (n != AD7280A_DEVADDR(val >> 27))
 376                         return -EIO;
 377         }
 378
 379         return -EFAULT;
 380 }
 381
 382 static ssize_t ad7280_show_balance_sw(struct device *dev,
 383                                         struct device_attribute *attr,
 384                                         char *buf)
 385 {
 386         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 387         struct ad7280_state *st = iio_priv(indio_dev);
 388         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 389
 390         return sprintf(buf, "%d\n",
 391                        !!(st->cb_mask[this_attr->address >> 8] &
 392                        (1 << ((this_attr->address & 0xFF) + 2))));
 393 }
 394
 395 static ssize_t ad7280_store_balance_sw(struct device *dev,
 396                                          struct device_attribute *attr,
 397                                          const char *buf,
 398                                          size_t len)
 399 {
 400         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 401         struct ad7280_state *st = iio_priv(indio_dev);
 402         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 403         bool readin;
 404         int ret;
 405         unsigned devaddr, ch;
 406
 407         ret = strtobool(buf, &readin);
 408         if (ret)
 409                 return ret;
 410
 411         devaddr = this_attr->address >> 8;
 412         ch = this_attr->address & 0xFF;
 413
 414         mutex_lock(&indio_dev->mlock);
 415         if (readin)
 416                 st->cb_mask[devaddr] |= 1 << (ch + 2);
 417         else
 418                 st->cb_mask[devaddr] &= ~(1 << (ch + 2));
 419
 420         ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE,
 421                            0, st->cb_mask[devaddr]);
 422         mutex_unlock(&indio_dev->mlock);
 423
 424         return ret ? ret : len;
 425 }
 426
 427 static ssize_t ad7280_show_balance_timer(struct device *dev,
 428                                         struct device_attribute *attr,
 429                                         char *buf)
 430 {
 431         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 432         struct ad7280_state *st = iio_priv(indio_dev);
 433         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 434         int ret;
 435         unsigned msecs;
 436
 437         mutex_lock(&indio_dev->mlock);
 438         ret = ad7280_read(st, this_attr->address >> 8,
 439                         this_attr->address & 0xFF);
 440         mutex_unlock(&indio_dev->mlock);
 441
 442         if (ret < 0)
 443                 return ret;
 444
 445         msecs = (ret >> 3) * 71500;
 446
 447         return sprintf(buf, "%d\n", msecs);
 448 }
 449
 450 static ssize_t ad7280_store_balance_timer(struct device *dev,
 451                                          struct device_attribute *attr,
 452                                          const char *buf,
 453                                          size_t len)
 454 {
 455         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 456         struct ad7280_state *st = iio_priv(indio_dev);
 457         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 458         long val;
 459         int ret;
 460
 461         ret = strict_strtoul(buf, 10, &val);
 462         if (ret)
 463                 return ret;
 464
 465         val /= 71500;
 466
 467         if (val > 31)
 468                 return -EINVAL;
 469
 470         mutex_lock(&indio_dev->mlock);
 471         ret = ad7280_write(st, this_attr->address >> 8,
 472                            this_attr->address & 0xFF,
 473                            0, (val & 0x1F) << 3);
 474         mutex_unlock(&indio_dev->mlock);
 475
 476         return ret ? ret : len;
 477 }
 478
 479 static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN *
 480                                            AD7280A_CELLS_PER_DEV * 2 + 1];
 481
 482 static struct attribute_group ad7280_attrs_group = {
 483         .attrs = ad7280_attributes,
 484 };
 485
 486 static int ad7280_channel_init(struct ad7280_state *st)
 487 {
 488         int dev, ch, cnt;
 489
 490         st->channels = kzalloc(sizeof(*st->channels) *
 491                                 ((st->slave_num + 1) * 12 + 2), GFP_KERNEL);
 492         if (st->channels == NULL)
 493                 return -ENOMEM;
 494
 495         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 496                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++,
 497                         cnt++) {
 498                         if (ch < AD7280A_AUX_ADC_1) {
 499                                 st->channels[cnt].type = IIO_VOLTAGE;
 500                                 st->channels[cnt].differential = 1;
 501                                 st->channels[cnt].channel = (dev * 6) + ch;
 502                                 st->channels[cnt].channel2 =
 503                                         st->channels[cnt].channel + 1;
 504                         } else {
 505                                 st->channels[cnt].type = IIO_TEMP;
 506                                 st->channels[cnt].channel = (dev * 6) + ch - 6;
 507                         }
 508                         st->channels[cnt].indexed = 1;
 509                         st->channels[cnt].info_mask =
 510                                 (1 << IIO_CHAN_INFO_SCALE_SHARED);
 511                         st->channels[cnt].address =
 512                                 AD7280A_DEVADDR(dev) << 8 | ch;
 513                         st->channels[cnt].scan_index = cnt;
 514                         st->channels[cnt].scan_type.sign = 'u';
 515                         st->channels[cnt].scan_type.realbits = 12;
 516                         st->channels[cnt].scan_type.storagebits = 32;
 517                         st->channels[cnt].scan_type.shift = 0;
 518                 }
 519
 520         st->channels[cnt].type = IIO_VOLTAGE;
 521         st->channels[cnt].differential = 1;
 522         st->channels[cnt].channel = 0;
 523         st->channels[cnt].channel2 = dev * 6;
 524         st->channels[cnt].address = AD7280A_ALL_CELLS;
 525         st->channels[cnt].indexed = 1;
 526         st->channels[cnt].info_mask = (1 << IIO_CHAN_INFO_SCALE_SHARED);
 527         st->channels[cnt].scan_index = cnt;
 528         st->channels[cnt].scan_type.sign = 'u';
 529         st->channels[cnt].scan_type.realbits = 32;
 530         st->channels[cnt].scan_type.storagebits = 32;
 531         st->channels[cnt].scan_type.shift = 0;
 532         cnt++;
 533         st->channels[cnt].type = IIO_TIMESTAMP;
 534         st->channels[cnt].channel = -1;
 535         st->channels[cnt].scan_index = cnt;
 536         st->channels[cnt].scan_type.sign = 's';
 537         st->channels[cnt].scan_type.realbits = 64;
 538         st->channels[cnt].scan_type.storagebits = 64;
 539         st->channels[cnt].scan_type.shift = 0;
 540
 541         return cnt + 1;
 542 }
 543
 544 static int ad7280_attr_init(struct ad7280_state *st)
 545 {
 546         int dev, ch, cnt;
 547
 548         st->iio_attr = kzalloc(sizeof(*st->iio_attr) * (st->slave_num + 1) *
 549                                 AD7280A_CELLS_PER_DEV * 2, GFP_KERNEL);
 550         if (st->iio_attr == NULL)
 551                 return -ENOMEM;
 552
 553         for (dev = 0, cnt = 0; dev <= st->slave_num; dev++)
 554                 for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6;
 555                         ch++, cnt++) {
 556                         st->iio_attr[cnt].address =
 557                                 AD7280A_DEVADDR(dev) << 8 | ch;
 558                         st->iio_attr[cnt].dev_attr.attr.mode =
 559                                 S_IWUSR | S_IRUGO;
 560                         st->iio_attr[cnt].dev_attr.show =
 561                                 ad7280_show_balance_sw;
 562                         st->iio_attr[cnt].dev_attr.store =
 563                                 ad7280_store_balance_sw;
 564                         st->iio_attr[cnt].dev_attr.attr.name =
 565                                 kasprintf(GFP_KERNEL,
 566                                         "in%d-in%d_balance_switch_en",
 567                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 568                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 569                         ad7280_attributes[cnt] =
 570                                 &st->iio_attr[cnt].dev_attr.attr;
 571                         cnt++;
 572                         st->iio_attr[cnt].address =
 573                                 AD7280A_DEVADDR(dev) << 8 |
 574                                 (AD7280A_CB1_TIMER + ch);
 575                         st->iio_attr[cnt].dev_attr.attr.mode =
 576                                 S_IWUSR | S_IRUGO;
 577                         st->iio_attr[cnt].dev_attr.show =
 578                                 ad7280_show_balance_timer;
 579                         st->iio_attr[cnt].dev_attr.store =
 580                                 ad7280_store_balance_timer;
 581                         st->iio_attr[cnt].dev_attr.attr.name =
 582                                 kasprintf(GFP_KERNEL, "in%d-in%d_balance_timer",
 583                                         (dev * AD7280A_CELLS_PER_DEV) + ch,
 584                                         (dev * AD7280A_CELLS_PER_DEV) + ch + 1);
 585                         ad7280_attributes[cnt] =
 586                                 &st->iio_attr[cnt].dev_attr.attr;
 587                 }
 588
 589         ad7280_attributes[cnt] = NULL;
 590
 591         return 0;
 592 }
 593
 594 static ssize_t ad7280_read_channel_config(struct device *dev,
 595                                         struct device_attribute *attr,
 596                                         char *buf)
 597 {
 598         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 599         struct ad7280_state *st = iio_priv(indio_dev);
 600         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 601         unsigned val;
 602
 603         switch (this_attr->address) {
 604         case AD7280A_CELL_OVERVOLTAGE:
 605                 val = 1000 + (st->cell_threshhigh * 1568) / 100;
 606                 break;
 607         case AD7280A_CELL_UNDERVOLTAGE:
 608                 val = 1000 + (st->cell_threshlow * 1568) / 100;
 609                 break;
 610         case AD7280A_AUX_ADC_OVERVOLTAGE:
 611                 val = (st->aux_threshhigh * 196) / 10;
 612                 break;
 613         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 614                 val = (st->aux_threshlow * 196) / 10;
 615                 break;
 616         default:
 617                 return -EINVAL;
 618         }
 619
 620         return sprintf(buf, "%d\n", val);
 621 }
 622
 623 static ssize_t ad7280_write_channel_config(struct device *dev,
 624                                          struct device_attribute *attr,
 625                                          const char *buf,
 626                                          size_t len)
 627 {
 628         struct iio_dev *indio_dev = dev_get_drvdata(dev);
 629         struct ad7280_state *st = iio_priv(indio_dev);
 630         struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
 631
 632         long val;
 633         int ret;
 634
 635         ret = strict_strtol(buf, 10, &val);
 636         if (ret)
 637                 return ret;
 638
 639         switch (this_attr->address) {
 640         case AD7280A_CELL_OVERVOLTAGE:
 641         case AD7280A_CELL_UNDERVOLTAGE:
 642                 val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */
 643                 break;
 644         case AD7280A_AUX_ADC_OVERVOLTAGE:
 645         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 646                 val = (val * 10) / 196; /* LSB 19.6mV */
 647                 break;
 648         default:
 649                 return -EFAULT;
 650         }
 651
 652         val = clamp(val, 0L, 0xFFL);
 653
 654         mutex_lock(&indio_dev->mlock);
 655         switch (this_attr->address) {
 656         case AD7280A_CELL_OVERVOLTAGE:
 657                 st->cell_threshhigh = val;
 658                 break;
 659         case AD7280A_CELL_UNDERVOLTAGE:
 660                 st->cell_threshlow = val;
 661                 break;
 662         case AD7280A_AUX_ADC_OVERVOLTAGE:
 663                 st->aux_threshhigh = val;
 664                 break;
 665         case AD7280A_AUX_ADC_UNDERVOLTAGE:
 666                 st->aux_threshlow = val;
 667                 break;
 668         }
 669
 670         ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 671                            this_attr->address, 1, val);
 672
 673         mutex_unlock(&indio_dev->mlock);
 674
 675         return ret ? ret : len;
 676 }
 677
 678 static irqreturn_t ad7280_event_handler(int irq, void *private)
 679 {
 680         struct iio_dev *indio_dev = private;
 681         struct ad7280_state *st = iio_priv(indio_dev);
 682         unsigned *channels;
 683         int i, ret;
 684
 685         channels = kzalloc(sizeof(*channels) * st->scan_cnt, GFP_KERNEL);
 686         if (channels == NULL)
 687                 return IRQ_HANDLED;
 688
 689         ret = ad7280_read_all_channels(st, st->scan_cnt, channels);
 690         if (ret < 0)
 691                 return IRQ_HANDLED;
 692
 693         for (i = 0; i < st->scan_cnt; i++) {
 694                 if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) {
 695                         if (((channels[i] >> 11) & 0xFFF) >=
 696                                 st->cell_threshhigh)
 697                                 iio_push_event(indio_dev,
 698                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 699                                                        1,
 700                                                        0,
 701                                                        IIO_EV_DIR_RISING,
 702                                                        IIO_EV_TYPE_THRESH,
 703                                                        0, 0, 0),
 704                                         iio_get_time_ns());
 705                         else if (((channels[i] >> 11) & 0xFFF) <=
 706                                 st->cell_threshlow)
 707                                 iio_push_event(indio_dev,
 708                                         IIO_EVENT_CODE(IIO_VOLTAGE,
 709                                                        1,
 710                                                        0,
 711                                                        IIO_EV_DIR_FALLING,
 712                                                        IIO_EV_TYPE_THRESH,
 713                                                        0, 0, 0),
 714                                         iio_get_time_ns());
 715                 } else {
 716                         if (((channels[i] >> 11) & 0xFFF) >= st->aux_threshhigh)
 717                                 iio_push_event(indio_dev,
 718                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 719                                         0,
 720                                         IIO_EV_TYPE_THRESH,
 721                                         IIO_EV_DIR_RISING),
 722                                         iio_get_time_ns());
 723                         else if (((channels[i] >> 11) & 0xFFF) <=
 724                                 st->aux_threshlow)
 725                                 iio_push_event(indio_dev,
 726                                         IIO_UNMOD_EVENT_CODE(IIO_TEMP,
 727                                         0,
 728                                         IIO_EV_TYPE_THRESH,
 729                                         IIO_EV_DIR_FALLING),
 730                                         iio_get_time_ns());
 731                 }
 732         }
 733
 734         kfree(channels);
 735
 736         return IRQ_HANDLED;
 737 }
 738
 739 static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value,
 740                 in_voltage-voltage_thresh_low_value,
 741                 S_IRUGO | S_IWUSR,
 742                 ad7280_read_channel_config,
 743                 ad7280_write_channel_config,
 744                 AD7280A_CELL_UNDERVOLTAGE);
 745
 746 static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value,
 747                 in_voltage-voltage_thresh_high_value,
 748                 S_IRUGO | S_IWUSR,
 749                 ad7280_read_channel_config,
 750                 ad7280_write_channel_config,
 751                 AD7280A_CELL_OVERVOLTAGE);
 752
 753 static IIO_DEVICE_ATTR(in_temp_thresh_low_value,
 754                 S_IRUGO | S_IWUSR,
 755                 ad7280_read_channel_config,
 756                 ad7280_write_channel_config,
 757                 AD7280A_AUX_ADC_UNDERVOLTAGE);
 758
 759 static IIO_DEVICE_ATTR(in_temp_thresh_high_value,
 760                 S_IRUGO | S_IWUSR,
 761                 ad7280_read_channel_config,
 762                 ad7280_write_channel_config,
 763                 AD7280A_AUX_ADC_OVERVOLTAGE);
 764
 765
 766 static struct attribute *ad7280_event_attributes[] = {
 767         &iio_dev_attr_in_thresh_low_value.dev_attr.attr,
 768         &iio_dev_attr_in_thresh_high_value.dev_attr.attr,
 769         &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr,
 770         &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr,
 771         NULL,
 772 };
 773
 774 static struct attribute_group ad7280_event_attrs_group = {
 775         .attrs = ad7280_event_attributes,
 776 };
 777
 778 static int ad7280_read_raw(struct iio_dev *indio_dev,
 779                            struct iio_chan_spec const *chan,
 780                            int *val,
 781                            int *val2,
 782                            long m)
 783 {
 784         struct ad7280_state *st = iio_priv(indio_dev);
 785         unsigned int scale_uv;
 786         int ret;
 787
 788         switch (m) {
 789         case 0:
 790                 mutex_lock(&indio_dev->mlock);
 791                 if (chan->address == AD7280A_ALL_CELLS)
 792                         ret = ad7280_read_all_channels(st, st->scan_cnt, NULL);
 793                 else
 794                         ret = ad7280_read_channel(st, chan->address >> 8,
 795                                                   chan->address & 0xFF);
 796                 mutex_unlock(&indio_dev->mlock);
 797
 798                 if (ret < 0)
 799                         return ret;
 800
 801                 *val = ret;
 802
 803                 return IIO_VAL_INT;
 804         case (1 << IIO_CHAN_INFO_SCALE_SHARED):
 805                 if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6)
 806                         scale_uv = (4000 * 1000) >> AD7280A_BITS;
 807                 else
 808                         scale_uv = (5000 * 1000) >> AD7280A_BITS;
 809
 810                 *val =  scale_uv / 1000;
 811                 *val2 = (scale_uv % 1000) * 1000;
 812                 return IIO_VAL_INT_PLUS_MICRO;
 813         }
 814         return -EINVAL;
 815 }
 816
 817 static const struct iio_info ad7280_info = {
 818         .read_raw = &ad7280_read_raw,
 819         .event_attrs = &ad7280_event_attrs_group,
 820         .attrs = &ad7280_attrs_group,
 821         .driver_module = THIS_MODULE,
 822 };
 823
 824 static const struct ad7280_platform_data ad7793_default_pdata = {
 825         .acquisition_time = AD7280A_ACQ_TIME_400ns,
 826         .conversion_averaging = AD7280A_CONV_AVG_DIS,
 827         .thermistor_term_en = true,
 828 };
 829
 830 static int __devinit ad7280_probe(struct spi_device *spi)
 831 {
 832         const struct ad7280_platform_data *pdata = spi->dev.platform_data;
 833         struct ad7280_state *st;
 834         int ret;
 835         const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
 836         const unsigned short nAVG[4] = {1, 2, 4, 8};
 837         struct iio_dev *indio_dev = iio_allocate_device(sizeof(*st));
 838
 839         if (indio_dev == NULL)
 840                 return -ENOMEM;
 841
 842         st = iio_priv(indio_dev);
 843         spi_set_drvdata(spi, indio_dev);
 844         st->spi = spi;
 845
 846         if (!pdata)
 847                 pdata = &ad7793_default_pdata;
 848
 849         ad7280_crc8_build_table(st->crc_tab);
 850
 851         st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_Hz;
 852         st->spi->mode = SPI_MODE_1;
 853         spi_setup(st->spi);
 854
 855         st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3);
 856         st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging
 857                         & 0x3) | (pdata->thermistor_term_en ?
 858                         AD7280A_CTRL_LB_THERMISTOR_EN : 0);
 859
 860         ret = ad7280_chain_setup(st);
 861         if (ret < 0)
 862                 goto error_free_device;
 863
 864         st->slave_num = ret;
 865         st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH;
 866         st->cell_threshhigh = 0xFF;
 867         st->aux_threshhigh = 0xFF;
 868
 869         /*
 870          * Total Conversion Time = ((tACQ + tCONV) *
 871          *                         (Number of Conversions per Part)) −
 872          *                         tACQ + ((N - 1) * tDELAY)
 873          *
 874          * Readback Delay = Total Conversion Time + tWAIT
 875          */
 876
 877         st->readback_delay_us =
 878                 ((tACQ_ns[pdata->acquisition_time & 0x3] + 695) *
 879                 (AD7280A_NUM_CH * nAVG[pdata->conversion_averaging & 0x3]))
 880                 - tACQ_ns[pdata->acquisition_time & 0x3] +
 881                 st->slave_num * 250;
 882
 883         /* Convert to usecs */
 884         st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000);
 885         st->readback_delay_us += 5; /* Add tWAIT */
 886
 887         indio_dev->name = spi_get_device_id(spi)->name;
 888         indio_dev->dev.parent = &spi->dev;
 889         indio_dev->modes = INDIO_DIRECT_MODE;
 890
 891         ret = ad7280_channel_init(st);
 892         if (ret < 0)
 893                 goto error_free_device;
 894
 895         indio_dev->num_channels = ret;
 896         indio_dev->channels = st->channels;
 897         indio_dev->info = &ad7280_info;
 898
 899         ret = ad7280_attr_init(st);
 900         if (ret < 0)
 901                 goto error_free_channels;
 902
 903         ret = iio_device_register(indio_dev);
 904         if (ret)
 905                 goto error_free_attr;
 906
 907         if (spi->irq > 0) {
 908                 ret = ad7280_write(st, AD7280A_DEVADDR_MASTER,
 909                                    AD7280A_ALERT, 1,
 910                                    AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN);
 911                 if (ret)
 912                         goto error_unregister;
 913
 914                 ret = ad7280_write(st, AD7280A_DEVADDR(st->slave_num),
 915                                    AD7280A_ALERT, 0,
 916                                    AD7280A_ALERT_GEN_STATIC_HIGH |
 917                                    (pdata->chain_last_alert_ignore & 0xF));
 918                 if (ret)
 919                         goto error_unregister;
 920
 921                 ret = request_threaded_irq(spi->irq,
 922                                            NULL,
 923                                            ad7280_event_handler,
 924                                            IRQF_TRIGGER_FALLING |
 925                                            IRQF_ONESHOT,
 926                                            indio_dev->name,
 927                                            indio_dev);
 928                 if (ret)
 929                         goto error_unregister;
 930         }
 931
 932         return 0;
 933 error_unregister:
 934         iio_device_unregister(indio_dev);
 935
 936 error_free_attr:
 937         kfree(st->iio_attr);
 938
 939 error_free_channels:
 940         kfree(st->channels);
 941
 942 error_free_device:
 943         iio_free_device(indio_dev);
 944
 945         return ret;
 946 }
 947
 948 static int __devexit ad7280_remove(struct spi_device *spi)
 949 {
 950         struct iio_dev *indio_dev = spi_get_drvdata(spi);
 951         struct ad7280_state *st = iio_priv(indio_dev);
 952
 953         if (spi->irq > 0)
 954                 free_irq(spi->irq, indio_dev);
 955         iio_device_unregister(indio_dev);
 956
 957         ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1,
 958                         AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb);
 959
 960         kfree(st->channels);
 961         kfree(st->iio_attr);
 962         iio_free_device(indio_dev);
 963
 964         return 0;
 965 }
 966
 967 static const struct spi_device_id ad7280_id[] = {
 968         {"ad7280a", 0},
 969         {}
 970 };
 971
 972 static struct spi_driver ad7280_driver = {
 973         .driver = {
 974                 .name   = "ad7280",
 975                 .bus    = &spi_bus_type,
 976                 .owner  = THIS_MODULE,
 977         },
 978         .probe          = ad7280_probe,
 979         .remove         = __devexit_p(ad7280_remove),
 980         .id_table       = ad7280_id,
 981 };
 982 module_spi_driver(ad7280_driver);
 983
 984 MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
 985 MODULE_DESCRIPTION("Analog Devices AD7280A");
 986 MODULE_LICENSE("GPL v2");