drivers/scsi/qla2xxx/qla_os.c

   1 /*
   2  * QLogic Fibre Channel HBA Driver
   3  * Copyright (c)  2003-2014 QLogic Corporation
   4  *
   5  * See LICENSE.qla2xxx for copyright and licensing details.
   6  */
   7 #include "qla_def.h"
   8
   9 #include <linux/moduleparam.h>
  10 #include <linux/vmalloc.h>
  11 #include <linux/delay.h>
  12 #include <linux/kthread.h>
  13 #include <linux/mutex.h>
  14 #include <linux/kobject.h>
  15 #include <linux/slab.h>
  16 #include <linux/blk-mq-pci.h>
  17 #include <linux/refcount.h>
  18
  19 #include <scsi/scsi_tcq.h>
  20 #include <scsi/scsicam.h>
  21 #include <scsi/scsi_transport.h>
  22 #include <scsi/scsi_transport_fc.h>
  23
  24 #include "qla_target.h"
  25
  26 /*
  27  * Driver version
  28  */
  29 char qla2x00_version_str[40];
  30
  31 static int apidev_major;
  32
  33 /*
  34  * SRB allocation cache
  35  */
  36 struct kmem_cache *srb_cachep;
  37
  38 /*
  39  * CT6 CTX allocation cache
  40  */
  41 static struct kmem_cache *ctx_cachep;
  42 /*
  43  * error level for logging
  44  */
  45 uint ql_errlev = 0x8001;
  46
  47 static int ql2xenableclass2;
  48 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
  49 MODULE_PARM_DESC(ql2xenableclass2,
  50                 "Specify if Class 2 operations are supported from the very "
  51                 "beginning. Default is 0 - class 2 not supported.");
  52
  53
  54 int ql2xlogintimeout = 20;
  55 module_param(ql2xlogintimeout, int, S_IRUGO);
  56 MODULE_PARM_DESC(ql2xlogintimeout,
  57                 "Login timeout value in seconds.");
  58
  59 int qlport_down_retry;
  60 module_param(qlport_down_retry, int, S_IRUGO);
  61 MODULE_PARM_DESC(qlport_down_retry,
  62                 "Maximum number of command retries to a port that returns "
  63                 "a PORT-DOWN status.");
  64
  65 int ql2xplogiabsentdevice;
  66 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  67 MODULE_PARM_DESC(ql2xplogiabsentdevice,
  68                 "Option to enable PLOGI to devices that are not present after "
  69                 "a Fabric scan.  This is needed for several broken switches. "
  70                 "Default is 0 - no PLOGI. 1 - perform PLOGI.");
  71
  72 int ql2xloginretrycount;
  73 module_param(ql2xloginretrycount, int, S_IRUGO);
  74 MODULE_PARM_DESC(ql2xloginretrycount,
  75                 "Specify an alternate value for the NVRAM login retry count.");
  76
  77 int ql2xallocfwdump = 1;
  78 module_param(ql2xallocfwdump, int, S_IRUGO);
  79 MODULE_PARM_DESC(ql2xallocfwdump,
  80                 "Option to enable allocation of memory for a firmware dump "
  81                 "during HBA initialization.  Memory allocation requirements "
  82                 "vary by ISP type.  Default is 1 - allocate memory.");
  83
  84 int ql2xextended_error_logging;
  85 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  86 module_param_named(logging, ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  87 MODULE_PARM_DESC(ql2xextended_error_logging,
  88                 "Option to enable extended error logging,\n"
  89                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
  90                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
  91                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
  92                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
  93                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
  94                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
  95                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
  96                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
  97                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
  98                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
  99                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 100                 "\t\t0x1e400000 - Preferred value for capturing essential "
 101                 "debug information (equivalent to old "
 102                 "ql2xextended_error_logging=1).\n"
 103                 "\t\tDo LOGICAL OR of the value to enable more than one level");
 104
 105 int ql2xshiftctondsd = 6;
 106 module_param(ql2xshiftctondsd, int, S_IRUGO);
 107 MODULE_PARM_DESC(ql2xshiftctondsd,
 108                 "Set to control shifting of command type processing "
 109                 "based on total number of SG elements.");
 110
 111 int ql2xfdmienable = 1;
 112 module_param(ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 113 module_param_named(fdmi, ql2xfdmienable, int, S_IRUGO|S_IWUSR);
 114 MODULE_PARM_DESC(ql2xfdmienable,
 115                 "Enables FDMI registrations. "
 116                 "0 - no FDMI. Default is 1 - perform FDMI.");
 117
 118 #define MAX_Q_DEPTH     64
 119 static int ql2xmaxqdepth = MAX_Q_DEPTH;
 120 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
 121 MODULE_PARM_DESC(ql2xmaxqdepth,
 122                 "Maximum queue depth to set for each LUN. "
 123                 "Default is 64.");
 124
 125 #if (IS_ENABLED(CONFIG_NVME_FC))
 126 int ql2xenabledif;
 127 #else
 128 int ql2xenabledif = 2;
 129 #endif
 130 module_param(ql2xenabledif, int, S_IRUGO);
 131 MODULE_PARM_DESC(ql2xenabledif,
 132                 " Enable T10-CRC-DIF:\n"
 133                 " Default is 2.\n"
 134                 "  0 -- No DIF Support\n"
 135                 "  1 -- Enable DIF for all types\n"
 136                 "  2 -- Enable DIF for all types, except Type 0.\n");
 137
 138 #if (IS_ENABLED(CONFIG_NVME_FC))
 139 int ql2xnvmeenable = 1;
 140 #else
 141 int ql2xnvmeenable;
 142 #endif
 143 module_param(ql2xnvmeenable, int, 0644);
 144 MODULE_PARM_DESC(ql2xnvmeenable,
 145     "Enables NVME support. "
 146     "0 - no NVMe.  Default is Y");
 147
 148 int ql2xenablehba_err_chk = 2;
 149 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
 150 MODULE_PARM_DESC(ql2xenablehba_err_chk,
 151                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
 152                 " Default is 2.\n"
 153                 "  0 -- Error isolation disabled\n"
 154                 "  1 -- Error isolation enabled only for DIX Type 0\n"
 155                 "  2 -- Error isolation enabled for all Types\n");
 156
 157 int ql2xiidmaenable = 1;
 158 module_param(ql2xiidmaenable, int, S_IRUGO);
 159 MODULE_PARM_DESC(ql2xiidmaenable,
 160                 "Enables iIDMA settings "
 161                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
 162
 163 int ql2xmqsupport = 1;
 164 module_param(ql2xmqsupport, int, S_IRUGO);
 165 MODULE_PARM_DESC(ql2xmqsupport,
 166                 "Enable on demand multiple queue pairs support "
 167                 "Default is 1 for supported. "
 168                 "Set it to 0 to turn off mq qpair support.");
 169
 170 int ql2xfwloadbin;
 171 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 172 module_param_named(fwload, ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
 173 MODULE_PARM_DESC(ql2xfwloadbin,
 174                 "Option to specify location from which to load ISP firmware:.\n"
 175                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
 176                 "      interface.\n"
 177                 " 1 -- load firmware from flash.\n"
 178                 " 0 -- use default semantics.\n");
 179
 180 int ql2xetsenable;
 181 module_param(ql2xetsenable, int, S_IRUGO);
 182 MODULE_PARM_DESC(ql2xetsenable,
 183                 "Enables firmware ETS burst."
 184                 "Default is 0 - skip ETS enablement.");
 185
 186 int ql2xdbwr = 1;
 187 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
 188 MODULE_PARM_DESC(ql2xdbwr,
 189                 "Option to specify scheme for request queue posting.\n"
 190                 " 0 -- Regular doorbell.\n"
 191                 " 1 -- CAMRAM doorbell (faster).\n");
 192
 193 int ql2xtargetreset = 1;
 194 module_param(ql2xtargetreset, int, S_IRUGO);
 195 MODULE_PARM_DESC(ql2xtargetreset,
 196                  "Enable target reset."
 197                  "Default is 1 - use hw defaults.");
 198
 199 int ql2xgffidenable;
 200 module_param(ql2xgffidenable, int, S_IRUGO);
 201 MODULE_PARM_DESC(ql2xgffidenable,
 202                 "Enables GFF_ID checks of port type. "
 203                 "Default is 0 - Do not use GFF_ID information.");
 204
 205 int ql2xasynctmfenable = 1;
 206 module_param(ql2xasynctmfenable, int, S_IRUGO);
 207 MODULE_PARM_DESC(ql2xasynctmfenable,
 208                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
 209                 "Default is 1 - Issue TM IOCBs via mailbox mechanism.");
 210
 211 int ql2xdontresethba;
 212 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
 213 MODULE_PARM_DESC(ql2xdontresethba,
 214                 "Option to specify reset behaviour.\n"
 215                 " 0 (Default) -- Reset on failure.\n"
 216                 " 1 -- Do not reset on failure.\n");
 217
 218 uint64_t ql2xmaxlun = MAX_LUNS;
 219 module_param(ql2xmaxlun, ullong, S_IRUGO);
 220 MODULE_PARM_DESC(ql2xmaxlun,
 221                 "Defines the maximum LU number to register with the SCSI "
 222                 "midlayer. Default is 65535.");
 223
 224 int ql2xmdcapmask = 0x1F;
 225 module_param(ql2xmdcapmask, int, S_IRUGO);
 226 MODULE_PARM_DESC(ql2xmdcapmask,
 227                 "Set the Minidump driver capture mask level. "
 228                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
 229
 230 int ql2xmdenable = 1;
 231 module_param(ql2xmdenable, int, S_IRUGO);
 232 MODULE_PARM_DESC(ql2xmdenable,
 233                 "Enable/disable MiniDump. "
 234                 "0 - MiniDump disabled. "
 235                 "1 (Default) - MiniDump enabled.");
 236
 237 int ql2xexlogins;
 238 module_param(ql2xexlogins, uint, S_IRUGO|S_IWUSR);
 239 MODULE_PARM_DESC(ql2xexlogins,
 240                  "Number of extended Logins. "
 241                  "0 (Default)- Disabled.");
 242
 243 int ql2xexchoffld = 1024;
 244 module_param(ql2xexchoffld, uint, 0644);
 245 MODULE_PARM_DESC(ql2xexchoffld,
 246         "Number of target exchanges.");
 247
 248 int ql2xiniexchg = 1024;
 249 module_param(ql2xiniexchg, uint, 0644);
 250 MODULE_PARM_DESC(ql2xiniexchg,
 251         "Number of initiator exchanges.");
 252
 253 int ql2xfwholdabts;
 254 module_param(ql2xfwholdabts, int, S_IRUGO);
 255 MODULE_PARM_DESC(ql2xfwholdabts,
 256                 "Allow FW to hold status IOCB until ABTS rsp received. "
 257                 "0 (Default) Do not set fw option. "
 258                 "1 - Set fw option to hold ABTS.");
 259
 260 int ql2xmvasynctoatio = 1;
 261 module_param(ql2xmvasynctoatio, int, S_IRUGO|S_IWUSR);
 262 MODULE_PARM_DESC(ql2xmvasynctoatio,
 263                 "Move PUREX, ABTS RX and RIDA IOCBs to ATIOQ"
 264                 "0 (Default). Do not move IOCBs"
 265                 "1 - Move IOCBs.");
 266
 267 int ql2xautodetectsfp = 1;
 268 module_param(ql2xautodetectsfp, int, 0444);
 269 MODULE_PARM_DESC(ql2xautodetectsfp,
 270                  "Detect SFP range and set appropriate distance.\n"
 271                  "1 (Default): Enable\n");
 272
 273 int ql2xenablemsix = 1;
 274 module_param(ql2xenablemsix, int, 0444);
 275 MODULE_PARM_DESC(ql2xenablemsix,
 276                  "Set to enable MSI or MSI-X interrupt mechanism.\n"
 277                  " Default is 1, enable MSI-X interrupt mechanism.\n"
 278                  " 0 -- enable traditional pin-based mechanism.\n"
 279                  " 1 -- enable MSI-X interrupt mechanism.\n"
 280                  " 2 -- enable MSI interrupt mechanism.\n");
 281
 282 int qla2xuseresexchforels;
 283 module_param(qla2xuseresexchforels, int, 0444);
 284 MODULE_PARM_DESC(qla2xuseresexchforels,
 285                  "Reserve 1/2 of emergency exchanges for ELS.\n"
 286                  " 0 (default): disabled");
 287
 288 static int ql2xprotmask;
 289 module_param(ql2xprotmask, int, 0644);
 290 MODULE_PARM_DESC(ql2xprotmask,
 291                  "Override DIF/DIX protection capabilities mask\n"
 292                  "Default is 0 which sets protection mask based on "
 293                  "capabilities reported by HBA firmware.\n");
 294
 295 static int ql2xprotguard;
 296 module_param(ql2xprotguard, int, 0644);
 297 MODULE_PARM_DESC(ql2xprotguard, "Override choice of DIX checksum\n"
 298                  "  0 -- Let HBA firmware decide\n"
 299                  "  1 -- Force T10 CRC\n"
 300                  "  2 -- Force IP checksum\n");
 301
 302 int ql2xdifbundlinginternalbuffers;
 303 module_param(ql2xdifbundlinginternalbuffers, int, 0644);
 304 MODULE_PARM_DESC(ql2xdifbundlinginternalbuffers,
 305     "Force using internal buffers for DIF information\n"
 306     "0 (Default). Based on check.\n"
 307     "1 Force using internal buffers\n");
 308
 309 static void qla2x00_clear_drv_active(struct qla_hw_data *);
 310 static void qla2x00_free_device(scsi_qla_host_t *);
 311 static int qla2xxx_map_queues(struct Scsi_Host *shost);
 312 static void qla2x00_destroy_deferred_work(struct qla_hw_data *);
 313
 314
 315 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
 316 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
 317
 318 /* TODO Convert to inlines
 319  *
 320  * Timer routines
 321  */
 322
 323 __inline__ void
 324 qla2x00_start_timer(scsi_qla_host_t *vha, unsigned long interval)
 325 {
 326         timer_setup(&vha->timer, qla2x00_timer, 0);
 327         vha->timer.expires = jiffies + interval * HZ;
 328         add_timer(&vha->timer);
 329         vha->timer_active = 1;
 330 }
 331
 332 static inline void
 333 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
 334 {
 335         /* Currently used for 82XX only. */
 336         if (vha->device_flags & DFLG_DEV_FAILED) {
 337                 ql_dbg(ql_dbg_timer, vha, 0x600d,
 338                     "Device in a failed state, returning.\n");
 339                 return;
 340         }
 341
 342         mod_timer(&vha->timer, jiffies + interval * HZ);
 343 }
 344
 345 static __inline__ void
 346 qla2x00_stop_timer(scsi_qla_host_t *vha)
 347 {
 348         del_timer_sync(&vha->timer);
 349         vha->timer_active = 0;
 350 }
 351
 352 static int qla2x00_do_dpc(void *data);
 353
 354 static void qla2x00_rst_aen(scsi_qla_host_t *);
 355
 356 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
 357         struct req_que **, struct rsp_que **);
 358 static void qla2x00_free_fw_dump(struct qla_hw_data *);
 359 static void qla2x00_mem_free(struct qla_hw_data *);
 360 int qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 361         struct qla_qpair *qpair);
 362
 363 /* -------------------------------------------------------------------------- */
 364 static void qla_init_base_qpair(struct scsi_qla_host *vha, struct req_que *req,
 365     struct rsp_que *rsp)
 366 {
 367         struct qla_hw_data *ha = vha->hw;
 368
 369         rsp->qpair = ha->base_qpair;
 370         rsp->req = req;
 371         ha->base_qpair->hw = ha;
 372         ha->base_qpair->req = req;
 373         ha->base_qpair->rsp = rsp;
 374         ha->base_qpair->vha = vha;
 375         ha->base_qpair->qp_lock_ptr = &ha->hardware_lock;
 376         ha->base_qpair->use_shadow_reg = IS_SHADOW_REG_CAPABLE(ha) ? 1 : 0;
 377         ha->base_qpair->msix = &ha->msix_entries[QLA_MSIX_RSP_Q];
 378         ha->base_qpair->srb_mempool = ha->srb_mempool;
 379         INIT_LIST_HEAD(&ha->base_qpair->hints_list);
 380         ha->base_qpair->enable_class_2 = ql2xenableclass2;
 381         /* init qpair to this cpu. Will adjust at run time. */
 382         qla_cpu_update(rsp->qpair, raw_smp_processor_id());
 383         ha->base_qpair->pdev = ha->pdev;
 384
 385         if (IS_QLA27XX(ha) || IS_QLA83XX(ha) || IS_QLA28XX(ha))
 386                 ha->base_qpair->reqq_start_iocbs = qla_83xx_start_iocbs;
 387 }
 388
 389 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
 390                                 struct rsp_que *rsp)
 391 {
 392         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
 393
 394         ha->req_q_map = kcalloc(ha->max_req_queues, sizeof(struct req_que *),
 395                                 GFP_KERNEL);
 396         if (!ha->req_q_map) {
 397                 ql_log(ql_log_fatal, vha, 0x003b,
 398                     "Unable to allocate memory for request queue ptrs.\n");
 399                 goto fail_req_map;
 400         }
 401
 402         ha->rsp_q_map = kcalloc(ha->max_rsp_queues, sizeof(struct rsp_que *),
 403                                 GFP_KERNEL);
 404         if (!ha->rsp_q_map) {
 405                 ql_log(ql_log_fatal, vha, 0x003c,
 406                     "Unable to allocate memory for response queue ptrs.\n");
 407                 goto fail_rsp_map;
 408         }
 409
 410         ha->base_qpair = kzalloc(sizeof(struct qla_qpair), GFP_KERNEL);
 411         if (ha->base_qpair == NULL) {
 412                 ql_log(ql_log_warn, vha, 0x00e0,
 413                     "Failed to allocate base queue pair memory.\n");
 414                 goto fail_base_qpair;
 415         }
 416
 417         qla_init_base_qpair(vha, req, rsp);
 418
 419         if ((ql2xmqsupport || ql2xnvmeenable) && ha->max_qpairs) {
 420                 ha->queue_pair_map = kcalloc(ha->max_qpairs, sizeof(struct qla_qpair *),
 421                         GFP_KERNEL);
 422                 if (!ha->queue_pair_map) {
 423                         ql_log(ql_log_fatal, vha, 0x0180,
 424                             "Unable to allocate memory for queue pair ptrs.\n");
 425                         goto fail_qpair_map;
 426                 }
 427         }
 428
 429         /*
 430          * Make sure we record at least the request and response queue zero in
 431          * case we need to free them if part of the probe fails.
 432          */
 433         ha->rsp_q_map[0] = rsp;
 434         ha->req_q_map[0] = req;
 435         set_bit(0, ha->rsp_qid_map);
 436         set_bit(0, ha->req_qid_map);
 437         return 0;
 438
 439 fail_qpair_map:
 440         kfree(ha->base_qpair);
 441         ha->base_qpair = NULL;
 442 fail_base_qpair:
 443         kfree(ha->rsp_q_map);
 444         ha->rsp_q_map = NULL;
 445 fail_rsp_map:
 446         kfree(ha->req_q_map);
 447         ha->req_q_map = NULL;
 448 fail_req_map:
 449         return -ENOMEM;
 450 }
 451
 452 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
 453 {
 454         if (IS_QLAFX00(ha)) {
 455                 if (req && req->ring_fx00)
 456                         dma_free_coherent(&ha->pdev->dev,
 457                             (req->length_fx00 + 1) * sizeof(request_t),
 458                             req->ring_fx00, req->dma_fx00);
 459         } else if (req && req->ring)
 460                 dma_free_coherent(&ha->pdev->dev,
 461                 (req->length + 1) * sizeof(request_t),
 462                 req->ring, req->dma);
 463
 464         if (req)
 465                 kfree(req->outstanding_cmds);
 466
 467         kfree(req);
 468 }
 469
 470 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
 471 {
 472         if (IS_QLAFX00(ha)) {
 473                 if (rsp && rsp->ring_fx00)
 474                         dma_free_coherent(&ha->pdev->dev,
 475                             (rsp->length_fx00 + 1) * sizeof(request_t),
 476                             rsp->ring_fx00, rsp->dma_fx00);
 477         } else if (rsp && rsp->ring) {
 478                 dma_free_coherent(&ha->pdev->dev,
 479                 (rsp->length + 1) * sizeof(response_t),
 480                 rsp->ring, rsp->dma);
 481         }
 482         kfree(rsp);
 483 }
 484
 485 static void qla2x00_free_queues(struct qla_hw_data *ha)
 486 {
 487         struct req_que *req;
 488         struct rsp_que *rsp;
 489         int cnt;
 490         unsigned long flags;
 491
 492         if (ha->queue_pair_map) {
 493                 kfree(ha->queue_pair_map);
 494                 ha->queue_pair_map = NULL;
 495         }
 496         if (ha->base_qpair) {
 497                 kfree(ha->base_qpair);
 498                 ha->base_qpair = NULL;
 499         }
 500
 501         spin_lock_irqsave(&ha->hardware_lock, flags);
 502         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
 503                 if (!test_bit(cnt, ha->req_qid_map))
 504                         continue;
 505
 506                 req = ha->req_q_map[cnt];
 507                 clear_bit(cnt, ha->req_qid_map);
 508                 ha->req_q_map[cnt] = NULL;
 509
 510                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 511                 qla2x00_free_req_que(ha, req);
 512                 spin_lock_irqsave(&ha->hardware_lock, flags);
 513         }
 514         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 515
 516         kfree(ha->req_q_map);
 517         ha->req_q_map = NULL;
 518
 519
 520         spin_lock_irqsave(&ha->hardware_lock, flags);
 521         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
 522                 if (!test_bit(cnt, ha->rsp_qid_map))
 523                         continue;
 524
 525                 rsp = ha->rsp_q_map[cnt];
 526                 clear_bit(cnt, ha->rsp_qid_map);
 527                 ha->rsp_q_map[cnt] =  NULL;
 528                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
 529                 qla2x00_free_rsp_que(ha, rsp);
 530                 spin_lock_irqsave(&ha->hardware_lock, flags);
 531         }
 532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
 533
 534         kfree(ha->rsp_q_map);
 535         ha->rsp_q_map = NULL;
 536 }
 537
 538 static char *
 539 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
 540 {
 541         struct qla_hw_data *ha = vha->hw;
 542         static char *pci_bus_modes[] = {
 543                 "33", "66", "100", "133",
 544         };
 545         uint16_t pci_bus;
 546
 547         strcpy(str, "PCI");
 548         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
 549         if (pci_bus) {
 550                 strcat(str, "-X (");
 551                 strcat(str, pci_bus_modes[pci_bus]);
 552         } else {
 553                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
 554                 strcat(str, " (");
 555                 strcat(str, pci_bus_modes[pci_bus]);
 556         }
 557         strcat(str, " MHz)");
 558
 559         return (str);
 560 }
 561
 562 static char *
 563 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
 564 {
 565         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
 566         struct qla_hw_data *ha = vha->hw;
 567         uint32_t pci_bus;
 568
 569         if (pci_is_pcie(ha->pdev)) {
 570                 char lwstr[6];
 571                 uint32_t lstat, lspeed, lwidth;
 572
 573                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
 574                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
 575                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
 576
 577                 strcpy(str, "PCIe (");
 578                 switch (lspeed) {
 579                 case 1:
 580                         strcat(str, "2.5GT/s ");
 581                         break;
 582                 case 2:
 583                         strcat(str, "5.0GT/s ");
 584                         break;
 585                 case 3:
 586                         strcat(str, "8.0GT/s ");
 587                         break;
 588                 default:
 589                         strcat(str, "<unknown> ");
 590                         break;
 591                 }
 592                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
 593                 strcat(str, lwstr);
 594
 595                 return str;
 596         }
 597
 598         strcpy(str, "PCI");
 599         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
 600         if (pci_bus == 0 || pci_bus == 8) {
 601                 strcat(str, " (");
 602                 strcat(str, pci_bus_modes[pci_bus >> 3]);
 603         } else {
 604                 strcat(str, "-X ");
 605                 if (pci_bus & BIT_2)
 606                         strcat(str, "Mode 2");
 607                 else
 608                         strcat(str, "Mode 1");
 609                 strcat(str, " (");
 610                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
 611         }
 612         strcat(str, " MHz)");
 613
 614         return str;
 615 }
 616
 617 static char *
 618 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 619 {
 620         char un_str[10];
 621         struct qla_hw_data *ha = vha->hw;
 622
 623         snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version,
 624             ha->fw_minor_version, ha->fw_subminor_version);
 625
 626         if (ha->fw_attributes & BIT_9) {
 627                 strcat(str, "FLX");
 628                 return (str);
 629         }
 630
 631         switch (ha->fw_attributes & 0xFF) {
 632         case 0x7:
 633                 strcat(str, "EF");
 634                 break;
 635         case 0x17:
 636                 strcat(str, "TP");
 637                 break;
 638         case 0x37:
 639                 strcat(str, "IP");
 640                 break;
 641         case 0x77:
 642                 strcat(str, "VI");
 643                 break;
 644         default:
 645                 sprintf(un_str, "(%x)", ha->fw_attributes);
 646                 strcat(str, un_str);
 647                 break;
 648         }
 649         if (ha->fw_attributes & 0x100)
 650                 strcat(str, "X");
 651
 652         return (str);
 653 }
 654
 655 static char *
 656 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str, size_t size)
 657 {
 658         struct qla_hw_data *ha = vha->hw;
 659
 660         snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version,
 661             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
 662         return str;
 663 }
 664
 665 void
 666 qla2x00_sp_free_dma(void *ptr)
 667 {
 668         srb_t *sp = ptr;
 669         struct qla_hw_data *ha = sp->vha->hw;
 670         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 671         void *ctx = GET_CMD_CTX_SP(sp);
 672
 673         if (sp->flags & SRB_DMA_VALID) {
 674                 scsi_dma_unmap(cmd);
 675                 sp->flags &= ~SRB_DMA_VALID;
 676         }
 677
 678         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 679                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 680                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 681                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 682         }
 683
 684         if (!ctx)
 685                 return;
 686
 687         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 688                 /* List assured to be having elements */
 689                 qla2x00_clean_dsd_pool(ha, ctx);
 690                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 691         }
 692
 693         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 694                 struct crc_context *ctx0 = ctx;
 695
 696                 dma_pool_free(ha->dl_dma_pool, ctx0, ctx0->crc_ctx_dma);
 697                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 698         }
 699
 700         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 701                 struct ct6_dsd *ctx1 = ctx;
 702
 703                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 704                     ctx1->fcp_cmnd_dma);
 705                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 706                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 707                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 708                 mempool_free(ctx1, ha->ctx_mempool);
 709         }
 710 }
 711
 712 void
 713 qla2x00_sp_compl(void *ptr, int res)
 714 {
 715         srb_t *sp = ptr;
 716         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 717         struct completion *comp = sp->comp;
 718
 719         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 720                 return;
 721
 722         atomic_dec(&sp->ref_count);
 723
 724         sp->free(sp);
 725         cmd->result = res;
 726         CMD_SP(cmd) = NULL;
 727         cmd->scsi_done(cmd);
 728         if (comp)
 729                 complete(comp);
 730         qla2x00_rel_sp(sp);
 731 }
 732
 733 void
 734 qla2xxx_qpair_sp_free_dma(void *ptr)
 735 {
 736         srb_t *sp = (srb_t *)ptr;
 737         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 738         struct qla_hw_data *ha = sp->fcport->vha->hw;
 739         void *ctx = GET_CMD_CTX_SP(sp);
 740
 741         if (sp->flags & SRB_DMA_VALID) {
 742                 scsi_dma_unmap(cmd);
 743                 sp->flags &= ~SRB_DMA_VALID;
 744         }
 745
 746         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
 747                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
 748                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
 749                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
 750         }
 751
 752         if (!ctx)
 753                 return;
 754
 755         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
 756                 /* List assured to be having elements */
 757                 qla2x00_clean_dsd_pool(ha, ctx);
 758                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
 759         }
 760
 761         if (sp->flags & SRB_DIF_BUNDL_DMA_VALID) {
 762                 struct crc_context *difctx = ctx;
 763                 struct dsd_dma *dif_dsd, *nxt_dsd;
 764
 765                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 766                     &difctx->ldif_dma_hndl_list, list) {
 767                         list_del(&dif_dsd->list);
 768                         dma_pool_free(ha->dif_bundl_pool, dif_dsd->dsd_addr,
 769                             dif_dsd->dsd_list_dma);
 770                         kfree(dif_dsd);
 771                         difctx->no_dif_bundl--;
 772                 }
 773
 774                 list_for_each_entry_safe(dif_dsd, nxt_dsd,
 775                     &difctx->ldif_dsd_list, list) {
 776                         list_del(&dif_dsd->list);
 777                         dma_pool_free(ha->dl_dma_pool, dif_dsd->dsd_addr,
 778                             dif_dsd->dsd_list_dma);
 779                         kfree(dif_dsd);
 780                         difctx->no_ldif_dsd--;
 781                 }
 782
 783                 if (difctx->no_ldif_dsd) {
 784                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 785                             "%s: difctx->no_ldif_dsd=%x\n",
 786                             __func__, difctx->no_ldif_dsd);
 787                 }
 788
 789                 if (difctx->no_dif_bundl) {
 790                         ql_dbg(ql_dbg_tgt+ql_dbg_verbose, sp->vha, 0xe022,
 791                             "%s: difctx->no_dif_bundl=%x\n",
 792                             __func__, difctx->no_dif_bundl);
 793                 }
 794                 sp->flags &= ~SRB_DIF_BUNDL_DMA_VALID;
 795         }
 796
 797         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
 798                 struct ct6_dsd *ctx1 = ctx;
 799
 800                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
 801                     ctx1->fcp_cmnd_dma);
 802                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
 803                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
 804                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
 805                 mempool_free(ctx1, ha->ctx_mempool);
 806                 sp->flags &= ~SRB_FCP_CMND_DMA_VALID;
 807         }
 808
 809         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
 810                 struct crc_context *ctx0 = ctx;
 811
 812                 dma_pool_free(ha->dl_dma_pool, ctx, ctx0->crc_ctx_dma);
 813                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
 814         }
 815 }
 816
 817 void
 818 qla2xxx_qpair_sp_compl(void *ptr, int res)
 819 {
 820         srb_t *sp = ptr;
 821         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
 822         struct completion *comp = sp->comp;
 823
 824         if (WARN_ON_ONCE(atomic_read(&sp->ref_count) == 0))
 825                 return;
 826
 827         atomic_dec(&sp->ref_count);
 828
 829         sp->free(sp);
 830         cmd->result = res;
 831         CMD_SP(cmd) = NULL;
 832         cmd->scsi_done(cmd);
 833         if (comp)
 834                 complete(comp);
 835         qla2xxx_rel_qpair_sp(sp->qpair, sp);
 836 }
 837
 838 static int
 839 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
 840 {
 841         scsi_qla_host_t *vha = shost_priv(host);
 842         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 843         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 844         struct qla_hw_data *ha = vha->hw;
 845         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 846         srb_t *sp;
 847         int rval;
 848
 849         if (unlikely(test_bit(UNLOADING, &base_vha->dpc_flags)) ||
 850             WARN_ON_ONCE(!rport)) {
 851                 cmd->result = DID_NO_CONNECT << 16;
 852                 goto qc24_fail_command;
 853         }
 854
 855         if (ha->mqenable) {
 856                 uint32_t tag;
 857                 uint16_t hwq;
 858                 struct qla_qpair *qpair = NULL;
 859
 860                 tag = blk_mq_unique_tag(cmd->request);
 861                 hwq = blk_mq_unique_tag_to_hwq(tag);
 862                 qpair = ha->queue_pair_map[hwq];
 863
 864                 if (qpair)
 865                         return qla2xxx_mqueuecommand(host, cmd, qpair);
 866         }
 867
 868         if (ha->flags.eeh_busy) {
 869                 if (ha->flags.pci_channel_io_perm_failure) {
 870                         ql_dbg(ql_dbg_aer, vha, 0x9010,
 871                             "PCI Channel IO permanent failure, exiting "
 872                             "cmd=%p.\n", cmd);
 873                         cmd->result = DID_NO_CONNECT << 16;
 874                 } else {
 875                         ql_dbg(ql_dbg_aer, vha, 0x9011,
 876                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
 877                         cmd->result = DID_REQUEUE << 16;
 878                 }
 879                 goto qc24_fail_command;
 880         }
 881
 882         rval = fc_remote_port_chkready(rport);
 883         if (rval) {
 884                 cmd->result = rval;
 885                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
 886                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 887                     cmd, rval);
 888                 goto qc24_fail_command;
 889         }
 890
 891         if (!vha->flags.difdix_supported &&
 892                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
 893                         ql_dbg(ql_dbg_io, vha, 0x3004,
 894                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
 895                             cmd);
 896                         cmd->result = DID_NO_CONNECT << 16;
 897                         goto qc24_fail_command;
 898         }
 899
 900         if (!fcport) {
 901                 cmd->result = DID_NO_CONNECT << 16;
 902                 goto qc24_fail_command;
 903         }
 904
 905         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 906                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 907                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 908                         ql_dbg(ql_dbg_io, vha, 0x3005,
 909                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 910                             atomic_read(&fcport->state),
 911                             atomic_read(&base_vha->loop_state));
 912                         cmd->result = DID_NO_CONNECT << 16;
 913                         goto qc24_fail_command;
 914                 }
 915                 goto qc24_target_busy;
 916         }
 917
 918         /*
 919          * Return target busy if we've received a non-zero retry_delay_timer
 920          * in a FCP_RSP.
 921          */
 922         if (fcport->retry_delay_timestamp == 0) {
 923                 /* retry delay not set */
 924         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
 925                 fcport->retry_delay_timestamp = 0;
 926         else
 927                 goto qc24_target_busy;
 928
 929         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
 930         if (!sp)
 931                 goto qc24_host_busy;
 932
 933         sp->u.scmd.cmd = cmd;
 934         sp->type = SRB_SCSI_CMD;
 935         atomic_set(&sp->ref_count, 1);
 936         CMD_SP(cmd) = (void *)sp;
 937         sp->free = qla2x00_sp_free_dma;
 938         sp->done = qla2x00_sp_compl;
 939
 940         rval = ha->isp_ops->start_scsi(sp);
 941         if (rval != QLA_SUCCESS) {
 942                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
 943                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
 944                 goto qc24_host_busy_free_sp;
 945         }
 946
 947         return 0;
 948
 949 qc24_host_busy_free_sp:
 950         sp->free(sp);
 951
 952 qc24_host_busy:
 953         return SCSI_MLQUEUE_HOST_BUSY;
 954
 955 qc24_target_busy:
 956         return SCSI_MLQUEUE_TARGET_BUSY;
 957
 958 qc24_fail_command:
 959         cmd->scsi_done(cmd);
 960
 961         return 0;
 962 }
 963
 964 /* For MQ supported I/O */
 965 int
 966 qla2xxx_mqueuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd,
 967     struct qla_qpair *qpair)
 968 {
 969         scsi_qla_host_t *vha = shost_priv(host);
 970         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
 971         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
 972         struct qla_hw_data *ha = vha->hw;
 973         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
 974         srb_t *sp;
 975         int rval;
 976
 977         rval = rport ? fc_remote_port_chkready(rport) : FC_PORTSTATE_OFFLINE;
 978         if (rval) {
 979                 cmd->result = rval;
 980                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3076,
 981                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
 982                     cmd, rval);
 983                 goto qc24_fail_command;
 984         }
 985
 986         if (!fcport) {
 987                 cmd->result = DID_NO_CONNECT << 16;
 988                 goto qc24_fail_command;
 989         }
 990
 991         if (atomic_read(&fcport->state) != FCS_ONLINE) {
 992                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
 993                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
 994                         ql_dbg(ql_dbg_io, vha, 0x3077,
 995                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
 996                             atomic_read(&fcport->state),
 997                             atomic_read(&base_vha->loop_state));
 998                         cmd->result = DID_NO_CONNECT << 16;
 999                         goto qc24_fail_command;
1000                 }
1001                 goto qc24_target_busy;
1002         }
1003
1004         /*
1005          * Return target busy if we've received a non-zero retry_delay_timer
1006          * in a FCP_RSP.
1007          */
1008         if (fcport->retry_delay_timestamp == 0) {
1009                 /* retry delay not set */
1010         } else if (time_after(jiffies, fcport->retry_delay_timestamp))
1011                 fcport->retry_delay_timestamp = 0;
1012         else
1013                 goto qc24_target_busy;
1014
1015         sp = qla2xxx_get_qpair_sp(vha, qpair, fcport, GFP_ATOMIC);
1016         if (!sp)
1017                 goto qc24_host_busy;
1018
1019         sp->u.scmd.cmd = cmd;
1020         sp->type = SRB_SCSI_CMD;
1021         atomic_set(&sp->ref_count, 1);
1022         CMD_SP(cmd) = (void *)sp;
1023         sp->free = qla2xxx_qpair_sp_free_dma;
1024         sp->done = qla2xxx_qpair_sp_compl;
1025         sp->qpair = qpair;
1026
1027         rval = ha->isp_ops->start_scsi_mq(sp);
1028         if (rval != QLA_SUCCESS) {
1029                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3078,
1030                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
1031                 if (rval == QLA_INTERFACE_ERROR)
1032                         goto qc24_fail_command;
1033                 goto qc24_host_busy_free_sp;
1034         }
1035
1036         return 0;
1037
1038 qc24_host_busy_free_sp:
1039         sp->free(sp);
1040
1041 qc24_host_busy:
1042         return SCSI_MLQUEUE_HOST_BUSY;
1043
1044 qc24_target_busy:
1045         return SCSI_MLQUEUE_TARGET_BUSY;
1046
1047 qc24_fail_command:
1048         cmd->scsi_done(cmd);
1049
1050         return 0;
1051 }
1052
1053 /*
1054  * qla2x00_eh_wait_on_command
1055  *    Waits for the command to be returned by the Firmware for some
1056  *    max time.
1057  *
1058  * Input:
1059  *    cmd = Scsi Command to wait on.
1060  *
1061  * Return:
1062  *    Not Found : 0
1063  *    Found : 1
1064  */
1065 static int
1066 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
1067 {
1068 #define ABORT_POLLING_PERIOD    1000
1069 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
1070         unsigned long wait_iter = ABORT_WAIT_ITER;
1071         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1072         struct qla_hw_data *ha = vha->hw;
1073         int ret = QLA_SUCCESS;
1074
1075         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
1076                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
1077                     "Return:eh_wait.\n");
1078                 return ret;
1079         }
1080
1081         while (CMD_SP(cmd) && wait_iter--) {
1082                 msleep(ABORT_POLLING_PERIOD);
1083         }
1084         if (CMD_SP(cmd))
1085                 ret = QLA_FUNCTION_FAILED;
1086
1087         return ret;
1088 }
1089
1090 /*
1091  * qla2x00_wait_for_hba_online
1092  *    Wait till the HBA is online after going through
1093  *    <= MAX_RETRIES_OF_ISP_ABORT  or
1094  *    finally HBA is disabled ie marked offline
1095  *
1096  * Input:
1097  *     ha - pointer to host adapter structure
1098  *
1099  * Note:
1100  *    Does context switching-Release SPIN_LOCK
1101  *    (if any) before calling this routine.
1102  *
1103  * Return:
1104  *    Success (Adapter is online) : 0
1105  *    Failed  (Adapter is offline/disabled) : 1
1106  */
1107 int
1108 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
1109 {
1110         int             return_status;
1111         unsigned long   wait_online;
1112         struct qla_hw_data *ha = vha->hw;
1113         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1114
1115         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1116         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1117             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1118             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1119             ha->dpc_active) && time_before(jiffies, wait_online)) {
1120
1121                 msleep(1000);
1122         }
1123         if (base_vha->flags.online)
1124                 return_status = QLA_SUCCESS;
1125         else
1126                 return_status = QLA_FUNCTION_FAILED;
1127
1128         return (return_status);
1129 }
1130
1131 static inline int test_fcport_count(scsi_qla_host_t *vha)
1132 {
1133         struct qla_hw_data *ha = vha->hw;
1134         unsigned long flags;
1135         int res;
1136
1137         spin_lock_irqsave(&ha->tgt.sess_lock, flags);
1138         ql_dbg(ql_dbg_init, vha, 0x00ec,
1139             "tgt %p, fcport_count=%d\n",
1140             vha, vha->fcport_count);
1141         res = (vha->fcport_count == 0);
1142         spin_unlock_irqrestore(&ha->tgt.sess_lock, flags);
1143
1144         return res;
1145 }
1146
1147 /*
1148  * qla2x00_wait_for_sess_deletion can only be called from remove_one.
1149  * it has dependency on UNLOADING flag to stop device discovery
1150  */
1151 void
1152 qla2x00_wait_for_sess_deletion(scsi_qla_host_t *vha)
1153 {
1154         qla2x00_mark_all_devices_lost(vha, 0);
1155
1156         wait_event_timeout(vha->fcport_waitQ, test_fcport_count(vha), 10*HZ);
1157 }
1158
1159 /*
1160  * qla2x00_wait_for_hba_ready
1161  * Wait till the HBA is ready before doing driver unload
1162  *
1163  * Input:
1164  *     ha - pointer to host adapter structure
1165  *
1166  * Note:
1167  *    Does context switching-Release SPIN_LOCK
1168  *    (if any) before calling this routine.
1169  *
1170  */
1171 static void
1172 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
1173 {
1174         struct qla_hw_data *ha = vha->hw;
1175         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1176
1177         while ((qla2x00_reset_active(vha) || ha->dpc_active ||
1178                 ha->flags.mbox_busy) ||
1179                test_bit(FX00_RESET_RECOVERY, &vha->dpc_flags) ||
1180                test_bit(FX00_TARGET_SCAN, &vha->dpc_flags)) {
1181                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
1182                         break;
1183                 msleep(1000);
1184         }
1185 }
1186
1187 int
1188 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
1189 {
1190         int             return_status;
1191         unsigned long   wait_reset;
1192         struct qla_hw_data *ha = vha->hw;
1193         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1194
1195         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
1196         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
1197             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
1198             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
1199             ha->dpc_active) && time_before(jiffies, wait_reset)) {
1200
1201                 msleep(1000);
1202
1203                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
1204                     ha->flags.chip_reset_done)
1205                         break;
1206         }
1207         if (ha->flags.chip_reset_done)
1208                 return_status = QLA_SUCCESS;
1209         else
1210                 return_status = QLA_FUNCTION_FAILED;
1211
1212         return return_status;
1213 }
1214
1215 static int
1216 sp_get(struct srb *sp)
1217 {
1218         if (!refcount_inc_not_zero((refcount_t *)&sp->ref_count))
1219                 /* kref get fail */
1220                 return ENXIO;
1221         else
1222                 return 0;
1223 }
1224
1225 #define ISP_REG_DISCONNECT 0xffffffffU
1226 /**************************************************************************
1227 * qla2x00_isp_reg_stat
1228 *
1229 * Description:
1230 *       Read the host status register of ISP before aborting the command.
1231 *
1232 * Input:
1233 *       ha = pointer to host adapter structure.
1234 *
1235 *
1236 * Returns:
1237 *       Either true or false.
1238 *
1239 * Note: Return true if there is register disconnect.
1240 **************************************************************************/
1241 static inline
1242 uint32_t qla2x00_isp_reg_stat(struct qla_hw_data *ha)
1243 {
1244         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1245         struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82;
1246
1247         if (IS_P3P_TYPE(ha))
1248                 return ((RD_REG_DWORD(&reg82->host_int)) == ISP_REG_DISCONNECT);
1249         else
1250                 return ((RD_REG_DWORD(&reg->host_status)) ==
1251                         ISP_REG_DISCONNECT);
1252 }
1253
1254 /**************************************************************************
1255 * qla2xxx_eh_abort
1256 *
1257 * Description:
1258 *    The abort function will abort the specified command.
1259 *
1260 * Input:
1261 *    cmd = Linux SCSI command packet to be aborted.
1262 *
1263 * Returns:
1264 *    Either SUCCESS or FAILED.
1265 *
1266 * Note:
1267 *    Only return FAILED if command not returned by firmware.
1268 **************************************************************************/
1269 static int
1270 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
1271 {
1272         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1273         DECLARE_COMPLETION_ONSTACK(comp);
1274         srb_t *sp;
1275         int ret;
1276         unsigned int id;
1277         uint64_t lun;
1278         unsigned long flags;
1279         int rval;
1280         struct qla_hw_data *ha = vha->hw;
1281         struct qla_qpair *qpair;
1282
1283         if (qla2x00_isp_reg_stat(ha)) {
1284                 ql_log(ql_log_info, vha, 0x8042,
1285                     "PCI/Register disconnect, exiting.\n");
1286                 return FAILED;
1287         }
1288
1289         ret = fc_block_scsi_eh(cmd);
1290         if (ret != 0)
1291                 return ret;
1292
1293         sp = (srb_t *) CMD_SP(cmd);
1294         if (!sp)
1295                 return SUCCESS;
1296
1297         qpair = sp->qpair;
1298         if (!qpair)
1299                 return SUCCESS;
1300
1301         if (sp->fcport && sp->fcport->deleted)
1302                 return SUCCESS;
1303
1304         spin_lock_irqsave(qpair->qp_lock_ptr, flags);
1305         if (sp->type != SRB_SCSI_CMD || GET_CMD_SP(sp) != cmd) {
1306                 /* there's a chance an interrupt could clear
1307                    the ptr as part of done & free */
1308                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1309                 return SUCCESS;
1310         }
1311
1312         /* Get a reference to the sp and drop the lock. */
1313         if (sp_get(sp)){
1314                 /* ref_count is already 0 */
1315                 spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1316                 return SUCCESS;
1317         }
1318         spin_unlock_irqrestore(qpair->qp_lock_ptr, flags);
1319
1320         id = cmd->device->id;
1321         lun = cmd->device->lun;
1322
1323         ql_dbg(ql_dbg_taskm, vha, 0x8002,
1324             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p handle=%x\n",
1325             vha->host_no, id, lun, sp, cmd, sp->handle);
1326
1327         rval = ha->isp_ops->abort_command(sp);
1328         ql_dbg(ql_dbg_taskm, vha, 0x8003,
1329                "Abort command mbx cmd=%p, rval=%x.\n", cmd, rval);
1330
1331         switch (rval) {
1332         case QLA_SUCCESS:
1333                 /*
1334                  * The command has been aborted. That means that the firmware
1335                  * won't report a completion.
1336                  */
1337                 sp->done(sp, DID_ABORT << 16);
1338                 ret = SUCCESS;
1339                 break;
1340         case QLA_FUNCTION_PARAMETER_ERROR: {
1341                 /* Wait for the command completion. */
1342                 uint32_t ratov = ha->r_a_tov/10;
1343                 uint32_t ratov_j = msecs_to_jiffies(4 * ratov * 1000);
1344
1345                 WARN_ON_ONCE(sp->comp);
1346                 sp->comp = &comp;
1347                 if (!wait_for_completion_timeout(&comp, ratov_j)) {
1348                         ql_dbg(ql_dbg_taskm, vha, 0xffff,
1349                             "%s: Abort wait timer (4 * R_A_TOV[%d]) expired\n",
1350                             __func__, ha->r_a_tov);
1351                         ret = FAILED;
1352                 } else {
1353                         ret = SUCCESS;
1354                 }
1355                 break;
1356         }
1357         default:
1358                 /*
1359                  * Either abort failed or abort and completion raced. Let
1360                  * the SCSI core retry the abort in the former case.
1361                  */
1362                 ret = FAILED;
1363                 break;
1364         }
1365
1366         sp->comp = NULL;
1367         atomic_dec(&sp->ref_count);
1368         ql_log(ql_log_info, vha, 0x801c,
1369             "Abort command issued nexus=%ld:%d:%llu -- %x.\n",
1370             vha->host_no, id, lun, ret);
1371
1372         return ret;
1373 }
1374
1375 int
1376 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1377         uint64_t l, enum nexus_wait_type type)
1378 {
1379         int cnt, match, status;
1380         unsigned long flags;
1381         struct qla_hw_data *ha = vha->hw;
1382         struct req_que *req;
1383         srb_t *sp;
1384         struct scsi_cmnd *cmd;
1385
1386         status = QLA_SUCCESS;
1387
1388         spin_lock_irqsave(&ha->hardware_lock, flags);
1389         req = vha->req;
1390         for (cnt = 1; status == QLA_SUCCESS &&
1391                 cnt < req->num_outstanding_cmds; cnt++) {
1392                 sp = req->outstanding_cmds[cnt];
1393                 if (!sp)
1394                         continue;
1395                 if (sp->type != SRB_SCSI_CMD)
1396                         continue;
1397                 if (vha->vp_idx != sp->vha->vp_idx)
1398                         continue;
1399                 match = 0;
1400                 cmd = GET_CMD_SP(sp);
1401                 switch (type) {
1402                 case WAIT_HOST:
1403                         match = 1;
1404                         break;
1405                 case WAIT_TARGET:
1406                         match = cmd->device->id == t;
1407                         break;
1408                 case WAIT_LUN:
1409                         match = (cmd->device->id == t &&
1410                                 cmd->device->lun == l);
1411                         break;
1412                 }
1413                 if (!match)
1414                         continue;
1415
1416                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1417                 status = qla2x00_eh_wait_on_command(cmd);
1418                 spin_lock_irqsave(&ha->hardware_lock, flags);
1419         }
1420         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1421
1422         return status;
1423 }
1424
1425 static char *reset_errors[] = {
1426         "HBA not online",
1427         "HBA not ready",
1428         "Task management failed",
1429         "Waiting for command completions",
1430 };
1431
1432 static int
1433 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1434     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1435 {
1436         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1437         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1438         int err;
1439
1440         if (!fcport) {
1441                 return FAILED;
1442         }
1443
1444         err = fc_block_scsi_eh(cmd);
1445         if (err != 0)
1446                 return err;
1447
1448         if (fcport->deleted)
1449                 return SUCCESS;
1450
1451         ql_log(ql_log_info, vha, 0x8009,
1452             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1453             cmd->device->id, cmd->device->lun, cmd);
1454
1455         err = 0;
1456         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1457                 ql_log(ql_log_warn, vha, 0x800a,
1458                     "Wait for hba online failed for cmd=%p.\n", cmd);
1459                 goto eh_reset_failed;
1460         }
1461         err = 2;
1462         if (do_reset(fcport, cmd->device->lun, 1)
1463                 != QLA_SUCCESS) {
1464                 ql_log(ql_log_warn, vha, 0x800c,
1465                     "do_reset failed for cmd=%p.\n", cmd);
1466                 goto eh_reset_failed;
1467         }
1468         err = 3;
1469         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1470             cmd->device->lun, type) != QLA_SUCCESS) {
1471                 ql_log(ql_log_warn, vha, 0x800d,
1472                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1473                 goto eh_reset_failed;
1474         }
1475
1476         ql_log(ql_log_info, vha, 0x800e,
1477             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1478             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1479
1480         return SUCCESS;
1481
1482 eh_reset_failed:
1483         ql_log(ql_log_info, vha, 0x800f,
1484             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1485             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1486             cmd);
1487         return FAILED;
1488 }
1489
1490 static int
1491 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1492 {
1493         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1494         struct qla_hw_data *ha = vha->hw;
1495
1496         if (qla2x00_isp_reg_stat(ha)) {
1497                 ql_log(ql_log_info, vha, 0x803e,
1498                     "PCI/Register disconnect, exiting.\n");
1499                 return FAILED;
1500         }
1501
1502         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1503             ha->isp_ops->lun_reset);
1504 }
1505
1506 static int
1507 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1508 {
1509         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1510         struct qla_hw_data *ha = vha->hw;
1511
1512         if (qla2x00_isp_reg_stat(ha)) {
1513                 ql_log(ql_log_info, vha, 0x803f,
1514                     "PCI/Register disconnect, exiting.\n");
1515                 return FAILED;
1516         }
1517
1518         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1519             ha->isp_ops->target_reset);
1520 }
1521
1522 /**************************************************************************
1523 * qla2xxx_eh_bus_reset
1524 *
1525 * Description:
1526 *    The bus reset function will reset the bus and abort any executing
1527 *    commands.
1528 *
1529 * Input:
1530 *    cmd = Linux SCSI command packet of the command that cause the
1531 *          bus reset.
1532 *
1533 * Returns:
1534 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1535 *
1536 **************************************************************************/
1537 static int
1538 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1539 {
1540         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1541         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1542         int ret = FAILED;
1543         unsigned int id;
1544         uint64_t lun;
1545         struct qla_hw_data *ha = vha->hw;
1546
1547         if (qla2x00_isp_reg_stat(ha)) {
1548                 ql_log(ql_log_info, vha, 0x8040,
1549                     "PCI/Register disconnect, exiting.\n");
1550                 return FAILED;
1551         }
1552
1553         id = cmd->device->id;
1554         lun = cmd->device->lun;
1555
1556         if (!fcport) {
1557                 return ret;
1558         }
1559
1560         ret = fc_block_scsi_eh(cmd);
1561         if (ret != 0)
1562                 return ret;
1563         ret = FAILED;
1564
1565         if (qla2x00_chip_is_down(vha))
1566                 return ret;
1567
1568         ql_log(ql_log_info, vha, 0x8012,
1569             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1570
1571         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1572                 ql_log(ql_log_fatal, vha, 0x8013,
1573                     "Wait for hba online failed board disabled.\n");
1574                 goto eh_bus_reset_done;
1575         }
1576
1577         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1578                 ret = SUCCESS;
1579
1580         if (ret == FAILED)
1581                 goto eh_bus_reset_done;
1582
1583         /* Flush outstanding commands. */
1584         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1585             QLA_SUCCESS) {
1586                 ql_log(ql_log_warn, vha, 0x8014,
1587                     "Wait for pending commands failed.\n");
1588                 ret = FAILED;
1589         }
1590
1591 eh_bus_reset_done:
1592         ql_log(ql_log_warn, vha, 0x802b,
1593             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1594             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1595
1596         return ret;
1597 }
1598
1599 /**************************************************************************
1600 * qla2xxx_eh_host_reset
1601 *
1602 * Description:
1603 *    The reset function will reset the Adapter.
1604 *
1605 * Input:
1606 *      cmd = Linux SCSI command packet of the command that cause the
1607 *            adapter reset.
1608 *
1609 * Returns:
1610 *      Either SUCCESS or FAILED.
1611 *
1612 * Note:
1613 **************************************************************************/
1614 static int
1615 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1616 {
1617         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1618         struct qla_hw_data *ha = vha->hw;
1619         int ret = FAILED;
1620         unsigned int id;
1621         uint64_t lun;
1622         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1623
1624         if (qla2x00_isp_reg_stat(ha)) {
1625                 ql_log(ql_log_info, vha, 0x8041,
1626                     "PCI/Register disconnect, exiting.\n");
1627                 schedule_work(&ha->board_disable);
1628                 return SUCCESS;
1629         }
1630
1631         id = cmd->device->id;
1632         lun = cmd->device->lun;
1633
1634         ql_log(ql_log_info, vha, 0x8018,
1635             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1636
1637         /*
1638          * No point in issuing another reset if one is active.  Also do not
1639          * attempt a reset if we are updating flash.
1640          */
1641         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1642                 goto eh_host_reset_lock;
1643
1644         if (vha != base_vha) {
1645                 if (qla2x00_vp_abort_isp(vha))
1646                         goto eh_host_reset_lock;
1647         } else {
1648                 if (IS_P3P_TYPE(vha->hw)) {
1649                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1650                                 /* Ctx reset success */
1651                                 ret = SUCCESS;
1652                                 goto eh_host_reset_lock;
1653                         }
1654                         /* fall thru if ctx reset failed */
1655                 }
1656                 if (ha->wq)
1657                         flush_workqueue(ha->wq);
1658
1659                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1660                 if (ha->isp_ops->abort_isp(base_vha)) {
1661                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1662                         /* failed. schedule dpc to try */
1663                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1664
1665                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1666                                 ql_log(ql_log_warn, vha, 0x802a,
1667                                     "wait for hba online failed.\n");
1668                                 goto eh_host_reset_lock;
1669                         }
1670                 }
1671                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1672         }
1673
1674         /* Waiting for command to be returned to OS.*/
1675         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1676                 QLA_SUCCESS)
1677                 ret = SUCCESS;
1678
1679 eh_host_reset_lock:
1680         ql_log(ql_log_info, vha, 0x8017,
1681             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1682             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1683
1684         return ret;
1685 }
1686
1687 /*
1688 * qla2x00_loop_reset
1689 *      Issue loop reset.
1690 *
1691 * Input:
1692 *      ha = adapter block pointer.
1693 *
1694 * Returns:
1695 *      0 = success
1696 */
1697 int
1698 qla2x00_loop_reset(scsi_qla_host_t *vha)
1699 {
1700         int ret;
1701         struct fc_port *fcport;
1702         struct qla_hw_data *ha = vha->hw;
1703
1704         if (IS_QLAFX00(ha)) {
1705                 return qlafx00_loop_reset(vha);
1706         }
1707
1708         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1709                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1710                         if (fcport->port_type != FCT_TARGET)
1711                                 continue;
1712
1713                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1714                         if (ret != QLA_SUCCESS) {
1715                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1716                                     "Bus Reset failed: Reset=%d "
1717                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1718                         }
1719                 }
1720         }
1721
1722
1723         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1724                 atomic_set(&vha->loop_state, LOOP_DOWN);
1725                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1726                 qla2x00_mark_all_devices_lost(vha, 0);
1727                 ret = qla2x00_full_login_lip(vha);
1728                 if (ret != QLA_SUCCESS) {
1729                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1730                             "full_login_lip=%d.\n", ret);
1731                 }
1732         }
1733
1734         if (ha->flags.enable_lip_reset) {
1735                 ret = qla2x00_lip_reset(vha);
1736                 if (ret != QLA_SUCCESS)
1737                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1738                             "lip_reset failed (%d).\n", ret);
1739         }
1740
1741         /* Issue marker command only when we are going to start the I/O */
1742         vha->marker_needed = 1;
1743
1744         return QLA_SUCCESS;
1745 }
1746
1747 static void qla2x00_abort_srb(struct qla_qpair *qp, srb_t *sp, const int res,
1748                               unsigned long *flags)
1749         __releases(qp->qp_lock_ptr)
1750         __acquires(qp->qp_lock_ptr)
1751 {
1752         DECLARE_COMPLETION_ONSTACK(comp);
1753         scsi_qla_host_t *vha = qp->vha;
1754         struct qla_hw_data *ha = vha->hw;
1755         int rval;
1756
1757         if (sp_get(sp))
1758                 return;
1759
1760         if (sp->type == SRB_NVME_CMD || sp->type == SRB_NVME_LS ||
1761             (sp->type == SRB_SCSI_CMD && !ha->flags.eeh_busy &&
1762              !test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags) &&
1763              !qla2x00_isp_reg_stat(ha))) {
1764                 sp->comp = &comp;
1765                 spin_unlock_irqrestore(qp->qp_lock_ptr, *flags);
1766                 rval = ha->isp_ops->abort_command(sp);
1767
1768                 switch (rval) {
1769                 case QLA_SUCCESS:
1770                         sp->done(sp, res);
1771                         break;
1772                 case QLA_FUNCTION_PARAMETER_ERROR:
1773                         wait_for_completion(&comp);
1774                         break;
1775                 }
1776
1777                 spin_lock_irqsave(qp->qp_lock_ptr, *flags);
1778                 sp->comp = NULL;
1779         }
1780
1781         atomic_dec(&sp->ref_count);
1782 }
1783
1784 static void
1785 __qla2x00_abort_all_cmds(struct qla_qpair *qp, int res)
1786 {
1787         int cnt;
1788         unsigned long flags;
1789         srb_t *sp;
1790         scsi_qla_host_t *vha = qp->vha;
1791         struct qla_hw_data *ha = vha->hw;
1792         struct req_que *req;
1793         struct qla_tgt *tgt = vha->vha_tgt.qla_tgt;
1794         struct qla_tgt_cmd *cmd;
1795
1796         if (!ha->req_q_map)
1797                 return;
1798         spin_lock_irqsave(qp->qp_lock_ptr, flags);
1799         req = qp->req;
1800         for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1801                 sp = req->outstanding_cmds[cnt];
1802                 if (sp) {
1803                         req->outstanding_cmds[cnt] = NULL;
1804                         switch (sp->cmd_type) {
1805                         case TYPE_SRB:
1806                                 qla2x00_abort_srb(qp, sp, res, &flags);
1807                                 break;
1808                         case TYPE_TGT_CMD:
1809                                 if (!vha->hw->tgt.tgt_ops || !tgt ||
1810                                     qla_ini_mode_enabled(vha)) {
1811                                         ql_dbg(ql_dbg_tgt_mgt, vha, 0xf003,
1812                                             "HOST-ABORT-HNDLR: dpc_flags=%lx. Target mode disabled\n",
1813                                             vha->dpc_flags);
1814                                         continue;
1815                                 }
1816                                 cmd = (struct qla_tgt_cmd *)sp;
1817                                 cmd->aborted = 1;
1818                                 break;
1819                         case TYPE_TGT_TMCMD:
1820                                 /* Skip task management functions. */
1821                                 break;
1822                         default:
1823                                 break;
1824                         }
1825                 }
1826         }
1827         spin_unlock_irqrestore(qp->qp_lock_ptr, flags);
1828 }
1829
1830 void
1831 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1832 {
1833         int que;
1834         struct qla_hw_data *ha = vha->hw;
1835
1836         /* Continue only if initialization complete. */
1837         if (!ha->base_qpair)
1838                 return;
1839         __qla2x00_abort_all_cmds(ha->base_qpair, res);
1840
1841         if (!ha->queue_pair_map)
1842                 return;
1843         for (que = 0; que < ha->max_qpairs; que++) {
1844                 if (!ha->queue_pair_map[que])
1845                         continue;
1846
1847                 __qla2x00_abort_all_cmds(ha->queue_pair_map[que], res);
1848         }
1849 }
1850
1851 static int
1852 qla2xxx_slave_alloc(struct scsi_device *sdev)
1853 {
1854         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1855
1856         if (!rport || fc_remote_port_chkready(rport))
1857                 return -ENXIO;
1858
1859         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1860
1861         return 0;
1862 }
1863
1864 static int
1865 qla2xxx_slave_configure(struct scsi_device *sdev)
1866 {
1867         scsi_qla_host_t *vha = shost_priv(sdev->host);
1868         struct req_que *req = vha->req;
1869
1870         if (IS_T10_PI_CAPABLE(vha->hw))
1871                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1872
1873         scsi_change_queue_depth(sdev, req->max_q_depth);
1874         return 0;
1875 }
1876
1877 static void
1878 qla2xxx_slave_destroy(struct scsi_device *sdev)
1879 {
1880         sdev->hostdata = NULL;
1881 }
1882
1883 /**
1884  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1885  * @ha: HA context
1886  *
1887  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1888  * supported addressing method.
1889  */
1890 static void
1891 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1892 {
1893         /* Assume a 32bit DMA mask. */
1894         ha->flags.enable_64bit_addressing = 0;
1895
1896         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1897                 /* Any upper-dword bits set? */
1898                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1899                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1900                         /* Ok, a 64bit DMA mask is applicable. */
1901                         ha->flags.enable_64bit_addressing = 1;
1902                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1903                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1904                         return;
1905                 }
1906         }
1907
1908         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1909         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1910 }
1911
1912 static void
1913 qla2x00_enable_intrs(struct qla_hw_data *ha)
1914 {
1915         unsigned long flags = 0;
1916         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1917
1918         spin_lock_irqsave(&ha->hardware_lock, flags);
1919         ha->interrupts_on = 1;
1920         /* enable risc and host interrupts */
1921         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1922         RD_REG_WORD(&reg->ictrl);
1923         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1924
1925 }
1926
1927 static void
1928 qla2x00_disable_intrs(struct qla_hw_data *ha)
1929 {
1930         unsigned long flags = 0;
1931         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1932
1933         spin_lock_irqsave(&ha->hardware_lock, flags);
1934         ha->interrupts_on = 0;
1935         /* disable risc and host interrupts */
1936         WRT_REG_WORD(&reg->ictrl, 0);
1937         RD_REG_WORD(&reg->ictrl);
1938         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1939 }
1940
1941 static void
1942 qla24xx_enable_intrs(struct qla_hw_data *ha)
1943 {
1944         unsigned long flags = 0;
1945         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1946
1947         spin_lock_irqsave(&ha->hardware_lock, flags);
1948         ha->interrupts_on = 1;
1949         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1950         RD_REG_DWORD(&reg->ictrl);
1951         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1952 }
1953
1954 static void
1955 qla24xx_disable_intrs(struct qla_hw_data *ha)
1956 {
1957         unsigned long flags = 0;
1958         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1959
1960         if (IS_NOPOLLING_TYPE(ha))
1961                 return;
1962         spin_lock_irqsave(&ha->hardware_lock, flags);
1963         ha->interrupts_on = 0;
1964         WRT_REG_DWORD(&reg->ictrl, 0);
1965         RD_REG_DWORD(&reg->ictrl);
1966         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1967 }
1968
1969 static int
1970 qla2x00_iospace_config(struct qla_hw_data *ha)
1971 {
1972         resource_size_t pio;
1973         uint16_t msix;
1974
1975         if (pci_request_selected_regions(ha->pdev, ha->bars,
1976             QLA2XXX_DRIVER_NAME)) {
1977                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1978                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1979                     pci_name(ha->pdev));
1980                 goto iospace_error_exit;
1981         }
1982         if (!(ha->bars & 1))
1983                 goto skip_pio;
1984
1985         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1986         pio = pci_resource_start(ha->pdev, 0);
1987         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1988                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1989                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1990                             "Invalid pci I/O region size (%s).\n",
1991                             pci_name(ha->pdev));
1992                         pio = 0;
1993                 }
1994         } else {
1995                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1996                     "Region #0 no a PIO resource (%s).\n",
1997                     pci_name(ha->pdev));
1998                 pio = 0;
1999         }
2000         ha->pio_address = pio;
2001         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
2002             "PIO address=%llu.\n",
2003             (unsigned long long)ha->pio_address);
2004
2005 skip_pio:
2006         /* Use MMIO operations for all accesses. */
2007         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
2008                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
2009                     "Region #1 not an MMIO resource (%s), aborting.\n",
2010                     pci_name(ha->pdev));
2011                 goto iospace_error_exit;
2012         }
2013         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
2014                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
2015                     "Invalid PCI mem region size (%s), aborting.\n",
2016                     pci_name(ha->pdev));
2017                 goto iospace_error_exit;
2018         }
2019
2020         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
2021         if (!ha->iobase) {
2022                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
2023                     "Cannot remap MMIO (%s), aborting.\n",
2024                     pci_name(ha->pdev));
2025                 goto iospace_error_exit;
2026         }
2027
2028         /* Determine queue resources */
2029         ha->max_req_queues = ha->max_rsp_queues = 1;
2030         ha->msix_count = QLA_BASE_VECTORS;
2031         if (!ql2xmqsupport || !ql2xnvmeenable ||
2032             (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
2033                 goto mqiobase_exit;
2034
2035         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
2036                         pci_resource_len(ha->pdev, 3));
2037         if (ha->mqiobase) {
2038                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
2039                     "MQIO Base=%p.\n", ha->mqiobase);
2040                 /* Read MSIX vector size of the board */
2041                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
2042                 ha->msix_count = msix + 1;
2043                 /* Max queues are bounded by available msix vectors */
2044                 /* MB interrupt uses 1 vector */
2045                 ha->max_req_queues = ha->msix_count - 1;
2046                 ha->max_rsp_queues = ha->max_req_queues;
2047                 /* Queue pairs is the max value minus the base queue pair */
2048                 ha->max_qpairs = ha->max_rsp_queues - 1;
2049                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0188,
2050                     "Max no of queues pairs: %d.\n", ha->max_qpairs);
2051
2052                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
2053                     "MSI-X vector count: %d.\n", ha->msix_count);
2054         } else
2055                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
2056                     "BAR 3 not enabled.\n");
2057
2058 mqiobase_exit:
2059         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
2060             "MSIX Count: %d.\n", ha->msix_count);
2061         return (0);
2062
2063 iospace_error_exit:
2064         return (-ENOMEM);
2065 }
2066
2067
2068 static int
2069 qla83xx_iospace_config(struct qla_hw_data *ha)
2070 {
2071         uint16_t msix;
2072
2073         if (pci_request_selected_regions(ha->pdev, ha->bars,
2074             QLA2XXX_DRIVER_NAME)) {
2075                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
2076                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
2077                     pci_name(ha->pdev));
2078
2079                 goto iospace_error_exit;
2080         }
2081
2082         /* Use MMIO operations for all accesses. */
2083         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
2084                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
2085                     "Invalid pci I/O region size (%s).\n",
2086                     pci_name(ha->pdev));
2087                 goto iospace_error_exit;
2088         }
2089         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
2090                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
2091                     "Invalid PCI mem region size (%s), aborting\n",
2092                         pci_name(ha->pdev));
2093                 goto iospace_error_exit;
2094         }
2095
2096         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
2097         if (!ha->iobase) {
2098                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
2099                     "Cannot remap MMIO (%s), aborting.\n",
2100                     pci_name(ha->pdev));
2101                 goto iospace_error_exit;
2102         }
2103
2104         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
2105         /* 83XX 26XX always use MQ type access for queues
2106          * - mbar 2, a.k.a region 4 */
2107         ha->max_req_queues = ha->max_rsp_queues = 1;
2108         ha->msix_count = QLA_BASE_VECTORS;
2109         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
2110                         pci_resource_len(ha->pdev, 4));
2111
2112         if (!ha->mqiobase) {
2113                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
2114                     "BAR2/region4 not enabled\n");
2115                 goto mqiobase_exit;
2116         }
2117
2118         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
2119                         pci_resource_len(ha->pdev, 2));
2120         if (ha->msixbase) {
2121                 /* Read MSIX vector size of the board */
2122                 pci_read_config_word(ha->pdev,
2123                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
2124                 ha->msix_count = (msix & PCI_MSIX_FLAGS_QSIZE)  + 1;
2125                 /*
2126                  * By default, driver uses at least two msix vectors
2127                  * (default & rspq)
2128                  */
2129                 if (ql2xmqsupport || ql2xnvmeenable) {
2130                         /* MB interrupt uses 1 vector */
2131                         ha->max_req_queues = ha->msix_count - 1;
2132
2133                         /* ATIOQ needs 1 vector. That's 1 less QPair */
2134                         if (QLA_TGT_MODE_ENABLED())
2135                                 ha->max_req_queues--;
2136
2137                         ha->max_rsp_queues = ha->max_req_queues;
2138
2139                         /* Queue pairs is the max value minus
2140                          * the base queue pair */
2141                         ha->max_qpairs = ha->max_req_queues - 1;
2142                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x00e3,
2143                             "Max no of queues pairs: %d.\n", ha->max_qpairs);
2144                 }
2145                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
2146                     "MSI-X vector count: %d.\n", ha->msix_count);
2147         } else
2148                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
2149                     "BAR 1 not enabled.\n");
2150
2151 mqiobase_exit:
2152         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
2153             "MSIX Count: %d.\n", ha->msix_count);
2154         return 0;
2155
2156 iospace_error_exit:
2157         return -ENOMEM;
2158 }
2159
2160 static struct isp_operations qla2100_isp_ops = {
2161         .pci_config             = qla2100_pci_config,
2162         .reset_chip             = qla2x00_reset_chip,
2163         .chip_diag              = qla2x00_chip_diag,
2164         .config_rings           = qla2x00_config_rings,
2165         .reset_adapter          = qla2x00_reset_adapter,
2166         .nvram_config           = qla2x00_nvram_config,
2167         .update_fw_options      = qla2x00_update_fw_options,
2168         .load_risc              = qla2x00_load_risc,
2169         .pci_info_str           = qla2x00_pci_info_str,
2170         .fw_version_str         = qla2x00_fw_version_str,
2171         .intr_handler           = qla2100_intr_handler,
2172         .enable_intrs           = qla2x00_enable_intrs,
2173         .disable_intrs          = qla2x00_disable_intrs,
2174         .abort_command          = qla2x00_abort_command,
2175         .target_reset           = qla2x00_abort_target,
2176         .lun_reset              = qla2x00_lun_reset,
2177         .fabric_login           = qla2x00_login_fabric,
2178         .fabric_logout          = qla2x00_fabric_logout,
2179         .calc_req_entries       = qla2x00_calc_iocbs_32,
2180         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2181         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2182         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2183         .read_nvram             = qla2x00_read_nvram_data,
2184         .write_nvram            = qla2x00_write_nvram_data,
2185         .fw_dump                = qla2100_fw_dump,
2186         .beacon_on              = NULL,
2187         .beacon_off             = NULL,
2188         .beacon_blink           = NULL,
2189         .read_optrom            = qla2x00_read_optrom_data,
2190         .write_optrom           = qla2x00_write_optrom_data,
2191         .get_flash_version      = qla2x00_get_flash_version,
2192         .start_scsi             = qla2x00_start_scsi,
2193         .start_scsi_mq          = NULL,
2194         .abort_isp              = qla2x00_abort_isp,
2195         .iospace_config         = qla2x00_iospace_config,
2196         .initialize_adapter     = qla2x00_initialize_adapter,
2197 };
2198
2199 static struct isp_operations qla2300_isp_ops = {
2200         .pci_config             = qla2300_pci_config,
2201         .reset_chip             = qla2x00_reset_chip,
2202         .chip_diag              = qla2x00_chip_diag,
2203         .config_rings           = qla2x00_config_rings,
2204         .reset_adapter          = qla2x00_reset_adapter,
2205         .nvram_config           = qla2x00_nvram_config,
2206         .update_fw_options      = qla2x00_update_fw_options,
2207         .load_risc              = qla2x00_load_risc,
2208         .pci_info_str           = qla2x00_pci_info_str,
2209         .fw_version_str         = qla2x00_fw_version_str,
2210         .intr_handler           = qla2300_intr_handler,
2211         .enable_intrs           = qla2x00_enable_intrs,
2212         .disable_intrs          = qla2x00_disable_intrs,
2213         .abort_command          = qla2x00_abort_command,
2214         .target_reset           = qla2x00_abort_target,
2215         .lun_reset              = qla2x00_lun_reset,
2216         .fabric_login           = qla2x00_login_fabric,
2217         .fabric_logout          = qla2x00_fabric_logout,
2218         .calc_req_entries       = qla2x00_calc_iocbs_32,
2219         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
2220         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
2221         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
2222         .read_nvram             = qla2x00_read_nvram_data,
2223         .write_nvram            = qla2x00_write_nvram_data,
2224         .fw_dump                = qla2300_fw_dump,
2225         .beacon_on              = qla2x00_beacon_on,
2226         .beacon_off             = qla2x00_beacon_off,
2227         .beacon_blink           = qla2x00_beacon_blink,
2228         .read_optrom            = qla2x00_read_optrom_data,
2229         .write_optrom           = qla2x00_write_optrom_data,
2230         .get_flash_version      = qla2x00_get_flash_version,
2231         .start_scsi             = qla2x00_start_scsi,
2232         .start_scsi_mq          = NULL,
2233         .abort_isp              = qla2x00_abort_isp,
2234         .iospace_config         = qla2x00_iospace_config,
2235         .initialize_adapter     = qla2x00_initialize_adapter,
2236 };
2237
2238 static struct isp_operations qla24xx_isp_ops = {
2239         .pci_config             = qla24xx_pci_config,
2240         .reset_chip             = qla24xx_reset_chip,
2241         .chip_diag              = qla24xx_chip_diag,
2242         .config_rings           = qla24xx_config_rings,
2243         .reset_adapter          = qla24xx_reset_adapter,
2244         .nvram_config           = qla24xx_nvram_config,
2245         .update_fw_options      = qla24xx_update_fw_options,
2246         .load_risc              = qla24xx_load_risc,
2247         .pci_info_str           = qla24xx_pci_info_str,
2248         .fw_version_str         = qla24xx_fw_version_str,
2249         .intr_handler           = qla24xx_intr_handler,
2250         .enable_intrs           = qla24xx_enable_intrs,
2251         .disable_intrs          = qla24xx_disable_intrs,
2252         .abort_command          = qla24xx_abort_command,
2253         .target_reset           = qla24xx_abort_target,
2254         .lun_reset              = qla24xx_lun_reset,
2255         .fabric_login           = qla24xx_login_fabric,
2256         .fabric_logout          = qla24xx_fabric_logout,
2257         .calc_req_entries       = NULL,
2258         .build_iocbs            = NULL,
2259         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2260         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2261         .read_nvram             = qla24xx_read_nvram_data,
2262         .write_nvram            = qla24xx_write_nvram_data,
2263         .fw_dump                = qla24xx_fw_dump,
2264         .beacon_on              = qla24xx_beacon_on,
2265         .beacon_off             = qla24xx_beacon_off,
2266         .beacon_blink           = qla24xx_beacon_blink,
2267         .read_optrom            = qla24xx_read_optrom_data,
2268         .write_optrom           = qla24xx_write_optrom_data,
2269         .get_flash_version      = qla24xx_get_flash_version,
2270         .start_scsi             = qla24xx_start_scsi,
2271         .start_scsi_mq          = NULL,
2272         .abort_isp              = qla2x00_abort_isp,
2273         .iospace_config         = qla2x00_iospace_config,
2274         .initialize_adapter     = qla2x00_initialize_adapter,
2275 };
2276
2277 static struct isp_operations qla25xx_isp_ops = {
2278         .pci_config             = qla25xx_pci_config,
2279         .reset_chip             = qla24xx_reset_chip,
2280         .chip_diag              = qla24xx_chip_diag,
2281         .config_rings           = qla24xx_config_rings,
2282         .reset_adapter          = qla24xx_reset_adapter,
2283         .nvram_config           = qla24xx_nvram_config,
2284         .update_fw_options      = qla24xx_update_fw_options,
2285         .load_risc              = qla24xx_load_risc,
2286         .pci_info_str           = qla24xx_pci_info_str,
2287         .fw_version_str         = qla24xx_fw_version_str,
2288         .intr_handler           = qla24xx_intr_handler,
2289         .enable_intrs           = qla24xx_enable_intrs,
2290         .disable_intrs          = qla24xx_disable_intrs,
2291         .abort_command          = qla24xx_abort_command,
2292         .target_reset           = qla24xx_abort_target,
2293         .lun_reset              = qla24xx_lun_reset,
2294         .fabric_login           = qla24xx_login_fabric,
2295         .fabric_logout          = qla24xx_fabric_logout,
2296         .calc_req_entries       = NULL,
2297         .build_iocbs            = NULL,
2298         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2299         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2300         .read_nvram             = qla25xx_read_nvram_data,
2301         .write_nvram            = qla25xx_write_nvram_data,
2302         .fw_dump                = qla25xx_fw_dump,
2303         .beacon_on              = qla24xx_beacon_on,
2304         .beacon_off             = qla24xx_beacon_off,
2305         .beacon_blink           = qla24xx_beacon_blink,
2306         .read_optrom            = qla25xx_read_optrom_data,
2307         .write_optrom           = qla24xx_write_optrom_data,
2308         .get_flash_version      = qla24xx_get_flash_version,
2309         .start_scsi             = qla24xx_dif_start_scsi,
2310         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2311         .abort_isp              = qla2x00_abort_isp,
2312         .iospace_config         = qla2x00_iospace_config,
2313         .initialize_adapter     = qla2x00_initialize_adapter,
2314 };
2315
2316 static struct isp_operations qla81xx_isp_ops = {
2317         .pci_config             = qla25xx_pci_config,
2318         .reset_chip             = qla24xx_reset_chip,
2319         .chip_diag              = qla24xx_chip_diag,
2320         .config_rings           = qla24xx_config_rings,
2321         .reset_adapter          = qla24xx_reset_adapter,
2322         .nvram_config           = qla81xx_nvram_config,
2323         .update_fw_options      = qla81xx_update_fw_options,
2324         .load_risc              = qla81xx_load_risc,
2325         .pci_info_str           = qla24xx_pci_info_str,
2326         .fw_version_str         = qla24xx_fw_version_str,
2327         .intr_handler           = qla24xx_intr_handler,
2328         .enable_intrs           = qla24xx_enable_intrs,
2329         .disable_intrs          = qla24xx_disable_intrs,
2330         .abort_command          = qla24xx_abort_command,
2331         .target_reset           = qla24xx_abort_target,
2332         .lun_reset              = qla24xx_lun_reset,
2333         .fabric_login           = qla24xx_login_fabric,
2334         .fabric_logout          = qla24xx_fabric_logout,
2335         .calc_req_entries       = NULL,
2336         .build_iocbs            = NULL,
2337         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2338         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2339         .read_nvram             = NULL,
2340         .write_nvram            = NULL,
2341         .fw_dump                = qla81xx_fw_dump,
2342         .beacon_on              = qla24xx_beacon_on,
2343         .beacon_off             = qla24xx_beacon_off,
2344         .beacon_blink           = qla83xx_beacon_blink,
2345         .read_optrom            = qla25xx_read_optrom_data,
2346         .write_optrom           = qla24xx_write_optrom_data,
2347         .get_flash_version      = qla24xx_get_flash_version,
2348         .start_scsi             = qla24xx_dif_start_scsi,
2349         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2350         .abort_isp              = qla2x00_abort_isp,
2351         .iospace_config         = qla2x00_iospace_config,
2352         .initialize_adapter     = qla2x00_initialize_adapter,
2353 };
2354
2355 static struct isp_operations qla82xx_isp_ops = {
2356         .pci_config             = qla82xx_pci_config,
2357         .reset_chip             = qla82xx_reset_chip,
2358         .chip_diag              = qla24xx_chip_diag,
2359         .config_rings           = qla82xx_config_rings,
2360         .reset_adapter          = qla24xx_reset_adapter,
2361         .nvram_config           = qla81xx_nvram_config,
2362         .update_fw_options      = qla24xx_update_fw_options,
2363         .load_risc              = qla82xx_load_risc,
2364         .pci_info_str           = qla24xx_pci_info_str,
2365         .fw_version_str         = qla24xx_fw_version_str,
2366         .intr_handler           = qla82xx_intr_handler,
2367         .enable_intrs           = qla82xx_enable_intrs,
2368         .disable_intrs          = qla82xx_disable_intrs,
2369         .abort_command          = qla24xx_abort_command,
2370         .target_reset           = qla24xx_abort_target,
2371         .lun_reset              = qla24xx_lun_reset,
2372         .fabric_login           = qla24xx_login_fabric,
2373         .fabric_logout          = qla24xx_fabric_logout,
2374         .calc_req_entries       = NULL,
2375         .build_iocbs            = NULL,
2376         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2377         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2378         .read_nvram             = qla24xx_read_nvram_data,
2379         .write_nvram            = qla24xx_write_nvram_data,
2380         .fw_dump                = qla82xx_fw_dump,
2381         .beacon_on              = qla82xx_beacon_on,
2382         .beacon_off             = qla82xx_beacon_off,
2383         .beacon_blink           = NULL,
2384         .read_optrom            = qla82xx_read_optrom_data,
2385         .write_optrom           = qla82xx_write_optrom_data,
2386         .get_flash_version      = qla82xx_get_flash_version,
2387         .start_scsi             = qla82xx_start_scsi,
2388         .start_scsi_mq          = NULL,
2389         .abort_isp              = qla82xx_abort_isp,
2390         .iospace_config         = qla82xx_iospace_config,
2391         .initialize_adapter     = qla2x00_initialize_adapter,
2392 };
2393
2394 static struct isp_operations qla8044_isp_ops = {
2395         .pci_config             = qla82xx_pci_config,
2396         .reset_chip             = qla82xx_reset_chip,
2397         .chip_diag              = qla24xx_chip_diag,
2398         .config_rings           = qla82xx_config_rings,
2399         .reset_adapter          = qla24xx_reset_adapter,
2400         .nvram_config           = qla81xx_nvram_config,
2401         .update_fw_options      = qla24xx_update_fw_options,
2402         .load_risc              = qla82xx_load_risc,
2403         .pci_info_str           = qla24xx_pci_info_str,
2404         .fw_version_str         = qla24xx_fw_version_str,
2405         .intr_handler           = qla8044_intr_handler,
2406         .enable_intrs           = qla82xx_enable_intrs,
2407         .disable_intrs          = qla82xx_disable_intrs,
2408         .abort_command          = qla24xx_abort_command,
2409         .target_reset           = qla24xx_abort_target,
2410         .lun_reset              = qla24xx_lun_reset,
2411         .fabric_login           = qla24xx_login_fabric,
2412         .fabric_logout          = qla24xx_fabric_logout,
2413         .calc_req_entries       = NULL,
2414         .build_iocbs            = NULL,
2415         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2416         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2417         .read_nvram             = NULL,
2418         .write_nvram            = NULL,
2419         .fw_dump                = qla8044_fw_dump,
2420         .beacon_on              = qla82xx_beacon_on,
2421         .beacon_off             = qla82xx_beacon_off,
2422         .beacon_blink           = NULL,
2423         .read_optrom            = qla8044_read_optrom_data,
2424         .write_optrom           = qla8044_write_optrom_data,
2425         .get_flash_version      = qla82xx_get_flash_version,
2426         .start_scsi             = qla82xx_start_scsi,
2427         .start_scsi_mq          = NULL,
2428         .abort_isp              = qla8044_abort_isp,
2429         .iospace_config         = qla82xx_iospace_config,
2430         .initialize_adapter     = qla2x00_initialize_adapter,
2431 };
2432
2433 static struct isp_operations qla83xx_isp_ops = {
2434         .pci_config             = qla25xx_pci_config,
2435         .reset_chip             = qla24xx_reset_chip,
2436         .chip_diag              = qla24xx_chip_diag,
2437         .config_rings           = qla24xx_config_rings,
2438         .reset_adapter          = qla24xx_reset_adapter,
2439         .nvram_config           = qla81xx_nvram_config,
2440         .update_fw_options      = qla81xx_update_fw_options,
2441         .load_risc              = qla81xx_load_risc,
2442         .pci_info_str           = qla24xx_pci_info_str,
2443         .fw_version_str         = qla24xx_fw_version_str,
2444         .intr_handler           = qla24xx_intr_handler,
2445         .enable_intrs           = qla24xx_enable_intrs,
2446         .disable_intrs          = qla24xx_disable_intrs,
2447         .abort_command          = qla24xx_abort_command,
2448         .target_reset           = qla24xx_abort_target,
2449         .lun_reset              = qla24xx_lun_reset,
2450         .fabric_login           = qla24xx_login_fabric,
2451         .fabric_logout          = qla24xx_fabric_logout,
2452         .calc_req_entries       = NULL,
2453         .build_iocbs            = NULL,
2454         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2455         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2456         .read_nvram             = NULL,
2457         .write_nvram            = NULL,
2458         .fw_dump                = qla83xx_fw_dump,
2459         .beacon_on              = qla24xx_beacon_on,
2460         .beacon_off             = qla24xx_beacon_off,
2461         .beacon_blink           = qla83xx_beacon_blink,
2462         .read_optrom            = qla25xx_read_optrom_data,
2463         .write_optrom           = qla24xx_write_optrom_data,
2464         .get_flash_version      = qla24xx_get_flash_version,
2465         .start_scsi             = qla24xx_dif_start_scsi,
2466         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2467         .abort_isp              = qla2x00_abort_isp,
2468         .iospace_config         = qla83xx_iospace_config,
2469         .initialize_adapter     = qla2x00_initialize_adapter,
2470 };
2471
2472 static struct isp_operations qlafx00_isp_ops = {
2473         .pci_config             = qlafx00_pci_config,
2474         .reset_chip             = qlafx00_soft_reset,
2475         .chip_diag              = qlafx00_chip_diag,
2476         .config_rings           = qlafx00_config_rings,
2477         .reset_adapter          = qlafx00_soft_reset,
2478         .nvram_config           = NULL,
2479         .update_fw_options      = NULL,
2480         .load_risc              = NULL,
2481         .pci_info_str           = qlafx00_pci_info_str,
2482         .fw_version_str         = qlafx00_fw_version_str,
2483         .intr_handler           = qlafx00_intr_handler,
2484         .enable_intrs           = qlafx00_enable_intrs,
2485         .disable_intrs          = qlafx00_disable_intrs,
2486         .abort_command          = qla24xx_async_abort_command,
2487         .target_reset           = qlafx00_abort_target,
2488         .lun_reset              = qlafx00_lun_reset,
2489         .fabric_login           = NULL,
2490         .fabric_logout          = NULL,
2491         .calc_req_entries       = NULL,
2492         .build_iocbs            = NULL,
2493         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2494         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2495         .read_nvram             = qla24xx_read_nvram_data,
2496         .write_nvram            = qla24xx_write_nvram_data,
2497         .fw_dump                = NULL,
2498         .beacon_on              = qla24xx_beacon_on,
2499         .beacon_off             = qla24xx_beacon_off,
2500         .beacon_blink           = NULL,
2501         .read_optrom            = qla24xx_read_optrom_data,
2502         .write_optrom           = qla24xx_write_optrom_data,
2503         .get_flash_version      = qla24xx_get_flash_version,
2504         .start_scsi             = qlafx00_start_scsi,
2505         .start_scsi_mq          = NULL,
2506         .abort_isp              = qlafx00_abort_isp,
2507         .iospace_config         = qlafx00_iospace_config,
2508         .initialize_adapter     = qlafx00_initialize_adapter,
2509 };
2510
2511 static struct isp_operations qla27xx_isp_ops = {
2512         .pci_config             = qla25xx_pci_config,
2513         .reset_chip             = qla24xx_reset_chip,
2514         .chip_diag              = qla24xx_chip_diag,
2515         .config_rings           = qla24xx_config_rings,
2516         .reset_adapter          = qla24xx_reset_adapter,
2517         .nvram_config           = qla81xx_nvram_config,
2518         .update_fw_options      = qla24xx_update_fw_options,
2519         .load_risc              = qla81xx_load_risc,
2520         .pci_info_str           = qla24xx_pci_info_str,
2521         .fw_version_str         = qla24xx_fw_version_str,
2522         .intr_handler           = qla24xx_intr_handler,
2523         .enable_intrs           = qla24xx_enable_intrs,
2524         .disable_intrs          = qla24xx_disable_intrs,
2525         .abort_command          = qla24xx_abort_command,
2526         .target_reset           = qla24xx_abort_target,
2527         .lun_reset              = qla24xx_lun_reset,
2528         .fabric_login           = qla24xx_login_fabric,
2529         .fabric_logout          = qla24xx_fabric_logout,
2530         .calc_req_entries       = NULL,
2531         .build_iocbs            = NULL,
2532         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2533         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2534         .read_nvram             = NULL,
2535         .write_nvram            = NULL,
2536         .fw_dump                = qla27xx_fwdump,
2537         .beacon_on              = qla24xx_beacon_on,
2538         .beacon_off             = qla24xx_beacon_off,
2539         .beacon_blink           = qla83xx_beacon_blink,
2540         .read_optrom            = qla25xx_read_optrom_data,
2541         .write_optrom           = qla24xx_write_optrom_data,
2542         .get_flash_version      = qla24xx_get_flash_version,
2543         .start_scsi             = qla24xx_dif_start_scsi,
2544         .start_scsi_mq          = qla2xxx_dif_start_scsi_mq,
2545         .abort_isp              = qla2x00_abort_isp,
2546         .iospace_config         = qla83xx_iospace_config,
2547         .initialize_adapter     = qla2x00_initialize_adapter,
2548 };
2549
2550 static inline void
2551 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2552 {
2553         ha->device_type = DT_EXTENDED_IDS;
2554         switch (ha->pdev->device) {
2555         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2556                 ha->isp_type |= DT_ISP2100;
2557                 ha->device_type &= ~DT_EXTENDED_IDS;
2558                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2559                 break;
2560         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2561                 ha->isp_type |= DT_ISP2200;
2562                 ha->device_type &= ~DT_EXTENDED_IDS;
2563                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2564                 break;
2565         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2566                 ha->isp_type |= DT_ISP2300;
2567                 ha->device_type |= DT_ZIO_SUPPORTED;
2568                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2569                 break;
2570         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2571                 ha->isp_type |= DT_ISP2312;
2572                 ha->device_type |= DT_ZIO_SUPPORTED;
2573                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2574                 break;
2575         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2576                 ha->isp_type |= DT_ISP2322;
2577                 ha->device_type |= DT_ZIO_SUPPORTED;
2578                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2579                     ha->pdev->subsystem_device == 0x0170)
2580                         ha->device_type |= DT_OEM_001;
2581                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2582                 break;
2583         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2584                 ha->isp_type |= DT_ISP6312;
2585                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2586                 break;
2587         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2588                 ha->isp_type |= DT_ISP6322;
2589                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2590                 break;
2591         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2592                 ha->isp_type |= DT_ISP2422;
2593                 ha->device_type |= DT_ZIO_SUPPORTED;
2594                 ha->device_type |= DT_FWI2;
2595                 ha->device_type |= DT_IIDMA;
2596                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2597                 break;
2598         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2599                 ha->isp_type |= DT_ISP2432;
2600                 ha->device_type |= DT_ZIO_SUPPORTED;
2601                 ha->device_type |= DT_FWI2;
2602                 ha->device_type |= DT_IIDMA;
2603                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2604                 break;
2605         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2606                 ha->isp_type |= DT_ISP8432;
2607                 ha->device_type |= DT_ZIO_SUPPORTED;
2608                 ha->device_type |= DT_FWI2;
2609                 ha->device_type |= DT_IIDMA;
2610                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2611                 break;
2612         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2613                 ha->isp_type |= DT_ISP5422;
2614                 ha->device_type |= DT_FWI2;
2615                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2616                 break;
2617         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2618                 ha->isp_type |= DT_ISP5432;
2619                 ha->device_type |= DT_FWI2;
2620                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2621                 break;
2622         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2623                 ha->isp_type |= DT_ISP2532;
2624                 ha->device_type |= DT_ZIO_SUPPORTED;
2625                 ha->device_type |= DT_FWI2;
2626                 ha->device_type |= DT_IIDMA;
2627                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2628                 break;
2629         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2630                 ha->isp_type |= DT_ISP8001;
2631                 ha->device_type |= DT_ZIO_SUPPORTED;
2632                 ha->device_type |= DT_FWI2;
2633                 ha->device_type |= DT_IIDMA;
2634                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2635                 break;
2636         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2637                 ha->isp_type |= DT_ISP8021;
2638                 ha->device_type |= DT_ZIO_SUPPORTED;
2639                 ha->device_type |= DT_FWI2;
2640                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2641                 /* Initialize 82XX ISP flags */
2642                 qla82xx_init_flags(ha);
2643                 break;
2644          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2645                 ha->isp_type |= DT_ISP8044;
2646                 ha->device_type |= DT_ZIO_SUPPORTED;
2647                 ha->device_type |= DT_FWI2;
2648                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2649                 /* Initialize 82XX ISP flags */
2650                 qla82xx_init_flags(ha);
2651                 break;
2652         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2653                 ha->isp_type |= DT_ISP2031;
2654                 ha->device_type |= DT_ZIO_SUPPORTED;
2655                 ha->device_type |= DT_FWI2;
2656                 ha->device_type |= DT_IIDMA;
2657                 ha->device_type |= DT_T10_PI;
2658                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2659                 break;
2660         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2661                 ha->isp_type |= DT_ISP8031;
2662                 ha->device_type |= DT_ZIO_SUPPORTED;
2663                 ha->device_type |= DT_FWI2;
2664                 ha->device_type |= DT_IIDMA;
2665                 ha->device_type |= DT_T10_PI;
2666                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2667                 break;
2668         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2669                 ha->isp_type |= DT_ISPFX00;
2670                 break;
2671         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2672                 ha->isp_type |= DT_ISP2071;
2673                 ha->device_type |= DT_ZIO_SUPPORTED;
2674                 ha->device_type |= DT_FWI2;
2675                 ha->device_type |= DT_IIDMA;
2676                 ha->device_type |= DT_T10_PI;
2677                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2678                 break;
2679         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2680                 ha->isp_type |= DT_ISP2271;
2681                 ha->device_type |= DT_ZIO_SUPPORTED;
2682                 ha->device_type |= DT_FWI2;
2683                 ha->device_type |= DT_IIDMA;
2684                 ha->device_type |= DT_T10_PI;
2685                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2686                 break;
2687         case PCI_DEVICE_ID_QLOGIC_ISP2261:
2688                 ha->isp_type |= DT_ISP2261;
2689                 ha->device_type |= DT_ZIO_SUPPORTED;
2690                 ha->device_type |= DT_FWI2;
2691                 ha->device_type |= DT_IIDMA;
2692                 ha->device_type |= DT_T10_PI;
2693                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2694                 break;
2695         case PCI_DEVICE_ID_QLOGIC_ISP2081:
2696         case PCI_DEVICE_ID_QLOGIC_ISP2089:
2697                 ha->isp_type |= DT_ISP2081;
2698                 ha->device_type |= DT_ZIO_SUPPORTED;
2699                 ha->device_type |= DT_FWI2;
2700                 ha->device_type |= DT_IIDMA;
2701                 ha->device_type |= DT_T10_PI;
2702                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2703                 break;
2704         case PCI_DEVICE_ID_QLOGIC_ISP2281:
2705         case PCI_DEVICE_ID_QLOGIC_ISP2289:
2706                 ha->isp_type |= DT_ISP2281;
2707                 ha->device_type |= DT_ZIO_SUPPORTED;
2708                 ha->device_type |= DT_FWI2;
2709                 ha->device_type |= DT_IIDMA;
2710                 ha->device_type |= DT_T10_PI;
2711                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2712                 break;
2713         }
2714
2715         if (IS_QLA82XX(ha))
2716                 ha->port_no = ha->portnum & 1;
2717         else {
2718                 /* Get adapter physical port no from interrupt pin register. */
2719                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2720                 if (IS_QLA25XX(ha) || IS_QLA2031(ha) ||
2721                     IS_QLA27XX(ha) || IS_QLA28XX(ha))
2722                         ha->port_no--;
2723                 else
2724                         ha->port_no = !(ha->port_no & 1);
2725         }
2726
2727         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2728             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2729             ha->device_type, ha->port_no, ha->fw_srisc_address);
2730 }
2731
2732 static void
2733 qla2xxx_scan_start(struct Scsi_Host *shost)
2734 {
2735         scsi_qla_host_t *vha = shost_priv(shost);
2736
2737         if (vha->hw->flags.running_gold_fw)
2738                 return;
2739
2740         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2741         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2742         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2743         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2744 }
2745
2746 static int
2747 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2748 {
2749         scsi_qla_host_t *vha = shost_priv(shost);
2750
2751         if (test_bit(UNLOADING, &vha->dpc_flags))
2752                 return 1;
2753         if (!vha->host)
2754                 return 1;
2755         if (time > vha->hw->loop_reset_delay * HZ)
2756                 return 1;
2757
2758         return atomic_read(&vha->loop_state) == LOOP_READY;
2759 }
2760
2761 static void qla2x00_iocb_work_fn(struct work_struct *work)
2762 {
2763         struct scsi_qla_host *vha = container_of(work,
2764                 struct scsi_qla_host, iocb_work);
2765         struct qla_hw_data *ha = vha->hw;
2766         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
2767         int i = 2;
2768         unsigned long flags;
2769
2770         if (test_bit(UNLOADING, &base_vha->dpc_flags))
2771                 return;
2772
2773         while (!list_empty(&vha->work_list) && i > 0) {
2774                 qla2x00_do_work(vha);
2775                 i--;
2776         }
2777
2778         spin_lock_irqsave(&vha->work_lock, flags);
2779         clear_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags);
2780         spin_unlock_irqrestore(&vha->work_lock, flags);
2781 }
2782
2783 /*
2784  * PCI driver interface
2785  */
2786 static int
2787 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2788 {
2789         int     ret = -ENODEV;
2790         struct Scsi_Host *host;
2791         scsi_qla_host_t *base_vha = NULL;
2792         struct qla_hw_data *ha;
2793         char pci_info[30];
2794         char fw_str[30], wq_name[30];
2795         struct scsi_host_template *sht;
2796         int bars, mem_only = 0;
2797         uint16_t req_length = 0, rsp_length = 0;
2798         struct req_que *req = NULL;
2799         struct rsp_que *rsp = NULL;
2800         int i;
2801
2802         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2803         sht = &qla2xxx_driver_template;
2804         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2805             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2806             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2807             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2808             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2809             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2810             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2811             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2812             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2813             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2814             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2815             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2816             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2817             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271 ||
2818             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2261 ||
2819             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2081 ||
2820             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2281 ||
2821             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2089 ||
2822             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2289) {
2823                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2824                 mem_only = 1;
2825                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2826                     "Mem only adapter.\n");
2827         }
2828         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2829             "Bars=%d.\n", bars);
2830
2831         if (mem_only) {
2832                 if (pci_enable_device_mem(pdev))
2833                         return ret;
2834         } else {
2835                 if (pci_enable_device(pdev))
2836                         return ret;
2837         }
2838
2839         /* This may fail but that's ok */
2840         pci_enable_pcie_error_reporting(pdev);
2841
2842         /* Turn off T10-DIF when FC-NVMe is enabled */
2843         if (ql2xnvmeenable)
2844                 ql2xenabledif = 0;
2845
2846         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2847         if (!ha) {
2848                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2849                     "Unable to allocate memory for ha.\n");
2850                 goto disable_device;
2851         }
2852         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2853             "Memory allocated for ha=%p.\n", ha);
2854         ha->pdev = pdev;
2855         INIT_LIST_HEAD(&ha->tgt.q_full_list);
2856         spin_lock_init(&ha->tgt.q_full_lock);
2857         spin_lock_init(&ha->tgt.sess_lock);
2858         spin_lock_init(&ha->tgt.atio_lock);
2859
2860         atomic_set(&ha->nvme_active_aen_cnt, 0);
2861
2862         /* Clear our data area */
2863         ha->bars = bars;
2864         ha->mem_only = mem_only;
2865         spin_lock_init(&ha->hardware_lock);
2866         spin_lock_init(&ha->vport_slock);
2867         mutex_init(&ha->selflogin_lock);
2868         mutex_init(&ha->optrom_mutex);
2869
2870         /* Set ISP-type information. */
2871         qla2x00_set_isp_flags(ha);
2872
2873         /* Set EEH reset type to fundamental if required by hba */
2874         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2875             IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))
2876                 pdev->needs_freset = 1;
2877
2878         ha->prev_topology = 0;
2879         ha->init_cb_size = sizeof(init_cb_t);
2880         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2881         ha->optrom_size = OPTROM_SIZE_2300;
2882         ha->max_exchg = FW_MAX_EXCHANGES_CNT;
2883         atomic_set(&ha->num_pend_mbx_stage1, 0);
2884         atomic_set(&ha->num_pend_mbx_stage2, 0);
2885         atomic_set(&ha->num_pend_mbx_stage3, 0);
2886         atomic_set(&ha->zio_threshold, DEFAULT_ZIO_THRESHOLD);
2887         ha->last_zio_threshold = DEFAULT_ZIO_THRESHOLD;
2888
2889         /* Assign ISP specific operations. */
2890         if (IS_QLA2100(ha)) {
2891                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2892                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2893                 req_length = REQUEST_ENTRY_CNT_2100;
2894                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2895                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2896                 ha->gid_list_info_size = 4;
2897                 ha->flash_conf_off = ~0;
2898                 ha->flash_data_off = ~0;
2899                 ha->nvram_conf_off = ~0;
2900                 ha->nvram_data_off = ~0;
2901                 ha->isp_ops = &qla2100_isp_ops;
2902         } else if (IS_QLA2200(ha)) {
2903                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2904                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2905                 req_length = REQUEST_ENTRY_CNT_2200;
2906                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2907                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2908                 ha->gid_list_info_size = 4;
2909                 ha->flash_conf_off = ~0;
2910                 ha->flash_data_off = ~0;
2911                 ha->nvram_conf_off = ~0;
2912                 ha->nvram_data_off = ~0;
2913                 ha->isp_ops = &qla2100_isp_ops;
2914         } else if (IS_QLA23XX(ha)) {
2915                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2916                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2917                 req_length = REQUEST_ENTRY_CNT_2200;
2918                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2919                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2920                 ha->gid_list_info_size = 6;
2921                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2922                         ha->optrom_size = OPTROM_SIZE_2322;
2923                 ha->flash_conf_off = ~0;
2924                 ha->flash_data_off = ~0;
2925                 ha->nvram_conf_off = ~0;
2926                 ha->nvram_data_off = ~0;
2927                 ha->isp_ops = &qla2300_isp_ops;
2928         } else if (IS_QLA24XX_TYPE(ha)) {
2929                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2930                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2931                 req_length = REQUEST_ENTRY_CNT_24XX;
2932                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2933                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2934                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2935                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2936                 ha->gid_list_info_size = 8;
2937                 ha->optrom_size = OPTROM_SIZE_24XX;
2938                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2939                 ha->isp_ops = &qla24xx_isp_ops;
2940                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2941                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2942                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2943                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2944         } else if (IS_QLA25XX(ha)) {
2945                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2946                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2947                 req_length = REQUEST_ENTRY_CNT_24XX;
2948                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2949                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2950                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2951                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2952                 ha->gid_list_info_size = 8;
2953                 ha->optrom_size = OPTROM_SIZE_25XX;
2954                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2955                 ha->isp_ops = &qla25xx_isp_ops;
2956                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2957                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2958                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2959                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2960         } else if (IS_QLA81XX(ha)) {
2961                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2962                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2963                 req_length = REQUEST_ENTRY_CNT_24XX;
2964                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2965                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2966                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2967                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2968                 ha->gid_list_info_size = 8;
2969                 ha->optrom_size = OPTROM_SIZE_81XX;
2970                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2971                 ha->isp_ops = &qla81xx_isp_ops;
2972                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2973                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2974                 ha->nvram_conf_off = ~0;
2975                 ha->nvram_data_off = ~0;
2976         } else if (IS_QLA82XX(ha)) {
2977                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2978                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2979                 req_length = REQUEST_ENTRY_CNT_82XX;
2980                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2981                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2982                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2983                 ha->gid_list_info_size = 8;
2984                 ha->optrom_size = OPTROM_SIZE_82XX;
2985                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2986                 ha->isp_ops = &qla82xx_isp_ops;
2987                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2988                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2989                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2990                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2991         } else if (IS_QLA8044(ha)) {
2992                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2993                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2994                 req_length = REQUEST_ENTRY_CNT_82XX;
2995                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2996                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2997                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2998                 ha->gid_list_info_size = 8;
2999                 ha->optrom_size = OPTROM_SIZE_83XX;
3000                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3001                 ha->isp_ops = &qla8044_isp_ops;
3002                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
3003                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
3004                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
3005                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
3006         } else if (IS_QLA83XX(ha)) {
3007                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3008                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3009                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3010                 req_length = REQUEST_ENTRY_CNT_83XX;
3011                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3012                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3013                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3014                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3015                 ha->gid_list_info_size = 8;
3016                 ha->optrom_size = OPTROM_SIZE_83XX;
3017                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3018                 ha->isp_ops = &qla83xx_isp_ops;
3019                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3020                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3021                 ha->nvram_conf_off = ~0;
3022                 ha->nvram_data_off = ~0;
3023         }  else if (IS_QLAFX00(ha)) {
3024                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
3025                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
3026                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
3027                 req_length = REQUEST_ENTRY_CNT_FX00;
3028                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
3029                 ha->isp_ops = &qlafx00_isp_ops;
3030                 ha->port_down_retry_count = 30; /* default value */
3031                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
3032                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
3033                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
3034                 ha->mr.fw_hbt_en = 1;
3035                 ha->mr.host_info_resend = false;
3036                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
3037         } else if (IS_QLA27XX(ha)) {
3038                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3039                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3040                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3041                 req_length = REQUEST_ENTRY_CNT_83XX;
3042                 rsp_length = RESPONSE_ENTRY_CNT_83XX;
3043                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3044                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3045                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3046                 ha->gid_list_info_size = 8;
3047                 ha->optrom_size = OPTROM_SIZE_83XX;
3048                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3049                 ha->isp_ops = &qla27xx_isp_ops;
3050                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
3051                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
3052                 ha->nvram_conf_off = ~0;
3053                 ha->nvram_data_off = ~0;
3054         } else if (IS_QLA28XX(ha)) {
3055                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
3056                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
3057                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
3058                 req_length = REQUEST_ENTRY_CNT_24XX;
3059                 rsp_length = RESPONSE_ENTRY_CNT_2300;
3060                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
3061                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
3062                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
3063                 ha->gid_list_info_size = 8;
3064                 ha->optrom_size = OPTROM_SIZE_28XX;
3065                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
3066                 ha->isp_ops = &qla27xx_isp_ops;
3067                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_28XX;
3068                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_28XX;
3069                 ha->nvram_conf_off = ~0;
3070                 ha->nvram_data_off = ~0;
3071         }
3072
3073         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
3074             "mbx_count=%d, req_length=%d, "
3075             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
3076             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
3077             "max_fibre_devices=%d.\n",
3078             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
3079             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
3080             ha->nvram_npiv_size, ha->max_fibre_devices);
3081         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
3082             "isp_ops=%p, flash_conf_off=%d, "
3083             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
3084             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
3085             ha->nvram_conf_off, ha->nvram_data_off);
3086
3087         /* Configure PCI I/O space */
3088         ret = ha->isp_ops->iospace_config(ha);
3089         if (ret)
3090                 goto iospace_config_failed;
3091
3092         ql_log_pci(ql_log_info, pdev, 0x001d,
3093             "Found an ISP%04X irq %d iobase 0x%p.\n",
3094             pdev->device, pdev->irq, ha->iobase);
3095         mutex_init(&ha->vport_lock);
3096         mutex_init(&ha->mq_lock);
3097         init_completion(&ha->mbx_cmd_comp);
3098         complete(&ha->mbx_cmd_comp);
3099         init_completion(&ha->mbx_intr_comp);
3100         init_completion(&ha->dcbx_comp);
3101         init_completion(&ha->lb_portup_comp);
3102
3103         set_bit(0, (unsigned long *) ha->vp_idx_map);
3104
3105         qla2x00_config_dma_addressing(ha);
3106         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
3107             "64 Bit addressing is %s.\n",
3108             ha->flags.enable_64bit_addressing ? "enable" :
3109             "disable");
3110         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
3111         if (ret) {
3112                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
3113                     "Failed to allocate memory for adapter, aborting.\n");
3114
3115                 goto probe_hw_failed;
3116         }
3117
3118         req->max_q_depth = MAX_Q_DEPTH;
3119         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
3120                 req->max_q_depth = ql2xmaxqdepth;
3121
3122
3123         base_vha = qla2x00_create_host(sht, ha);
3124         if (!base_vha) {
3125                 ret = -ENOMEM;
3126                 goto probe_hw_failed;
3127         }
3128
3129         pci_set_drvdata(pdev, base_vha);
3130         set_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3131
3132         host = base_vha->host;
3133         base_vha->req = req;
3134         if (IS_QLA2XXX_MIDTYPE(ha))
3135                 base_vha->mgmt_svr_loop_id =
3136                         qla2x00_reserve_mgmt_server_loop_id(base_vha);
3137         else
3138                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
3139                                                 base_vha->vp_idx;
3140
3141         /* Setup fcport template structure. */
3142         ha->mr.fcport.vha = base_vha;
3143         ha->mr.fcport.port_type = FCT_UNKNOWN;
3144         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
3145         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
3146         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
3147         ha->mr.fcport.scan_state = 1;
3148
3149         /* Set the SG table size based on ISP type */
3150         if (!IS_FWI2_CAPABLE(ha)) {
3151                 if (IS_QLA2100(ha))
3152                         host->sg_tablesize = 32;
3153         } else {
3154                 if (!IS_QLA82XX(ha))
3155                         host->sg_tablesize = QLA_SG_ALL;
3156         }
3157         host->max_id = ha->max_fibre_devices;
3158         host->cmd_per_lun = 3;
3159         host->unique_id = host->host_no;
3160         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
3161                 host->max_cmd_len = 32;
3162         else
3163                 host->max_cmd_len = MAX_CMDSZ;
3164         host->max_channel = MAX_BUSES - 1;
3165         /* Older HBAs support only 16-bit LUNs */
3166         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
3167             ql2xmaxlun > 0xffff)
3168                 host->max_lun = 0xffff;
3169         else
3170                 host->max_lun = ql2xmaxlun;
3171         host->transportt = qla2xxx_transport_template;
3172         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
3173
3174         ql_dbg(ql_dbg_init, base_vha, 0x0033,
3175             "max_id=%d this_id=%d "
3176             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
3177             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
3178             host->this_id, host->cmd_per_lun, host->unique_id,
3179             host->max_cmd_len, host->max_channel, host->max_lun,
3180             host->transportt, sht->vendor_id);
3181
3182         INIT_WORK(&base_vha->iocb_work, qla2x00_iocb_work_fn);
3183
3184         /* Set up the irqs */
3185         ret = qla2x00_request_irqs(ha, rsp);
3186         if (ret)
3187                 goto probe_failed;
3188
3189         /* Alloc arrays of request and response ring ptrs */
3190         ret = qla2x00_alloc_queues(ha, req, rsp);
3191         if (ret) {
3192                 ql_log(ql_log_fatal, base_vha, 0x003d,
3193                     "Failed to allocate memory for queue pointers..."
3194                     "aborting.\n");
3195                 ret = -ENODEV;
3196                 goto probe_failed;
3197         }
3198
3199         if (ha->mqenable) {
3200                 /* number of hardware queues supported by blk/scsi-mq*/
3201                 host->nr_hw_queues = ha->max_qpairs;
3202
3203                 ql_dbg(ql_dbg_init, base_vha, 0x0192,
3204                         "blk/scsi-mq enabled, HW queues = %d.\n", host->nr_hw_queues);
3205         } else {
3206                 if (ql2xnvmeenable) {
3207                         host->nr_hw_queues = ha->max_qpairs;
3208                         ql_dbg(ql_dbg_init, base_vha, 0x0194,
3209                             "FC-NVMe support is enabled, HW queues=%d\n",
3210                             host->nr_hw_queues);
3211                 } else {
3212                         ql_dbg(ql_dbg_init, base_vha, 0x0193,
3213                             "blk/scsi-mq disabled.\n");
3214                 }
3215         }
3216
3217         qlt_probe_one_stage1(base_vha, ha);
3218
3219         pci_save_state(pdev);
3220
3221         /* Assign back pointers */
3222         rsp->req = req;
3223         req->rsp = rsp;
3224
3225         if (IS_QLAFX00(ha)) {
3226                 ha->rsp_q_map[0] = rsp;
3227                 ha->req_q_map[0] = req;
3228                 set_bit(0, ha->req_qid_map);
3229                 set_bit(0, ha->rsp_qid_map);
3230         }
3231
3232         /* FWI2-capable only. */
3233         req->req_q_in = &ha->iobase->isp24.req_q_in;
3234         req->req_q_out = &ha->iobase->isp24.req_q_out;
3235         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
3236         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
3237         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha) ||
3238             IS_QLA28XX(ha)) {
3239                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
3240                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
3241                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
3242                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
3243         }
3244
3245         if (IS_QLAFX00(ha)) {
3246                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
3247                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
3248                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
3249                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
3250         }
3251
3252         if (IS_P3P_TYPE(ha)) {
3253                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
3254                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
3255                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
3256         }
3257
3258         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
3259             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3260             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3261         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
3262             "req->req_q_in=%p req->req_q_out=%p "
3263             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3264             req->req_q_in, req->req_q_out,
3265             rsp->rsp_q_in, rsp->rsp_q_out);
3266         ql_dbg(ql_dbg_init, base_vha, 0x003e,
3267             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
3268             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
3269         ql_dbg(ql_dbg_init, base_vha, 0x003f,
3270             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
3271             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
3272
3273         ha->wq = alloc_workqueue("qla2xxx_wq", 0, 0);
3274
3275         if (ha->isp_ops->initialize_adapter(base_vha)) {
3276                 ql_log(ql_log_fatal, base_vha, 0x00d6,
3277                     "Failed to initialize adapter - Adapter flags %x.\n",
3278                     base_vha->device_flags);
3279
3280                 if (IS_QLA82XX(ha)) {
3281                         qla82xx_idc_lock(ha);
3282                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
3283                                 QLA8XXX_DEV_FAILED);
3284                         qla82xx_idc_unlock(ha);
3285                         ql_log(ql_log_fatal, base_vha, 0x00d7,
3286                             "HW State: FAILED.\n");
3287                 } else if (IS_QLA8044(ha)) {
3288                         qla8044_idc_lock(ha);
3289                         qla8044_wr_direct(base_vha,
3290                                 QLA8044_CRB_DEV_STATE_INDEX,
3291                                 QLA8XXX_DEV_FAILED);
3292                         qla8044_idc_unlock(ha);
3293                         ql_log(ql_log_fatal, base_vha, 0x0150,
3294                             "HW State: FAILED.\n");
3295                 }
3296
3297                 ret = -ENODEV;
3298                 goto probe_failed;
3299         }
3300
3301         if (IS_QLAFX00(ha))
3302                 host->can_queue = QLAFX00_MAX_CANQUEUE;
3303         else
3304                 host->can_queue = req->num_outstanding_cmds - 10;
3305
3306         ql_dbg(ql_dbg_init, base_vha, 0x0032,
3307             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
3308             host->can_queue, base_vha->req,
3309             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
3310
3311         if (ha->mqenable) {
3312                 bool startit = false;
3313
3314                 if (QLA_TGT_MODE_ENABLED())
3315                         startit = false;
3316
3317                 if (ql2x_ini_mode == QLA2XXX_INI_MODE_ENABLED)
3318                         startit = true;
3319
3320                 /* Create start of day qpairs for Block MQ */
3321                 for (i = 0; i < ha->max_qpairs; i++)
3322                         qla2xxx_create_qpair(base_vha, 5, 0, startit);
3323         }
3324
3325         if (ha->flags.running_gold_fw)
3326                 goto skip_dpc;
3327
3328         /*
3329          * Startup the kernel thread for this host adapter
3330          */
3331         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
3332             "%s_dpc", base_vha->host_str);
3333         if (IS_ERR(ha->dpc_thread)) {
3334                 ql_log(ql_log_fatal, base_vha, 0x00ed,
3335                     "Failed to start DPC thread.\n");
3336                 ret = PTR_ERR(ha->dpc_thread);
3337                 ha->dpc_thread = NULL;
3338                 goto probe_failed;
3339         }
3340         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
3341             "DPC thread started successfully.\n");
3342
3343         /*
3344          * If we're not coming up in initiator mode, we might sit for
3345          * a while without waking up the dpc thread, which leads to a
3346          * stuck process warning.  So just kick the dpc once here and
3347          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
3348          */
3349         qla2xxx_wake_dpc(base_vha);
3350
3351         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
3352
3353         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
3354                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
3355                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
3356                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
3357
3358                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
3359                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
3360                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
3361                 INIT_WORK(&ha->idc_state_handler,
3362                     qla83xx_idc_state_handler_work);
3363                 INIT_WORK(&ha->nic_core_unrecoverable,
3364                     qla83xx_nic_core_unrecoverable_work);
3365         }
3366
3367 skip_dpc:
3368         list_add_tail(&base_vha->list, &ha->vp_list);
3369         base_vha->host->irq = ha->pdev->irq;
3370
3371         /* Initialized the timer */
3372         qla2x00_start_timer(base_vha, WATCH_INTERVAL);
3373         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
3374             "Started qla2x00_timer with "
3375             "interval=%d.\n", WATCH_INTERVAL);
3376         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
3377             "Detected hba at address=%p.\n",
3378             ha);
3379
3380         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
3381                 if (ha->fw_attributes & BIT_4) {
3382                         int prot = 0, guard;
3383
3384                         base_vha->flags.difdix_supported = 1;
3385                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
3386                             "Registering for DIF/DIX type 1 and 3 protection.\n");
3387                         if (ql2xenabledif == 1)
3388                                 prot = SHOST_DIX_TYPE0_PROTECTION;
3389                         if (ql2xprotmask)
3390                                 scsi_host_set_prot(host, ql2xprotmask);
3391                         else
3392                                 scsi_host_set_prot(host,
3393                                     prot | SHOST_DIF_TYPE1_PROTECTION
3394                                     | SHOST_DIF_TYPE2_PROTECTION
3395                                     | SHOST_DIF_TYPE3_PROTECTION
3396                                     | SHOST_DIX_TYPE1_PROTECTION
3397                                     | SHOST_DIX_TYPE2_PROTECTION
3398                                     | SHOST_DIX_TYPE3_PROTECTION);
3399
3400                         guard = SHOST_DIX_GUARD_CRC;
3401
3402                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
3403                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
3404                                 guard |= SHOST_DIX_GUARD_IP;
3405
3406                         if (ql2xprotguard)
3407                                 scsi_host_set_guard(host, ql2xprotguard);
3408                         else
3409                                 scsi_host_set_guard(host, guard);
3410                 } else
3411                         base_vha->flags.difdix_supported = 0;
3412         }
3413
3414         ha->isp_ops->enable_intrs(ha);
3415
3416         if (IS_QLAFX00(ha)) {
3417                 ret = qlafx00_fx_disc(base_vha,
3418                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
3419                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
3420                     QLA_SG_ALL : 128;
3421         }
3422
3423         ret = scsi_add_host(host, &pdev->dev);
3424         if (ret)
3425                 goto probe_failed;
3426
3427         base_vha->flags.init_done = 1;
3428         base_vha->flags.online = 1;
3429         ha->prev_minidump_failed = 0;
3430
3431         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
3432             "Init done and hba is online.\n");
3433
3434         if (qla_ini_mode_enabled(base_vha) ||
3435                 qla_dual_mode_enabled(base_vha))
3436                 scsi_scan_host(host);
3437         else
3438                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
3439                         "skipping scsi_scan_host() for non-initiator port\n");
3440
3441         qla2x00_alloc_sysfs_attr(base_vha);
3442
3443         if (IS_QLAFX00(ha)) {
3444                 ret = qlafx00_fx_disc(base_vha,
3445                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
3446
3447                 /* Register system information */
3448                 ret =  qlafx00_fx_disc(base_vha,
3449                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
3450         }
3451
3452         qla2x00_init_host_attr(base_vha);
3453
3454         qla2x00_dfs_setup(base_vha);
3455
3456         ql_log(ql_log_info, base_vha, 0x00fb,
3457             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
3458         ql_log(ql_log_info, base_vha, 0x00fc,
3459             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
3460             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
3461             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
3462             base_vha->host_no,
3463             ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str)));
3464
3465         qlt_add_target(ha, base_vha);
3466
3467         clear_bit(PFLG_DRIVER_PROBING, &base_vha->pci_flags);
3468
3469         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3470                 return -ENODEV;
3471
3472         if (ha->flags.detected_lr_sfp) {
3473                 ql_log(ql_log_info, base_vha, 0xffff,
3474                     "Reset chip to pick up LR SFP setting\n");
3475                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
3476                 qla2xxx_wake_dpc(base_vha);
3477         }
3478
3479         return 0;
3480
3481 probe_failed:
3482         if (base_vha->timer_active)
3483                 qla2x00_stop_timer(base_vha);
3484         base_vha->flags.online = 0;
3485         if (ha->dpc_thread) {
3486                 struct task_struct *t = ha->dpc_thread;
3487
3488                 ha->dpc_thread = NULL;
3489                 kthread_stop(t);
3490         }
3491
3492         qla2x00_free_device(base_vha);
3493         scsi_host_put(base_vha->host);
3494         /*
3495          * Need to NULL out local req/rsp after
3496          * qla2x00_free_device => qla2x00_free_queues frees
3497          * what these are pointing to. Or else we'll
3498          * fall over below in qla2x00_free_req/rsp_que.
3499          */
3500         req = NULL;
3501         rsp = NULL;
3502
3503 probe_hw_failed:
3504         qla2x00_mem_free(ha);
3505         qla2x00_free_req_que(ha, req);
3506         qla2x00_free_rsp_que(ha, rsp);
3507         qla2x00_clear_drv_active(ha);
3508
3509 iospace_config_failed:
3510         if (IS_P3P_TYPE(ha)) {
3511                 if (!ha->nx_pcibase)
3512                         iounmap((device_reg_t *)ha->nx_pcibase);
3513                 if (!ql2xdbwr)
3514                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3515         } else {
3516                 if (ha->iobase)
3517                         iounmap(ha->iobase);
3518                 if (ha->cregbase)
3519                         iounmap(ha->cregbase);
3520         }
3521         pci_release_selected_regions(ha->pdev, ha->bars);
3522         kfree(ha);
3523
3524 disable_device:
3525         pci_disable_device(pdev);
3526         return ret;
3527 }
3528
3529 static void
3530 qla2x00_shutdown(struct pci_dev *pdev)
3531 {
3532         scsi_qla_host_t *vha;
3533         struct qla_hw_data  *ha;
3534
3535         vha = pci_get_drvdata(pdev);
3536         ha = vha->hw;
3537
3538         ql_log(ql_log_info, vha, 0xfffa,
3539                 "Adapter shutdown\n");
3540
3541         /*
3542          * Prevent future board_disable and wait
3543          * until any pending board_disable has completed.
3544          */
3545         set_bit(PFLG_DRIVER_REMOVING, &vha->pci_flags);
3546         cancel_work_sync(&ha->board_disable);
3547
3548         if (!atomic_read(&pdev->enable_cnt))
3549                 return;
3550
3551         /* Notify ISPFX00 firmware */
3552         if (IS_QLAFX00(ha))
3553                 qlafx00_driver_shutdown(vha, 20);
3554
3555         /* Turn-off FCE trace */
3556         if (ha->flags.fce_enabled) {
3557                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3558                 ha->flags.fce_enabled = 0;
3559         }
3560
3561         /* Turn-off EFT trace */
3562         if (ha->eft)
3563                 qla2x00_disable_eft_trace(vha);
3564
3565         if (IS_QLA25XX(ha) ||  IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3566             IS_QLA28XX(ha)) {
3567                 if (ha->flags.fw_started)
3568                         qla2x00_abort_isp_cleanup(vha);
3569         } else {
3570                 /* Stop currently executing firmware. */
3571                 qla2x00_try_to_stop_firmware(vha);
3572         }
3573
3574         /* Turn adapter off line */
3575         vha->flags.online = 0;
3576
3577         /* turn-off interrupts on the card */
3578         if (ha->interrupts_on) {
3579                 vha->flags.init_done = 0;
3580                 ha->isp_ops->disable_intrs(ha);
3581         }
3582
3583         qla2x00_free_irqs(vha);
3584
3585         qla2x00_free_fw_dump(ha);
3586
3587         pci_disable_device(pdev);
3588         ql_log(ql_log_info, vha, 0xfffe,
3589                 "Adapter shutdown successfully.\n");
3590 }
3591
3592 /* Deletes all the virtual ports for a given ha */
3593 static void
3594 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3595 {
3596         scsi_qla_host_t *vha;
3597         unsigned long flags;
3598
3599         mutex_lock(&ha->vport_lock);
3600         while (ha->cur_vport_count) {
3601                 spin_lock_irqsave(&ha->vport_slock, flags);
3602
3603                 BUG_ON(base_vha->list.next == &ha->vp_list);
3604                 /* This assumes first entry in ha->vp_list is always base vha */
3605                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3606                 scsi_host_get(vha->host);
3607
3608                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3609                 mutex_unlock(&ha->vport_lock);
3610
3611                 qla_nvme_delete(vha);
3612
3613                 fc_vport_terminate(vha->fc_vport);
3614                 scsi_host_put(vha->host);
3615
3616                 mutex_lock(&ha->vport_lock);
3617         }
3618         mutex_unlock(&ha->vport_lock);
3619 }
3620
3621 /* Stops all deferred work threads */
3622 static void
3623 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3624 {
3625         /* Cancel all work and destroy DPC workqueues */
3626         if (ha->dpc_lp_wq) {
3627                 cancel_work_sync(&ha->idc_aen);
3628                 destroy_workqueue(ha->dpc_lp_wq);
3629                 ha->dpc_lp_wq = NULL;
3630         }
3631
3632         if (ha->dpc_hp_wq) {
3633                 cancel_work_sync(&ha->nic_core_reset);
3634                 cancel_work_sync(&ha->idc_state_handler);
3635                 cancel_work_sync(&ha->nic_core_unrecoverable);
3636                 destroy_workqueue(ha->dpc_hp_wq);
3637                 ha->dpc_hp_wq = NULL;
3638         }
3639
3640         /* Kill the kernel thread for this host */
3641         if (ha->dpc_thread) {
3642                 struct task_struct *t = ha->dpc_thread;
3643
3644                 /*
3645                  * qla2xxx_wake_dpc checks for ->dpc_thread
3646                  * so we need to zero it out.
3647                  */
3648                 ha->dpc_thread = NULL;
3649                 kthread_stop(t);
3650         }
3651 }
3652
3653 static void
3654 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3655 {
3656         if (IS_QLA82XX(ha)) {
3657
3658                 iounmap((device_reg_t *)ha->nx_pcibase);
3659                 if (!ql2xdbwr)
3660                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3661         } else {
3662                 if (ha->iobase)
3663                         iounmap(ha->iobase);
3664
3665                 if (ha->cregbase)
3666                         iounmap(ha->cregbase);
3667
3668                 if (ha->mqiobase)
3669                         iounmap(ha->mqiobase);
3670
3671                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha)) &&
3672                     ha->msixbase)
3673                         iounmap(ha->msixbase);
3674         }
3675 }
3676
3677 static void
3678 qla2x00_clear_drv_active(struct qla_hw_data *ha)
3679 {
3680         if (IS_QLA8044(ha)) {
3681                 qla8044_idc_lock(ha);
3682                 qla8044_clear_drv_active(ha);
3683                 qla8044_idc_unlock(ha);
3684         } else if (IS_QLA82XX(ha)) {
3685                 qla82xx_idc_lock(ha);
3686                 qla82xx_clear_drv_active(ha);
3687                 qla82xx_idc_unlock(ha);
3688         }
3689 }
3690
3691 static void
3692 qla2x00_remove_one(struct pci_dev *pdev)
3693 {
3694         scsi_qla_host_t *base_vha;
3695         struct qla_hw_data  *ha;
3696
3697         base_vha = pci_get_drvdata(pdev);
3698         ha = base_vha->hw;
3699         ql_log(ql_log_info, base_vha, 0xb079,
3700             "Removing driver\n");
3701
3702         /* Indicate device removal to prevent future board_disable and wait
3703          * until any pending board_disable has completed. */
3704         set_bit(PFLG_DRIVER_REMOVING, &base_vha->pci_flags);
3705         cancel_work_sync(&ha->board_disable);
3706
3707         /*
3708          * If the PCI device is disabled then there was a PCI-disconnect and
3709          * qla2x00_disable_board_on_pci_error has taken care of most of the
3710          * resources.
3711          */
3712         if (!atomic_read(&pdev->enable_cnt)) {
3713                 dma_free_coherent(&ha->pdev->dev, base_vha->gnl.size,
3714                     base_vha->gnl.l, base_vha->gnl.ldma);
3715
3716                 scsi_host_put(base_vha->host);
3717                 kfree(ha);
3718                 pci_set_drvdata(pdev, NULL);
3719                 return;
3720         }
3721         qla2x00_wait_for_hba_ready(base_vha);
3722
3723         if (IS_QLA25XX(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
3724             IS_QLA28XX(ha)) {
3725                 if (ha->flags.fw_started)
3726                         qla2x00_abort_isp_cleanup(base_vha);
3727         } else if (!IS_QLAFX00(ha)) {
3728                 if (IS_QLA8031(ha)) {
3729                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3730                             "Clearing fcoe driver presence.\n");
3731                         if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3732                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3733                                     "Error while clearing DRV-Presence.\n");
3734                 }
3735
3736                 qla2x00_try_to_stop_firmware(base_vha);
3737         }
3738
3739         qla2x00_wait_for_sess_deletion(base_vha);
3740
3741         /*
3742          * if UNLOAD flag is already set, then continue unload,
3743          * where it was set first.
3744          */
3745         if (test_bit(UNLOADING, &base_vha->dpc_flags))
3746                 return;
3747
3748         set_bit(UNLOADING, &base_vha->dpc_flags);
3749
3750         qla_nvme_delete(base_vha);
3751
3752         dma_free_coherent(&ha->pdev->dev,
3753                 base_vha->gnl.size, base_vha->gnl.l, base_vha->gnl.ldma);
3754
3755         vfree(base_vha->scan.l);
3756
3757         if (IS_QLAFX00(ha))
3758                 qlafx00_driver_shutdown(base_vha, 20);
3759
3760         qla2x00_delete_all_vps(ha, base_vha);
3761
3762         qla2x00_dfs_remove(base_vha);
3763
3764         qla84xx_put_chip(base_vha);
3765
3766         /* Disable timer */
3767         if (base_vha->timer_active)
3768                 qla2x00_stop_timer(base_vha);
3769
3770         base_vha->flags.online = 0;
3771
3772         /* free DMA memory */
3773         if (ha->exlogin_buf)
3774                 qla2x00_free_exlogin_buffer(ha);
3775
3776         /* free DMA memory */
3777         if (ha->exchoffld_buf)
3778                 qla2x00_free_exchoffld_buffer(ha);
3779
3780         qla2x00_destroy_deferred_work(ha);
3781
3782         qlt_remove_target(ha, base_vha);
3783
3784         qla2x00_free_sysfs_attr(base_vha, true);
3785
3786         fc_remove_host(base_vha->host);
3787         qlt_remove_target_resources(ha);
3788
3789         scsi_remove_host(base_vha->host);
3790
3791         qla2x00_free_device(base_vha);
3792
3793         qla2x00_clear_drv_active(ha);
3794
3795         scsi_host_put(base_vha->host);
3796
3797         qla2x00_unmap_iobases(ha);
3798
3799         pci_release_selected_regions(ha->pdev, ha->bars);
3800         kfree(ha);
3801
3802         pci_disable_pcie_error_reporting(pdev);
3803
3804         pci_disable_device(pdev);
3805 }
3806
3807 static void
3808 qla2x00_free_device(scsi_qla_host_t *vha)
3809 {
3810         struct qla_hw_data *ha = vha->hw;
3811
3812         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3813
3814         /* Disable timer */
3815         if (vha->timer_active)
3816                 qla2x00_stop_timer(vha);
3817
3818         qla25xx_delete_queues(vha);
3819         vha->flags.online = 0;
3820
3821         /* turn-off interrupts on the card */
3822         if (ha->interrupts_on) {
3823                 vha->flags.init_done = 0;
3824                 ha->isp_ops->disable_intrs(ha);
3825         }
3826
3827         qla2x00_free_fcports(vha);
3828
3829         qla2x00_free_irqs(vha);
3830
3831         /* Flush the work queue and remove it */
3832         if (ha->wq) {
3833                 flush_workqueue(ha->wq);
3834                 destroy_workqueue(ha->wq);
3835                 ha->wq = NULL;
3836         }
3837
3838
3839         qla2x00_mem_free(ha);
3840
3841         qla82xx_md_free(vha);
3842
3843         qla2x00_free_queues(ha);
3844 }
3845
3846 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3847 {
3848         fc_port_t *fcport, *tfcport;
3849
3850         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list)
3851                 qla2x00_free_fcport(fcport);
3852 }
3853
3854 static inline void
3855 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3856     int defer)
3857 {
3858         struct fc_rport *rport;
3859         scsi_qla_host_t *base_vha;
3860         unsigned long flags;
3861
3862         if (!fcport->rport)
3863                 return;
3864
3865         rport = fcport->rport;
3866         if (defer) {
3867                 base_vha = pci_get_drvdata(vha->hw->pdev);
3868                 spin_lock_irqsave(vha->host->host_lock, flags);
3869                 fcport->drport = rport;
3870                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3871                 qlt_do_generation_tick(vha, &base_vha->total_fcport_update_gen);
3872                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3873                 qla2xxx_wake_dpc(base_vha);
3874         } else {
3875                 int now;
3876
3877                 if (rport) {
3878                         ql_dbg(ql_dbg_disc, fcport->vha, 0x2109,
3879                             "%s %8phN. rport %p roles %x\n",
3880                             __func__, fcport->port_name, rport,
3881                             rport->roles);
3882                         fc_remote_port_delete(rport);
3883                 }
3884                 qlt_do_generation_tick(vha, &now);
3885         }
3886 }
3887
3888 /*
3889  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3890  *
3891  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3892  *
3893  * Return: None.
3894  *
3895  * Context:
3896  */
3897 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3898     int do_login, int defer)
3899 {
3900         if (IS_QLAFX00(vha->hw)) {
3901                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3902                 qla2x00_schedule_rport_del(vha, fcport, defer);
3903                 return;
3904         }
3905
3906         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3907             vha->vp_idx == fcport->vha->vp_idx) {
3908                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3909                 qla2x00_schedule_rport_del(vha, fcport, defer);
3910         }
3911         /*
3912          * We may need to retry the login, so don't change the state of the
3913          * port but do the retries.
3914          */
3915         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3916                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3917
3918         if (!do_login)
3919                 return;
3920
3921         set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3922 }
3923
3924 /*
3925  * qla2x00_mark_all_devices_lost
3926  *      Updates fcport state when device goes offline.
3927  *
3928  * Input:
3929  *      ha = adapter block pointer.
3930  *      fcport = port structure pointer.
3931  *
3932  * Return:
3933  *      None.
3934  *
3935  * Context:
3936  */
3937 void
3938 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3939 {
3940         fc_port_t *fcport;
3941
3942         ql_dbg(ql_dbg_disc, vha, 0x20f1,
3943             "Mark all dev lost\n");
3944
3945         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3946                 fcport->scan_state = 0;
3947                 qlt_schedule_sess_for_deletion(fcport);
3948
3949                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3950                         continue;
3951
3952                 /*
3953                  * No point in marking the device as lost, if the device is
3954                  * already DEAD.
3955                  */
3956                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3957                         continue;
3958                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3959                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3960                         if (defer)
3961                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3962                         else if (vha->vp_idx == fcport->vha->vp_idx)
3963                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3964                 }
3965         }
3966 }
3967
3968 static void qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha)
3969 {
3970         int i;
3971
3972         if (IS_FWI2_CAPABLE(ha))
3973                 return;
3974
3975         for (i = 0; i < SNS_FIRST_LOOP_ID; i++)
3976                 set_bit(i, ha->loop_id_map);
3977         set_bit(MANAGEMENT_SERVER, ha->loop_id_map);
3978         set_bit(BROADCAST, ha->loop_id_map);
3979 }
3980
3981 /*
3982 * qla2x00_mem_alloc
3983 *      Allocates adapter memory.
3984 *
3985 * Returns:
3986 *      0  = success.
3987 *      !0  = failure.
3988 */
3989 static int
3990 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3991         struct req_que **req, struct rsp_que **rsp)
3992 {
3993         char    name[16];
3994
3995         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3996                 &ha->init_cb_dma, GFP_KERNEL);
3997         if (!ha->init_cb)
3998                 goto fail;
3999
4000         if (qlt_mem_alloc(ha) < 0)
4001                 goto fail_free_init_cb;
4002
4003         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
4004                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
4005         if (!ha->gid_list)
4006                 goto fail_free_tgt_mem;
4007
4008         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
4009         if (!ha->srb_mempool)
4010                 goto fail_free_gid_list;
4011
4012         if (IS_P3P_TYPE(ha)) {
4013                 /* Allocate cache for CT6 Ctx. */
4014                 if (!ctx_cachep) {
4015                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
4016                                 sizeof(struct ct6_dsd), 0,
4017                                 SLAB_HWCACHE_ALIGN, NULL);
4018                         if (!ctx_cachep)
4019                                 goto fail_free_srb_mempool;
4020                 }
4021                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
4022                         ctx_cachep);
4023                 if (!ha->ctx_mempool)
4024                         goto fail_free_srb_mempool;
4025                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
4026                     "ctx_cachep=%p ctx_mempool=%p.\n",
4027                     ctx_cachep, ha->ctx_mempool);
4028         }
4029
4030         /* Get memory for cached NVRAM */
4031         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
4032         if (!ha->nvram)
4033                 goto fail_free_ctx_mempool;
4034
4035         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
4036                 ha->pdev->device);
4037         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4038                 DMA_POOL_SIZE, 8, 0);
4039         if (!ha->s_dma_pool)
4040                 goto fail_free_nvram;
4041
4042         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
4043             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
4044             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
4045
4046         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
4047                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4048                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
4049                 if (!ha->dl_dma_pool) {
4050                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
4051                             "Failed to allocate memory for dl_dma_pool.\n");
4052                         goto fail_s_dma_pool;
4053                 }
4054
4055                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
4056                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
4057                 if (!ha->fcp_cmnd_dma_pool) {
4058                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
4059                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
4060                         goto fail_dl_dma_pool;
4061                 }
4062
4063                 if (ql2xenabledif) {
4064                         u64 bufsize = DIF_BUNDLING_DMA_POOL_SIZE;
4065                         struct dsd_dma *dsd, *nxt;
4066                         uint i;
4067                         /* Creata a DMA pool of buffers for DIF bundling */
4068                         ha->dif_bundl_pool = dma_pool_create(name,
4069                             &ha->pdev->dev, DIF_BUNDLING_DMA_POOL_SIZE, 8, 0);
4070                         if (!ha->dif_bundl_pool) {
4071                                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4072                                     "%s: failed create dif_bundl_pool\n",
4073                                     __func__);
4074                                 goto fail_dif_bundl_dma_pool;
4075                         }
4076
4077                         INIT_LIST_HEAD(&ha->pool.good.head);
4078                         INIT_LIST_HEAD(&ha->pool.unusable.head);
4079                         ha->pool.good.count = 0;
4080                         ha->pool.unusable.count = 0;
4081                         for (i = 0; i < 128; i++) {
4082                                 dsd = kzalloc(sizeof(*dsd), GFP_ATOMIC);
4083                                 if (!dsd) {
4084                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4085                                             0xe0ee, "%s: failed alloc dsd\n",
4086                                             __func__);
4087                                         return 1;
4088                                 }
4089                                 ha->dif_bundle_kallocs++;
4090
4091                                 dsd->dsd_addr = dma_pool_alloc(
4092                                     ha->dif_bundl_pool, GFP_ATOMIC,
4093                                     &dsd->dsd_list_dma);
4094                                 if (!dsd->dsd_addr) {
4095                                         ql_dbg_pci(ql_dbg_init, ha->pdev,
4096                                             0xe0ee,
4097                                             "%s: failed alloc ->dsd_addr\n",
4098                                             __func__);
4099                                         kfree(dsd);
4100                                         ha->dif_bundle_kallocs--;
4101                                         continue;
4102                                 }
4103                                 ha->dif_bundle_dma_allocs++;
4104
4105                                 /*
4106                                  * if DMA buffer crosses 4G boundary,
4107                                  * put it on bad list
4108                                  */
4109                                 if (MSD(dsd->dsd_list_dma) ^
4110                                     MSD(dsd->dsd_list_dma + bufsize)) {
4111                                         list_add_tail(&dsd->list,
4112                                             &ha->pool.unusable.head);
4113                                         ha->pool.unusable.count++;
4114                                 } else {
4115                                         list_add_tail(&dsd->list,
4116                                             &ha->pool.good.head);
4117                                         ha->pool.good.count++;
4118                                 }
4119                         }
4120
4121                         /* return the good ones back to the pool */
4122                         list_for_each_entry_safe(dsd, nxt,
4123                             &ha->pool.good.head, list) {
4124                                 list_del(&dsd->list);
4125                                 dma_pool_free(ha->dif_bundl_pool,
4126                                     dsd->dsd_addr, dsd->dsd_list_dma);
4127                                 ha->dif_bundle_dma_allocs--;
4128                                 kfree(dsd);
4129                                 ha->dif_bundle_kallocs--;
4130                         }
4131
4132                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0024,
4133                             "%s: dif dma pool (good=%u unusable=%u)\n",
4134                             __func__, ha->pool.good.count,
4135                             ha->pool.unusable.count);
4136                 }
4137
4138                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
4139                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p dif_bundl_pool=%p.\n",
4140                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool,
4141                     ha->dif_bundl_pool);
4142         }
4143
4144         /* Allocate memory for SNS commands */
4145         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
4146         /* Get consistent memory allocated for SNS commands */
4147                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
4148                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
4149                 if (!ha->sns_cmd)
4150                         goto fail_dma_pool;
4151                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
4152                     "sns_cmd: %p.\n", ha->sns_cmd);
4153         } else {
4154         /* Get consistent memory allocated for MS IOCB */
4155                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4156                         &ha->ms_iocb_dma);
4157                 if (!ha->ms_iocb)
4158                         goto fail_dma_pool;
4159         /* Get consistent memory allocated for CT SNS commands */
4160                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
4161                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
4162                 if (!ha->ct_sns)
4163                         goto fail_free_ms_iocb;
4164                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
4165                     "ms_iocb=%p ct_sns=%p.\n",
4166                     ha->ms_iocb, ha->ct_sns);
4167         }
4168
4169         /* Allocate memory for request ring */
4170         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
4171         if (!*req) {
4172                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
4173                     "Failed to allocate memory for req.\n");
4174                 goto fail_req;
4175         }
4176         (*req)->length = req_len;
4177         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
4178                 ((*req)->length + 1) * sizeof(request_t),
4179                 &(*req)->dma, GFP_KERNEL);
4180         if (!(*req)->ring) {
4181                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
4182                     "Failed to allocate memory for req_ring.\n");
4183                 goto fail_req_ring;
4184         }
4185         /* Allocate memory for response ring */
4186         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
4187         if (!*rsp) {
4188                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
4189                     "Failed to allocate memory for rsp.\n");
4190                 goto fail_rsp;
4191         }
4192         (*rsp)->hw = ha;
4193         (*rsp)->length = rsp_len;
4194         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
4195                 ((*rsp)->length + 1) * sizeof(response_t),
4196                 &(*rsp)->dma, GFP_KERNEL);
4197         if (!(*rsp)->ring) {
4198                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
4199                     "Failed to allocate memory for rsp_ring.\n");
4200                 goto fail_rsp_ring;
4201         }
4202         (*req)->rsp = *rsp;
4203         (*rsp)->req = *req;
4204         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
4205             "req=%p req->length=%d req->ring=%p rsp=%p "
4206             "rsp->length=%d rsp->ring=%p.\n",
4207             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
4208             (*rsp)->ring);
4209         /* Allocate memory for NVRAM data for vports */
4210         if (ha->nvram_npiv_size) {
4211                 ha->npiv_info = kcalloc(ha->nvram_npiv_size,
4212                                         sizeof(struct qla_npiv_entry),
4213                                         GFP_KERNEL);
4214                 if (!ha->npiv_info) {
4215                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
4216                             "Failed to allocate memory for npiv_info.\n");
4217                         goto fail_npiv_info;
4218                 }
4219         } else
4220                 ha->npiv_info = NULL;
4221
4222         /* Get consistent memory allocated for EX-INIT-CB. */
4223         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha) ||
4224             IS_QLA28XX(ha)) {
4225                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4226                     &ha->ex_init_cb_dma);
4227                 if (!ha->ex_init_cb)
4228                         goto fail_ex_init_cb;
4229                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
4230                     "ex_init_cb=%p.\n", ha->ex_init_cb);
4231         }
4232
4233         INIT_LIST_HEAD(&ha->gbl_dsd_list);
4234
4235         /* Get consistent memory allocated for Async Port-Database. */
4236         if (!IS_FWI2_CAPABLE(ha)) {
4237                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
4238                         &ha->async_pd_dma);
4239                 if (!ha->async_pd)
4240                         goto fail_async_pd;
4241                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
4242                     "async_pd=%p.\n", ha->async_pd);
4243         }
4244
4245         INIT_LIST_HEAD(&ha->vp_list);
4246
4247         /* Allocate memory for our loop_id bitmap */
4248         ha->loop_id_map = kcalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE),
4249                                   sizeof(long),
4250                                   GFP_KERNEL);
4251         if (!ha->loop_id_map)
4252                 goto fail_loop_id_map;
4253         else {
4254                 qla2x00_set_reserved_loop_ids(ha);
4255                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
4256                     "loop_id_map=%p.\n", ha->loop_id_map);
4257         }
4258
4259         ha->sfp_data = dma_alloc_coherent(&ha->pdev->dev,
4260             SFP_DEV_SIZE, &ha->sfp_data_dma, GFP_KERNEL);
4261         if (!ha->sfp_data) {
4262                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4263                     "Unable to allocate memory for SFP read-data.\n");
4264                 goto fail_sfp_data;
4265         }
4266
4267         ha->flt = dma_alloc_coherent(&ha->pdev->dev,
4268             sizeof(struct qla_flt_header) + FLT_REGIONS_SIZE, &ha->flt_dma,
4269             GFP_KERNEL);
4270         if (!ha->flt) {
4271                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
4272                     "Unable to allocate memory for FLT.\n");
4273                 goto fail_flt_buffer;
4274         }
4275
4276         return 0;
4277
4278 fail_flt_buffer:
4279         dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4280             ha->sfp_data, ha->sfp_data_dma);
4281 fail_sfp_data:
4282         kfree(ha->loop_id_map);
4283 fail_loop_id_map:
4284         dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4285 fail_async_pd:
4286         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
4287 fail_ex_init_cb:
4288         kfree(ha->npiv_info);
4289 fail_npiv_info:
4290         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
4291                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
4292         (*rsp)->ring = NULL;
4293         (*rsp)->dma = 0;
4294 fail_rsp_ring:
4295         kfree(*rsp);
4296         *rsp = NULL;
4297 fail_rsp:
4298         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
4299                 sizeof(request_t), (*req)->ring, (*req)->dma);
4300         (*req)->ring = NULL;
4301         (*req)->dma = 0;
4302 fail_req_ring:
4303         kfree(*req);
4304         *req = NULL;
4305 fail_req:
4306         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4307                 ha->ct_sns, ha->ct_sns_dma);
4308         ha->ct_sns = NULL;
4309         ha->ct_sns_dma = 0;
4310 fail_free_ms_iocb:
4311         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4312         ha->ms_iocb = NULL;
4313         ha->ms_iocb_dma = 0;
4314
4315         if (ha->sns_cmd)
4316                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4317                     ha->sns_cmd, ha->sns_cmd_dma);
4318 fail_dma_pool:
4319         if (ql2xenabledif) {
4320                 struct dsd_dma *dsd, *nxt;
4321
4322                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4323                     list) {
4324                         list_del(&dsd->list);
4325                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4326                             dsd->dsd_list_dma);
4327                         ha->dif_bundle_dma_allocs--;
4328                         kfree(dsd);
4329                         ha->dif_bundle_kallocs--;
4330                         ha->pool.unusable.count--;
4331                 }
4332                 dma_pool_destroy(ha->dif_bundl_pool);
4333                 ha->dif_bundl_pool = NULL;
4334         }
4335
4336 fail_dif_bundl_dma_pool:
4337         if (IS_QLA82XX(ha) || ql2xenabledif) {
4338                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4339                 ha->fcp_cmnd_dma_pool = NULL;
4340         }
4341 fail_dl_dma_pool:
4342         if (IS_QLA82XX(ha) || ql2xenabledif) {
4343                 dma_pool_destroy(ha->dl_dma_pool);
4344                 ha->dl_dma_pool = NULL;
4345         }
4346 fail_s_dma_pool:
4347         dma_pool_destroy(ha->s_dma_pool);
4348         ha->s_dma_pool = NULL;
4349 fail_free_nvram:
4350         kfree(ha->nvram);
4351         ha->nvram = NULL;
4352 fail_free_ctx_mempool:
4353         mempool_destroy(ha->ctx_mempool);
4354         ha->ctx_mempool = NULL;
4355 fail_free_srb_mempool:
4356         mempool_destroy(ha->srb_mempool);
4357         ha->srb_mempool = NULL;
4358 fail_free_gid_list:
4359         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4360         ha->gid_list,
4361         ha->gid_list_dma);
4362         ha->gid_list = NULL;
4363         ha->gid_list_dma = 0;
4364 fail_free_tgt_mem:
4365         qlt_mem_free(ha);
4366 fail_free_init_cb:
4367         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
4368         ha->init_cb_dma);
4369         ha->init_cb = NULL;
4370         ha->init_cb_dma = 0;
4371 fail:
4372         ql_log(ql_log_fatal, NULL, 0x0030,
4373             "Memory allocation failure.\n");
4374         return -ENOMEM;
4375 }
4376
4377 int
4378 qla2x00_set_exlogins_buffer(scsi_qla_host_t *vha)
4379 {
4380         int rval;
4381         uint16_t        size, max_cnt, temp;
4382         struct qla_hw_data *ha = vha->hw;
4383
4384         /* Return if we don't need to alloacate any extended logins */
4385         if (!ql2xexlogins)
4386                 return QLA_SUCCESS;
4387
4388         if (!IS_EXLOGIN_OFFLD_CAPABLE(ha))
4389                 return QLA_SUCCESS;
4390
4391         ql_log(ql_log_info, vha, 0xd021, "EXLOGIN count: %d.\n", ql2xexlogins);
4392         max_cnt = 0;
4393         rval = qla_get_exlogin_status(vha, &size, &max_cnt);
4394         if (rval != QLA_SUCCESS) {
4395                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd029,
4396                     "Failed to get exlogin status.\n");
4397                 return rval;
4398         }
4399
4400         temp = (ql2xexlogins > max_cnt) ? max_cnt : ql2xexlogins;
4401         temp *= size;
4402
4403         if (temp != ha->exlogin_size) {
4404                 qla2x00_free_exlogin_buffer(ha);
4405                 ha->exlogin_size = temp;
4406
4407                 ql_log(ql_log_info, vha, 0xd024,
4408                     "EXLOGIN: max_logins=%d, portdb=0x%x, total=%d.\n",
4409                     max_cnt, size, temp);
4410
4411                 ql_log(ql_log_info, vha, 0xd025,
4412                     "EXLOGIN: requested size=0x%x\n", ha->exlogin_size);
4413
4414                 /* Get consistent memory for extended logins */
4415                 ha->exlogin_buf = dma_alloc_coherent(&ha->pdev->dev,
4416                         ha->exlogin_size, &ha->exlogin_buf_dma, GFP_KERNEL);
4417                 if (!ha->exlogin_buf) {
4418                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd02a,
4419                     "Failed to allocate memory for exlogin_buf_dma.\n");
4420                         return -ENOMEM;
4421                 }
4422         }
4423
4424         /* Now configure the dma buffer */
4425         rval = qla_set_exlogin_mem_cfg(vha, ha->exlogin_buf_dma);
4426         if (rval) {
4427                 ql_log(ql_log_fatal, vha, 0xd033,
4428                     "Setup extended login buffer  ****FAILED****.\n");
4429                 qla2x00_free_exlogin_buffer(ha);
4430         }
4431
4432         return rval;
4433 }
4434
4435 /*
4436 * qla2x00_free_exlogin_buffer
4437 *
4438 * Input:
4439 *       ha = adapter block pointer
4440 */
4441 void
4442 qla2x00_free_exlogin_buffer(struct qla_hw_data *ha)
4443 {
4444         if (ha->exlogin_buf) {
4445                 dma_free_coherent(&ha->pdev->dev, ha->exlogin_size,
4446                     ha->exlogin_buf, ha->exlogin_buf_dma);
4447                 ha->exlogin_buf = NULL;
4448                 ha->exlogin_size = 0;
4449         }
4450 }
4451
4452 static void
4453 qla2x00_number_of_exch(scsi_qla_host_t *vha, u32 *ret_cnt, u16 max_cnt)
4454 {
4455         u32 temp;
4456         struct init_cb_81xx *icb = (struct init_cb_81xx *)&vha->hw->init_cb;
4457         *ret_cnt = FW_DEF_EXCHANGES_CNT;
4458
4459         if (max_cnt > vha->hw->max_exchg)
4460                 max_cnt = vha->hw->max_exchg;
4461
4462         if (qla_ini_mode_enabled(vha)) {
4463                 if (vha->ql2xiniexchg > max_cnt)
4464                         vha->ql2xiniexchg = max_cnt;
4465
4466                 if (vha->ql2xiniexchg > FW_DEF_EXCHANGES_CNT)
4467                         *ret_cnt = vha->ql2xiniexchg;
4468
4469         } else if (qla_tgt_mode_enabled(vha)) {
4470                 if (vha->ql2xexchoffld > max_cnt) {
4471                         vha->ql2xexchoffld = max_cnt;
4472                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4473                 }
4474
4475                 if (vha->ql2xexchoffld > FW_DEF_EXCHANGES_CNT)
4476                         *ret_cnt = vha->ql2xexchoffld;
4477         } else if (qla_dual_mode_enabled(vha)) {
4478                 temp = vha->ql2xiniexchg + vha->ql2xexchoffld;
4479                 if (temp > max_cnt) {
4480                         vha->ql2xiniexchg -= (temp - max_cnt)/2;
4481                         vha->ql2xexchoffld -= (((temp - max_cnt)/2) + 1);
4482                         temp = max_cnt;
4483                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4484                 }
4485
4486                 if (temp > FW_DEF_EXCHANGES_CNT)
4487                         *ret_cnt = temp;
4488         }
4489 }
4490
4491 int
4492 qla2x00_set_exchoffld_buffer(scsi_qla_host_t *vha)
4493 {
4494         int rval;
4495         u16     size, max_cnt;
4496         u32 actual_cnt, totsz;
4497         struct qla_hw_data *ha = vha->hw;
4498
4499         if (!ha->flags.exchoffld_enabled)
4500                 return QLA_SUCCESS;
4501
4502         if (!IS_EXCHG_OFFLD_CAPABLE(ha))
4503                 return QLA_SUCCESS;
4504
4505         max_cnt = 0;
4506         rval = qla_get_exchoffld_status(vha, &size, &max_cnt);
4507         if (rval != QLA_SUCCESS) {
4508                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd012,
4509                     "Failed to get exlogin status.\n");
4510                 return rval;
4511         }
4512
4513         qla2x00_number_of_exch(vha, &actual_cnt, max_cnt);
4514         ql_log(ql_log_info, vha, 0xd014,
4515             "Actual exchange offload count: %d.\n", actual_cnt);
4516
4517         totsz = actual_cnt * size;
4518
4519         if (totsz != ha->exchoffld_size) {
4520                 qla2x00_free_exchoffld_buffer(ha);
4521                 if (actual_cnt <= FW_DEF_EXCHANGES_CNT) {
4522                         ha->exchoffld_size = 0;
4523                         ha->flags.exchoffld_enabled = 0;
4524                         return QLA_SUCCESS;
4525                 }
4526
4527                 ha->exchoffld_size = totsz;
4528
4529                 ql_log(ql_log_info, vha, 0xd016,
4530                     "Exchange offload: max_count=%d, actual count=%d entry sz=0x%x, total sz=0x%x\n",
4531                     max_cnt, actual_cnt, size, totsz);
4532
4533                 ql_log(ql_log_info, vha, 0xd017,
4534                     "Exchange Buffers requested size = 0x%x\n",
4535                     ha->exchoffld_size);
4536
4537                 /* Get consistent memory for extended logins */
4538                 ha->exchoffld_buf = dma_alloc_coherent(&ha->pdev->dev,
4539                         ha->exchoffld_size, &ha->exchoffld_buf_dma, GFP_KERNEL);
4540                 if (!ha->exchoffld_buf) {
4541                         ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4542                         "Failed to allocate memory for Exchange Offload.\n");
4543
4544                         if (ha->max_exchg >
4545                             (FW_DEF_EXCHANGES_CNT + REDUCE_EXCHANGES_CNT)) {
4546                                 ha->max_exchg -= REDUCE_EXCHANGES_CNT;
4547                         } else if (ha->max_exchg >
4548                             (FW_DEF_EXCHANGES_CNT + 512)) {
4549                                 ha->max_exchg -= 512;
4550                         } else {
4551                                 ha->flags.exchoffld_enabled = 0;
4552                                 ql_log_pci(ql_log_fatal, ha->pdev, 0xd013,
4553                                     "Disabling Exchange offload due to lack of memory\n");
4554                         }
4555                         ha->exchoffld_size = 0;
4556
4557                         return -ENOMEM;
4558                 }
4559         } else if (!ha->exchoffld_buf || (actual_cnt <= FW_DEF_EXCHANGES_CNT)) {
4560                 /* pathological case */
4561                 qla2x00_free_exchoffld_buffer(ha);
4562                 ha->exchoffld_size = 0;
4563                 ha->flags.exchoffld_enabled = 0;
4564                 ql_log(ql_log_info, vha, 0xd016,
4565                     "Exchange offload not enable: offld size=%d, actual count=%d entry sz=0x%x, total sz=0x%x.\n",
4566                     ha->exchoffld_size, actual_cnt, size, totsz);
4567                 return 0;
4568         }
4569
4570         /* Now configure the dma buffer */
4571         rval = qla_set_exchoffld_mem_cfg(vha);
4572         if (rval) {
4573                 ql_log(ql_log_fatal, vha, 0xd02e,
4574                     "Setup exchange offload buffer ****FAILED****.\n");
4575                 qla2x00_free_exchoffld_buffer(ha);
4576         } else {
4577                 /* re-adjust number of target exchange */
4578                 struct init_cb_81xx *icb = (struct init_cb_81xx *)ha->init_cb;
4579
4580                 if (qla_ini_mode_enabled(vha))
4581                         icb->exchange_count = 0;
4582                 else
4583                         icb->exchange_count = cpu_to_le16(vha->ql2xexchoffld);
4584         }
4585
4586         return rval;
4587 }
4588
4589 /*
4590 * qla2x00_free_exchoffld_buffer
4591 *
4592 * Input:
4593 *       ha = adapter block pointer
4594 */
4595 void
4596 qla2x00_free_exchoffld_buffer(struct qla_hw_data *ha)
4597 {
4598         if (ha->exchoffld_buf) {
4599                 dma_free_coherent(&ha->pdev->dev, ha->exchoffld_size,
4600                     ha->exchoffld_buf, ha->exchoffld_buf_dma);
4601                 ha->exchoffld_buf = NULL;
4602                 ha->exchoffld_size = 0;
4603         }
4604 }
4605
4606 /*
4607 * qla2x00_free_fw_dump
4608 *       Frees fw dump stuff.
4609 *
4610 * Input:
4611 *       ha = adapter block pointer
4612 */
4613 static void
4614 qla2x00_free_fw_dump(struct qla_hw_data *ha)
4615 {
4616         struct fwdt *fwdt = ha->fwdt;
4617         uint j;
4618
4619         if (ha->fce)
4620                 dma_free_coherent(&ha->pdev->dev,
4621                     FCE_SIZE, ha->fce, ha->fce_dma);
4622
4623         if (ha->eft)
4624                 dma_free_coherent(&ha->pdev->dev,
4625                     EFT_SIZE, ha->eft, ha->eft_dma);
4626
4627         if (ha->fw_dump)
4628                 vfree(ha->fw_dump);
4629
4630         ha->fce = NULL;
4631         ha->fce_dma = 0;
4632         ha->eft = NULL;
4633         ha->eft_dma = 0;
4634         ha->fw_dumped = 0;
4635         ha->fw_dump_cap_flags = 0;
4636         ha->fw_dump_reading = 0;
4637         ha->fw_dump = NULL;
4638         ha->fw_dump_len = 0;
4639
4640         for (j = 0; j < 2; j++, fwdt++) {
4641                 if (fwdt->template)
4642                         vfree(fwdt->template);
4643                 fwdt->template = NULL;
4644                 fwdt->length = 0;
4645         }
4646 }
4647
4648 /*
4649 * qla2x00_mem_free
4650 *      Frees all adapter allocated memory.
4651 *
4652 * Input:
4653 *      ha = adapter block pointer.
4654 */
4655 static void
4656 qla2x00_mem_free(struct qla_hw_data *ha)
4657 {
4658         qla2x00_free_fw_dump(ha);
4659
4660         if (ha->mctp_dump)
4661                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
4662                     ha->mctp_dump_dma);
4663         ha->mctp_dump = NULL;
4664
4665         mempool_destroy(ha->srb_mempool);
4666         ha->srb_mempool = NULL;
4667
4668         if (ha->dcbx_tlv)
4669                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
4670                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
4671         ha->dcbx_tlv = NULL;
4672
4673         if (ha->xgmac_data)
4674                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
4675                     ha->xgmac_data, ha->xgmac_data_dma);
4676         ha->xgmac_data = NULL;
4677
4678         if (ha->sns_cmd)
4679                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
4680                 ha->sns_cmd, ha->sns_cmd_dma);
4681         ha->sns_cmd = NULL;
4682         ha->sns_cmd_dma = 0;
4683
4684         if (ha->ct_sns)
4685                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
4686                 ha->ct_sns, ha->ct_sns_dma);
4687         ha->ct_sns = NULL;
4688         ha->ct_sns_dma = 0;
4689
4690         if (ha->sfp_data)
4691                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE, ha->sfp_data,
4692                     ha->sfp_data_dma);
4693         ha->sfp_data = NULL;
4694
4695         if (ha->flt)
4696                 dma_free_coherent(&ha->pdev->dev, SFP_DEV_SIZE,
4697                     ha->flt, ha->flt_dma);
4698         ha->flt = NULL;
4699         ha->flt_dma = 0;
4700
4701         if (ha->ms_iocb)
4702                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
4703         ha->ms_iocb = NULL;
4704         ha->ms_iocb_dma = 0;
4705
4706         if (ha->ex_init_cb)
4707                 dma_pool_free(ha->s_dma_pool,
4708                         ha->ex_init_cb, ha->ex_init_cb_dma);
4709         ha->ex_init_cb = NULL;
4710         ha->ex_init_cb_dma = 0;
4711
4712         if (ha->async_pd)
4713                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
4714         ha->async_pd = NULL;
4715         ha->async_pd_dma = 0;
4716
4717         dma_pool_destroy(ha->s_dma_pool);
4718         ha->s_dma_pool = NULL;
4719
4720         if (ha->gid_list)
4721                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
4722                 ha->gid_list, ha->gid_list_dma);
4723         ha->gid_list = NULL;
4724         ha->gid_list_dma = 0;
4725
4726         if (IS_QLA82XX(ha)) {
4727                 if (!list_empty(&ha->gbl_dsd_list)) {
4728                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
4729
4730                         /* clean up allocated prev pool */
4731                         list_for_each_entry_safe(dsd_ptr,
4732                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
4733                                 dma_pool_free(ha->dl_dma_pool,
4734                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
4735                                 list_del(&dsd_ptr->list);
4736                                 kfree(dsd_ptr);
4737                         }
4738                 }
4739         }
4740
4741         dma_pool_destroy(ha->dl_dma_pool);
4742         ha->dl_dma_pool = NULL;
4743
4744         dma_pool_destroy(ha->fcp_cmnd_dma_pool);
4745         ha->fcp_cmnd_dma_pool = NULL;
4746
4747         mempool_destroy(ha->ctx_mempool);
4748         ha->ctx_mempool = NULL;
4749
4750         if (ql2xenabledif && ha->dif_bundl_pool) {
4751                 struct dsd_dma *dsd, *nxt;
4752
4753                 list_for_each_entry_safe(dsd, nxt, &ha->pool.unusable.head,
4754                                          list) {
4755                         list_del(&dsd->list);
4756                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4757                                       dsd->dsd_list_dma);
4758                         ha->dif_bundle_dma_allocs--;
4759                         kfree(dsd);
4760                         ha->dif_bundle_kallocs--;
4761                         ha->pool.unusable.count--;
4762                 }
4763                 list_for_each_entry_safe(dsd, nxt, &ha->pool.good.head, list) {
4764                         list_del(&dsd->list);
4765                         dma_pool_free(ha->dif_bundl_pool, dsd->dsd_addr,
4766                                       dsd->dsd_list_dma);
4767                         ha->dif_bundle_dma_allocs--;
4768                         kfree(dsd);
4769                         ha->dif_bundle_kallocs--;
4770                 }
4771         }
4772
4773         dma_pool_destroy(ha->dif_bundl_pool);
4774         ha->dif_bundl_pool = NULL;
4775
4776         qlt_mem_free(ha);
4777
4778         if (ha->init_cb)
4779                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
4780                         ha->init_cb, ha->init_cb_dma);
4781         ha->init_cb = NULL;
4782         ha->init_cb_dma = 0;
4783
4784         vfree(ha->optrom_buffer);
4785         ha->optrom_buffer = NULL;
4786         kfree(ha->nvram);
4787         ha->nvram = NULL;
4788         kfree(ha->npiv_info);
4789         ha->npiv_info = NULL;
4790         kfree(ha->swl);
4791         ha->swl = NULL;
4792         kfree(ha->loop_id_map);
4793         ha->loop_id_map = NULL;
4794 }
4795
4796 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
4797                                                 struct qla_hw_data *ha)
4798 {
4799         struct Scsi_Host *host;
4800         struct scsi_qla_host *vha = NULL;
4801
4802         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
4803         if (!host) {
4804                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
4805                     "Failed to allocate host from the scsi layer, aborting.\n");
4806                 return NULL;
4807         }
4808
4809         /* Clear our data area */
4810         vha = shost_priv(host);
4811         memset(vha, 0, sizeof(scsi_qla_host_t));
4812
4813         vha->host = host;
4814         vha->host_no = host->host_no;
4815         vha->hw = ha;
4816
4817         vha->qlini_mode = ql2x_ini_mode;
4818         vha->ql2xexchoffld = ql2xexchoffld;
4819         vha->ql2xiniexchg = ql2xiniexchg;
4820
4821         INIT_LIST_HEAD(&vha->vp_fcports);
4822         INIT_LIST_HEAD(&vha->work_list);
4823         INIT_LIST_HEAD(&vha->list);
4824         INIT_LIST_HEAD(&vha->qla_cmd_list);
4825         INIT_LIST_HEAD(&vha->qla_sess_op_cmd_list);
4826         INIT_LIST_HEAD(&vha->logo_list);
4827         INIT_LIST_HEAD(&vha->plogi_ack_list);
4828         INIT_LIST_HEAD(&vha->qp_list);
4829         INIT_LIST_HEAD(&vha->gnl.fcports);
4830         INIT_LIST_HEAD(&vha->gpnid_list);
4831         INIT_WORK(&vha->iocb_work, qla2x00_iocb_work_fn);
4832
4833         spin_lock_init(&vha->work_lock);
4834         spin_lock_init(&vha->cmd_list_lock);
4835         init_waitqueue_head(&vha->fcport_waitQ);
4836         init_waitqueue_head(&vha->vref_waitq);
4837
4838         vha->gnl.size = sizeof(struct get_name_list_extended) *
4839                         (ha->max_loop_id + 1);
4840         vha->gnl.l = dma_alloc_coherent(&ha->pdev->dev,
4841             vha->gnl.size, &vha->gnl.ldma, GFP_KERNEL);
4842         if (!vha->gnl.l) {
4843                 ql_log(ql_log_fatal, vha, 0xd04a,
4844                     "Alloc failed for name list.\n");
4845                 scsi_host_put(vha->host);
4846                 return NULL;
4847         }
4848
4849         /* todo: what about ext login? */
4850         vha->scan.size = ha->max_fibre_devices * sizeof(struct fab_scan_rp);
4851         vha->scan.l = vmalloc(vha->scan.size);
4852         if (!vha->scan.l) {
4853                 ql_log(ql_log_fatal, vha, 0xd04a,
4854                     "Alloc failed for scan database.\n");
4855                 dma_free_coherent(&ha->pdev->dev, vha->gnl.size,
4856                     vha->gnl.l, vha->gnl.ldma);
4857                 scsi_host_put(vha->host);
4858                 return NULL;
4859         }
4860         INIT_DELAYED_WORK(&vha->scan.scan_work, qla_scan_work_fn);
4861
4862         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
4863         ql_dbg(ql_dbg_init, vha, 0x0041,
4864             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
4865             vha->host, vha->hw, vha,
4866             dev_name(&(ha->pdev->dev)));
4867
4868         return vha;
4869 }
4870
4871 struct qla_work_evt *
4872 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
4873 {
4874         struct qla_work_evt *e;
4875         uint8_t bail;
4876
4877         QLA_VHA_MARK_BUSY(vha, bail);
4878         if (bail)
4879                 return NULL;
4880
4881         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
4882         if (!e) {
4883                 QLA_VHA_MARK_NOT_BUSY(vha);
4884                 return NULL;
4885         }
4886
4887         INIT_LIST_HEAD(&e->list);
4888         e->type = type;
4889         e->flags = QLA_EVT_FLAG_FREE;
4890         return e;
4891 }
4892
4893 int
4894 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
4895 {
4896         unsigned long flags;
4897         bool q = false;
4898
4899         spin_lock_irqsave(&vha->work_lock, flags);
4900         list_add_tail(&e->list, &vha->work_list);
4901
4902         if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
4903                 q = true;
4904
4905         spin_unlock_irqrestore(&vha->work_lock, flags);
4906
4907         if (q)
4908                 queue_work(vha->hw->wq, &vha->iocb_work);
4909
4910         return QLA_SUCCESS;
4911 }
4912
4913 int
4914 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
4915     u32 data)
4916 {
4917         struct qla_work_evt *e;
4918
4919         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
4920         if (!e)
4921                 return QLA_FUNCTION_FAILED;
4922
4923         e->u.aen.code = code;
4924         e->u.aen.data = data;
4925         return qla2x00_post_work(vha, e);
4926 }
4927
4928 int
4929 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
4930 {
4931         struct qla_work_evt *e;
4932
4933         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
4934         if (!e)
4935                 return QLA_FUNCTION_FAILED;
4936
4937         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
4938         return qla2x00_post_work(vha, e);
4939 }
4940
4941 #define qla2x00_post_async_work(name, type)     \
4942 int qla2x00_post_async_##name##_work(           \
4943     struct scsi_qla_host *vha,                  \
4944     fc_port_t *fcport, uint16_t *data)          \
4945 {                                               \
4946         struct qla_work_evt *e;                 \
4947                                                 \
4948         e = qla2x00_alloc_work(vha, type);      \
4949         if (!e)                                 \
4950                 return QLA_FUNCTION_FAILED;     \
4951                                                 \
4952         e->u.logio.fcport = fcport;             \
4953         if (data) {                             \
4954                 e->u.logio.data[0] = data[0];   \
4955                 e->u.logio.data[1] = data[1];   \
4956         }                                       \
4957         fcport->flags |= FCF_ASYNC_ACTIVE;      \
4958         return qla2x00_post_work(vha, e);       \
4959 }
4960
4961 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
4962 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
4963 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
4964 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
4965 qla2x00_post_async_work(prlo, QLA_EVT_ASYNC_PRLO);
4966 qla2x00_post_async_work(prlo_done, QLA_EVT_ASYNC_PRLO_DONE);
4967
4968 int
4969 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
4970 {
4971         struct qla_work_evt *e;
4972
4973         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
4974         if (!e)
4975                 return QLA_FUNCTION_FAILED;
4976
4977         e->u.uevent.code = code;
4978         return qla2x00_post_work(vha, e);
4979 }
4980
4981 static void
4982 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
4983 {
4984         char event_string[40];
4985         char *envp[] = { event_string, NULL };
4986
4987         switch (code) {
4988         case QLA_UEVENT_CODE_FW_DUMP:
4989                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
4990                     vha->host_no);
4991                 break;
4992         default:
4993                 /* do nothing */
4994                 break;
4995         }
4996         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
4997 }
4998
4999 int
5000 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
5001                         uint32_t *data, int cnt)
5002 {
5003         struct qla_work_evt *e;
5004
5005         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
5006         if (!e)
5007                 return QLA_FUNCTION_FAILED;
5008
5009         e->u.aenfx.evtcode = evtcode;
5010         e->u.aenfx.count = cnt;
5011         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
5012         return qla2x00_post_work(vha, e);
5013 }
5014
5015 void qla24xx_sched_upd_fcport(fc_port_t *fcport)
5016 {
5017         unsigned long flags;
5018
5019         if (IS_SW_RESV_ADDR(fcport->d_id))
5020                 return;
5021
5022         spin_lock_irqsave(&fcport->vha->work_lock, flags);
5023         if (fcport->disc_state == DSC_UPD_FCPORT) {
5024                 spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5025                 return;
5026         }
5027         fcport->jiffies_at_registration = jiffies;
5028         fcport->sec_since_registration = 0;
5029         fcport->next_disc_state = DSC_DELETED;
5030         fcport->disc_state = DSC_UPD_FCPORT;
5031         spin_unlock_irqrestore(&fcport->vha->work_lock, flags);
5032
5033         queue_work(system_unbound_wq, &fcport->reg_work);
5034 }
5035
5036 static
5037 void qla24xx_create_new_sess(struct scsi_qla_host *vha, struct qla_work_evt *e)
5038 {
5039         unsigned long flags;
5040         fc_port_t *fcport =  NULL, *tfcp;
5041         struct qlt_plogi_ack_t *pla =
5042             (struct qlt_plogi_ack_t *)e->u.new_sess.pla;
5043         uint8_t free_fcport = 0;
5044
5045         ql_dbg(ql_dbg_disc, vha, 0xffff,
5046             "%s %d %8phC enter\n",
5047             __func__, __LINE__, e->u.new_sess.port_name);
5048
5049         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5050         fcport = qla2x00_find_fcport_by_wwpn(vha, e->u.new_sess.port_name, 1);
5051         if (fcport) {
5052                 fcport->d_id = e->u.new_sess.id;
5053                 if (pla) {
5054                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5055                         memcpy(fcport->node_name,
5056                             pla->iocb.u.isp24.u.plogi.node_name,
5057                             WWN_SIZE);
5058                         qlt_plogi_ack_link(vha, pla, fcport, QLT_PLOGI_LINK_SAME_WWN);
5059                         /* we took an extra ref_count to prevent PLOGI ACK when
5060                          * fcport/sess has not been created.
5061                          */
5062                         pla->ref_count--;
5063                 }
5064         } else {
5065                 spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5066                 fcport = qla2x00_alloc_fcport(vha, GFP_KERNEL);
5067                 if (fcport) {
5068                         fcport->d_id = e->u.new_sess.id;
5069                         fcport->flags |= FCF_FABRIC_DEVICE;
5070                         fcport->fw_login_state = DSC_LS_PLOGI_PEND;
5071                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_FCP)
5072                                 fcport->fc4_type = FC4_TYPE_FCP_SCSI;
5073
5074                         if (e->u.new_sess.fc4_type == FS_FC4TYPE_NVME) {
5075                                 fcport->fc4_type = FC4_TYPE_OTHER;
5076                                 fcport->fc4f_nvme = FC4_TYPE_NVME;
5077                         }
5078
5079                         memcpy(fcport->port_name, e->u.new_sess.port_name,
5080                             WWN_SIZE);
5081                 } else {
5082                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5083                                    "%s %8phC mem alloc fail.\n",
5084                                    __func__, e->u.new_sess.port_name);
5085
5086                         if (pla) {
5087                                 list_del(&pla->list);
5088                                 kmem_cache_free(qla_tgt_plogi_cachep, pla);
5089                         }
5090                         return;
5091                 }
5092
5093                 spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5094                 /* search again to make sure no one else got ahead */
5095                 tfcp = qla2x00_find_fcport_by_wwpn(vha,
5096                     e->u.new_sess.port_name, 1);
5097                 if (tfcp) {
5098                         /* should rarily happen */
5099                         ql_dbg(ql_dbg_disc, vha, 0xffff,
5100                             "%s %8phC found existing fcport b4 add. DS %d LS %d\n",
5101                             __func__, tfcp->port_name, tfcp->disc_state,
5102                             tfcp->fw_login_state);
5103
5104                         free_fcport = 1;
5105                 } else {
5106                         list_add_tail(&fcport->list, &vha->vp_fcports);
5107
5108                 }
5109                 if (pla) {
5110                         qlt_plogi_ack_link(vha, pla, fcport,
5111                             QLT_PLOGI_LINK_SAME_WWN);
5112                         pla->ref_count--;
5113                 }
5114         }
5115         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5116
5117         if (fcport) {
5118                 fcport->id_changed = 1;
5119                 fcport->scan_state = QLA_FCPORT_FOUND;
5120                 fcport->chip_reset = vha->hw->base_qpair->chip_reset;
5121                 memcpy(fcport->node_name, e->u.new_sess.node_name, WWN_SIZE);
5122
5123                 if (pla) {
5124                         if (pla->iocb.u.isp24.status_subcode == ELS_PRLI) {
5125                                 u16 wd3_lo;
5126
5127                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5128                                 fcport->local = 0;
5129                                 fcport->loop_id =
5130                                         le16_to_cpu(
5131                                             pla->iocb.u.isp24.nport_handle);
5132                                 fcport->fw_login_state = DSC_LS_PRLI_PEND;
5133                                 wd3_lo =
5134                                     le16_to_cpu(
5135                                         pla->iocb.u.isp24.u.prli.wd3_lo);
5136
5137                                 if (wd3_lo & BIT_7)
5138                                         fcport->conf_compl_supported = 1;
5139
5140                                 if ((wd3_lo & BIT_4) == 0)
5141                                         fcport->port_type = FCT_INITIATOR;
5142                                 else
5143                                         fcport->port_type = FCT_TARGET;
5144                         }
5145                         qlt_plogi_ack_unref(vha, pla);
5146                 } else {
5147                         fc_port_t *dfcp = NULL;
5148
5149                         spin_lock_irqsave(&vha->hw->tgt.sess_lock, flags);
5150                         tfcp = qla2x00_find_fcport_by_nportid(vha,
5151                             &e->u.new_sess.id, 1);
5152                         if (tfcp && (tfcp != fcport)) {
5153                                 /*
5154                                  * We have a conflict fcport with same NportID.
5155                                  */
5156                                 ql_dbg(ql_dbg_disc, vha, 0xffff,
5157                                     "%s %8phC found conflict b4 add. DS %d LS %d\n",
5158                                     __func__, tfcp->port_name, tfcp->disc_state,
5159                                     tfcp->fw_login_state);
5160
5161                                 switch (tfcp->disc_state) {
5162                                 case DSC_DELETED:
5163                                         break;
5164                                 case DSC_DELETE_PEND:
5165                                         fcport->login_pause = 1;
5166                                         tfcp->conflict = fcport;
5167                                         break;
5168                                 default:
5169                                         fcport->login_pause = 1;
5170                                         tfcp->conflict = fcport;
5171                                         dfcp = tfcp;
5172                                         break;
5173                                 }
5174                         }
5175                         spin_unlock_irqrestore(&vha->hw->tgt.sess_lock, flags);
5176                         if (dfcp)
5177                                 qlt_schedule_sess_for_deletion(tfcp);
5178
5179
5180                         if (N2N_TOPO(vha->hw))
5181                                 fcport->flags &= ~FCF_FABRIC_DEVICE;
5182
5183                         if (N2N_TOPO(vha->hw)) {
5184                                 if (vha->flags.nvme_enabled) {
5185                                         fcport->fc4f_nvme = 1;
5186                                         fcport->n2n_flag = 1;
5187                                 }
5188                                 fcport->fw_login_state = 0;
5189                                 /*
5190                                  * wait link init done before sending login
5191                                  */
5192                         } else {
5193                                 qla24xx_fcport_handle_login(vha, fcport);
5194                         }
5195                 }
5196         }
5197
5198         if (free_fcport) {
5199                 qla2x00_free_fcport(fcport);
5200                 if (pla) {
5201                         list_del(&pla->list);
5202                         kmem_cache_free(qla_tgt_plogi_cachep, pla);
5203                 }
5204         }
5205 }
5206
5207 static void qla_sp_retry(struct scsi_qla_host *vha, struct qla_work_evt *e)
5208 {
5209         struct srb *sp = e->u.iosb.sp;
5210         int rval;
5211
5212         rval = qla2x00_start_sp(sp);
5213         if (rval != QLA_SUCCESS) {
5214                 ql_dbg(ql_dbg_disc, vha, 0x2043,
5215                     "%s: %s: Re-issue IOCB failed (%d).\n",
5216                     __func__, sp->name, rval);
5217                 qla24xx_sp_unmap(vha, sp);
5218         }
5219 }
5220
5221 void
5222 qla2x00_do_work(struct scsi_qla_host *vha)
5223 {
5224         struct qla_work_evt *e, *tmp;
5225         unsigned long flags;
5226         LIST_HEAD(work);
5227         int rc;
5228
5229         spin_lock_irqsave(&vha->work_lock, flags);
5230         list_splice_init(&vha->work_list, &work);
5231         spin_unlock_irqrestore(&vha->work_lock, flags);
5232
5233         list_for_each_entry_safe(e, tmp, &work, list) {
5234                 rc = QLA_SUCCESS;
5235                 switch (e->type) {
5236                 case QLA_EVT_AEN:
5237                         fc_host_post_event(vha->host, fc_get_event_number(),
5238                             e->u.aen.code, e->u.aen.data);
5239                         break;
5240                 case QLA_EVT_IDC_ACK:
5241                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
5242                         break;
5243                 case QLA_EVT_ASYNC_LOGIN:
5244                         qla2x00_async_login(vha, e->u.logio.fcport,
5245                             e->u.logio.data);
5246                         break;
5247                 case QLA_EVT_ASYNC_LOGOUT:
5248                         rc = qla2x00_async_logout(vha, e->u.logio.fcport);
5249                         break;
5250                 case QLA_EVT_ASYNC_LOGOUT_DONE:
5251                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
5252                             e->u.logio.data);
5253                         break;
5254                 case QLA_EVT_ASYNC_ADISC:
5255                         qla2x00_async_adisc(vha, e->u.logio.fcport,
5256                             e->u.logio.data);
5257                         break;
5258                 case QLA_EVT_UEVENT:
5259                         qla2x00_uevent_emit(vha, e->u.uevent.code);
5260                         break;
5261                 case QLA_EVT_AENFX:
5262                         qlafx00_process_aen(vha, e);
5263                         break;
5264                 case QLA_EVT_GPNID:
5265                         qla24xx_async_gpnid(vha, &e->u.gpnid.id);
5266                         break;
5267                 case QLA_EVT_UNMAP:
5268                         qla24xx_sp_unmap(vha, e->u.iosb.sp);
5269                         break;
5270                 case QLA_EVT_RELOGIN:
5271                         qla2x00_relogin(vha);
5272                         break;
5273                 case QLA_EVT_NEW_SESS:
5274                         qla24xx_create_new_sess(vha, e);
5275                         break;
5276                 case QLA_EVT_GPDB:
5277                         qla24xx_async_gpdb(vha, e->u.fcport.fcport,
5278                             e->u.fcport.opt);
5279                         break;
5280                 case QLA_EVT_PRLI:
5281                         qla24xx_async_prli(vha, e->u.fcport.fcport);
5282                         break;
5283                 case QLA_EVT_GPSC:
5284                         qla24xx_async_gpsc(vha, e->u.fcport.fcport);
5285                         break;
5286                 case QLA_EVT_GNL:
5287                         qla24xx_async_gnl(vha, e->u.fcport.fcport);
5288                         break;
5289                 case QLA_EVT_NACK:
5290                         qla24xx_do_nack_work(vha, e);
5291                         break;
5292                 case QLA_EVT_ASYNC_PRLO:
5293                         rc = qla2x00_async_prlo(vha, e->u.logio.fcport);
5294                         break;
5295                 case QLA_EVT_ASYNC_PRLO_DONE:
5296                         qla2x00_async_prlo_done(vha, e->u.logio.fcport,
5297                             e->u.logio.data);
5298                         break;
5299                 case QLA_EVT_GPNFT:
5300                         qla24xx_async_gpnft(vha, e->u.gpnft.fc4_type,
5301                             e->u.gpnft.sp);
5302                         break;
5303                 case QLA_EVT_GPNFT_DONE:
5304                         qla24xx_async_gpnft_done(vha, e->u.iosb.sp);
5305                         break;
5306                 case QLA_EVT_GNNFT_DONE:
5307                         qla24xx_async_gnnft_done(vha, e->u.iosb.sp);
5308                         break;
5309                 case QLA_EVT_GNNID:
5310                         qla24xx_async_gnnid(vha, e->u.fcport.fcport);
5311                         break;
5312                 case QLA_EVT_GFPNID:
5313                         qla24xx_async_gfpnid(vha, e->u.fcport.fcport);
5314                         break;
5315                 case QLA_EVT_SP_RETRY:
5316                         qla_sp_retry(vha, e);
5317                         break;
5318                 case QLA_EVT_IIDMA:
5319                         qla_do_iidma_work(vha, e->u.fcport.fcport);
5320                         break;
5321                 case QLA_EVT_ELS_PLOGI:
5322                         qla24xx_els_dcmd2_iocb(vha, ELS_DCMD_PLOGI,
5323                             e->u.fcport.fcport, false);
5324                         break;
5325                 }
5326
5327                 if (rc == EAGAIN) {
5328                         /* put 'work' at head of 'vha->work_list' */
5329                         spin_lock_irqsave(&vha->work_lock, flags);
5330                         list_splice(&work, &vha->work_list);
5331                         spin_unlock_irqrestore(&vha->work_lock, flags);
5332                         break;
5333                 }
5334                 list_del_init(&e->list);
5335                 if (e->flags & QLA_EVT_FLAG_FREE)
5336                         kfree(e);
5337
5338                 /* For each work completed decrement vha ref count */
5339                 QLA_VHA_MARK_NOT_BUSY(vha);
5340         }
5341 }
5342
5343 int qla24xx_post_relogin_work(struct scsi_qla_host *vha)
5344 {
5345         struct qla_work_evt *e;
5346
5347         e = qla2x00_alloc_work(vha, QLA_EVT_RELOGIN);
5348
5349         if (!e) {
5350                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5351                 return QLA_FUNCTION_FAILED;
5352         }
5353
5354         return qla2x00_post_work(vha, e);
5355 }
5356
5357 /* Relogins all the fcports of a vport
5358  * Context: dpc thread
5359  */
5360 void qla2x00_relogin(struct scsi_qla_host *vha)
5361 {
5362         fc_port_t       *fcport;
5363         int status, relogin_needed = 0;
5364         struct event_arg ea;
5365
5366         list_for_each_entry(fcport, &vha->vp_fcports, list) {
5367                 /*
5368                  * If the port is not ONLINE then try to login
5369                  * to it if we haven't run out of retries.
5370                  */
5371                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
5372                     fcport->login_retry) {
5373                         if (fcport->scan_state != QLA_FCPORT_FOUND ||
5374                             fcport->disc_state == DSC_LOGIN_COMPLETE)
5375                                 continue;
5376
5377                         if (fcport->flags & (FCF_ASYNC_SENT|FCF_ASYNC_ACTIVE) ||
5378                                 fcport->disc_state == DSC_DELETE_PEND) {
5379                                 relogin_needed = 1;
5380                         } else {
5381                                 if (vha->hw->current_topology != ISP_CFG_NL) {
5382                                         memset(&ea, 0, sizeof(ea));
5383                                         ea.event = FCME_RELOGIN;
5384                                         ea.fcport = fcport;
5385                                         qla2x00_fcport_event_handler(vha, &ea);
5386                                 } else if (vha->hw->current_topology ==
5387                                     ISP_CFG_NL) {
5388                                         fcport->login_retry--;
5389                                         status =
5390                                             qla2x00_local_device_login(vha,
5391                                                 fcport);
5392                                         if (status == QLA_SUCCESS) {
5393                                                 fcport->old_loop_id =
5394                                                     fcport->loop_id;
5395                                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
5396                                                     "Port login OK: logged in ID 0x%x.\n",
5397                                                     fcport->loop_id);
5398                                                 qla2x00_update_fcport
5399                                                         (vha, fcport);
5400                                         } else if (status == 1) {
5401                                                 set_bit(RELOGIN_NEEDED,
5402                                                     &vha->dpc_flags);
5403                                                 /* retry the login again */
5404                                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
5405                                                     "Retrying %d login again loop_id 0x%x.\n",
5406                                                     fcport->login_retry,
5407                                                     fcport->loop_id);
5408                                         } else {
5409                                                 fcport->login_retry = 0;
5410                                         }
5411
5412                                         if (fcport->login_retry == 0 &&
5413                                             status != QLA_SUCCESS)
5414                                                 qla2x00_clear_loop_id(fcport);
5415                                 }
5416                         }
5417                 }
5418                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
5419                         break;
5420         }
5421
5422         if (relogin_needed)
5423                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
5424
5425         ql_dbg(ql_dbg_disc, vha, 0x400e,
5426             "Relogin end.\n");
5427 }
5428
5429 /* Schedule work on any of the dpc-workqueues */
5430 void
5431 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
5432 {
5433         struct qla_hw_data *ha = base_vha->hw;
5434
5435         switch (work_code) {
5436         case MBA_IDC_AEN: /* 0x8200 */
5437                 if (ha->dpc_lp_wq)
5438                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
5439                 break;
5440
5441         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
5442                 if (!ha->flags.nic_core_reset_hdlr_active) {
5443                         if (ha->dpc_hp_wq)
5444                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
5445                 } else
5446                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
5447                             "NIC Core reset is already active. Skip "
5448                             "scheduling it again.\n");
5449                 break;
5450         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
5451                 if (ha->dpc_hp_wq)
5452                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
5453                 break;
5454         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
5455                 if (ha->dpc_hp_wq)
5456                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
5457                 break;
5458         default:
5459                 ql_log(ql_log_warn, base_vha, 0xb05f,
5460                     "Unknown work-code=0x%x.\n", work_code);
5461         }
5462
5463         return;
5464 }
5465
5466 /* Work: Perform NIC Core Unrecoverable state handling */
5467 void
5468 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
5469 {
5470         struct qla_hw_data *ha =
5471                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
5472         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5473         uint32_t dev_state = 0;
5474
5475         qla83xx_idc_lock(base_vha, 0);
5476         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5477         qla83xx_reset_ownership(base_vha);
5478         if (ha->flags.nic_core_reset_owner) {
5479                 ha->flags.nic_core_reset_owner = 0;
5480                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5481                     QLA8XXX_DEV_FAILED);
5482                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
5483                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5484         }
5485         qla83xx_idc_unlock(base_vha, 0);
5486 }
5487
5488 /* Work: Execute IDC state handler */
5489 void
5490 qla83xx_idc_state_handler_work(struct work_struct *work)
5491 {
5492         struct qla_hw_data *ha =
5493                 container_of(work, struct qla_hw_data, idc_state_handler);
5494         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5495         uint32_t dev_state = 0;
5496
5497         qla83xx_idc_lock(base_vha, 0);
5498         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5499         if (dev_state == QLA8XXX_DEV_FAILED ||
5500                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
5501                 qla83xx_idc_state_handler(base_vha);
5502         qla83xx_idc_unlock(base_vha, 0);
5503 }
5504
5505 static int
5506 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
5507 {
5508         int rval = QLA_SUCCESS;
5509         unsigned long heart_beat_wait = jiffies + (1 * HZ);
5510         uint32_t heart_beat_counter1, heart_beat_counter2;
5511
5512         do {
5513                 if (time_after(jiffies, heart_beat_wait)) {
5514                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
5515                             "Nic Core f/w is not alive.\n");
5516                         rval = QLA_FUNCTION_FAILED;
5517                         break;
5518                 }
5519
5520                 qla83xx_idc_lock(base_vha, 0);
5521                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5522                     &heart_beat_counter1);
5523                 qla83xx_idc_unlock(base_vha, 0);
5524                 msleep(100);
5525                 qla83xx_idc_lock(base_vha, 0);
5526                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
5527                     &heart_beat_counter2);
5528                 qla83xx_idc_unlock(base_vha, 0);
5529         } while (heart_beat_counter1 == heart_beat_counter2);
5530
5531         return rval;
5532 }
5533
5534 /* Work: Perform NIC Core Reset handling */
5535 void
5536 qla83xx_nic_core_reset_work(struct work_struct *work)
5537 {
5538         struct qla_hw_data *ha =
5539                 container_of(work, struct qla_hw_data, nic_core_reset);
5540         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5541         uint32_t dev_state = 0;
5542
5543         if (IS_QLA2031(ha)) {
5544                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
5545                         ql_log(ql_log_warn, base_vha, 0xb081,
5546                             "Failed to dump mctp\n");
5547                 return;
5548         }
5549
5550         if (!ha->flags.nic_core_reset_hdlr_active) {
5551                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
5552                         qla83xx_idc_lock(base_vha, 0);
5553                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5554                             &dev_state);
5555                         qla83xx_idc_unlock(base_vha, 0);
5556                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
5557                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
5558                                     "Nic Core f/w is alive.\n");
5559                                 return;
5560                         }
5561                 }
5562
5563                 ha->flags.nic_core_reset_hdlr_active = 1;
5564                 if (qla83xx_nic_core_reset(base_vha)) {
5565                         /* NIC Core reset failed. */
5566                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
5567                             "NIC Core reset failed.\n");
5568                 }
5569                 ha->flags.nic_core_reset_hdlr_active = 0;
5570         }
5571 }
5572
5573 /* Work: Handle 8200 IDC aens */
5574 void
5575 qla83xx_service_idc_aen(struct work_struct *work)
5576 {
5577         struct qla_hw_data *ha =
5578                 container_of(work, struct qla_hw_data, idc_aen);
5579         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
5580         uint32_t dev_state, idc_control;
5581
5582         qla83xx_idc_lock(base_vha, 0);
5583         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5584         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
5585         qla83xx_idc_unlock(base_vha, 0);
5586         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
5587                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
5588                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
5589                             "Application requested NIC Core Reset.\n");
5590                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5591                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
5592                     QLA_SUCCESS) {
5593                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
5594                             "Other protocol driver requested NIC Core Reset.\n");
5595                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
5596                 }
5597         } else if (dev_state == QLA8XXX_DEV_FAILED ||
5598                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
5599                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
5600         }
5601 }
5602
5603 static void
5604 qla83xx_wait_logic(void)
5605 {
5606         int i;
5607
5608         /* Yield CPU */
5609         if (!in_interrupt()) {
5610                 /*
5611                  * Wait about 200ms before retrying again.
5612                  * This controls the number of retries for single
5613                  * lock operation.
5614                  */
5615                 msleep(100);
5616                 schedule();
5617         } else {
5618                 for (i = 0; i < 20; i++)
5619                         cpu_relax(); /* This a nop instr on i386 */
5620         }
5621 }
5622
5623 static int
5624 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
5625 {
5626         int rval;
5627         uint32_t data;
5628         uint32_t idc_lck_rcvry_stage_mask = 0x3;
5629         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
5630         struct qla_hw_data *ha = base_vha->hw;
5631
5632         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
5633             "Trying force recovery of the IDC lock.\n");
5634
5635         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
5636         if (rval)
5637                 return rval;
5638
5639         if ((data & idc_lck_rcvry_stage_mask) > 0) {
5640                 return QLA_SUCCESS;
5641         } else {
5642                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
5643                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5644                     data);
5645                 if (rval)
5646                         return rval;
5647
5648                 msleep(200);
5649
5650                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
5651                     &data);
5652                 if (rval)
5653                         return rval;
5654
5655                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
5656                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
5657                                         ~(idc_lck_rcvry_stage_mask));
5658                         rval = qla83xx_wr_reg(base_vha,
5659                             QLA83XX_IDC_LOCK_RECOVERY, data);
5660                         if (rval)
5661                                 return rval;
5662
5663                         /* Forcefully perform IDC UnLock */
5664                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
5665                             &data);
5666                         if (rval)
5667                                 return rval;
5668                         /* Clear lock-id by setting 0xff */
5669                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5670                             0xff);
5671                         if (rval)
5672                                 return rval;
5673                         /* Clear lock-recovery by setting 0x0 */
5674                         rval = qla83xx_wr_reg(base_vha,
5675                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
5676                         if (rval)
5677                                 return rval;
5678                 } else
5679                         return QLA_SUCCESS;
5680         }
5681
5682         return rval;
5683 }
5684
5685 static int
5686 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
5687 {
5688         int rval = QLA_SUCCESS;
5689         uint32_t o_drv_lockid, n_drv_lockid;
5690         unsigned long lock_recovery_timeout;
5691
5692         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
5693 retry_lockid:
5694         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
5695         if (rval)
5696                 goto exit;
5697
5698         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
5699         if (time_after_eq(jiffies, lock_recovery_timeout)) {
5700                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
5701                         return QLA_SUCCESS;
5702                 else
5703                         return QLA_FUNCTION_FAILED;
5704         }
5705
5706         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
5707         if (rval)
5708                 goto exit;
5709
5710         if (o_drv_lockid == n_drv_lockid) {
5711                 qla83xx_wait_logic();
5712                 goto retry_lockid;
5713         } else
5714                 return QLA_SUCCESS;
5715
5716 exit:
5717         return rval;
5718 }
5719
5720 void
5721 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5722 {
5723         uint16_t options = (requester_id << 15) | BIT_6;
5724         uint32_t data;
5725         uint32_t lock_owner;
5726         struct qla_hw_data *ha = base_vha->hw;
5727
5728         /* IDC-lock implementation using driver-lock/lock-id remote registers */
5729 retry_lock:
5730         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
5731             == QLA_SUCCESS) {
5732                 if (data) {
5733                         /* Setting lock-id to our function-number */
5734                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5735                             ha->portnum);
5736                 } else {
5737                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
5738                             &lock_owner);
5739                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
5740                             "Failed to acquire IDC lock, acquired by %d, "
5741                             "retrying...\n", lock_owner);
5742
5743                         /* Retry/Perform IDC-Lock recovery */
5744                         if (qla83xx_idc_lock_recovery(base_vha)
5745                             == QLA_SUCCESS) {
5746                                 qla83xx_wait_logic();
5747                                 goto retry_lock;
5748                         } else
5749                                 ql_log(ql_log_warn, base_vha, 0xb075,
5750                                     "IDC Lock recovery FAILED.\n");
5751                 }
5752
5753         }
5754
5755         return;
5756
5757         /* XXX: IDC-lock implementation using access-control mbx */
5758 retry_lock2:
5759         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5760                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
5761                     "Failed to acquire IDC lock. retrying...\n");
5762                 /* Retry/Perform IDC-Lock recovery */
5763                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
5764                         qla83xx_wait_logic();
5765                         goto retry_lock2;
5766                 } else
5767                         ql_log(ql_log_warn, base_vha, 0xb076,
5768                             "IDC Lock recovery FAILED.\n");
5769         }
5770
5771         return;
5772 }
5773
5774 void
5775 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
5776 {
5777 #if 0
5778         uint16_t options = (requester_id << 15) | BIT_7;
5779 #endif
5780         uint16_t retry;
5781         uint32_t data;
5782         struct qla_hw_data *ha = base_vha->hw;
5783
5784         /* IDC-unlock implementation using driver-unlock/lock-id
5785          * remote registers
5786          */
5787         retry = 0;
5788 retry_unlock:
5789         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
5790             == QLA_SUCCESS) {
5791                 if (data == ha->portnum) {
5792                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
5793                         /* Clearing lock-id by setting 0xff */
5794                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
5795                 } else if (retry < 10) {
5796                         /* SV: XXX: IDC unlock retrying needed here? */
5797
5798                         /* Retry for IDC-unlock */
5799                         qla83xx_wait_logic();
5800                         retry++;
5801                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
5802                             "Failed to release IDC lock, retrying=%d\n", retry);
5803                         goto retry_unlock;
5804                 }
5805         } else if (retry < 10) {
5806                 /* Retry for IDC-unlock */
5807                 qla83xx_wait_logic();
5808                 retry++;
5809                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
5810                     "Failed to read drv-lockid, retrying=%d\n", retry);
5811                 goto retry_unlock;
5812         }
5813
5814         return;
5815
5816 #if 0
5817         /* XXX: IDC-unlock implementation using access-control mbx */
5818         retry = 0;
5819 retry_unlock2:
5820         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
5821                 if (retry < 10) {
5822                         /* Retry for IDC-unlock */
5823                         qla83xx_wait_logic();
5824                         retry++;
5825                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
5826                             "Failed to release IDC lock, retrying=%d\n", retry);
5827                         goto retry_unlock2;
5828                 }
5829         }
5830
5831         return;
5832 #endif
5833 }
5834
5835 int
5836 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5837 {
5838         int rval = QLA_SUCCESS;
5839         struct qla_hw_data *ha = vha->hw;
5840         uint32_t drv_presence;
5841
5842         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5843         if (rval == QLA_SUCCESS) {
5844                 drv_presence |= (1 << ha->portnum);
5845                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5846                     drv_presence);
5847         }
5848
5849         return rval;
5850 }
5851
5852 int
5853 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
5854 {
5855         int rval = QLA_SUCCESS;
5856
5857         qla83xx_idc_lock(vha, 0);
5858         rval = __qla83xx_set_drv_presence(vha);
5859         qla83xx_idc_unlock(vha, 0);
5860
5861         return rval;
5862 }
5863
5864 int
5865 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5866 {
5867         int rval = QLA_SUCCESS;
5868         struct qla_hw_data *ha = vha->hw;
5869         uint32_t drv_presence;
5870
5871         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5872         if (rval == QLA_SUCCESS) {
5873                 drv_presence &= ~(1 << ha->portnum);
5874                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5875                     drv_presence);
5876         }
5877
5878         return rval;
5879 }
5880
5881 int
5882 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
5883 {
5884         int rval = QLA_SUCCESS;
5885
5886         qla83xx_idc_lock(vha, 0);
5887         rval = __qla83xx_clear_drv_presence(vha);
5888         qla83xx_idc_unlock(vha, 0);
5889
5890         return rval;
5891 }
5892
5893 static void
5894 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
5895 {
5896         struct qla_hw_data *ha = vha->hw;
5897         uint32_t drv_ack, drv_presence;
5898         unsigned long ack_timeout;
5899
5900         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
5901         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
5902         while (1) {
5903                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
5904                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
5905                 if ((drv_ack & drv_presence) == drv_presence)
5906                         break;
5907
5908                 if (time_after_eq(jiffies, ack_timeout)) {
5909                         ql_log(ql_log_warn, vha, 0xb067,
5910                             "RESET ACK TIMEOUT! drv_presence=0x%x "
5911                             "drv_ack=0x%x\n", drv_presence, drv_ack);
5912                         /*
5913                          * The function(s) which did not ack in time are forced
5914                          * to withdraw any further participation in the IDC
5915                          * reset.
5916                          */
5917                         if (drv_ack != drv_presence)
5918                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
5919                                     drv_ack);
5920                         break;
5921                 }
5922
5923                 qla83xx_idc_unlock(vha, 0);
5924                 msleep(1000);
5925                 qla83xx_idc_lock(vha, 0);
5926         }
5927
5928         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
5929         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
5930 }
5931
5932 static int
5933 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
5934 {
5935         int rval = QLA_SUCCESS;
5936         uint32_t idc_control;
5937
5938         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
5939         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
5940
5941         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
5942         __qla83xx_get_idc_control(vha, &idc_control);
5943         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
5944         __qla83xx_set_idc_control(vha, 0);
5945
5946         qla83xx_idc_unlock(vha, 0);
5947         rval = qla83xx_restart_nic_firmware(vha);
5948         qla83xx_idc_lock(vha, 0);
5949
5950         if (rval != QLA_SUCCESS) {
5951                 ql_log(ql_log_fatal, vha, 0xb06a,
5952                     "Failed to restart NIC f/w.\n");
5953                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
5954                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
5955         } else {
5956                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
5957                     "Success in restarting nic f/w.\n");
5958                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
5959                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
5960         }
5961
5962         return rval;
5963 }
5964
5965 /* Assumes idc_lock always held on entry */
5966 int
5967 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
5968 {
5969         struct qla_hw_data *ha = base_vha->hw;
5970         int rval = QLA_SUCCESS;
5971         unsigned long dev_init_timeout;
5972         uint32_t dev_state;
5973
5974         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
5975         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
5976
5977         while (1) {
5978
5979                 if (time_after_eq(jiffies, dev_init_timeout)) {
5980                         ql_log(ql_log_warn, base_vha, 0xb06e,
5981                             "Initialization TIMEOUT!\n");
5982                         /* Init timeout. Disable further NIC Core
5983                          * communication.
5984                          */
5985                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
5986                                 QLA8XXX_DEV_FAILED);
5987                         ql_log(ql_log_info, base_vha, 0xb06f,
5988                             "HW State: FAILED.\n");
5989                 }
5990
5991                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
5992                 switch (dev_state) {
5993                 case QLA8XXX_DEV_READY:
5994                         if (ha->flags.nic_core_reset_owner)
5995                                 qla83xx_idc_audit(base_vha,
5996                                     IDC_AUDIT_COMPLETION);
5997                         ha->flags.nic_core_reset_owner = 0;
5998                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
5999                             "Reset_owner reset by 0x%x.\n",
6000                             ha->portnum);
6001                         goto exit;
6002                 case QLA8XXX_DEV_COLD:
6003                         if (ha->flags.nic_core_reset_owner)
6004                                 rval = qla83xx_device_bootstrap(base_vha);
6005                         else {
6006                         /* Wait for AEN to change device-state */
6007                                 qla83xx_idc_unlock(base_vha, 0);
6008                                 msleep(1000);
6009                                 qla83xx_idc_lock(base_vha, 0);
6010                         }
6011                         break;
6012                 case QLA8XXX_DEV_INITIALIZING:
6013                         /* Wait for AEN to change device-state */
6014                         qla83xx_idc_unlock(base_vha, 0);
6015                         msleep(1000);
6016                         qla83xx_idc_lock(base_vha, 0);
6017                         break;
6018                 case QLA8XXX_DEV_NEED_RESET:
6019                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
6020                                 qla83xx_need_reset_handler(base_vha);
6021                         else {
6022                                 /* Wait for AEN to change device-state */
6023                                 qla83xx_idc_unlock(base_vha, 0);
6024                                 msleep(1000);
6025                                 qla83xx_idc_lock(base_vha, 0);
6026                         }
6027                         /* reset timeout value after need reset handler */
6028                         dev_init_timeout = jiffies +
6029                             (ha->fcoe_dev_init_timeout * HZ);
6030                         break;
6031                 case QLA8XXX_DEV_NEED_QUIESCENT:
6032                         /* XXX: DEBUG for now */
6033                         qla83xx_idc_unlock(base_vha, 0);
6034                         msleep(1000);
6035                         qla83xx_idc_lock(base_vha, 0);
6036                         break;
6037                 case QLA8XXX_DEV_QUIESCENT:
6038                         /* XXX: DEBUG for now */
6039                         if (ha->flags.quiesce_owner)
6040                                 goto exit;
6041
6042                         qla83xx_idc_unlock(base_vha, 0);
6043                         msleep(1000);
6044                         qla83xx_idc_lock(base_vha, 0);
6045                         dev_init_timeout = jiffies +
6046                             (ha->fcoe_dev_init_timeout * HZ);
6047                         break;
6048                 case QLA8XXX_DEV_FAILED:
6049                         if (ha->flags.nic_core_reset_owner)
6050                                 qla83xx_idc_audit(base_vha,
6051                                     IDC_AUDIT_COMPLETION);
6052                         ha->flags.nic_core_reset_owner = 0;
6053                         __qla83xx_clear_drv_presence(base_vha);
6054                         qla83xx_idc_unlock(base_vha, 0);
6055                         qla8xxx_dev_failed_handler(base_vha);
6056                         rval = QLA_FUNCTION_FAILED;
6057                         qla83xx_idc_lock(base_vha, 0);
6058                         goto exit;
6059                 case QLA8XXX_BAD_VALUE:
6060                         qla83xx_idc_unlock(base_vha, 0);
6061                         msleep(1000);
6062                         qla83xx_idc_lock(base_vha, 0);
6063                         break;
6064                 default:
6065                         ql_log(ql_log_warn, base_vha, 0xb071,
6066                             "Unknown Device State: %x.\n", dev_state);
6067                         qla83xx_idc_unlock(base_vha, 0);
6068                         qla8xxx_dev_failed_handler(base_vha);
6069                         rval = QLA_FUNCTION_FAILED;
6070                         qla83xx_idc_lock(base_vha, 0);
6071                         goto exit;
6072                 }
6073         }
6074
6075 exit:
6076         return rval;
6077 }
6078
6079 void
6080 qla2x00_disable_board_on_pci_error(struct work_struct *work)
6081 {
6082         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
6083             board_disable);
6084         struct pci_dev *pdev = ha->pdev;
6085         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6086
6087         /*
6088          * if UNLOAD flag is already set, then continue unload,
6089          * where it was set first.
6090          */
6091         if (test_bit(UNLOADING, &base_vha->dpc_flags))
6092                 return;
6093
6094         ql_log(ql_log_warn, base_vha, 0x015b,
6095             "Disabling adapter.\n");
6096
6097         if (!atomic_read(&pdev->enable_cnt)) {
6098                 ql_log(ql_log_info, base_vha, 0xfffc,
6099                     "PCI device disabled, no action req for PCI error=%lx\n",
6100                     base_vha->pci_flags);
6101                 return;
6102         }
6103
6104         qla2x00_wait_for_sess_deletion(base_vha);
6105
6106         set_bit(UNLOADING, &base_vha->dpc_flags);
6107
6108         qla2x00_delete_all_vps(ha, base_vha);
6109
6110         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6111
6112         qla2x00_dfs_remove(base_vha);
6113
6114         qla84xx_put_chip(base_vha);
6115
6116         if (base_vha->timer_active)
6117                 qla2x00_stop_timer(base_vha);
6118
6119         base_vha->flags.online = 0;
6120
6121         qla2x00_destroy_deferred_work(ha);
6122
6123         /*
6124          * Do not try to stop beacon blink as it will issue a mailbox
6125          * command.
6126          */
6127         qla2x00_free_sysfs_attr(base_vha, false);
6128
6129         fc_remove_host(base_vha->host);
6130
6131         scsi_remove_host(base_vha->host);
6132
6133         base_vha->flags.init_done = 0;
6134         qla25xx_delete_queues(base_vha);
6135         qla2x00_free_fcports(base_vha);
6136         qla2x00_free_irqs(base_vha);
6137         qla2x00_mem_free(ha);
6138         qla82xx_md_free(base_vha);
6139         qla2x00_free_queues(ha);
6140
6141         qla2x00_unmap_iobases(ha);
6142
6143         pci_release_selected_regions(ha->pdev, ha->bars);
6144         pci_disable_pcie_error_reporting(pdev);
6145         pci_disable_device(pdev);
6146
6147         /*
6148          * Let qla2x00_remove_one cleanup qla_hw_data on device removal.
6149          */
6150 }
6151
6152 /**************************************************************************
6153 * qla2x00_do_dpc
6154 *   This kernel thread is a task that is schedule by the interrupt handler
6155 *   to perform the background processing for interrupts.
6156 *
6157 * Notes:
6158 * This task always run in the context of a kernel thread.  It
6159 * is kick-off by the driver's detect code and starts up
6160 * up one per adapter. It immediately goes to sleep and waits for
6161 * some fibre event.  When either the interrupt handler or
6162 * the timer routine detects a event it will one of the task
6163 * bits then wake us up.
6164 **************************************************************************/
6165 static int
6166 qla2x00_do_dpc(void *data)
6167 {
6168         scsi_qla_host_t *base_vha;
6169         struct qla_hw_data *ha;
6170         uint32_t online;
6171         struct qla_qpair *qpair;
6172
6173         ha = (struct qla_hw_data *)data;
6174         base_vha = pci_get_drvdata(ha->pdev);
6175
6176         set_user_nice(current, MIN_NICE);
6177
6178         set_current_state(TASK_INTERRUPTIBLE);
6179         while (!kthread_should_stop()) {
6180                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
6181                     "DPC handler sleeping.\n");
6182
6183                 schedule();
6184
6185                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
6186                         goto end_loop;
6187
6188                 if (ha->flags.eeh_busy) {
6189                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
6190                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
6191                         goto end_loop;
6192                 }
6193
6194                 ha->dpc_active = 1;
6195
6196                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
6197                     "DPC handler waking up, dpc_flags=0x%lx.\n",
6198                     base_vha->dpc_flags);
6199
6200                 if (test_bit(UNLOADING, &base_vha->dpc_flags))
6201                         break;
6202
6203                 if (IS_P3P_TYPE(ha)) {
6204                         if (IS_QLA8044(ha)) {
6205                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6206                                         &base_vha->dpc_flags)) {
6207                                         qla8044_idc_lock(ha);
6208                                         qla8044_wr_direct(base_vha,
6209                                                 QLA8044_CRB_DEV_STATE_INDEX,
6210                                                 QLA8XXX_DEV_FAILED);
6211                                         qla8044_idc_unlock(ha);
6212                                         ql_log(ql_log_info, base_vha, 0x4004,
6213                                                 "HW State: FAILED.\n");
6214                                         qla8044_device_state_handler(base_vha);
6215                                         continue;
6216                                 }
6217
6218                         } else {
6219                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
6220                                         &base_vha->dpc_flags)) {
6221                                         qla82xx_idc_lock(ha);
6222                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
6223                                                 QLA8XXX_DEV_FAILED);
6224                                         qla82xx_idc_unlock(ha);
6225                                         ql_log(ql_log_info, base_vha, 0x0151,
6226                                                 "HW State: FAILED.\n");
6227                                         qla82xx_device_state_handler(base_vha);
6228                                         continue;
6229                                 }
6230                         }
6231
6232                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
6233                                 &base_vha->dpc_flags)) {
6234
6235                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
6236                                     "FCoE context reset scheduled.\n");
6237                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
6238                                         &base_vha->dpc_flags))) {
6239                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
6240                                                 /* FCoE-ctx reset failed.
6241                                                  * Escalate to chip-reset
6242                                                  */
6243                                                 set_bit(ISP_ABORT_NEEDED,
6244                                                         &base_vha->dpc_flags);
6245                                         }
6246                                         clear_bit(ABORT_ISP_ACTIVE,
6247                                                 &base_vha->dpc_flags);
6248                                 }
6249
6250                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
6251                                     "FCoE context reset end.\n");
6252                         }
6253                 } else if (IS_QLAFX00(ha)) {
6254                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
6255                                 &base_vha->dpc_flags)) {
6256                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
6257                                     "Firmware Reset Recovery\n");
6258                                 if (qlafx00_reset_initialize(base_vha)) {
6259                                         /* Failed. Abort isp later. */
6260                                         if (!test_bit(UNLOADING,
6261                                             &base_vha->dpc_flags)) {
6262                                                 set_bit(ISP_UNRECOVERABLE,
6263                                                     &base_vha->dpc_flags);
6264                                                 ql_dbg(ql_dbg_dpc, base_vha,
6265                                                     0x4021,
6266                                                     "Reset Recovery Failed\n");
6267                                         }
6268                                 }
6269                         }
6270
6271                         if (test_and_clear_bit(FX00_TARGET_SCAN,
6272                                 &base_vha->dpc_flags)) {
6273                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
6274                                     "ISPFx00 Target Scan scheduled\n");
6275                                 if (qlafx00_rescan_isp(base_vha)) {
6276                                         if (!test_bit(UNLOADING,
6277                                             &base_vha->dpc_flags))
6278                                                 set_bit(ISP_UNRECOVERABLE,
6279                                                     &base_vha->dpc_flags);
6280                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
6281                                             "ISPFx00 Target Scan Failed\n");
6282                                 }
6283                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
6284                                     "ISPFx00 Target Scan End\n");
6285                         }
6286                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
6287                                 &base_vha->dpc_flags)) {
6288                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
6289                                     "ISPFx00 Host Info resend scheduled\n");
6290                                 qlafx00_fx_disc(base_vha,
6291                                     &base_vha->hw->mr.fcport,
6292                                     FXDISC_REG_HOST_INFO);
6293                         }
6294                 }
6295
6296                 if (test_and_clear_bit(DETECT_SFP_CHANGE,
6297                         &base_vha->dpc_flags) &&
6298                     !test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) {
6299                         qla24xx_detect_sfp(base_vha);
6300
6301                         if (ha->flags.detected_lr_sfp !=
6302                             ha->flags.using_lr_setting)
6303                                 set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
6304                 }
6305
6306                 if (test_and_clear_bit
6307                     (ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
6308                     !test_bit(UNLOADING, &base_vha->dpc_flags)) {
6309                         bool do_reset = true;
6310
6311                         switch (base_vha->qlini_mode) {
6312                         case QLA2XXX_INI_MODE_ENABLED:
6313                                 break;
6314                         case QLA2XXX_INI_MODE_DISABLED:
6315                                 if (!qla_tgt_mode_enabled(base_vha) &&
6316                                     !ha->flags.fw_started)
6317                                         do_reset = false;
6318                                 break;
6319                         case QLA2XXX_INI_MODE_DUAL:
6320                                 if (!qla_dual_mode_enabled(base_vha) &&
6321                                     !ha->flags.fw_started)
6322                                         do_reset = false;
6323                                 break;
6324                         default:
6325                                 break;
6326                         }
6327
6328                         if (do_reset && !(test_and_set_bit(ABORT_ISP_ACTIVE,
6329                             &base_vha->dpc_flags))) {
6330                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
6331                                     "ISP abort scheduled.\n");
6332                                 if (ha->isp_ops->abort_isp(base_vha)) {
6333                                         /* failed. retry later */
6334                                         set_bit(ISP_ABORT_NEEDED,
6335                                             &base_vha->dpc_flags);
6336                                 }
6337                                 clear_bit(ABORT_ISP_ACTIVE,
6338                                                 &base_vha->dpc_flags);
6339                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
6340                                     "ISP abort end.\n");
6341                         }
6342                 }
6343
6344                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
6345                     &base_vha->dpc_flags)) {
6346                         qla2x00_update_fcports(base_vha);
6347                 }
6348
6349                 if (IS_QLAFX00(ha))
6350                         goto loop_resync_check;
6351
6352                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
6353                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
6354                             "Quiescence mode scheduled.\n");
6355                         if (IS_P3P_TYPE(ha)) {
6356                                 if (IS_QLA82XX(ha))
6357                                         qla82xx_device_state_handler(base_vha);
6358                                 if (IS_QLA8044(ha))
6359                                         qla8044_device_state_handler(base_vha);
6360                                 clear_bit(ISP_QUIESCE_NEEDED,
6361                                     &base_vha->dpc_flags);
6362                                 if (!ha->flags.quiesce_owner) {
6363                                         qla2x00_perform_loop_resync(base_vha);
6364                                         if (IS_QLA82XX(ha)) {
6365                                                 qla82xx_idc_lock(ha);
6366                                                 qla82xx_clear_qsnt_ready(
6367                                                     base_vha);
6368                                                 qla82xx_idc_unlock(ha);
6369                                         } else if (IS_QLA8044(ha)) {
6370                                                 qla8044_idc_lock(ha);
6371                                                 qla8044_clear_qsnt_ready(
6372                                                     base_vha);
6373                                                 qla8044_idc_unlock(ha);
6374                                         }
6375                                 }
6376                         } else {
6377                                 clear_bit(ISP_QUIESCE_NEEDED,
6378                                     &base_vha->dpc_flags);
6379                                 qla2x00_quiesce_io(base_vha);
6380                         }
6381                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
6382                             "Quiescence mode end.\n");
6383                 }
6384
6385                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
6386                                 &base_vha->dpc_flags) &&
6387                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
6388
6389                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
6390                             "Reset marker scheduled.\n");
6391                         qla2x00_rst_aen(base_vha);
6392                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
6393                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
6394                             "Reset marker end.\n");
6395                 }
6396
6397                 /* Retry each device up to login retry count */
6398                 if (test_bit(RELOGIN_NEEDED, &base_vha->dpc_flags) &&
6399                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
6400                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
6401
6402                         if (!base_vha->relogin_jif ||
6403                             time_after_eq(jiffies, base_vha->relogin_jif)) {
6404                                 base_vha->relogin_jif = jiffies + HZ;
6405                                 clear_bit(RELOGIN_NEEDED, &base_vha->dpc_flags);
6406
6407                                 ql_dbg(ql_dbg_disc, base_vha, 0x400d,
6408                                     "Relogin scheduled.\n");
6409                                 qla24xx_post_relogin_work(base_vha);
6410                         }
6411                 }
6412 loop_resync_check:
6413                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
6414                     &base_vha->dpc_flags)) {
6415
6416                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
6417                             "Loop resync scheduled.\n");
6418
6419                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
6420                             &base_vha->dpc_flags))) {
6421
6422                                 qla2x00_loop_resync(base_vha);
6423
6424                                 clear_bit(LOOP_RESYNC_ACTIVE,
6425                                                 &base_vha->dpc_flags);
6426                         }
6427
6428                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
6429                             "Loop resync end.\n");
6430                 }
6431
6432                 if (IS_QLAFX00(ha))
6433                         goto intr_on_check;
6434
6435                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
6436                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
6437                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
6438                         qla2xxx_flash_npiv_conf(base_vha);
6439                 }
6440
6441 intr_on_check:
6442                 if (!ha->interrupts_on)
6443                         ha->isp_ops->enable_intrs(ha);
6444
6445                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
6446                                         &base_vha->dpc_flags)) {
6447                         if (ha->beacon_blink_led == 1)
6448                                 ha->isp_ops->beacon_blink(base_vha);
6449                 }
6450
6451                 /* qpair online check */
6452                 if (test_and_clear_bit(QPAIR_ONLINE_CHECK_NEEDED,
6453                     &base_vha->dpc_flags)) {
6454                         if (ha->flags.eeh_busy ||
6455                             ha->flags.pci_channel_io_perm_failure)
6456                                 online = 0;
6457                         else
6458                                 online = 1;
6459
6460                         mutex_lock(&ha->mq_lock);
6461                         list_for_each_entry(qpair, &base_vha->qp_list,
6462                             qp_list_elem)
6463                         qpair->online = online;
6464                         mutex_unlock(&ha->mq_lock);
6465                 }
6466
6467                 if (test_and_clear_bit(SET_NVME_ZIO_THRESHOLD_NEEDED,
6468                     &base_vha->dpc_flags)) {
6469                         ql_log(ql_log_info, base_vha, 0xffffff,
6470                                 "nvme: SET ZIO Activity exchange threshold to %d.\n",
6471                                                 ha->nvme_last_rptd_aen);
6472                         if (qla27xx_set_zio_threshold(base_vha,
6473                             ha->nvme_last_rptd_aen)) {
6474                                 ql_log(ql_log_info, base_vha, 0xffffff,
6475                                     "nvme: Unable to SET ZIO Activity exchange threshold to %d.\n",
6476                                     ha->nvme_last_rptd_aen);
6477                         }
6478                 }
6479
6480                 if (test_and_clear_bit(SET_ZIO_THRESHOLD_NEEDED,
6481                     &base_vha->dpc_flags)) {
6482                         ql_log(ql_log_info, base_vha, 0xffffff,
6483                             "SET ZIO Activity exchange threshold to %d.\n",
6484                             ha->last_zio_threshold);
6485                         qla27xx_set_zio_threshold(base_vha,
6486                             ha->last_zio_threshold);
6487                 }
6488
6489                 if (!IS_QLAFX00(ha))
6490                         qla2x00_do_dpc_all_vps(base_vha);
6491
6492                 if (test_and_clear_bit(N2N_LINK_RESET,
6493                         &base_vha->dpc_flags)) {
6494                         qla2x00_lip_reset(base_vha);
6495                 }
6496
6497                 ha->dpc_active = 0;
6498 end_loop:
6499                 set_current_state(TASK_INTERRUPTIBLE);
6500         } /* End of while(1) */
6501         __set_current_state(TASK_RUNNING);
6502
6503         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
6504             "DPC handler exiting.\n");
6505
6506         /*
6507          * Make sure that nobody tries to wake us up again.
6508          */
6509         ha->dpc_active = 0;
6510
6511         /* Cleanup any residual CTX SRBs. */
6512         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
6513
6514         return 0;
6515 }
6516
6517 void
6518 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
6519 {
6520         struct qla_hw_data *ha = vha->hw;
6521         struct task_struct *t = ha->dpc_thread;
6522
6523         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
6524                 wake_up_process(t);
6525 }
6526
6527 /*
6528 *  qla2x00_rst_aen
6529 *      Processes asynchronous reset.
6530 *
6531 * Input:
6532 *      ha  = adapter block pointer.
6533 */
6534 static void
6535 qla2x00_rst_aen(scsi_qla_host_t *vha)
6536 {
6537         if (vha->flags.online && !vha->flags.reset_active &&
6538             !atomic_read(&vha->loop_down_timer) &&
6539             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
6540                 do {
6541                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
6542
6543                         /*
6544                          * Issue marker command only when we are going to start
6545                          * the I/O.
6546                          */
6547                         vha->marker_needed = 1;
6548                 } while (!atomic_read(&vha->loop_down_timer) &&
6549                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
6550         }
6551 }
6552
6553 /**************************************************************************
6554 *   qla2x00_timer
6555 *
6556 * Description:
6557 *   One second timer
6558 *
6559 * Context: Interrupt
6560 ***************************************************************************/
6561 void
6562 qla2x00_timer(struct timer_list *t)
6563 {
6564         scsi_qla_host_t *vha = from_timer(vha, t, timer);
6565         unsigned long   cpu_flags = 0;
6566         int             start_dpc = 0;
6567         int             index;
6568         srb_t           *sp;
6569         uint16_t        w;
6570         struct qla_hw_data *ha = vha->hw;
6571         struct req_que *req;
6572
6573         if (ha->flags.eeh_busy) {
6574                 ql_dbg(ql_dbg_timer, vha, 0x6000,
6575                     "EEH = %d, restarting timer.\n",
6576                     ha->flags.eeh_busy);
6577                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
6578                 return;
6579         }
6580
6581         /*
6582          * Hardware read to raise pending EEH errors during mailbox waits. If
6583          * the read returns -1 then disable the board.
6584          */
6585         if (!pci_channel_offline(ha->pdev)) {
6586                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
6587                 qla2x00_check_reg16_for_disconnect(vha, w);
6588         }
6589
6590         /* Make sure qla82xx_watchdog is run only for physical port */
6591         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
6592                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
6593                         start_dpc++;
6594                 if (IS_QLA82XX(ha))
6595                         qla82xx_watchdog(vha);
6596                 else if (IS_QLA8044(ha))
6597                         qla8044_watchdog(vha);
6598         }
6599
6600         if (!vha->vp_idx && IS_QLAFX00(ha))
6601                 qlafx00_timer_routine(vha);
6602
6603         /* Loop down handler. */
6604         if (atomic_read(&vha->loop_down_timer) > 0 &&
6605             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
6606             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
6607                 && vha->flags.online) {
6608
6609                 if (atomic_read(&vha->loop_down_timer) ==
6610                     vha->loop_down_abort_time) {
6611
6612                         ql_log(ql_log_info, vha, 0x6008,
6613                             "Loop down - aborting the queues before time expires.\n");
6614
6615                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
6616                                 atomic_set(&vha->loop_state, LOOP_DEAD);
6617
6618                         /*
6619                          * Schedule an ISP abort to return any FCP2-device
6620                          * commands.
6621                          */
6622                         /* NPIV - scan physical port only */
6623                         if (!vha->vp_idx) {
6624                                 spin_lock_irqsave(&ha->hardware_lock,
6625                                     cpu_flags);
6626                                 req = ha->req_q_map[0];
6627                                 for (index = 1;
6628                                     index < req->num_outstanding_cmds;
6629                                     index++) {
6630                                         fc_port_t *sfcp;
6631
6632                                         sp = req->outstanding_cmds[index];
6633                                         if (!sp)
6634                                                 continue;
6635                                         if (sp->cmd_type != TYPE_SRB)
6636                                                 continue;
6637                                         if (sp->type != SRB_SCSI_CMD)
6638                                                 continue;
6639                                         sfcp = sp->fcport;
6640                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
6641                                                 continue;
6642
6643                                         if (IS_QLA82XX(ha))
6644                                                 set_bit(FCOE_CTX_RESET_NEEDED,
6645                                                         &vha->dpc_flags);
6646                                         else
6647                                                 set_bit(ISP_ABORT_NEEDED,
6648                                                         &vha->dpc_flags);
6649                                         break;
6650                                 }
6651                                 spin_unlock_irqrestore(&ha->hardware_lock,
6652                                                                 cpu_flags);
6653                         }
6654                         start_dpc++;
6655                 }
6656
6657                 /* if the loop has been down for 4 minutes, reinit adapter */
6658                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
6659                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
6660                                 ql_log(ql_log_warn, vha, 0x6009,
6661                                     "Loop down - aborting ISP.\n");
6662
6663                                 if (IS_QLA82XX(ha))
6664                                         set_bit(FCOE_CTX_RESET_NEEDED,
6665                                                 &vha->dpc_flags);
6666                                 else
6667                                         set_bit(ISP_ABORT_NEEDED,
6668                                                 &vha->dpc_flags);
6669                         }
6670                 }
6671                 ql_dbg(ql_dbg_timer, vha, 0x600a,
6672                     "Loop down - seconds remaining %d.\n",
6673                     atomic_read(&vha->loop_down_timer));
6674         }
6675         /* Check if beacon LED needs to be blinked for physical host only */
6676         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
6677                 /* There is no beacon_blink function for ISP82xx */
6678                 if (!IS_P3P_TYPE(ha)) {
6679                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
6680                         start_dpc++;
6681                 }
6682         }
6683
6684         /* Process any deferred work. */
6685         if (!list_empty(&vha->work_list)) {
6686                 unsigned long flags;
6687                 bool q = false;
6688
6689                 spin_lock_irqsave(&vha->work_lock, flags);
6690                 if (!test_and_set_bit(IOCB_WORK_ACTIVE, &vha->dpc_flags))
6691                         q = true;
6692                 spin_unlock_irqrestore(&vha->work_lock, flags);
6693                 if (q)
6694                         queue_work(vha->hw->wq, &vha->iocb_work);
6695         }
6696
6697         /*
6698          * FC-NVME
6699          * see if the active AEN count has changed from what was last reported.
6700          */
6701         if (!vha->vp_idx &&
6702             (atomic_read(&ha->nvme_active_aen_cnt) != ha->nvme_last_rptd_aen) &&
6703             ha->zio_mode == QLA_ZIO_MODE_6 &&
6704             !ha->flags.host_shutting_down) {
6705                 ql_log(ql_log_info, vha, 0x3002,
6706                     "nvme: Sched: Set ZIO exchange threshold to %d.\n",
6707                     ha->nvme_last_rptd_aen);
6708                 ha->nvme_last_rptd_aen = atomic_read(&ha->nvme_active_aen_cnt);
6709                 set_bit(SET_NVME_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6710                 start_dpc++;
6711         }
6712
6713         if (!vha->vp_idx &&
6714             (atomic_read(&ha->zio_threshold) != ha->last_zio_threshold) &&
6715             (ha->zio_mode == QLA_ZIO_MODE_6) &&
6716             (IS_QLA83XX(ha) || IS_QLA27XX(ha) || IS_QLA28XX(ha))) {
6717                 ql_log(ql_log_info, vha, 0x3002,
6718                     "Sched: Set ZIO exchange threshold to %d.\n",
6719                     ha->last_zio_threshold);
6720                 ha->last_zio_threshold = atomic_read(&ha->zio_threshold);
6721                 set_bit(SET_ZIO_THRESHOLD_NEEDED, &vha->dpc_flags);
6722                 start_dpc++;
6723         }
6724
6725         /* Schedule the DPC routine if needed */
6726         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
6727             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
6728             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
6729             start_dpc ||
6730             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
6731             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
6732             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
6733             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
6734             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
6735             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
6736                 ql_dbg(ql_dbg_timer, vha, 0x600b,
6737                     "isp_abort_needed=%d loop_resync_needed=%d "
6738                     "fcport_update_needed=%d start_dpc=%d "
6739                     "reset_marker_needed=%d",
6740                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
6741                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
6742                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
6743                     start_dpc,
6744                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
6745                 ql_dbg(ql_dbg_timer, vha, 0x600c,
6746                     "beacon_blink_needed=%d isp_unrecoverable=%d "
6747                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
6748                     "relogin_needed=%d.\n",
6749                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
6750                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
6751                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
6752                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
6753                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
6754                 qla2xxx_wake_dpc(vha);
6755         }
6756
6757         qla2x00_restart_timer(vha, WATCH_INTERVAL);
6758 }
6759
6760 /* Firmware interface routines. */
6761
6762 #define FW_ISP21XX      0
6763 #define FW_ISP22XX      1
6764 #define FW_ISP2300      2
6765 #define FW_ISP2322      3
6766 #define FW_ISP24XX      4
6767 #define FW_ISP25XX      5
6768 #define FW_ISP81XX      6
6769 #define FW_ISP82XX      7
6770 #define FW_ISP2031      8
6771 #define FW_ISP8031      9
6772 #define FW_ISP27XX      10
6773 #define FW_ISP28XX      11
6774
6775 #define FW_FILE_ISP21XX "ql2100_fw.bin"
6776 #define FW_FILE_ISP22XX "ql2200_fw.bin"
6777 #define FW_FILE_ISP2300 "ql2300_fw.bin"
6778 #define FW_FILE_ISP2322 "ql2322_fw.bin"
6779 #define FW_FILE_ISP24XX "ql2400_fw.bin"
6780 #define FW_FILE_ISP25XX "ql2500_fw.bin"
6781 #define FW_FILE_ISP81XX "ql8100_fw.bin"
6782 #define FW_FILE_ISP82XX "ql8200_fw.bin"
6783 #define FW_FILE_ISP2031 "ql2600_fw.bin"
6784 #define FW_FILE_ISP8031 "ql8300_fw.bin"
6785 #define FW_FILE_ISP27XX "ql2700_fw.bin"
6786 #define FW_FILE_ISP28XX "ql2800_fw.bin"
6787
6788
6789 static DEFINE_MUTEX(qla_fw_lock);
6790
6791 static struct fw_blob qla_fw_blobs[] = {
6792         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
6793         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
6794         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
6795         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
6796         { .name = FW_FILE_ISP24XX, },
6797         { .name = FW_FILE_ISP25XX, },
6798         { .name = FW_FILE_ISP81XX, },
6799         { .name = FW_FILE_ISP82XX, },
6800         { .name = FW_FILE_ISP2031, },
6801         { .name = FW_FILE_ISP8031, },
6802         { .name = FW_FILE_ISP27XX, },
6803         { .name = FW_FILE_ISP28XX, },
6804         { .name = NULL, },
6805 };
6806
6807 struct fw_blob *
6808 qla2x00_request_firmware(scsi_qla_host_t *vha)
6809 {
6810         struct qla_hw_data *ha = vha->hw;
6811         struct fw_blob *blob;
6812
6813         if (IS_QLA2100(ha)) {
6814                 blob = &qla_fw_blobs[FW_ISP21XX];
6815         } else if (IS_QLA2200(ha)) {
6816                 blob = &qla_fw_blobs[FW_ISP22XX];
6817         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
6818                 blob = &qla_fw_blobs[FW_ISP2300];
6819         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
6820                 blob = &qla_fw_blobs[FW_ISP2322];
6821         } else if (IS_QLA24XX_TYPE(ha)) {
6822                 blob = &qla_fw_blobs[FW_ISP24XX];
6823         } else if (IS_QLA25XX(ha)) {
6824                 blob = &qla_fw_blobs[FW_ISP25XX];
6825         } else if (IS_QLA81XX(ha)) {
6826                 blob = &qla_fw_blobs[FW_ISP81XX];
6827         } else if (IS_QLA82XX(ha)) {
6828                 blob = &qla_fw_blobs[FW_ISP82XX];
6829         } else if (IS_QLA2031(ha)) {
6830                 blob = &qla_fw_blobs[FW_ISP2031];
6831         } else if (IS_QLA8031(ha)) {
6832                 blob = &qla_fw_blobs[FW_ISP8031];
6833         } else if (IS_QLA27XX(ha)) {
6834                 blob = &qla_fw_blobs[FW_ISP27XX];
6835         } else if (IS_QLA28XX(ha)) {
6836                 blob = &qla_fw_blobs[FW_ISP28XX];
6837         } else {
6838                 return NULL;
6839         }
6840
6841         if (!blob->name)
6842                 return NULL;
6843
6844         mutex_lock(&qla_fw_lock);
6845         if (blob->fw)
6846                 goto out;
6847
6848         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
6849                 ql_log(ql_log_warn, vha, 0x0063,
6850                     "Failed to load firmware image (%s).\n", blob->name);
6851                 blob->fw = NULL;
6852                 blob = NULL;
6853         }
6854
6855 out:
6856         mutex_unlock(&qla_fw_lock);
6857         return blob;
6858 }
6859
6860 static void
6861 qla2x00_release_firmware(void)
6862 {
6863         struct fw_blob *blob;
6864
6865         mutex_lock(&qla_fw_lock);
6866         for (blob = qla_fw_blobs; blob->name; blob++)
6867                 release_firmware(blob->fw);
6868         mutex_unlock(&qla_fw_lock);
6869 }
6870
6871 static void qla_pci_error_cleanup(scsi_qla_host_t *vha)
6872 {
6873         struct qla_hw_data *ha = vha->hw;
6874         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
6875         struct qla_qpair *qpair = NULL;
6876         struct scsi_qla_host *vp;
6877         fc_port_t *fcport;
6878         int i;
6879         unsigned long flags;
6880
6881         ha->chip_reset++;
6882
6883         ha->base_qpair->chip_reset = ha->chip_reset;
6884         for (i = 0; i < ha->max_qpairs; i++) {
6885                 if (ha->queue_pair_map[i])
6886                         ha->queue_pair_map[i]->chip_reset =
6887                             ha->base_qpair->chip_reset;
6888         }
6889
6890         /* purge MBox commands */
6891         if (atomic_read(&ha->num_pend_mbx_stage3)) {
6892                 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags);
6893                 complete(&ha->mbx_intr_comp);
6894         }
6895
6896         i = 0;
6897
6898         while (atomic_read(&ha->num_pend_mbx_stage3) ||
6899             atomic_read(&ha->num_pend_mbx_stage2) ||
6900             atomic_read(&ha->num_pend_mbx_stage1)) {
6901                 msleep(20);
6902                 i++;
6903                 if (i > 50)
6904                         break;
6905         }
6906
6907         ha->flags.purge_mbox = 0;
6908
6909         mutex_lock(&ha->mq_lock);
6910         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
6911                 qpair->online = 0;
6912         mutex_unlock(&ha->mq_lock);
6913
6914         qla2x00_mark_all_devices_lost(vha, 0);
6915
6916         spin_lock_irqsave(&ha->vport_slock, flags);
6917         list_for_each_entry(vp, &ha->vp_list, list) {
6918                 atomic_inc(&vp->vref_count);
6919                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6920                 qla2x00_mark_all_devices_lost(vp, 0);
6921                 spin_lock_irqsave(&ha->vport_slock, flags);
6922                 atomic_dec(&vp->vref_count);
6923         }
6924         spin_unlock_irqrestore(&ha->vport_slock, flags);
6925
6926         /* Clear all async request states across all VPs. */
6927         list_for_each_entry(fcport, &vha->vp_fcports, list)
6928                 fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6929
6930         spin_lock_irqsave(&ha->vport_slock, flags);
6931         list_for_each_entry(vp, &ha->vp_list, list) {
6932                 atomic_inc(&vp->vref_count);
6933                 spin_unlock_irqrestore(&ha->vport_slock, flags);
6934                 list_for_each_entry(fcport, &vp->vp_fcports, list)
6935                         fcport->flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT);
6936                 spin_lock_irqsave(&ha->vport_slock, flags);
6937                 atomic_dec(&vp->vref_count);
6938         }
6939         spin_unlock_irqrestore(&ha->vport_slock, flags);
6940 }
6941
6942
6943 static pci_ers_result_t
6944 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
6945 {
6946         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
6947         struct qla_hw_data *ha = vha->hw;
6948
6949         ql_dbg(ql_dbg_aer, vha, 0x9000,
6950             "PCI error detected, state %x.\n", state);
6951
6952         if (!atomic_read(&pdev->enable_cnt)) {
6953                 ql_log(ql_log_info, vha, 0xffff,
6954                         "PCI device is disabled,state %x\n", state);
6955                 return PCI_ERS_RESULT_NEED_RESET;
6956         }
6957
6958         switch (state) {
6959         case pci_channel_io_normal:
6960                 ha->flags.eeh_busy = 0;
6961                 if (ql2xmqsupport || ql2xnvmeenable) {
6962                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6963                         qla2xxx_wake_dpc(vha);
6964                 }
6965                 return PCI_ERS_RESULT_CAN_RECOVER;
6966         case pci_channel_io_frozen:
6967                 ha->flags.eeh_busy = 1;
6968                 qla_pci_error_cleanup(vha);
6969                 return PCI_ERS_RESULT_NEED_RESET;
6970         case pci_channel_io_perm_failure:
6971                 ha->flags.pci_channel_io_perm_failure = 1;
6972                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
6973                 if (ql2xmqsupport || ql2xnvmeenable) {
6974                         set_bit(QPAIR_ONLINE_CHECK_NEEDED, &vha->dpc_flags);
6975                         qla2xxx_wake_dpc(vha);
6976                 }
6977                 return PCI_ERS_RESULT_DISCONNECT;
6978         }
6979         return PCI_ERS_RESULT_NEED_RESET;
6980 }
6981
6982 static pci_ers_result_t
6983 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
6984 {
6985         int risc_paused = 0;
6986         uint32_t stat;
6987         unsigned long flags;
6988         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
6989         struct qla_hw_data *ha = base_vha->hw;
6990         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
6991         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
6992
6993         if (IS_QLA82XX(ha))
6994                 return PCI_ERS_RESULT_RECOVERED;
6995
6996         spin_lock_irqsave(&ha->hardware_lock, flags);
6997         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
6998                 stat = RD_REG_DWORD(&reg->hccr);
6999                 if (stat & HCCR_RISC_PAUSE)
7000                         risc_paused = 1;
7001         } else if (IS_QLA23XX(ha)) {
7002                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
7003                 if (stat & HSR_RISC_PAUSED)
7004                         risc_paused = 1;
7005         } else if (IS_FWI2_CAPABLE(ha)) {
7006                 stat = RD_REG_DWORD(&reg24->host_status);
7007                 if (stat & HSRX_RISC_PAUSED)
7008                         risc_paused = 1;
7009         }
7010         spin_unlock_irqrestore(&ha->hardware_lock, flags);
7011
7012         if (risc_paused) {
7013                 ql_log(ql_log_info, base_vha, 0x9003,
7014                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
7015                 ha->isp_ops->fw_dump(base_vha, 0);
7016
7017                 return PCI_ERS_RESULT_NEED_RESET;
7018         } else
7019                 return PCI_ERS_RESULT_RECOVERED;
7020 }
7021
7022 static pci_ers_result_t
7023 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
7024 {
7025         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
7026         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7027         struct qla_hw_data *ha = base_vha->hw;
7028         int rc;
7029         struct qla_qpair *qpair = NULL;
7030
7031         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
7032             "Slot Reset.\n");
7033
7034         /* Workaround: qla2xxx driver which access hardware earlier
7035          * needs error state to be pci_channel_io_online.
7036          * Otherwise mailbox command timesout.
7037          */
7038         pdev->error_state = pci_channel_io_normal;
7039
7040         pci_restore_state(pdev);
7041
7042         /* pci_restore_state() clears the saved_state flag of the device
7043          * save restored state which resets saved_state flag
7044          */
7045         pci_save_state(pdev);
7046
7047         if (ha->mem_only)
7048                 rc = pci_enable_device_mem(pdev);
7049         else
7050                 rc = pci_enable_device(pdev);
7051
7052         if (rc) {
7053                 ql_log(ql_log_warn, base_vha, 0x9005,
7054                     "Can't re-enable PCI device after reset.\n");
7055                 goto exit_slot_reset;
7056         }
7057
7058
7059         if (ha->isp_ops->pci_config(base_vha))
7060                 goto exit_slot_reset;
7061
7062         mutex_lock(&ha->mq_lock);
7063         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7064                 qpair->online = 1;
7065         mutex_unlock(&ha->mq_lock);
7066
7067         base_vha->flags.online = 1;
7068         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7069         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
7070                 ret =  PCI_ERS_RESULT_RECOVERED;
7071         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7072
7073
7074 exit_slot_reset:
7075         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
7076             "slot_reset return %x.\n", ret);
7077
7078         return ret;
7079 }
7080
7081 static void
7082 qla2xxx_pci_resume(struct pci_dev *pdev)
7083 {
7084         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7085         struct qla_hw_data *ha = base_vha->hw;
7086         int ret;
7087
7088         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
7089             "pci_resume.\n");
7090
7091         ha->flags.eeh_busy = 0;
7092
7093         ret = qla2x00_wait_for_hba_online(base_vha);
7094         if (ret != QLA_SUCCESS) {
7095                 ql_log(ql_log_fatal, base_vha, 0x9002,
7096                     "The device failed to resume I/O from slot/link_reset.\n");
7097         }
7098 }
7099
7100 static void
7101 qla_pci_reset_prepare(struct pci_dev *pdev)
7102 {
7103         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7104         struct qla_hw_data *ha = base_vha->hw;
7105         struct qla_qpair *qpair;
7106
7107         ql_log(ql_log_warn, base_vha, 0xffff,
7108             "%s.\n", __func__);
7109
7110         /*
7111          * PCI FLR/function reset is about to reset the
7112          * slot. Stop the chip to stop all DMA access.
7113          * It is assumed that pci_reset_done will be called
7114          * after FLR to resume Chip operation.
7115          */
7116         ha->flags.eeh_busy = 1;
7117         mutex_lock(&ha->mq_lock);
7118         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7119                 qpair->online = 0;
7120         mutex_unlock(&ha->mq_lock);
7121
7122         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7123         qla2x00_abort_isp_cleanup(base_vha);
7124         qla2x00_abort_all_cmds(base_vha, DID_RESET << 16);
7125 }
7126
7127 static void
7128 qla_pci_reset_done(struct pci_dev *pdev)
7129 {
7130         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
7131         struct qla_hw_data *ha = base_vha->hw;
7132         struct qla_qpair *qpair;
7133
7134         ql_log(ql_log_warn, base_vha, 0xffff,
7135             "%s.\n", __func__);
7136
7137         /*
7138          * FLR just completed by PCI layer. Resume adapter
7139          */
7140         ha->flags.eeh_busy = 0;
7141         mutex_lock(&ha->mq_lock);
7142         list_for_each_entry(qpair, &base_vha->qp_list, qp_list_elem)
7143                 qpair->online = 1;
7144         mutex_unlock(&ha->mq_lock);
7145
7146         base_vha->flags.online = 1;
7147         ha->isp_ops->abort_isp(base_vha);
7148         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
7149 }
7150
7151 static int qla2xxx_map_queues(struct Scsi_Host *shost)
7152 {
7153         int rc;
7154         scsi_qla_host_t *vha = (scsi_qla_host_t *)shost->hostdata;
7155         struct blk_mq_queue_map *qmap = &shost->tag_set.map[HCTX_TYPE_DEFAULT];
7156
7157         if (USER_CTRL_IRQ(vha->hw) || !vha->hw->mqiobase)
7158                 rc = blk_mq_map_queues(qmap);
7159         else
7160                 rc = blk_mq_pci_map_queues(qmap, vha->hw->pdev, vha->irq_offset);
7161         return rc;
7162 }
7163
7164 struct scsi_host_template qla2xxx_driver_template = {
7165         .module                 = THIS_MODULE,
7166         .name                   = QLA2XXX_DRIVER_NAME,
7167         .queuecommand           = qla2xxx_queuecommand,
7168
7169         .eh_timed_out           = fc_eh_timed_out,
7170         .eh_abort_handler       = qla2xxx_eh_abort,
7171         .eh_device_reset_handler = qla2xxx_eh_device_reset,
7172         .eh_target_reset_handler = qla2xxx_eh_target_reset,
7173         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
7174         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
7175
7176         .slave_configure        = qla2xxx_slave_configure,
7177
7178         .slave_alloc            = qla2xxx_slave_alloc,
7179         .slave_destroy          = qla2xxx_slave_destroy,
7180         .scan_finished          = qla2xxx_scan_finished,
7181         .scan_start             = qla2xxx_scan_start,
7182         .change_queue_depth     = scsi_change_queue_depth,
7183         .map_queues             = qla2xxx_map_queues,
7184         .this_id                = -1,
7185         .cmd_per_lun            = 3,
7186         .sg_tablesize           = SG_ALL,
7187
7188         .max_sectors            = 0xFFFF,
7189         .shost_attrs            = qla2x00_host_attrs,
7190
7191         .supported_mode         = MODE_INITIATOR,
7192         .track_queue_depth      = 1,
7193 };
7194
7195 static const struct pci_error_handlers qla2xxx_err_handler = {
7196         .error_detected = qla2xxx_pci_error_detected,
7197         .mmio_enabled = qla2xxx_pci_mmio_enabled,
7198         .slot_reset = qla2xxx_pci_slot_reset,
7199         .resume = qla2xxx_pci_resume,
7200         .reset_prepare = qla_pci_reset_prepare,
7201         .reset_done = qla_pci_reset_done,
7202 };
7203
7204 static struct pci_device_id qla2xxx_pci_tbl[] = {
7205         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
7206         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
7207         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
7208         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
7209         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
7210         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
7211         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
7212         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
7213         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
7214         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
7215         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
7216         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
7217         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
7218         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
7219         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
7220         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
7221         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
7222         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
7223         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
7224         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
7225         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
7226         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2261) },
7227         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2061) },
7228         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2081) },
7229         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2281) },
7230         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2089) },
7231         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2289) },
7232         { 0 },
7233 };
7234 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
7235
7236 static struct pci_driver qla2xxx_pci_driver = {
7237         .name           = QLA2XXX_DRIVER_NAME,
7238         .driver         = {
7239                 .owner          = THIS_MODULE,
7240         },
7241         .id_table       = qla2xxx_pci_tbl,
7242         .probe          = qla2x00_probe_one,
7243         .remove         = qla2x00_remove_one,
7244         .shutdown       = qla2x00_shutdown,
7245         .err_handler    = &qla2xxx_err_handler,
7246 };
7247
7248 static const struct file_operations apidev_fops = {
7249         .owner = THIS_MODULE,
7250         .llseek = noop_llseek,
7251 };
7252
7253 /**
7254  * qla2x00_module_init - Module initialization.
7255  **/
7256 static int __init
7257 qla2x00_module_init(void)
7258 {
7259         int ret = 0;
7260
7261         BUILD_BUG_ON(sizeof(cmd_entry_t) != 64);
7262         BUILD_BUG_ON(sizeof(cont_a64_entry_t) != 64);
7263         BUILD_BUG_ON(sizeof(cont_entry_t) != 64);
7264         BUILD_BUG_ON(sizeof(init_cb_t) != 96);
7265         BUILD_BUG_ON(sizeof(ms_iocb_entry_t) != 64);
7266         BUILD_BUG_ON(sizeof(request_t) != 64);
7267         BUILD_BUG_ON(sizeof(struct access_chip_84xx) != 64);
7268         BUILD_BUG_ON(sizeof(struct cmd_bidir) != 64);
7269         BUILD_BUG_ON(sizeof(struct cmd_nvme) != 64);
7270         BUILD_BUG_ON(sizeof(struct cmd_type_6) != 64);
7271         BUILD_BUG_ON(sizeof(struct cmd_type_7) != 64);
7272         BUILD_BUG_ON(sizeof(struct cmd_type_7_fx00) != 64);
7273         BUILD_BUG_ON(sizeof(struct cmd_type_crc_2) != 64);
7274         BUILD_BUG_ON(sizeof(struct ct_entry_24xx) != 64);
7275         BUILD_BUG_ON(sizeof(struct ctio_crc2_to_fw) != 64);
7276         BUILD_BUG_ON(sizeof(struct els_entry_24xx) != 64);
7277         BUILD_BUG_ON(sizeof(struct fxdisc_entry_fx00) != 64);
7278         BUILD_BUG_ON(sizeof(struct init_cb_24xx) != 128);
7279         BUILD_BUG_ON(sizeof(struct init_cb_81xx) != 128);
7280         BUILD_BUG_ON(sizeof(struct pt_ls4_request) != 64);
7281         BUILD_BUG_ON(sizeof(struct sns_cmd_pkt) != 2064);
7282         BUILD_BUG_ON(sizeof(struct verify_chip_entry_84xx) != 64);
7283         BUILD_BUG_ON(sizeof(struct vf_evfp_entry_24xx) != 56);
7284
7285         /* Allocate cache for SRBs. */
7286         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
7287             SLAB_HWCACHE_ALIGN, NULL);
7288         if (srb_cachep == NULL) {
7289                 ql_log(ql_log_fatal, NULL, 0x0001,
7290                     "Unable to allocate SRB cache...Failing load!.\n");
7291                 return -ENOMEM;
7292         }
7293
7294         /* Initialize target kmem_cache and mem_pools */
7295         ret = qlt_init();
7296         if (ret < 0) {
7297                 goto destroy_cache;
7298         } else if (ret > 0) {
7299                 /*
7300                  * If initiator mode is explictly disabled by qlt_init(),
7301                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
7302                  * performing scsi_scan_target() during LOOP UP event.
7303                  */
7304                 qla2xxx_transport_functions.disable_target_scan = 1;
7305                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
7306         }
7307
7308         /* Derive version string. */
7309         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
7310         if (ql2xextended_error_logging)
7311                 strcat(qla2x00_version_str, "-debug");
7312         if (ql2xextended_error_logging == 1)
7313                 ql2xextended_error_logging = QL_DBG_DEFAULT1_MASK;
7314
7315         if (ql2x_ini_mode == QLA2XXX_INI_MODE_DUAL)
7316                 qla_insert_tgt_attrs();
7317
7318         qla2xxx_transport_template =
7319             fc_attach_transport(&qla2xxx_transport_functions);
7320         if (!qla2xxx_transport_template) {
7321                 ql_log(ql_log_fatal, NULL, 0x0002,
7322                     "fc_attach_transport failed...Failing load!.\n");
7323                 ret = -ENODEV;
7324                 goto qlt_exit;
7325         }
7326
7327         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
7328         if (apidev_major < 0) {
7329                 ql_log(ql_log_fatal, NULL, 0x0003,
7330                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
7331         }
7332
7333         qla2xxx_transport_vport_template =
7334             fc_attach_transport(&qla2xxx_transport_vport_functions);
7335         if (!qla2xxx_transport_vport_template) {
7336                 ql_log(ql_log_fatal, NULL, 0x0004,
7337                     "fc_attach_transport vport failed...Failing load!.\n");
7338                 ret = -ENODEV;
7339                 goto unreg_chrdev;
7340         }
7341         ql_log(ql_log_info, NULL, 0x0005,
7342             "QLogic Fibre Channel HBA Driver: %s.\n",
7343             qla2x00_version_str);
7344         ret = pci_register_driver(&qla2xxx_pci_driver);
7345         if (ret) {
7346                 ql_log(ql_log_fatal, NULL, 0x0006,
7347                     "pci_register_driver failed...ret=%d Failing load!.\n",
7348                     ret);
7349                 goto release_vport_transport;
7350         }
7351         return ret;
7352
7353 release_vport_transport:
7354         fc_release_transport(qla2xxx_transport_vport_template);
7355
7356 unreg_chrdev:
7357         if (apidev_major >= 0)
7358                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7359         fc_release_transport(qla2xxx_transport_template);
7360
7361 qlt_exit:
7362         qlt_exit();
7363
7364 destroy_cache:
7365         kmem_cache_destroy(srb_cachep);
7366         return ret;
7367 }
7368
7369 /**
7370  * qla2x00_module_exit - Module cleanup.
7371  **/
7372 static void __exit
7373 qla2x00_module_exit(void)
7374 {
7375         pci_unregister_driver(&qla2xxx_pci_driver);
7376         qla2x00_release_firmware();
7377         kmem_cache_destroy(ctx_cachep);
7378         fc_release_transport(qla2xxx_transport_vport_template);
7379         if (apidev_major >= 0)
7380                 unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
7381         fc_release_transport(qla2xxx_transport_template);
7382         qlt_exit();
7383         kmem_cache_destroy(srb_cachep);
7384 }
7385
7386 module_init(qla2x00_module_init);
7387 module_exit(qla2x00_module_exit);
7388
7389 MODULE_AUTHOR("QLogic Corporation");
7390 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
7391 MODULE_LICENSE("GPL");
7392 MODULE_VERSION(QLA2XXX_VERSION);
7393 MODULE_FIRMWARE(FW_FILE_ISP21XX);
7394 MODULE_FIRMWARE(FW_FILE_ISP22XX);
7395 MODULE_FIRMWARE(FW_FILE_ISP2300);
7396 MODULE_FIRMWARE(FW_FILE_ISP2322);
7397 MODULE_FIRMWARE(FW_FILE_ISP24XX);
7398 MODULE_FIRMWARE(FW_FILE_ISP25XX);