drivers/scsi/mpt3sas/mpt3sas_base.c

   1 /*
   2  * This is the Fusion MPT base driver providing common API layer interface
   3  * for access to MPT (Message Passing Technology) firmware.
   4  *
   5  * This code is based on drivers/scsi/mpt3sas/mpt3sas_base.c
   6  * Copyright (C) 2012-2014  LSI Corporation
   7  * Copyright (C) 2013-2014 Avago Technologies
   8  *  (mailto: MPT-FusionLinux.pdl@avagotech.com)
   9  *
  10  * This program is free software; you can redistribute it and/or
  11  * modify it under the terms of the GNU General Public License
  12  * as published by the Free Software Foundation; either version 2
  13  * of the License, or (at your option) any later version.
  14  *
  15  * This program is distributed in the hope that it will be useful,
  16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  18  * GNU General Public License for more details.
  19  *
  20  * NO WARRANTY
  21  * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  22  * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  23  * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  24  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  25  * solely responsible for determining the appropriateness of using and
  26  * distributing the Program and assumes all risks associated with its
  27  * exercise of rights under this Agreement, including but not limited to
  28  * the risks and costs of program errors, damage to or loss of data,
  29  * programs or equipment, and unavailability or interruption of operations.
  30
  31  * DISCLAIMER OF LIABILITY
  32  * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  33  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  34  * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  35  * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  36  * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  37  * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  38  * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  39
  40  * You should have received a copy of the GNU General Public License
  41  * along with this program; if not, write to the Free Software
  42  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301,
  43  * USA.
  44  */
  45
  46 #include <linux/kernel.h>
  47 #include <linux/module.h>
  48 #include <linux/errno.h>
  49 #include <linux/init.h>
  50 #include <linux/slab.h>
  51 #include <linux/types.h>
  52 #include <linux/pci.h>
  53 #include <linux/kdev_t.h>
  54 #include <linux/blkdev.h>
  55 #include <linux/delay.h>
  56 #include <linux/interrupt.h>
  57 #include <linux/dma-mapping.h>
  58 #include <linux/io.h>
  59 #include <linux/time.h>
  60 #include <linux/kthread.h>
  61 #include <linux/aer.h>
  62
  63
  64 #include "mpt3sas_base.h"
  65
  66 static MPT_CALLBACK     mpt_callbacks[MPT_MAX_CALLBACKS];
  67
  68
  69 #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  70
  71  /* maximum controller queue depth */
  72 #define MAX_HBA_QUEUE_DEPTH     30000
  73 #define MAX_CHAIN_DEPTH         100000
  74 static int max_queue_depth = -1;
  75 module_param(max_queue_depth, int, 0);
  76 MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  77
  78 static int max_sgl_entries = -1;
  79 module_param(max_sgl_entries, int, 0);
  80 MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  81
  82 static int msix_disable = -1;
  83 module_param(msix_disable, int, 0);
  84 MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  85
  86 static int max_msix_vectors = -1;
  87 module_param(max_msix_vectors, int, 0);
  88 MODULE_PARM_DESC(max_msix_vectors,
  89         " max msix vectors");
  90
  91 static int mpt3sas_fwfault_debug;
  92 MODULE_PARM_DESC(mpt3sas_fwfault_debug,
  93         " enable detection of firmware fault and halt firmware - (default=0)");
  94
  95 static int
  96 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
  97
  98 /**
  99  * _scsih_set_fwfault_debug - global setting of ioc->fwfault_debug.
 100  *
 101  */
 102 static int
 103 _scsih_set_fwfault_debug(const char *val, struct kernel_param *kp)
 104 {
 105         int ret = param_set_int(val, kp);
 106         struct MPT3SAS_ADAPTER *ioc;
 107
 108         if (ret)
 109                 return ret;
 110
 111         pr_info("setting fwfault_debug(%d)\n", mpt3sas_fwfault_debug);
 112         list_for_each_entry(ioc, &mpt3sas_ioc_list, list)
 113                 ioc->fwfault_debug = mpt3sas_fwfault_debug;
 114         return 0;
 115 }
 116 module_param_call(mpt3sas_fwfault_debug, _scsih_set_fwfault_debug,
 117         param_get_int, &mpt3sas_fwfault_debug, 0644);
 118
 119 /**
 120  *  mpt3sas_remove_dead_ioc_func - kthread context to remove dead ioc
 121  * @arg: input argument, used to derive ioc
 122  *
 123  * Return 0 if controller is removed from pci subsystem.
 124  * Return -1 for other case.
 125  */
 126 static int mpt3sas_remove_dead_ioc_func(void *arg)
 127 {
 128         struct MPT3SAS_ADAPTER *ioc = (struct MPT3SAS_ADAPTER *)arg;
 129         struct pci_dev *pdev;
 130
 131         if ((ioc == NULL))
 132                 return -1;
 133
 134         pdev = ioc->pdev;
 135         if ((pdev == NULL))
 136                 return -1;
 137         pci_stop_and_remove_bus_device_locked(pdev);
 138         return 0;
 139 }
 140
 141 /**
 142  * _base_fault_reset_work - workq handling ioc fault conditions
 143  * @work: input argument, used to derive ioc
 144  * Context: sleep.
 145  *
 146  * Return nothing.
 147  */
 148 static void
 149 _base_fault_reset_work(struct work_struct *work)
 150 {
 151         struct MPT3SAS_ADAPTER *ioc =
 152             container_of(work, struct MPT3SAS_ADAPTER, fault_reset_work.work);
 153         unsigned long    flags;
 154         u32 doorbell;
 155         int rc;
 156         struct task_struct *p;
 157
 158
 159         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 160         if (ioc->shost_recovery)
 161                 goto rearm_timer;
 162         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 163
 164         doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 165         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_MASK) {
 166                 pr_err(MPT3SAS_FMT "SAS host is non-operational !!!!\n",
 167                     ioc->name);
 168
 169                 /*
 170                  * Call _scsih_flush_pending_cmds callback so that we flush all
 171                  * pending commands back to OS. This call is required to aovid
 172                  * deadlock at block layer. Dead IOC will fail to do diag reset,
 173                  * and this call is safe since dead ioc will never return any
 174                  * command back from HW.
 175                  */
 176                 ioc->schedule_dead_ioc_flush_running_cmds(ioc);
 177                 /*
 178                  * Set remove_host flag early since kernel thread will
 179                  * take some time to execute.
 180                  */
 181                 ioc->remove_host = 1;
 182                 /*Remove the Dead Host */
 183                 p = kthread_run(mpt3sas_remove_dead_ioc_func, ioc,
 184                     "mpt3sas_dead_ioc_%d", ioc->id);
 185                 if (IS_ERR(p))
 186                         pr_err(MPT3SAS_FMT
 187                         "%s: Running mpt3sas_dead_ioc thread failed !!!!\n",
 188                         ioc->name, __func__);
 189                 else
 190                         pr_err(MPT3SAS_FMT
 191                         "%s: Running mpt3sas_dead_ioc thread success !!!!\n",
 192                         ioc->name, __func__);
 193                 return; /* don't rearm timer */
 194         }
 195
 196         if ((doorbell & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL) {
 197                 rc = mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
 198                     FORCE_BIG_HAMMER);
 199                 pr_warn(MPT3SAS_FMT "%s: hard reset: %s\n", ioc->name,
 200                     __func__, (rc == 0) ? "success" : "failed");
 201                 doorbell = mpt3sas_base_get_iocstate(ioc, 0);
 202                 if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 203                         mpt3sas_base_fault_info(ioc, doorbell &
 204                             MPI2_DOORBELL_DATA_MASK);
 205                 if (rc && (doorbell & MPI2_IOC_STATE_MASK) !=
 206                     MPI2_IOC_STATE_OPERATIONAL)
 207                         return; /* don't rearm timer */
 208         }
 209
 210         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 211  rearm_timer:
 212         if (ioc->fault_reset_work_q)
 213                 queue_delayed_work(ioc->fault_reset_work_q,
 214                     &ioc->fault_reset_work,
 215                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 216         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 217 }
 218
 219 /**
 220  * mpt3sas_base_start_watchdog - start the fault_reset_work_q
 221  * @ioc: per adapter object
 222  * Context: sleep.
 223  *
 224  * Return nothing.
 225  */
 226 void
 227 mpt3sas_base_start_watchdog(struct MPT3SAS_ADAPTER *ioc)
 228 {
 229         unsigned long    flags;
 230
 231         if (ioc->fault_reset_work_q)
 232                 return;
 233
 234         /* initialize fault polling */
 235
 236         INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
 237         snprintf(ioc->fault_reset_work_q_name,
 238             sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
 239         ioc->fault_reset_work_q =
 240                 create_singlethread_workqueue(ioc->fault_reset_work_q_name);
 241         if (!ioc->fault_reset_work_q) {
 242                 pr_err(MPT3SAS_FMT "%s: failed (line=%d)\n",
 243                     ioc->name, __func__, __LINE__);
 244                         return;
 245         }
 246         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 247         if (ioc->fault_reset_work_q)
 248                 queue_delayed_work(ioc->fault_reset_work_q,
 249                     &ioc->fault_reset_work,
 250                     msecs_to_jiffies(FAULT_POLLING_INTERVAL));
 251         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 252 }
 253
 254 /**
 255  * mpt3sas_base_stop_watchdog - stop the fault_reset_work_q
 256  * @ioc: per adapter object
 257  * Context: sleep.
 258  *
 259  * Return nothing.
 260  */
 261 void
 262 mpt3sas_base_stop_watchdog(struct MPT3SAS_ADAPTER *ioc)
 263 {
 264         unsigned long flags;
 265         struct workqueue_struct *wq;
 266
 267         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
 268         wq = ioc->fault_reset_work_q;
 269         ioc->fault_reset_work_q = NULL;
 270         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
 271         if (wq) {
 272                 if (!cancel_delayed_work_sync(&ioc->fault_reset_work))
 273                         flush_workqueue(wq);
 274                 destroy_workqueue(wq);
 275         }
 276 }
 277
 278 /**
 279  * mpt3sas_base_fault_info - verbose translation of firmware FAULT code
 280  * @ioc: per adapter object
 281  * @fault_code: fault code
 282  *
 283  * Return nothing.
 284  */
 285 void
 286 mpt3sas_base_fault_info(struct MPT3SAS_ADAPTER *ioc , u16 fault_code)
 287 {
 288         pr_err(MPT3SAS_FMT "fault_state(0x%04x)!\n",
 289             ioc->name, fault_code);
 290 }
 291
 292 /**
 293  * mpt3sas_halt_firmware - halt's mpt controller firmware
 294  * @ioc: per adapter object
 295  *
 296  * For debugging timeout related issues.  Writing 0xCOFFEE00
 297  * to the doorbell register will halt controller firmware. With
 298  * the purpose to stop both driver and firmware, the enduser can
 299  * obtain a ring buffer from controller UART.
 300  */
 301 void
 302 mpt3sas_halt_firmware(struct MPT3SAS_ADAPTER *ioc)
 303 {
 304         u32 doorbell;
 305
 306         if (!ioc->fwfault_debug)
 307                 return;
 308
 309         dump_stack();
 310
 311         doorbell = readl(&ioc->chip->Doorbell);
 312         if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
 313                 mpt3sas_base_fault_info(ioc , doorbell);
 314         else {
 315                 writel(0xC0FFEE00, &ioc->chip->Doorbell);
 316                 pr_err(MPT3SAS_FMT "Firmware is halted due to command timeout\n",
 317                         ioc->name);
 318         }
 319
 320         if (ioc->fwfault_debug == 2)
 321                 for (;;)
 322                         ;
 323         else
 324                 panic("panic in %s\n", __func__);
 325 }
 326
 327 /**
 328  * _base_sas_ioc_info - verbose translation of the ioc status
 329  * @ioc: per adapter object
 330  * @mpi_reply: reply mf payload returned from firmware
 331  * @request_hdr: request mf
 332  *
 333  * Return nothing.
 334  */
 335 static void
 336 _base_sas_ioc_info(struct MPT3SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
 337         MPI2RequestHeader_t *request_hdr)
 338 {
 339         u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
 340             MPI2_IOCSTATUS_MASK;
 341         char *desc = NULL;
 342         u16 frame_sz;
 343         char *func_str = NULL;
 344
 345         /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
 346         if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
 347             request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
 348             request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
 349                 return;
 350
 351         if (ioc_status == MPI2_IOCSTATUS_CONFIG_INVALID_PAGE)
 352                 return;
 353
 354         switch (ioc_status) {
 355
 356 /****************************************************************************
 357 *  Common IOCStatus values for all replies
 358 ****************************************************************************/
 359
 360         case MPI2_IOCSTATUS_INVALID_FUNCTION:
 361                 desc = "invalid function";
 362                 break;
 363         case MPI2_IOCSTATUS_BUSY:
 364                 desc = "busy";
 365                 break;
 366         case MPI2_IOCSTATUS_INVALID_SGL:
 367                 desc = "invalid sgl";
 368                 break;
 369         case MPI2_IOCSTATUS_INTERNAL_ERROR:
 370                 desc = "internal error";
 371                 break;
 372         case MPI2_IOCSTATUS_INVALID_VPID:
 373                 desc = "invalid vpid";
 374                 break;
 375         case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
 376                 desc = "insufficient resources";
 377                 break;
 378         case MPI2_IOCSTATUS_INVALID_FIELD:
 379                 desc = "invalid field";
 380                 break;
 381         case MPI2_IOCSTATUS_INVALID_STATE:
 382                 desc = "invalid state";
 383                 break;
 384         case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
 385                 desc = "op state not supported";
 386                 break;
 387
 388 /****************************************************************************
 389 *  Config IOCStatus values
 390 ****************************************************************************/
 391
 392         case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
 393                 desc = "config invalid action";
 394                 break;
 395         case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
 396                 desc = "config invalid type";
 397                 break;
 398         case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
 399                 desc = "config invalid page";
 400                 break;
 401         case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
 402                 desc = "config invalid data";
 403                 break;
 404         case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
 405                 desc = "config no defaults";
 406                 break;
 407         case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
 408                 desc = "config cant commit";
 409                 break;
 410
 411 /****************************************************************************
 412 *  SCSI IO Reply
 413 ****************************************************************************/
 414
 415         case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
 416         case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
 417         case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
 418         case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
 419         case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
 420         case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
 421         case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
 422         case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
 423         case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
 424         case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
 425         case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
 426         case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
 427                 break;
 428
 429 /****************************************************************************
 430 *  For use by SCSI Initiator and SCSI Target end-to-end data protection
 431 ****************************************************************************/
 432
 433         case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
 434                 desc = "eedp guard error";
 435                 break;
 436         case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
 437                 desc = "eedp ref tag error";
 438                 break;
 439         case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
 440                 desc = "eedp app tag error";
 441                 break;
 442
 443 /****************************************************************************
 444 *  SCSI Target values
 445 ****************************************************************************/
 446
 447         case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
 448                 desc = "target invalid io index";
 449                 break;
 450         case MPI2_IOCSTATUS_TARGET_ABORTED:
 451                 desc = "target aborted";
 452                 break;
 453         case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
 454                 desc = "target no conn retryable";
 455                 break;
 456         case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
 457                 desc = "target no connection";
 458                 break;
 459         case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
 460                 desc = "target xfer count mismatch";
 461                 break;
 462         case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
 463                 desc = "target data offset error";
 464                 break;
 465         case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
 466                 desc = "target too much write data";
 467                 break;
 468         case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
 469                 desc = "target iu too short";
 470                 break;
 471         case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
 472                 desc = "target ack nak timeout";
 473                 break;
 474         case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
 475                 desc = "target nak received";
 476                 break;
 477
 478 /****************************************************************************
 479 *  Serial Attached SCSI values
 480 ****************************************************************************/
 481
 482         case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
 483                 desc = "smp request failed";
 484                 break;
 485         case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
 486                 desc = "smp data overrun";
 487                 break;
 488
 489 /****************************************************************************
 490 *  Diagnostic Buffer Post / Diagnostic Release values
 491 ****************************************************************************/
 492
 493         case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
 494                 desc = "diagnostic released";
 495                 break;
 496         default:
 497                 break;
 498         }
 499
 500         if (!desc)
 501                 return;
 502
 503         switch (request_hdr->Function) {
 504         case MPI2_FUNCTION_CONFIG:
 505                 frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
 506                 func_str = "config_page";
 507                 break;
 508         case MPI2_FUNCTION_SCSI_TASK_MGMT:
 509                 frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
 510                 func_str = "task_mgmt";
 511                 break;
 512         case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
 513                 frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
 514                 func_str = "sas_iounit_ctl";
 515                 break;
 516         case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
 517                 frame_sz = sizeof(Mpi2SepRequest_t);
 518                 func_str = "enclosure";
 519                 break;
 520         case MPI2_FUNCTION_IOC_INIT:
 521                 frame_sz = sizeof(Mpi2IOCInitRequest_t);
 522                 func_str = "ioc_init";
 523                 break;
 524         case MPI2_FUNCTION_PORT_ENABLE:
 525                 frame_sz = sizeof(Mpi2PortEnableRequest_t);
 526                 func_str = "port_enable";
 527                 break;
 528         case MPI2_FUNCTION_SMP_PASSTHROUGH:
 529                 frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
 530                 func_str = "smp_passthru";
 531                 break;
 532         default:
 533                 frame_sz = 32;
 534                 func_str = "unknown";
 535                 break;
 536         }
 537
 538         pr_warn(MPT3SAS_FMT "ioc_status: %s(0x%04x), request(0x%p),(%s)\n",
 539                 ioc->name, desc, ioc_status, request_hdr, func_str);
 540
 541         _debug_dump_mf(request_hdr, frame_sz/4);
 542 }
 543
 544 /**
 545  * _base_display_event_data - verbose translation of firmware asyn events
 546  * @ioc: per adapter object
 547  * @mpi_reply: reply mf payload returned from firmware
 548  *
 549  * Return nothing.
 550  */
 551 static void
 552 _base_display_event_data(struct MPT3SAS_ADAPTER *ioc,
 553         Mpi2EventNotificationReply_t *mpi_reply)
 554 {
 555         char *desc = NULL;
 556         u16 event;
 557
 558         if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
 559                 return;
 560
 561         event = le16_to_cpu(mpi_reply->Event);
 562
 563         switch (event) {
 564         case MPI2_EVENT_LOG_DATA:
 565                 desc = "Log Data";
 566                 break;
 567         case MPI2_EVENT_STATE_CHANGE:
 568                 desc = "Status Change";
 569                 break;
 570         case MPI2_EVENT_HARD_RESET_RECEIVED:
 571                 desc = "Hard Reset Received";
 572                 break;
 573         case MPI2_EVENT_EVENT_CHANGE:
 574                 desc = "Event Change";
 575                 break;
 576         case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
 577                 desc = "Device Status Change";
 578                 break;
 579         case MPI2_EVENT_IR_OPERATION_STATUS:
 580                 desc = "IR Operation Status";
 581                 break;
 582         case MPI2_EVENT_SAS_DISCOVERY:
 583         {
 584                 Mpi2EventDataSasDiscovery_t *event_data =
 585                     (Mpi2EventDataSasDiscovery_t *)mpi_reply->EventData;
 586                 pr_info(MPT3SAS_FMT "Discovery: (%s)", ioc->name,
 587                     (event_data->ReasonCode == MPI2_EVENT_SAS_DISC_RC_STARTED) ?
 588                     "start" : "stop");
 589                 if (event_data->DiscoveryStatus)
 590                         pr_info("discovery_status(0x%08x)",
 591                             le32_to_cpu(event_data->DiscoveryStatus));
 592                         pr_info("\n");
 593                 return;
 594         }
 595         case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
 596                 desc = "SAS Broadcast Primitive";
 597                 break;
 598         case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
 599                 desc = "SAS Init Device Status Change";
 600                 break;
 601         case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
 602                 desc = "SAS Init Table Overflow";
 603                 break;
 604         case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
 605                 desc = "SAS Topology Change List";
 606                 break;
 607         case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
 608                 desc = "SAS Enclosure Device Status Change";
 609                 break;
 610         case MPI2_EVENT_IR_VOLUME:
 611                 desc = "IR Volume";
 612                 break;
 613         case MPI2_EVENT_IR_PHYSICAL_DISK:
 614                 desc = "IR Physical Disk";
 615                 break;
 616         case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
 617                 desc = "IR Configuration Change List";
 618                 break;
 619         case MPI2_EVENT_LOG_ENTRY_ADDED:
 620                 desc = "Log Entry Added";
 621                 break;
 622         case MPI2_EVENT_TEMP_THRESHOLD:
 623                 desc = "Temperature Threshold";
 624                 break;
 625         }
 626
 627         if (!desc)
 628                 return;
 629
 630         pr_info(MPT3SAS_FMT "%s\n", ioc->name, desc);
 631 }
 632
 633 /**
 634  * _base_sas_log_info - verbose translation of firmware log info
 635  * @ioc: per adapter object
 636  * @log_info: log info
 637  *
 638  * Return nothing.
 639  */
 640 static void
 641 _base_sas_log_info(struct MPT3SAS_ADAPTER *ioc , u32 log_info)
 642 {
 643         union loginfo_type {
 644                 u32     loginfo;
 645                 struct {
 646                         u32     subcode:16;
 647                         u32     code:8;
 648                         u32     originator:4;
 649                         u32     bus_type:4;
 650                 } dw;
 651         };
 652         union loginfo_type sas_loginfo;
 653         char *originator_str = NULL;
 654
 655         sas_loginfo.loginfo = log_info;
 656         if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
 657                 return;
 658
 659         /* each nexus loss loginfo */
 660         if (log_info == 0x31170000)
 661                 return;
 662
 663         /* eat the loginfos associated with task aborts */
 664         if (ioc->ignore_loginfos && (log_info == 0x30050000 || log_info ==
 665             0x31140000 || log_info == 0x31130000))
 666                 return;
 667
 668         switch (sas_loginfo.dw.originator) {
 669         case 0:
 670                 originator_str = "IOP";
 671                 break;
 672         case 1:
 673                 originator_str = "PL";
 674                 break;
 675         case 2:
 676                 originator_str = "IR";
 677                 break;
 678         }
 679
 680         pr_warn(MPT3SAS_FMT
 681                 "log_info(0x%08x): originator(%s), code(0x%02x), sub_code(0x%04x)\n",
 682                 ioc->name, log_info,
 683              originator_str, sas_loginfo.dw.code,
 684              sas_loginfo.dw.subcode);
 685 }
 686
 687 /**
 688  * _base_display_reply_info -
 689  * @ioc: per adapter object
 690  * @smid: system request message index
 691  * @msix_index: MSIX table index supplied by the OS
 692  * @reply: reply message frame(lower 32bit addr)
 693  *
 694  * Return nothing.
 695  */
 696 static void
 697 _base_display_reply_info(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 698         u32 reply)
 699 {
 700         MPI2DefaultReply_t *mpi_reply;
 701         u16 ioc_status;
 702         u32 loginfo = 0;
 703
 704         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 705         if (unlikely(!mpi_reply)) {
 706                 pr_err(MPT3SAS_FMT "mpi_reply not valid at %s:%d/%s()!\n",
 707                     ioc->name, __FILE__, __LINE__, __func__);
 708                 return;
 709         }
 710         ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
 711
 712         if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
 713             (ioc->logging_level & MPT_DEBUG_REPLY)) {
 714                 _base_sas_ioc_info(ioc , mpi_reply,
 715                    mpt3sas_base_get_msg_frame(ioc, smid));
 716         }
 717
 718         if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE) {
 719                 loginfo = le32_to_cpu(mpi_reply->IOCLogInfo);
 720                 _base_sas_log_info(ioc, loginfo);
 721         }
 722
 723         if (ioc_status || loginfo) {
 724                 ioc_status &= MPI2_IOCSTATUS_MASK;
 725                 mpt3sas_trigger_mpi(ioc, ioc_status, loginfo);
 726         }
 727 }
 728
 729 /**
 730  * mpt3sas_base_done - base internal command completion routine
 731  * @ioc: per adapter object
 732  * @smid: system request message index
 733  * @msix_index: MSIX table index supplied by the OS
 734  * @reply: reply message frame(lower 32bit addr)
 735  *
 736  * Return 1 meaning mf should be freed from _base_interrupt
 737  *        0 means the mf is freed from this function.
 738  */
 739 u8
 740 mpt3sas_base_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
 741         u32 reply)
 742 {
 743         MPI2DefaultReply_t *mpi_reply;
 744
 745         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 746         if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
 747                 return 1;
 748
 749         if (ioc->base_cmds.status == MPT3_CMD_NOT_USED)
 750                 return 1;
 751
 752         ioc->base_cmds.status |= MPT3_CMD_COMPLETE;
 753         if (mpi_reply) {
 754                 ioc->base_cmds.status |= MPT3_CMD_REPLY_VALID;
 755                 memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
 756         }
 757         ioc->base_cmds.status &= ~MPT3_CMD_PENDING;
 758
 759         complete(&ioc->base_cmds.done);
 760         return 1;
 761 }
 762
 763 /**
 764  * _base_async_event - main callback handler for firmware asyn events
 765  * @ioc: per adapter object
 766  * @msix_index: MSIX table index supplied by the OS
 767  * @reply: reply message frame(lower 32bit addr)
 768  *
 769  * Return 1 meaning mf should be freed from _base_interrupt
 770  *        0 means the mf is freed from this function.
 771  */
 772 static u8
 773 _base_async_event(struct MPT3SAS_ADAPTER *ioc, u8 msix_index, u32 reply)
 774 {
 775         Mpi2EventNotificationReply_t *mpi_reply;
 776         Mpi2EventAckRequest_t *ack_request;
 777         u16 smid;
 778
 779         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
 780         if (!mpi_reply)
 781                 return 1;
 782         if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
 783                 return 1;
 784
 785         _base_display_event_data(ioc, mpi_reply);
 786
 787         if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
 788                 goto out;
 789         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
 790         if (!smid) {
 791                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
 792                     ioc->name, __func__);
 793                 goto out;
 794         }
 795
 796         ack_request = mpt3sas_base_get_msg_frame(ioc, smid);
 797         memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
 798         ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
 799         ack_request->Event = mpi_reply->Event;
 800         ack_request->EventContext = mpi_reply->EventContext;
 801         ack_request->VF_ID = 0;  /* TODO */
 802         ack_request->VP_ID = 0;
 803         mpt3sas_base_put_smid_default(ioc, smid);
 804
 805  out:
 806
 807         /* scsih callback handler */
 808         mpt3sas_scsih_event_callback(ioc, msix_index, reply);
 809
 810         /* ctl callback handler */
 811         mpt3sas_ctl_event_callback(ioc, msix_index, reply);
 812
 813         return 1;
 814 }
 815
 816 /**
 817  * _base_get_cb_idx - obtain the callback index
 818  * @ioc: per adapter object
 819  * @smid: system request message index
 820  *
 821  * Return callback index.
 822  */
 823 static u8
 824 _base_get_cb_idx(struct MPT3SAS_ADAPTER *ioc, u16 smid)
 825 {
 826         int i;
 827         u8 cb_idx;
 828
 829         if (smid < ioc->hi_priority_smid) {
 830                 i = smid - 1;
 831                 cb_idx = ioc->scsi_lookup[i].cb_idx;
 832         } else if (smid < ioc->internal_smid) {
 833                 i = smid - ioc->hi_priority_smid;
 834                 cb_idx = ioc->hpr_lookup[i].cb_idx;
 835         } else if (smid <= ioc->hba_queue_depth) {
 836                 i = smid - ioc->internal_smid;
 837                 cb_idx = ioc->internal_lookup[i].cb_idx;
 838         } else
 839                 cb_idx = 0xFF;
 840         return cb_idx;
 841 }
 842
 843 /**
 844  * _base_mask_interrupts - disable interrupts
 845  * @ioc: per adapter object
 846  *
 847  * Disabling ResetIRQ, Reply and Doorbell Interrupts
 848  *
 849  * Return nothing.
 850  */
 851 static void
 852 _base_mask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 853 {
 854         u32 him_register;
 855
 856         ioc->mask_interrupts = 1;
 857         him_register = readl(&ioc->chip->HostInterruptMask);
 858         him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
 859         writel(him_register, &ioc->chip->HostInterruptMask);
 860         readl(&ioc->chip->HostInterruptMask);
 861 }
 862
 863 /**
 864  * _base_unmask_interrupts - enable interrupts
 865  * @ioc: per adapter object
 866  *
 867  * Enabling only Reply Interrupts
 868  *
 869  * Return nothing.
 870  */
 871 static void
 872 _base_unmask_interrupts(struct MPT3SAS_ADAPTER *ioc)
 873 {
 874         u32 him_register;
 875
 876         him_register = readl(&ioc->chip->HostInterruptMask);
 877         him_register &= ~MPI2_HIM_RIM;
 878         writel(him_register, &ioc->chip->HostInterruptMask);
 879         ioc->mask_interrupts = 0;
 880 }
 881
 882 union reply_descriptor {
 883         u64 word;
 884         struct {
 885                 u32 low;
 886                 u32 high;
 887         } u;
 888 };
 889
 890 /**
 891  * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
 892  * @irq: irq number (not used)
 893  * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
 894  * @r: pt_regs pointer (not used)
 895  *
 896  * Return IRQ_HANDLE if processed, else IRQ_NONE.
 897  */
 898 static irqreturn_t
 899 _base_interrupt(int irq, void *bus_id)
 900 {
 901         struct adapter_reply_queue *reply_q = bus_id;
 902         union reply_descriptor rd;
 903         u32 completed_cmds;
 904         u8 request_desript_type;
 905         u16 smid;
 906         u8 cb_idx;
 907         u32 reply;
 908         u8 msix_index = reply_q->msix_index;
 909         struct MPT3SAS_ADAPTER *ioc = reply_q->ioc;
 910         Mpi2ReplyDescriptorsUnion_t *rpf;
 911         u8 rc;
 912
 913         if (ioc->mask_interrupts)
 914                 return IRQ_NONE;
 915
 916         if (!atomic_add_unless(&reply_q->busy, 1, 1))
 917                 return IRQ_NONE;
 918
 919         rpf = &reply_q->reply_post_free[reply_q->reply_post_host_index];
 920         request_desript_type = rpf->Default.ReplyFlags
 921              & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 922         if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED) {
 923                 atomic_dec(&reply_q->busy);
 924                 return IRQ_NONE;
 925         }
 926
 927         completed_cmds = 0;
 928         cb_idx = 0xFF;
 929         do {
 930                 rd.word = le64_to_cpu(rpf->Words);
 931                 if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
 932                         goto out;
 933                 reply = 0;
 934                 smid = le16_to_cpu(rpf->Default.DescriptorTypeDependent1);
 935                 if (request_desript_type ==
 936                     MPI25_RPY_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO_SUCCESS ||
 937                     request_desript_type ==
 938                     MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
 939                         cb_idx = _base_get_cb_idx(ioc, smid);
 940                         if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 941                             (likely(mpt_callbacks[cb_idx] != NULL))) {
 942                                 rc = mpt_callbacks[cb_idx](ioc, smid,
 943                                     msix_index, 0);
 944                                 if (rc)
 945                                         mpt3sas_base_free_smid(ioc, smid);
 946                         }
 947                 } else if (request_desript_type ==
 948                     MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
 949                         reply = le32_to_cpu(
 950                             rpf->AddressReply.ReplyFrameAddress);
 951                         if (reply > ioc->reply_dma_max_address ||
 952                             reply < ioc->reply_dma_min_address)
 953                                 reply = 0;
 954                         if (smid) {
 955                                 cb_idx = _base_get_cb_idx(ioc, smid);
 956                                 if ((likely(cb_idx < MPT_MAX_CALLBACKS)) &&
 957                                     (likely(mpt_callbacks[cb_idx] != NULL))) {
 958                                         rc = mpt_callbacks[cb_idx](ioc, smid,
 959                                             msix_index, reply);
 960                                         if (reply)
 961                                                 _base_display_reply_info(ioc,
 962                                                     smid, msix_index, reply);
 963                                         if (rc)
 964                                                 mpt3sas_base_free_smid(ioc,
 965                                                     smid);
 966                                 }
 967                         } else {
 968                                 _base_async_event(ioc, msix_index, reply);
 969                         }
 970
 971                         /* reply free queue handling */
 972                         if (reply) {
 973                                 ioc->reply_free_host_index =
 974                                     (ioc->reply_free_host_index ==
 975                                     (ioc->reply_free_queue_depth - 1)) ?
 976                                     0 : ioc->reply_free_host_index + 1;
 977                                 ioc->reply_free[ioc->reply_free_host_index] =
 978                                     cpu_to_le32(reply);
 979                                 wmb();
 980                                 writel(ioc->reply_free_host_index,
 981                                     &ioc->chip->ReplyFreeHostIndex);
 982                         }
 983                 }
 984
 985                 rpf->Words = cpu_to_le64(ULLONG_MAX);
 986                 reply_q->reply_post_host_index =
 987                     (reply_q->reply_post_host_index ==
 988                     (ioc->reply_post_queue_depth - 1)) ? 0 :
 989                     reply_q->reply_post_host_index + 1;
 990                 request_desript_type =
 991                     reply_q->reply_post_free[reply_q->reply_post_host_index].
 992                     Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
 993                 completed_cmds++;
 994                 if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
 995                         goto out;
 996                 if (!reply_q->reply_post_host_index)
 997                         rpf = reply_q->reply_post_free;
 998                 else
 999                         rpf++;
1000         } while (1);
1001
1002  out:
1003
1004         if (!completed_cmds) {
1005                 atomic_dec(&reply_q->busy);
1006                 return IRQ_NONE;
1007         }
1008
1009         wmb();
1010
1011         /* Update Reply Post Host Index.
1012          * For those HBA's which support combined reply queue feature
1013          * 1. Get the correct Supplemental Reply Post Host Index Register.
1014          *    i.e. (msix_index / 8)th entry from Supplemental Reply Post Host
1015          *    Index Register address bank i.e replyPostRegisterIndex[],
1016          * 2. Then update this register with new reply host index value
1017          *    in ReplyPostIndex field and the MSIxIndex field with
1018          *    msix_index value reduced to a value between 0 and 7,
1019          *    using a modulo 8 operation. Since each Supplemental Reply Post
1020          *    Host Index Register supports 8 MSI-X vectors.
1021          *
1022          * For other HBA's just update the Reply Post Host Index register with
1023          * new reply host index value in ReplyPostIndex Field and msix_index
1024          * value in MSIxIndex field.
1025          */
1026         if (ioc->msix96_vector)
1027                 writel(reply_q->reply_post_host_index | ((msix_index  & 7) <<
1028                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1029                         ioc->replyPostRegisterIndex[msix_index/8]);
1030         else
1031                 writel(reply_q->reply_post_host_index | (msix_index <<
1032                         MPI2_RPHI_MSIX_INDEX_SHIFT),
1033                         &ioc->chip->ReplyPostHostIndex);
1034         atomic_dec(&reply_q->busy);
1035         return IRQ_HANDLED;
1036 }
1037
1038 /**
1039  * _base_is_controller_msix_enabled - is controller support muli-reply queues
1040  * @ioc: per adapter object
1041  *
1042  */
1043 static inline int
1044 _base_is_controller_msix_enabled(struct MPT3SAS_ADAPTER *ioc)
1045 {
1046         return (ioc->facts.IOCCapabilities &
1047             MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX) && ioc->msix_enable;
1048 }
1049
1050 /**
1051  * mpt3sas_base_flush_reply_queues - flushing the MSIX reply queues
1052  * @ioc: per adapter object
1053  * Context: ISR conext
1054  *
1055  * Called when a Task Management request has completed. We want
1056  * to flush the other reply queues so all the outstanding IO has been
1057  * completed back to OS before we process the TM completetion.
1058  *
1059  * Return nothing.
1060  */
1061 void
1062 mpt3sas_base_flush_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1063 {
1064         struct adapter_reply_queue *reply_q;
1065
1066         /* If MSIX capability is turned off
1067          * then multi-queues are not enabled
1068          */
1069         if (!_base_is_controller_msix_enabled(ioc))
1070                 return;
1071
1072         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1073                 if (ioc->shost_recovery)
1074                         return;
1075                 /* TMs are on msix_index == 0 */
1076                 if (reply_q->msix_index == 0)
1077                         continue;
1078                 _base_interrupt(reply_q->vector, (void *)reply_q);
1079         }
1080 }
1081
1082 /**
1083  * mpt3sas_base_release_callback_handler - clear interrupt callback handler
1084  * @cb_idx: callback index
1085  *
1086  * Return nothing.
1087  */
1088 void
1089 mpt3sas_base_release_callback_handler(u8 cb_idx)
1090 {
1091         mpt_callbacks[cb_idx] = NULL;
1092 }
1093
1094 /**
1095  * mpt3sas_base_register_callback_handler - obtain index for the interrupt callback handler
1096  * @cb_func: callback function
1097  *
1098  * Returns cb_func.
1099  */
1100 u8
1101 mpt3sas_base_register_callback_handler(MPT_CALLBACK cb_func)
1102 {
1103         u8 cb_idx;
1104
1105         for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
1106                 if (mpt_callbacks[cb_idx] == NULL)
1107                         break;
1108
1109         mpt_callbacks[cb_idx] = cb_func;
1110         return cb_idx;
1111 }
1112
1113 /**
1114  * mpt3sas_base_initialize_callback_handler - initialize the interrupt callback handler
1115  *
1116  * Return nothing.
1117  */
1118 void
1119 mpt3sas_base_initialize_callback_handler(void)
1120 {
1121         u8 cb_idx;
1122
1123         for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
1124                 mpt3sas_base_release_callback_handler(cb_idx);
1125 }
1126
1127
1128 /**
1129  * _base_build_zero_len_sge - build zero length sg entry
1130  * @ioc: per adapter object
1131  * @paddr: virtual address for SGE
1132  *
1133  * Create a zero length scatter gather entry to insure the IOCs hardware has
1134  * something to use if the target device goes brain dead and tries
1135  * to send data even when none is asked for.
1136  *
1137  * Return nothing.
1138  */
1139 static void
1140 _base_build_zero_len_sge(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1141 {
1142         u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
1143             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
1144             MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
1145             MPI2_SGE_FLAGS_SHIFT);
1146         ioc->base_add_sg_single(paddr, flags_length, -1);
1147 }
1148
1149 /**
1150  * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
1151  * @paddr: virtual address for SGE
1152  * @flags_length: SGE flags and data transfer length
1153  * @dma_addr: Physical address
1154  *
1155  * Return nothing.
1156  */
1157 static void
1158 _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1159 {
1160         Mpi2SGESimple32_t *sgel = paddr;
1161
1162         flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
1163             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1164         sgel->FlagsLength = cpu_to_le32(flags_length);
1165         sgel->Address = cpu_to_le32(dma_addr);
1166 }
1167
1168
1169 /**
1170  * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
1171  * @paddr: virtual address for SGE
1172  * @flags_length: SGE flags and data transfer length
1173  * @dma_addr: Physical address
1174  *
1175  * Return nothing.
1176  */
1177 static void
1178 _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
1179 {
1180         Mpi2SGESimple64_t *sgel = paddr;
1181
1182         flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
1183             MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
1184         sgel->FlagsLength = cpu_to_le32(flags_length);
1185         sgel->Address = cpu_to_le64(dma_addr);
1186 }
1187
1188 /**
1189  * _base_get_chain_buffer_tracker - obtain chain tracker
1190  * @ioc: per adapter object
1191  * @smid: smid associated to an IO request
1192  *
1193  * Returns chain tracker(from ioc->free_chain_list)
1194  */
1195 static struct chain_tracker *
1196 _base_get_chain_buffer_tracker(struct MPT3SAS_ADAPTER *ioc, u16 smid)
1197 {
1198         struct chain_tracker *chain_req;
1199         unsigned long flags;
1200
1201         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
1202         if (list_empty(&ioc->free_chain_list)) {
1203                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1204                 dfailprintk(ioc, pr_warn(MPT3SAS_FMT
1205                         "chain buffers not available\n", ioc->name));
1206                 return NULL;
1207         }
1208         chain_req = list_entry(ioc->free_chain_list.next,
1209             struct chain_tracker, tracker_list);
1210         list_del_init(&chain_req->tracker_list);
1211         list_add_tail(&chain_req->tracker_list,
1212             &ioc->scsi_lookup[smid - 1].chain_list);
1213         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
1214         return chain_req;
1215 }
1216
1217
1218 /**
1219  * _base_build_sg - build generic sg
1220  * @ioc: per adapter object
1221  * @psge: virtual address for SGE
1222  * @data_out_dma: physical address for WRITES
1223  * @data_out_sz: data xfer size for WRITES
1224  * @data_in_dma: physical address for READS
1225  * @data_in_sz: data xfer size for READS
1226  *
1227  * Return nothing.
1228  */
1229 static void
1230 _base_build_sg(struct MPT3SAS_ADAPTER *ioc, void *psge,
1231         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1232         size_t data_in_sz)
1233 {
1234         u32 sgl_flags;
1235
1236         if (!data_out_sz && !data_in_sz) {
1237                 _base_build_zero_len_sge(ioc, psge);
1238                 return;
1239         }
1240
1241         if (data_out_sz && data_in_sz) {
1242                 /* WRITE sgel first */
1243                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1244                     MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_HOST_TO_IOC);
1245                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1246                 ioc->base_add_sg_single(psge, sgl_flags |
1247                     data_out_sz, data_out_dma);
1248
1249                 /* incr sgel */
1250                 psge += ioc->sge_size;
1251
1252                 /* READ sgel last */
1253                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1254                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1255                     MPI2_SGE_FLAGS_END_OF_LIST);
1256                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1257                 ioc->base_add_sg_single(psge, sgl_flags |
1258                     data_in_sz, data_in_dma);
1259         } else if (data_out_sz) /* WRITE */ {
1260                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1261                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1262                     MPI2_SGE_FLAGS_END_OF_LIST | MPI2_SGE_FLAGS_HOST_TO_IOC);
1263                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1264                 ioc->base_add_sg_single(psge, sgl_flags |
1265                     data_out_sz, data_out_dma);
1266         } else if (data_in_sz) /* READ */ {
1267                 sgl_flags = (MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
1268                     MPI2_SGE_FLAGS_LAST_ELEMENT | MPI2_SGE_FLAGS_END_OF_BUFFER |
1269                     MPI2_SGE_FLAGS_END_OF_LIST);
1270                 sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1271                 ioc->base_add_sg_single(psge, sgl_flags |
1272                     data_in_sz, data_in_dma);
1273         }
1274 }
1275
1276 /* IEEE format sgls */
1277
1278 /**
1279  * _base_add_sg_single_ieee - add sg element for IEEE format
1280  * @paddr: virtual address for SGE
1281  * @flags: SGE flags
1282  * @chain_offset: number of 128 byte elements from start of segment
1283  * @length: data transfer length
1284  * @dma_addr: Physical address
1285  *
1286  * Return nothing.
1287  */
1288 static void
1289 _base_add_sg_single_ieee(void *paddr, u8 flags, u8 chain_offset, u32 length,
1290         dma_addr_t dma_addr)
1291 {
1292         Mpi25IeeeSgeChain64_t *sgel = paddr;
1293
1294         sgel->Flags = flags;
1295         sgel->NextChainOffset = chain_offset;
1296         sgel->Length = cpu_to_le32(length);
1297         sgel->Address = cpu_to_le64(dma_addr);
1298 }
1299
1300 /**
1301  * _base_build_zero_len_sge_ieee - build zero length sg entry for IEEE format
1302  * @ioc: per adapter object
1303  * @paddr: virtual address for SGE
1304  *
1305  * Create a zero length scatter gather entry to insure the IOCs hardware has
1306  * something to use if the target device goes brain dead and tries
1307  * to send data even when none is asked for.
1308  *
1309  * Return nothing.
1310  */
1311 static void
1312 _base_build_zero_len_sge_ieee(struct MPT3SAS_ADAPTER *ioc, void *paddr)
1313 {
1314         u8 sgl_flags = (MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1315                 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR |
1316                 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
1317         _base_add_sg_single_ieee(paddr, sgl_flags, 0, 0, -1);
1318 }
1319
1320 /**
1321  * _base_build_sg_scmd - main sg creation routine
1322  * @ioc: per adapter object
1323  * @scmd: scsi command
1324  * @smid: system request message index
1325  * Context: none.
1326  *
1327  * The main routine that builds scatter gather table from a given
1328  * scsi request sent via the .queuecommand main handler.
1329  *
1330  * Returns 0 success, anything else error
1331  */
1332 static int
1333 _base_build_sg_scmd(struct MPT3SAS_ADAPTER *ioc,
1334                 struct scsi_cmnd *scmd, u16 smid)
1335 {
1336         Mpi2SCSIIORequest_t *mpi_request;
1337         dma_addr_t chain_dma;
1338         struct scatterlist *sg_scmd;
1339         void *sg_local, *chain;
1340         u32 chain_offset;
1341         u32 chain_length;
1342         u32 chain_flags;
1343         int sges_left;
1344         u32 sges_in_segment;
1345         u32 sgl_flags;
1346         u32 sgl_flags_last_element;
1347         u32 sgl_flags_end_buffer;
1348         struct chain_tracker *chain_req;
1349
1350         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1351
1352         /* init scatter gather flags */
1353         sgl_flags = MPI2_SGE_FLAGS_SIMPLE_ELEMENT;
1354         if (scmd->sc_data_direction == DMA_TO_DEVICE)
1355                 sgl_flags |= MPI2_SGE_FLAGS_HOST_TO_IOC;
1356         sgl_flags_last_element = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT)
1357             << MPI2_SGE_FLAGS_SHIFT;
1358         sgl_flags_end_buffer = (sgl_flags | MPI2_SGE_FLAGS_LAST_ELEMENT |
1359             MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST)
1360             << MPI2_SGE_FLAGS_SHIFT;
1361         sgl_flags = sgl_flags << MPI2_SGE_FLAGS_SHIFT;
1362
1363         sg_scmd = scsi_sglist(scmd);
1364         sges_left = scsi_dma_map(scmd);
1365         if (sges_left < 0) {
1366                 sdev_printk(KERN_ERR, scmd->device,
1367                  "pci_map_sg failed: request for %d bytes!\n",
1368                  scsi_bufflen(scmd));
1369                 return -ENOMEM;
1370         }
1371
1372         sg_local = &mpi_request->SGL;
1373         sges_in_segment = ioc->max_sges_in_main_message;
1374         if (sges_left <= sges_in_segment)
1375                 goto fill_in_last_segment;
1376
1377         mpi_request->ChainOffset = (offsetof(Mpi2SCSIIORequest_t, SGL) +
1378             (sges_in_segment * ioc->sge_size))/4;
1379
1380         /* fill in main message segment when there is a chain following */
1381         while (sges_in_segment) {
1382                 if (sges_in_segment == 1)
1383                         ioc->base_add_sg_single(sg_local,
1384                             sgl_flags_last_element | sg_dma_len(sg_scmd),
1385                             sg_dma_address(sg_scmd));
1386                 else
1387                         ioc->base_add_sg_single(sg_local, sgl_flags |
1388                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1389                 sg_scmd = sg_next(sg_scmd);
1390                 sg_local += ioc->sge_size;
1391                 sges_left--;
1392                 sges_in_segment--;
1393         }
1394
1395         /* initializing the chain flags and pointers */
1396         chain_flags = MPI2_SGE_FLAGS_CHAIN_ELEMENT << MPI2_SGE_FLAGS_SHIFT;
1397         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1398         if (!chain_req)
1399                 return -1;
1400         chain = chain_req->chain_buffer;
1401         chain_dma = chain_req->chain_buffer_dma;
1402         do {
1403                 sges_in_segment = (sges_left <=
1404                     ioc->max_sges_in_chain_message) ? sges_left :
1405                     ioc->max_sges_in_chain_message;
1406                 chain_offset = (sges_left == sges_in_segment) ?
1407                     0 : (sges_in_segment * ioc->sge_size)/4;
1408                 chain_length = sges_in_segment * ioc->sge_size;
1409                 if (chain_offset) {
1410                         chain_offset = chain_offset <<
1411                             MPI2_SGE_CHAIN_OFFSET_SHIFT;
1412                         chain_length += ioc->sge_size;
1413                 }
1414                 ioc->base_add_sg_single(sg_local, chain_flags | chain_offset |
1415                     chain_length, chain_dma);
1416                 sg_local = chain;
1417                 if (!chain_offset)
1418                         goto fill_in_last_segment;
1419
1420                 /* fill in chain segments */
1421                 while (sges_in_segment) {
1422                         if (sges_in_segment == 1)
1423                                 ioc->base_add_sg_single(sg_local,
1424                                     sgl_flags_last_element |
1425                                     sg_dma_len(sg_scmd),
1426                                     sg_dma_address(sg_scmd));
1427                         else
1428                                 ioc->base_add_sg_single(sg_local, sgl_flags |
1429                                     sg_dma_len(sg_scmd),
1430                                     sg_dma_address(sg_scmd));
1431                         sg_scmd = sg_next(sg_scmd);
1432                         sg_local += ioc->sge_size;
1433                         sges_left--;
1434                         sges_in_segment--;
1435                 }
1436
1437                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1438                 if (!chain_req)
1439                         return -1;
1440                 chain = chain_req->chain_buffer;
1441                 chain_dma = chain_req->chain_buffer_dma;
1442         } while (1);
1443
1444
1445  fill_in_last_segment:
1446
1447         /* fill the last segment */
1448         while (sges_left) {
1449                 if (sges_left == 1)
1450                         ioc->base_add_sg_single(sg_local, sgl_flags_end_buffer |
1451                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1452                 else
1453                         ioc->base_add_sg_single(sg_local, sgl_flags |
1454                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1455                 sg_scmd = sg_next(sg_scmd);
1456                 sg_local += ioc->sge_size;
1457                 sges_left--;
1458         }
1459
1460         return 0;
1461 }
1462
1463 /**
1464  * _base_build_sg_scmd_ieee - main sg creation routine for IEEE format
1465  * @ioc: per adapter object
1466  * @scmd: scsi command
1467  * @smid: system request message index
1468  * Context: none.
1469  *
1470  * The main routine that builds scatter gather table from a given
1471  * scsi request sent via the .queuecommand main handler.
1472  *
1473  * Returns 0 success, anything else error
1474  */
1475 static int
1476 _base_build_sg_scmd_ieee(struct MPT3SAS_ADAPTER *ioc,
1477         struct scsi_cmnd *scmd, u16 smid)
1478 {
1479         Mpi2SCSIIORequest_t *mpi_request;
1480         dma_addr_t chain_dma;
1481         struct scatterlist *sg_scmd;
1482         void *sg_local, *chain;
1483         u32 chain_offset;
1484         u32 chain_length;
1485         int sges_left;
1486         u32 sges_in_segment;
1487         u8 simple_sgl_flags;
1488         u8 simple_sgl_flags_last;
1489         u8 chain_sgl_flags;
1490         struct chain_tracker *chain_req;
1491
1492         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
1493
1494         /* init scatter gather flags */
1495         simple_sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1496             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1497         simple_sgl_flags_last = simple_sgl_flags |
1498             MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1499         chain_sgl_flags = MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
1500             MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1501
1502         sg_scmd = scsi_sglist(scmd);
1503         sges_left = scsi_dma_map(scmd);
1504         if (sges_left < 0) {
1505                 sdev_printk(KERN_ERR, scmd->device,
1506                         "pci_map_sg failed: request for %d bytes!\n",
1507                         scsi_bufflen(scmd));
1508                 return -ENOMEM;
1509         }
1510
1511         sg_local = &mpi_request->SGL;
1512         sges_in_segment = (ioc->request_sz -
1513             offsetof(Mpi2SCSIIORequest_t, SGL))/ioc->sge_size_ieee;
1514         if (sges_left <= sges_in_segment)
1515                 goto fill_in_last_segment;
1516
1517         mpi_request->ChainOffset = (sges_in_segment - 1 /* chain element */) +
1518             (offsetof(Mpi2SCSIIORequest_t, SGL)/ioc->sge_size_ieee);
1519
1520         /* fill in main message segment when there is a chain following */
1521         while (sges_in_segment > 1) {
1522                 _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1523                     sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1524                 sg_scmd = sg_next(sg_scmd);
1525                 sg_local += ioc->sge_size_ieee;
1526                 sges_left--;
1527                 sges_in_segment--;
1528         }
1529
1530         /* initializing the pointers */
1531         chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1532         if (!chain_req)
1533                 return -1;
1534         chain = chain_req->chain_buffer;
1535         chain_dma = chain_req->chain_buffer_dma;
1536         do {
1537                 sges_in_segment = (sges_left <=
1538                     ioc->max_sges_in_chain_message) ? sges_left :
1539                     ioc->max_sges_in_chain_message;
1540                 chain_offset = (sges_left == sges_in_segment) ?
1541                     0 : sges_in_segment;
1542                 chain_length = sges_in_segment * ioc->sge_size_ieee;
1543                 if (chain_offset)
1544                         chain_length += ioc->sge_size_ieee;
1545                 _base_add_sg_single_ieee(sg_local, chain_sgl_flags,
1546                     chain_offset, chain_length, chain_dma);
1547
1548                 sg_local = chain;
1549                 if (!chain_offset)
1550                         goto fill_in_last_segment;
1551
1552                 /* fill in chain segments */
1553                 while (sges_in_segment) {
1554                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1555                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1556                         sg_scmd = sg_next(sg_scmd);
1557                         sg_local += ioc->sge_size_ieee;
1558                         sges_left--;
1559                         sges_in_segment--;
1560                 }
1561
1562                 chain_req = _base_get_chain_buffer_tracker(ioc, smid);
1563                 if (!chain_req)
1564                         return -1;
1565                 chain = chain_req->chain_buffer;
1566                 chain_dma = chain_req->chain_buffer_dma;
1567         } while (1);
1568
1569
1570  fill_in_last_segment:
1571
1572         /* fill the last segment */
1573         while (sges_left > 0) {
1574                 if (sges_left == 1)
1575                         _base_add_sg_single_ieee(sg_local,
1576                             simple_sgl_flags_last, 0, sg_dma_len(sg_scmd),
1577                             sg_dma_address(sg_scmd));
1578                 else
1579                         _base_add_sg_single_ieee(sg_local, simple_sgl_flags, 0,
1580                             sg_dma_len(sg_scmd), sg_dma_address(sg_scmd));
1581                 sg_scmd = sg_next(sg_scmd);
1582                 sg_local += ioc->sge_size_ieee;
1583                 sges_left--;
1584         }
1585
1586         return 0;
1587 }
1588
1589 /**
1590  * _base_build_sg_ieee - build generic sg for IEEE format
1591  * @ioc: per adapter object
1592  * @psge: virtual address for SGE
1593  * @data_out_dma: physical address for WRITES
1594  * @data_out_sz: data xfer size for WRITES
1595  * @data_in_dma: physical address for READS
1596  * @data_in_sz: data xfer size for READS
1597  *
1598  * Return nothing.
1599  */
1600 static void
1601 _base_build_sg_ieee(struct MPT3SAS_ADAPTER *ioc, void *psge,
1602         dma_addr_t data_out_dma, size_t data_out_sz, dma_addr_t data_in_dma,
1603         size_t data_in_sz)
1604 {
1605         u8 sgl_flags;
1606
1607         if (!data_out_sz && !data_in_sz) {
1608                 _base_build_zero_len_sge_ieee(ioc, psge);
1609                 return;
1610         }
1611
1612         if (data_out_sz && data_in_sz) {
1613                 /* WRITE sgel first */
1614                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1615                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1616                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1617                     data_out_dma);
1618
1619                 /* incr sgel */
1620                 psge += ioc->sge_size_ieee;
1621
1622                 /* READ sgel last */
1623                 sgl_flags |= MPI25_IEEE_SGE_FLAGS_END_OF_LIST;
1624                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1625                     data_in_dma);
1626         } else if (data_out_sz) /* WRITE */ {
1627                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1628                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1629                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1630                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_out_sz,
1631                     data_out_dma);
1632         } else if (data_in_sz) /* READ */ {
1633                 sgl_flags = MPI2_IEEE_SGE_FLAGS_SIMPLE_ELEMENT |
1634                     MPI25_IEEE_SGE_FLAGS_END_OF_LIST |
1635                     MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
1636                 _base_add_sg_single_ieee(psge, sgl_flags, 0, data_in_sz,
1637                     data_in_dma);
1638         }
1639 }
1640
1641 #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
1642
1643 /**
1644  * _base_config_dma_addressing - set dma addressing
1645  * @ioc: per adapter object
1646  * @pdev: PCI device struct
1647  *
1648  * Returns 0 for success, non-zero for failure.
1649  */
1650 static int
1651 _base_config_dma_addressing(struct MPT3SAS_ADAPTER *ioc, struct pci_dev *pdev)
1652 {
1653         struct sysinfo s;
1654         u64 consistent_dma_mask;
1655
1656         if (ioc->dma_mask)
1657                 consistent_dma_mask = DMA_BIT_MASK(64);
1658         else
1659                 consistent_dma_mask = DMA_BIT_MASK(32);
1660
1661         if (sizeof(dma_addr_t) > 4) {
1662                 const uint64_t required_mask =
1663                     dma_get_required_mask(&pdev->dev);
1664                 if ((required_mask > DMA_BIT_MASK(32)) &&
1665                     !pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
1666                     !pci_set_consistent_dma_mask(pdev, consistent_dma_mask)) {
1667                         ioc->base_add_sg_single = &_base_add_sg_single_64;
1668                         ioc->sge_size = sizeof(Mpi2SGESimple64_t);
1669                         ioc->dma_mask = 64;
1670                         goto out;
1671                 }
1672         }
1673
1674         if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
1675             && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
1676                 ioc->base_add_sg_single = &_base_add_sg_single_32;
1677                 ioc->sge_size = sizeof(Mpi2SGESimple32_t);
1678                 ioc->dma_mask = 32;
1679         } else
1680                 return -ENODEV;
1681
1682  out:
1683         si_meminfo(&s);
1684         pr_info(MPT3SAS_FMT
1685                 "%d BIT PCI BUS DMA ADDRESSING SUPPORTED, total mem (%ld kB)\n",
1686                 ioc->name, ioc->dma_mask, convert_to_kb(s.totalram));
1687
1688         return 0;
1689 }
1690
1691 static int
1692 _base_change_consistent_dma_mask(struct MPT3SAS_ADAPTER *ioc,
1693                                       struct pci_dev *pdev)
1694 {
1695         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
1696                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)))
1697                         return -ENODEV;
1698         }
1699         return 0;
1700 }
1701
1702 /**
1703  * _base_check_enable_msix - checks MSIX capabable.
1704  * @ioc: per adapter object
1705  *
1706  * Check to see if card is capable of MSIX, and set number
1707  * of available msix vectors
1708  */
1709 static int
1710 _base_check_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1711 {
1712         int base;
1713         u16 message_control;
1714
1715         /* Check whether controller SAS2008 B0 controller,
1716          * if it is SAS2008 B0 controller use IO-APIC instead of MSIX
1717          */
1718         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 &&
1719             ioc->pdev->revision == SAS2_PCI_DEVICE_B0_REVISION) {
1720                 return -EINVAL;
1721         }
1722
1723         base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
1724         if (!base) {
1725                 dfailprintk(ioc, pr_info(MPT3SAS_FMT "msix not supported\n",
1726                         ioc->name));
1727                 return -EINVAL;
1728         }
1729
1730         /* get msix vector count */
1731         /* NUMA_IO not supported for older controllers */
1732         if (ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2004 ||
1733             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2008 ||
1734             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_1 ||
1735             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_2 ||
1736             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2108_3 ||
1737             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_1 ||
1738             ioc->pdev->device == MPI2_MFGPAGE_DEVID_SAS2116_2)
1739                 ioc->msix_vector_count = 1;
1740         else {
1741                 pci_read_config_word(ioc->pdev, base + 2, &message_control);
1742                 ioc->msix_vector_count = (message_control & 0x3FF) + 1;
1743         }
1744         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1745                 "msix is supported, vector_count(%d)\n",
1746                 ioc->name, ioc->msix_vector_count));
1747         return 0;
1748 }
1749
1750 /**
1751  * _base_free_irq - free irq
1752  * @ioc: per adapter object
1753  *
1754  * Freeing respective reply_queue from the list.
1755  */
1756 static void
1757 _base_free_irq(struct MPT3SAS_ADAPTER *ioc)
1758 {
1759         struct adapter_reply_queue *reply_q, *next;
1760
1761         if (list_empty(&ioc->reply_queue_list))
1762                 return;
1763
1764         list_for_each_entry_safe(reply_q, next, &ioc->reply_queue_list, list) {
1765                 list_del(&reply_q->list);
1766                 irq_set_affinity_hint(reply_q->vector, NULL);
1767                 free_cpumask_var(reply_q->affinity_hint);
1768                 synchronize_irq(reply_q->vector);
1769                 free_irq(reply_q->vector, reply_q);
1770                 kfree(reply_q);
1771         }
1772 }
1773
1774 /**
1775  * _base_request_irq - request irq
1776  * @ioc: per adapter object
1777  * @index: msix index into vector table
1778  * @vector: irq vector
1779  *
1780  * Inserting respective reply_queue into the list.
1781  */
1782 static int
1783 _base_request_irq(struct MPT3SAS_ADAPTER *ioc, u8 index, u32 vector)
1784 {
1785         struct adapter_reply_queue *reply_q;
1786         int r;
1787
1788         reply_q =  kzalloc(sizeof(struct adapter_reply_queue), GFP_KERNEL);
1789         if (!reply_q) {
1790                 pr_err(MPT3SAS_FMT "unable to allocate memory %d!\n",
1791                     ioc->name, (int)sizeof(struct adapter_reply_queue));
1792                 return -ENOMEM;
1793         }
1794         reply_q->ioc = ioc;
1795         reply_q->msix_index = index;
1796         reply_q->vector = vector;
1797
1798         if (!alloc_cpumask_var(&reply_q->affinity_hint, GFP_KERNEL))
1799                 return -ENOMEM;
1800         cpumask_clear(reply_q->affinity_hint);
1801
1802         atomic_set(&reply_q->busy, 0);
1803         if (ioc->msix_enable)
1804                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d-msix%d",
1805                     driver_name, ioc->id, index);
1806         else
1807                 snprintf(reply_q->name, MPT_NAME_LENGTH, "%s%d",
1808                     driver_name, ioc->id);
1809         r = request_irq(vector, _base_interrupt, IRQF_SHARED, reply_q->name,
1810             reply_q);
1811         if (r) {
1812                 pr_err(MPT3SAS_FMT "unable to allocate interrupt %d!\n",
1813                     reply_q->name, vector);
1814                 kfree(reply_q);
1815                 return -EBUSY;
1816         }
1817
1818         INIT_LIST_HEAD(&reply_q->list);
1819         list_add_tail(&reply_q->list, &ioc->reply_queue_list);
1820         return 0;
1821 }
1822
1823 /**
1824  * _base_assign_reply_queues - assigning msix index for each cpu
1825  * @ioc: per adapter object
1826  *
1827  * The enduser would need to set the affinity via /proc/irq/#/smp_affinity
1828  *
1829  * It would nice if we could call irq_set_affinity, however it is not
1830  * an exported symbol
1831  */
1832 static void
1833 _base_assign_reply_queues(struct MPT3SAS_ADAPTER *ioc)
1834 {
1835         unsigned int cpu, nr_cpus, nr_msix, index = 0;
1836         struct adapter_reply_queue *reply_q;
1837
1838         if (!_base_is_controller_msix_enabled(ioc))
1839                 return;
1840
1841         memset(ioc->cpu_msix_table, 0, ioc->cpu_msix_table_sz);
1842
1843         nr_cpus = num_online_cpus();
1844         nr_msix = ioc->reply_queue_count = min(ioc->reply_queue_count,
1845                                                ioc->facts.MaxMSIxVectors);
1846         if (!nr_msix)
1847                 return;
1848
1849         cpu = cpumask_first(cpu_online_mask);
1850
1851         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
1852
1853                 unsigned int i, group = nr_cpus / nr_msix;
1854
1855                 if (cpu >= nr_cpus)
1856                         break;
1857
1858                 if (index < nr_cpus % nr_msix)
1859                         group++;
1860
1861                 for (i = 0 ; i < group ; i++) {
1862                         ioc->cpu_msix_table[cpu] = index;
1863                         cpumask_or(reply_q->affinity_hint,
1864                                    reply_q->affinity_hint, get_cpu_mask(cpu));
1865                         cpu = cpumask_next(cpu, cpu_online_mask);
1866                 }
1867
1868                 if (irq_set_affinity_hint(reply_q->vector,
1869                                            reply_q->affinity_hint))
1870                         dinitprintk(ioc, pr_info(MPT3SAS_FMT
1871                             "error setting affinity hint for irq vector %d\n",
1872                             ioc->name, reply_q->vector));
1873                 index++;
1874         }
1875 }
1876
1877 /**
1878  * _base_disable_msix - disables msix
1879  * @ioc: per adapter object
1880  *
1881  */
1882 static void
1883 _base_disable_msix(struct MPT3SAS_ADAPTER *ioc)
1884 {
1885         if (!ioc->msix_enable)
1886                 return;
1887         pci_disable_msix(ioc->pdev);
1888         ioc->msix_enable = 0;
1889 }
1890
1891 /**
1892  * _base_enable_msix - enables msix, failback to io_apic
1893  * @ioc: per adapter object
1894  *
1895  */
1896 static int
1897 _base_enable_msix(struct MPT3SAS_ADAPTER *ioc)
1898 {
1899         struct msix_entry *entries, *a;
1900         int r;
1901         int i;
1902         u8 try_msix = 0;
1903
1904         if (msix_disable == -1 || msix_disable == 0)
1905                 try_msix = 1;
1906
1907         if (!try_msix)
1908                 goto try_ioapic;
1909
1910         if (_base_check_enable_msix(ioc) != 0)
1911                 goto try_ioapic;
1912
1913         ioc->reply_queue_count = min_t(int, ioc->cpu_count,
1914             ioc->msix_vector_count);
1915
1916         printk(MPT3SAS_FMT "MSI-X vectors supported: %d, no of cores"
1917           ": %d, max_msix_vectors: %d\n", ioc->name, ioc->msix_vector_count,
1918           ioc->cpu_count, max_msix_vectors);
1919
1920         if (!ioc->rdpq_array_enable && max_msix_vectors == -1)
1921                 max_msix_vectors = 8;
1922
1923         if (max_msix_vectors > 0) {
1924                 ioc->reply_queue_count = min_t(int, max_msix_vectors,
1925                         ioc->reply_queue_count);
1926                 ioc->msix_vector_count = ioc->reply_queue_count;
1927         } else if (max_msix_vectors == 0)
1928                 goto try_ioapic;
1929
1930         entries = kcalloc(ioc->reply_queue_count, sizeof(struct msix_entry),
1931             GFP_KERNEL);
1932         if (!entries) {
1933                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1934                         "kcalloc failed @ at %s:%d/%s() !!!\n",
1935                         ioc->name, __FILE__, __LINE__, __func__));
1936                 goto try_ioapic;
1937         }
1938
1939         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++)
1940                 a->entry = i;
1941
1942         r = pci_enable_msix_exact(ioc->pdev, entries, ioc->reply_queue_count);
1943         if (r) {
1944                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
1945                         "pci_enable_msix_exact failed (r=%d) !!!\n",
1946                         ioc->name, r));
1947                 kfree(entries);
1948                 goto try_ioapic;
1949         }
1950
1951         ioc->msix_enable = 1;
1952         for (i = 0, a = entries; i < ioc->reply_queue_count; i++, a++) {
1953                 r = _base_request_irq(ioc, i, a->vector);
1954                 if (r) {
1955                         _base_free_irq(ioc);
1956                         _base_disable_msix(ioc);
1957                         kfree(entries);
1958                         goto try_ioapic;
1959                 }
1960         }
1961
1962         kfree(entries);
1963         return 0;
1964
1965 /* failback to io_apic interrupt routing */
1966  try_ioapic:
1967
1968         ioc->reply_queue_count = 1;
1969         r = _base_request_irq(ioc, 0, ioc->pdev->irq);
1970
1971         return r;
1972 }
1973
1974 /**
1975  * mpt3sas_base_unmap_resources - free controller resources
1976  * @ioc: per adapter object
1977  */
1978 void
1979 mpt3sas_base_unmap_resources(struct MPT3SAS_ADAPTER *ioc)
1980 {
1981         struct pci_dev *pdev = ioc->pdev;
1982
1983         dexitprintk(ioc, printk(MPT3SAS_FMT "%s\n",
1984                 ioc->name, __func__));
1985
1986         _base_free_irq(ioc);
1987         _base_disable_msix(ioc);
1988
1989         if (ioc->msix96_vector)
1990                 kfree(ioc->replyPostRegisterIndex);
1991
1992         if (ioc->chip_phys) {
1993                 iounmap(ioc->chip);
1994                 ioc->chip_phys = 0;
1995         }
1996
1997         if (pci_is_enabled(pdev)) {
1998                 pci_release_selected_regions(ioc->pdev, ioc->bars);
1999                 pci_disable_pcie_error_reporting(pdev);
2000                 pci_disable_device(pdev);
2001         }
2002 }
2003
2004 /**
2005  * mpt3sas_base_map_resources - map in controller resources (io/irq/memap)
2006  * @ioc: per adapter object
2007  *
2008  * Returns 0 for success, non-zero for failure.
2009  */
2010 int
2011 mpt3sas_base_map_resources(struct MPT3SAS_ADAPTER *ioc)
2012 {
2013         struct pci_dev *pdev = ioc->pdev;
2014         u32 memap_sz;
2015         u32 pio_sz;
2016         int i, r = 0;
2017         u64 pio_chip = 0;
2018         u64 chip_phys = 0;
2019         struct adapter_reply_queue *reply_q;
2020
2021         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n",
2022             ioc->name, __func__));
2023
2024         ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
2025         if (pci_enable_device_mem(pdev)) {
2026                 pr_warn(MPT3SAS_FMT "pci_enable_device_mem: failed\n",
2027                         ioc->name);
2028                 ioc->bars = 0;
2029                 return -ENODEV;
2030         }
2031
2032
2033         if (pci_request_selected_regions(pdev, ioc->bars,
2034             driver_name)) {
2035                 pr_warn(MPT3SAS_FMT "pci_request_selected_regions: failed\n",
2036                         ioc->name);
2037                 ioc->bars = 0;
2038                 r = -ENODEV;
2039                 goto out_fail;
2040         }
2041
2042 /* AER (Advanced Error Reporting) hooks */
2043         pci_enable_pcie_error_reporting(pdev);
2044
2045         pci_set_master(pdev);
2046
2047
2048         if (_base_config_dma_addressing(ioc, pdev) != 0) {
2049                 pr_warn(MPT3SAS_FMT "no suitable DMA mask for %s\n",
2050                     ioc->name, pci_name(pdev));
2051                 r = -ENODEV;
2052                 goto out_fail;
2053         }
2054
2055         for (i = 0, memap_sz = 0, pio_sz = 0; (i < DEVICE_COUNT_RESOURCE) &&
2056              (!memap_sz || !pio_sz); i++) {
2057                 if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
2058                         if (pio_sz)
2059                                 continue;
2060                         pio_chip = (u64)pci_resource_start(pdev, i);
2061                         pio_sz = pci_resource_len(pdev, i);
2062                 } else if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
2063                         if (memap_sz)
2064                                 continue;
2065                         ioc->chip_phys = pci_resource_start(pdev, i);
2066                         chip_phys = (u64)ioc->chip_phys;
2067                         memap_sz = pci_resource_len(pdev, i);
2068                         ioc->chip = ioremap(ioc->chip_phys, memap_sz);
2069                 }
2070         }
2071
2072         if (ioc->chip == NULL) {
2073                 pr_err(MPT3SAS_FMT "unable to map adapter memory! "
2074                         " or resource not found\n", ioc->name);
2075                 r = -EINVAL;
2076                 goto out_fail;
2077         }
2078
2079         _base_mask_interrupts(ioc);
2080
2081         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
2082         if (r)
2083                 goto out_fail;
2084
2085         if (!ioc->rdpq_array_enable_assigned) {
2086                 ioc->rdpq_array_enable = ioc->rdpq_array_capable;
2087                 ioc->rdpq_array_enable_assigned = 1;
2088         }
2089
2090         r = _base_enable_msix(ioc);
2091         if (r)
2092                 goto out_fail;
2093
2094         /* Use the Combined reply queue feature only for SAS3 C0 & higher
2095          * revision HBAs and also only when reply queue count is greater than 8
2096          */
2097         if (ioc->msix96_vector && ioc->reply_queue_count > 8) {
2098                 /* Determine the Supplemental Reply Post Host Index Registers
2099                  * Addresse. Supplemental Reply Post Host Index Registers
2100                  * starts at offset MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET and
2101                  * each register is at offset bytes of
2102                  * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET from previous one.
2103                  */
2104                 ioc->replyPostRegisterIndex = kcalloc(
2105                      MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT,
2106                      sizeof(resource_size_t *), GFP_KERNEL);
2107                 if (!ioc->replyPostRegisterIndex) {
2108                         dfailprintk(ioc, printk(MPT3SAS_FMT
2109                         "allocation for reply Post Register Index failed!!!\n",
2110                                                                    ioc->name));
2111                         r = -ENOMEM;
2112                         goto out_fail;
2113                 }
2114
2115                 for (i = 0; i < MPT3_SUP_REPLY_POST_HOST_INDEX_REG_COUNT; i++) {
2116                         ioc->replyPostRegisterIndex[i] = (resource_size_t *)
2117                              ((u8 *)&ioc->chip->Doorbell +
2118                              MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET +
2119                              (i * MPT3_SUP_REPLY_POST_HOST_INDEX_REG_OFFSET));
2120                 }
2121         } else
2122                 ioc->msix96_vector = 0;
2123
2124         list_for_each_entry(reply_q, &ioc->reply_queue_list, list)
2125                 pr_info(MPT3SAS_FMT "%s: IRQ %d\n",
2126                     reply_q->name,  ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
2127                     "IO-APIC enabled"), reply_q->vector);
2128
2129         pr_info(MPT3SAS_FMT "iomem(0x%016llx), mapped(0x%p), size(%d)\n",
2130             ioc->name, (unsigned long long)chip_phys, ioc->chip, memap_sz);
2131         pr_info(MPT3SAS_FMT "ioport(0x%016llx), size(%d)\n",
2132             ioc->name, (unsigned long long)pio_chip, pio_sz);
2133
2134         /* Save PCI configuration state for recovery from PCI AER/EEH errors */
2135         pci_save_state(pdev);
2136         return 0;
2137
2138  out_fail:
2139         mpt3sas_base_unmap_resources(ioc);
2140         return r;
2141 }
2142
2143 /**
2144  * mpt3sas_base_get_msg_frame - obtain request mf pointer
2145  * @ioc: per adapter object
2146  * @smid: system request message index(smid zero is invalid)
2147  *
2148  * Returns virt pointer to message frame.
2149  */
2150 void *
2151 mpt3sas_base_get_msg_frame(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2152 {
2153         return (void *)(ioc->request + (smid * ioc->request_sz));
2154 }
2155
2156 /**
2157  * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
2158  * @ioc: per adapter object
2159  * @smid: system request message index
2160  *
2161  * Returns virt pointer to sense buffer.
2162  */
2163 void *
2164 mpt3sas_base_get_sense_buffer(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2165 {
2166         return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
2167 }
2168
2169 /**
2170  * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
2171  * @ioc: per adapter object
2172  * @smid: system request message index
2173  *
2174  * Returns phys pointer to the low 32bit address of the sense buffer.
2175  */
2176 __le32
2177 mpt3sas_base_get_sense_buffer_dma(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2178 {
2179         return cpu_to_le32(ioc->sense_dma + ((smid - 1) *
2180             SCSI_SENSE_BUFFERSIZE));
2181 }
2182
2183 /**
2184  * mpt3sas_base_get_reply_virt_addr - obtain reply frames virt address
2185  * @ioc: per adapter object
2186  * @phys_addr: lower 32 physical addr of the reply
2187  *
2188  * Converts 32bit lower physical addr into a virt address.
2189  */
2190 void *
2191 mpt3sas_base_get_reply_virt_addr(struct MPT3SAS_ADAPTER *ioc, u32 phys_addr)
2192 {
2193         if (!phys_addr)
2194                 return NULL;
2195         return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
2196 }
2197
2198 /**
2199  * mpt3sas_base_get_smid - obtain a free smid from internal queue
2200  * @ioc: per adapter object
2201  * @cb_idx: callback index
2202  *
2203  * Returns smid (zero is invalid)
2204  */
2205 u16
2206 mpt3sas_base_get_smid(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2207 {
2208         unsigned long flags;
2209         struct request_tracker *request;
2210         u16 smid;
2211
2212         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2213         if (list_empty(&ioc->internal_free_list)) {
2214                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2215                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2216                     ioc->name, __func__);
2217                 return 0;
2218         }
2219
2220         request = list_entry(ioc->internal_free_list.next,
2221             struct request_tracker, tracker_list);
2222         request->cb_idx = cb_idx;
2223         smid = request->smid;
2224         list_del(&request->tracker_list);
2225         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2226         return smid;
2227 }
2228
2229 /**
2230  * mpt3sas_base_get_smid_scsiio - obtain a free smid from scsiio queue
2231  * @ioc: per adapter object
2232  * @cb_idx: callback index
2233  * @scmd: pointer to scsi command object
2234  *
2235  * Returns smid (zero is invalid)
2236  */
2237 u16
2238 mpt3sas_base_get_smid_scsiio(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx,
2239         struct scsi_cmnd *scmd)
2240 {
2241         unsigned long flags;
2242         struct scsiio_tracker *request;
2243         u16 smid;
2244
2245         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2246         if (list_empty(&ioc->free_list)) {
2247                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2248                 pr_err(MPT3SAS_FMT "%s: smid not available\n",
2249                     ioc->name, __func__);
2250                 return 0;
2251         }
2252
2253         request = list_entry(ioc->free_list.next,
2254             struct scsiio_tracker, tracker_list);
2255         request->scmd = scmd;
2256         request->cb_idx = cb_idx;
2257         smid = request->smid;
2258         list_del(&request->tracker_list);
2259         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2260         return smid;
2261 }
2262
2263 /**
2264  * mpt3sas_base_get_smid_hpr - obtain a free smid from hi-priority queue
2265  * @ioc: per adapter object
2266  * @cb_idx: callback index
2267  *
2268  * Returns smid (zero is invalid)
2269  */
2270 u16
2271 mpt3sas_base_get_smid_hpr(struct MPT3SAS_ADAPTER *ioc, u8 cb_idx)
2272 {
2273         unsigned long flags;
2274         struct request_tracker *request;
2275         u16 smid;
2276
2277         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2278         if (list_empty(&ioc->hpr_free_list)) {
2279                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2280                 return 0;
2281         }
2282
2283         request = list_entry(ioc->hpr_free_list.next,
2284             struct request_tracker, tracker_list);
2285         request->cb_idx = cb_idx;
2286         smid = request->smid;
2287         list_del(&request->tracker_list);
2288         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2289         return smid;
2290 }
2291
2292 /**
2293  * mpt3sas_base_free_smid - put smid back on free_list
2294  * @ioc: per adapter object
2295  * @smid: system request message index
2296  *
2297  * Return nothing.
2298  */
2299 void
2300 mpt3sas_base_free_smid(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2301 {
2302         unsigned long flags;
2303         int i;
2304         struct chain_tracker *chain_req, *next;
2305
2306         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
2307         if (smid < ioc->hi_priority_smid) {
2308                 /* scsiio queue */
2309                 i = smid - 1;
2310                 if (!list_empty(&ioc->scsi_lookup[i].chain_list)) {
2311                         list_for_each_entry_safe(chain_req, next,
2312                             &ioc->scsi_lookup[i].chain_list, tracker_list) {
2313                                 list_del_init(&chain_req->tracker_list);
2314                                 list_add(&chain_req->tracker_list,
2315                                     &ioc->free_chain_list);
2316                         }
2317                 }
2318                 ioc->scsi_lookup[i].cb_idx = 0xFF;
2319                 ioc->scsi_lookup[i].scmd = NULL;
2320                 list_add(&ioc->scsi_lookup[i].tracker_list, &ioc->free_list);
2321                 spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2322
2323                 /*
2324                  * See _wait_for_commands_to_complete() call with regards
2325                  * to this code.
2326                  */
2327                 if (ioc->shost_recovery && ioc->pending_io_count) {
2328                         if (ioc->pending_io_count == 1)
2329                                 wake_up(&ioc->reset_wq);
2330                         ioc->pending_io_count--;
2331                 }
2332                 return;
2333         } else if (smid < ioc->internal_smid) {
2334                 /* hi-priority */
2335                 i = smid - ioc->hi_priority_smid;
2336                 ioc->hpr_lookup[i].cb_idx = 0xFF;
2337                 list_add(&ioc->hpr_lookup[i].tracker_list, &ioc->hpr_free_list);
2338         } else if (smid <= ioc->hba_queue_depth) {
2339                 /* internal queue */
2340                 i = smid - ioc->internal_smid;
2341                 ioc->internal_lookup[i].cb_idx = 0xFF;
2342                 list_add(&ioc->internal_lookup[i].tracker_list,
2343                     &ioc->internal_free_list);
2344         }
2345         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
2346 }
2347
2348 /**
2349  * _base_writeq - 64 bit write to MMIO
2350  * @ioc: per adapter object
2351  * @b: data payload
2352  * @addr: address in MMIO space
2353  * @writeq_lock: spin lock
2354  *
2355  * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
2356  * care of 32 bit environment where its not quarenteed to send the entire word
2357  * in one transfer.
2358  */
2359 #if defined(writeq) && defined(CONFIG_64BIT)
2360 static inline void
2361 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2362 {
2363         writeq(cpu_to_le64(b), addr);
2364 }
2365 #else
2366 static inline void
2367 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
2368 {
2369         unsigned long flags;
2370         __u64 data_out = cpu_to_le64(b);
2371
2372         spin_lock_irqsave(writeq_lock, flags);
2373         writel((u32)(data_out), addr);
2374         writel((u32)(data_out >> 32), (addr + 4));
2375         spin_unlock_irqrestore(writeq_lock, flags);
2376 }
2377 #endif
2378
2379 static inline u8
2380 _base_get_msix_index(struct MPT3SAS_ADAPTER *ioc)
2381 {
2382         return ioc->cpu_msix_table[raw_smp_processor_id()];
2383 }
2384
2385 /**
2386  * mpt3sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
2387  * @ioc: per adapter object
2388  * @smid: system request message index
2389  * @handle: device handle
2390  *
2391  * Return nothing.
2392  */
2393 void
2394 mpt3sas_base_put_smid_scsi_io(struct MPT3SAS_ADAPTER *ioc, u16 smid, u16 handle)
2395 {
2396         Mpi2RequestDescriptorUnion_t descriptor;
2397         u64 *request = (u64 *)&descriptor;
2398
2399
2400         descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
2401         descriptor.SCSIIO.MSIxIndex =  _base_get_msix_index(ioc);
2402         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2403         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2404         descriptor.SCSIIO.LMID = 0;
2405         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2406             &ioc->scsi_lookup_lock);
2407 }
2408
2409 /**
2410  * mpt3sas_base_put_smid_fast_path - send fast path request to firmware
2411  * @ioc: per adapter object
2412  * @smid: system request message index
2413  * @handle: device handle
2414  *
2415  * Return nothing.
2416  */
2417 void
2418 mpt3sas_base_put_smid_fast_path(struct MPT3SAS_ADAPTER *ioc, u16 smid,
2419         u16 handle)
2420 {
2421         Mpi2RequestDescriptorUnion_t descriptor;
2422         u64 *request = (u64 *)&descriptor;
2423
2424         descriptor.SCSIIO.RequestFlags =
2425             MPI25_REQ_DESCRIPT_FLAGS_FAST_PATH_SCSI_IO;
2426         descriptor.SCSIIO.MSIxIndex = _base_get_msix_index(ioc);
2427         descriptor.SCSIIO.SMID = cpu_to_le16(smid);
2428         descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
2429         descriptor.SCSIIO.LMID = 0;
2430         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2431             &ioc->scsi_lookup_lock);
2432 }
2433
2434 /**
2435  * mpt3sas_base_put_smid_hi_priority - send Task Managment request to firmware
2436  * @ioc: per adapter object
2437  * @smid: system request message index
2438  *
2439  * Return nothing.
2440  */
2441 void
2442 mpt3sas_base_put_smid_hi_priority(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2443 {
2444         Mpi2RequestDescriptorUnion_t descriptor;
2445         u64 *request = (u64 *)&descriptor;
2446
2447         descriptor.HighPriority.RequestFlags =
2448             MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
2449         descriptor.HighPriority.MSIxIndex =  0;
2450         descriptor.HighPriority.SMID = cpu_to_le16(smid);
2451         descriptor.HighPriority.LMID = 0;
2452         descriptor.HighPriority.Reserved1 = 0;
2453         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2454             &ioc->scsi_lookup_lock);
2455 }
2456
2457 /**
2458  * mpt3sas_base_put_smid_default - Default, primarily used for config pages
2459  * @ioc: per adapter object
2460  * @smid: system request message index
2461  *
2462  * Return nothing.
2463  */
2464 void
2465 mpt3sas_base_put_smid_default(struct MPT3SAS_ADAPTER *ioc, u16 smid)
2466 {
2467         Mpi2RequestDescriptorUnion_t descriptor;
2468         u64 *request = (u64 *)&descriptor;
2469
2470         descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
2471         descriptor.Default.MSIxIndex =  _base_get_msix_index(ioc);
2472         descriptor.Default.SMID = cpu_to_le16(smid);
2473         descriptor.Default.LMID = 0;
2474         descriptor.Default.DescriptorTypeDependent = 0;
2475         _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
2476             &ioc->scsi_lookup_lock);
2477 }
2478
2479 /**
2480  * _base_display_intel_branding - Display branding string
2481  * @ioc: per adapter object
2482  *
2483  * Return nothing.
2484  */
2485 static void
2486 _base_display_intel_branding(struct MPT3SAS_ADAPTER *ioc)
2487 {
2488         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_INTEL)
2489                 return;
2490
2491         switch (ioc->pdev->device) {
2492         case MPI25_MFGPAGE_DEVID_SAS3008:
2493                 switch (ioc->pdev->subsystem_device) {
2494                 case MPT3SAS_INTEL_RMS3JC080_SSDID:
2495                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2496                                 MPT3SAS_INTEL_RMS3JC080_BRANDING);
2497                         break;
2498
2499                 case MPT3SAS_INTEL_RS3GC008_SSDID:
2500                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2501                                 MPT3SAS_INTEL_RS3GC008_BRANDING);
2502                         break;
2503                 case MPT3SAS_INTEL_RS3FC044_SSDID:
2504                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2505                                 MPT3SAS_INTEL_RS3FC044_BRANDING);
2506                         break;
2507                 case MPT3SAS_INTEL_RS3UC080_SSDID:
2508                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2509                                 MPT3SAS_INTEL_RS3UC080_BRANDING);
2510                         break;
2511                 default:
2512                         pr_info(MPT3SAS_FMT
2513                                 "Intel(R) Controller: Subsystem ID: 0x%X\n",
2514                                 ioc->name, ioc->pdev->subsystem_device);
2515                         break;
2516                 }
2517                 break;
2518         default:
2519                 pr_info(MPT3SAS_FMT
2520                         "Intel(R) Controller: Subsystem ID: 0x%X\n",
2521                         ioc->name, ioc->pdev->subsystem_device);
2522                 break;
2523         }
2524 }
2525
2526
2527
2528 /**
2529  * _base_display_dell_branding - Display branding string
2530  * @ioc: per adapter object
2531  *
2532  * Return nothing.
2533  */
2534 static void
2535 _base_display_dell_branding(struct MPT3SAS_ADAPTER *ioc)
2536 {
2537         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
2538                 return;
2539
2540         switch (ioc->pdev->device) {
2541         case MPI25_MFGPAGE_DEVID_SAS3008:
2542                 switch (ioc->pdev->subsystem_device) {
2543                 case MPT3SAS_DELL_12G_HBA_SSDID:
2544                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2545                                 MPT3SAS_DELL_12G_HBA_BRANDING);
2546                         break;
2547                 default:
2548                         pr_info(MPT3SAS_FMT
2549                            "Dell 12Gbps HBA: Subsystem ID: 0x%X\n", ioc->name,
2550                            ioc->pdev->subsystem_device);
2551                         break;
2552                 }
2553                 break;
2554         default:
2555                 pr_info(MPT3SAS_FMT
2556                         "Dell 12Gbps HBA: Subsystem ID: 0x%X\n", ioc->name,
2557                         ioc->pdev->subsystem_device);
2558                 break;
2559         }
2560 }
2561
2562 /**
2563  * _base_display_cisco_branding - Display branding string
2564  * @ioc: per adapter object
2565  *
2566  * Return nothing.
2567  */
2568 static void
2569 _base_display_cisco_branding(struct MPT3SAS_ADAPTER *ioc)
2570 {
2571         if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_CISCO)
2572                 return;
2573
2574         switch (ioc->pdev->device) {
2575         case MPI25_MFGPAGE_DEVID_SAS3008:
2576                 switch (ioc->pdev->subsystem_device) {
2577                 case MPT3SAS_CISCO_12G_8E_HBA_SSDID:
2578                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2579                                 MPT3SAS_CISCO_12G_8E_HBA_BRANDING);
2580                         break;
2581                 case MPT3SAS_CISCO_12G_8I_HBA_SSDID:
2582                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2583                                 MPT3SAS_CISCO_12G_8I_HBA_BRANDING);
2584                         break;
2585                 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2586                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2587                                 MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2588                         break;
2589                 default:
2590                         pr_info(MPT3SAS_FMT
2591                           "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2592                           ioc->name, ioc->pdev->subsystem_device);
2593                         break;
2594                 }
2595                 break;
2596         case MPI25_MFGPAGE_DEVID_SAS3108_1:
2597                 switch (ioc->pdev->subsystem_device) {
2598                 case MPT3SAS_CISCO_12G_AVILA_HBA_SSDID:
2599                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2600                         MPT3SAS_CISCO_12G_AVILA_HBA_BRANDING);
2601                         break;
2602                 case MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_SSDID:
2603                         pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2604                         MPT3SAS_CISCO_12G_COLUSA_MEZZANINE_HBA_BRANDING);
2605                         break;
2606                 default:
2607                         pr_info(MPT3SAS_FMT
2608                          "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2609                          ioc->name, ioc->pdev->subsystem_device);
2610                         break;
2611                 }
2612                 break;
2613         default:
2614                  pr_info(MPT3SAS_FMT
2615                         "Cisco 12Gbps SAS HBA: Subsystem ID: 0x%X\n",
2616                         ioc->name, ioc->pdev->subsystem_device);
2617                 break;
2618         }
2619 }
2620
2621 /**
2622  * _base_display_ioc_capabilities - Disply IOC's capabilities.
2623  * @ioc: per adapter object
2624  *
2625  * Return nothing.
2626  */
2627 static void
2628 _base_display_ioc_capabilities(struct MPT3SAS_ADAPTER *ioc)
2629 {
2630         int i = 0;
2631         char desc[16];
2632         u32 iounit_pg1_flags;
2633         u32 bios_version;
2634
2635         bios_version = le32_to_cpu(ioc->bios_pg3.BiosVersion);
2636         strncpy(desc, ioc->manu_pg0.ChipName, 16);
2637         pr_info(MPT3SAS_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "\
2638            "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
2639             ioc->name, desc,
2640            (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
2641            (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
2642            (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
2643            ioc->facts.FWVersion.Word & 0x000000FF,
2644            ioc->pdev->revision,
2645            (bios_version & 0xFF000000) >> 24,
2646            (bios_version & 0x00FF0000) >> 16,
2647            (bios_version & 0x0000FF00) >> 8,
2648             bios_version & 0x000000FF);
2649
2650         _base_display_intel_branding(ioc);
2651         _base_display_dell_branding(ioc);
2652         _base_display_cisco_branding(ioc);
2653
2654         pr_info(MPT3SAS_FMT "Protocol=(", ioc->name);
2655
2656         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
2657                 pr_info("Initiator");
2658                 i++;
2659         }
2660
2661         if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
2662                 pr_info("%sTarget", i ? "," : "");
2663                 i++;
2664         }
2665
2666         i = 0;
2667         pr_info("), ");
2668         pr_info("Capabilities=(");
2669
2670         if (ioc->facts.IOCCapabilities &
2671                     MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
2672                         pr_info("Raid");
2673                         i++;
2674         }
2675
2676         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
2677                 pr_info("%sTLR", i ? "," : "");
2678                 i++;
2679         }
2680
2681         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
2682                 pr_info("%sMulticast", i ? "," : "");
2683                 i++;
2684         }
2685
2686         if (ioc->facts.IOCCapabilities &
2687             MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
2688                 pr_info("%sBIDI Target", i ? "," : "");
2689                 i++;
2690         }
2691
2692         if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
2693                 pr_info("%sEEDP", i ? "," : "");
2694                 i++;
2695         }
2696
2697         if (ioc->facts.IOCCapabilities &
2698             MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
2699                 pr_info("%sSnapshot Buffer", i ? "," : "");
2700                 i++;
2701         }
2702
2703         if (ioc->facts.IOCCapabilities &
2704             MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
2705                 pr_info("%sDiag Trace Buffer", i ? "," : "");
2706                 i++;
2707         }
2708
2709         if (ioc->facts.IOCCapabilities &
2710             MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER) {
2711                 pr_info("%sDiag Extended Buffer", i ? "," : "");
2712                 i++;
2713         }
2714
2715         if (ioc->facts.IOCCapabilities &
2716             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
2717                 pr_info("%sTask Set Full", i ? "," : "");
2718                 i++;
2719         }
2720
2721         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2722         if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
2723                 pr_info("%sNCQ", i ? "," : "");
2724                 i++;
2725         }
2726
2727         pr_info(")\n");
2728 }
2729
2730 /**
2731  * mpt3sas_base_update_missing_delay - change the missing delay timers
2732  * @ioc: per adapter object
2733  * @device_missing_delay: amount of time till device is reported missing
2734  * @io_missing_delay: interval IO is returned when there is a missing device
2735  *
2736  * Return nothing.
2737  *
2738  * Passed on the command line, this function will modify the device missing
2739  * delay, as well as the io missing delay. This should be called at driver
2740  * load time.
2741  */
2742 void
2743 mpt3sas_base_update_missing_delay(struct MPT3SAS_ADAPTER *ioc,
2744         u16 device_missing_delay, u8 io_missing_delay)
2745 {
2746         u16 dmd, dmd_new, dmd_orignal;
2747         u8 io_missing_delay_original;
2748         u16 sz;
2749         Mpi2SasIOUnitPage1_t *sas_iounit_pg1 = NULL;
2750         Mpi2ConfigReply_t mpi_reply;
2751         u8 num_phys = 0;
2752         u16 ioc_status;
2753
2754         mpt3sas_config_get_number_hba_phys(ioc, &num_phys);
2755         if (!num_phys)
2756                 return;
2757
2758         sz = offsetof(Mpi2SasIOUnitPage1_t, PhyData) + (num_phys *
2759             sizeof(Mpi2SasIOUnit1PhyData_t));
2760         sas_iounit_pg1 = kzalloc(sz, GFP_KERNEL);
2761         if (!sas_iounit_pg1) {
2762                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2763                     ioc->name, __FILE__, __LINE__, __func__);
2764                 goto out;
2765         }
2766         if ((mpt3sas_config_get_sas_iounit_pg1(ioc, &mpi_reply,
2767             sas_iounit_pg1, sz))) {
2768                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2769                     ioc->name, __FILE__, __LINE__, __func__);
2770                 goto out;
2771         }
2772         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) &
2773             MPI2_IOCSTATUS_MASK;
2774         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
2775                 pr_err(MPT3SAS_FMT "failure at %s:%d/%s()!\n",
2776                     ioc->name, __FILE__, __LINE__, __func__);
2777                 goto out;
2778         }
2779
2780         /* device missing delay */
2781         dmd = sas_iounit_pg1->ReportDeviceMissingDelay;
2782         if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2783                 dmd = (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2784         else
2785                 dmd = dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2786         dmd_orignal = dmd;
2787         if (device_missing_delay > 0x7F) {
2788                 dmd = (device_missing_delay > 0x7F0) ? 0x7F0 :
2789                     device_missing_delay;
2790                 dmd = dmd / 16;
2791                 dmd |= MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16;
2792         } else
2793                 dmd = device_missing_delay;
2794         sas_iounit_pg1->ReportDeviceMissingDelay = dmd;
2795
2796         /* io missing delay */
2797         io_missing_delay_original = sas_iounit_pg1->IODeviceMissingDelay;
2798         sas_iounit_pg1->IODeviceMissingDelay = io_missing_delay;
2799
2800         if (!mpt3sas_config_set_sas_iounit_pg1(ioc, &mpi_reply, sas_iounit_pg1,
2801             sz)) {
2802                 if (dmd & MPI2_SASIOUNIT1_REPORT_MISSING_UNIT_16)
2803                         dmd_new = (dmd &
2804                             MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK) * 16;
2805                 else
2806                         dmd_new =
2807                     dmd & MPI2_SASIOUNIT1_REPORT_MISSING_TIMEOUT_MASK;
2808                 pr_info(MPT3SAS_FMT "device_missing_delay: old(%d), new(%d)\n",
2809                         ioc->name, dmd_orignal, dmd_new);
2810                 pr_info(MPT3SAS_FMT "ioc_missing_delay: old(%d), new(%d)\n",
2811                         ioc->name, io_missing_delay_original,
2812                     io_missing_delay);
2813                 ioc->device_missing_delay = dmd_new;
2814                 ioc->io_missing_delay = io_missing_delay;
2815         }
2816
2817 out:
2818         kfree(sas_iounit_pg1);
2819 }
2820 /**
2821  * _base_static_config_pages - static start of day config pages
2822  * @ioc: per adapter object
2823  *
2824  * Return nothing.
2825  */
2826 static void
2827 _base_static_config_pages(struct MPT3SAS_ADAPTER *ioc)
2828 {
2829         Mpi2ConfigReply_t mpi_reply;
2830         u32 iounit_pg1_flags;
2831
2832         mpt3sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
2833         if (ioc->ir_firmware)
2834                 mpt3sas_config_get_manufacturing_pg10(ioc, &mpi_reply,
2835                     &ioc->manu_pg10);
2836
2837         /*
2838          * Ensure correct T10 PI operation if vendor left EEDPTagMode
2839          * flag unset in NVDATA.
2840          */
2841         mpt3sas_config_get_manufacturing_pg11(ioc, &mpi_reply, &ioc->manu_pg11);
2842         if (ioc->manu_pg11.EEDPTagMode == 0) {
2843                 pr_err("%s: overriding NVDATA EEDPTagMode setting\n",
2844                     ioc->name);
2845                 ioc->manu_pg11.EEDPTagMode &= ~0x3;
2846                 ioc->manu_pg11.EEDPTagMode |= 0x1;
2847                 mpt3sas_config_set_manufacturing_pg11(ioc, &mpi_reply,
2848                     &ioc->manu_pg11);
2849         }
2850
2851         mpt3sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
2852         mpt3sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
2853         mpt3sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
2854         mpt3sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
2855         mpt3sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2856         mpt3sas_config_get_iounit_pg8(ioc, &mpi_reply, &ioc->iounit_pg8);
2857         _base_display_ioc_capabilities(ioc);
2858
2859         /*
2860          * Enable task_set_full handling in iounit_pg1 when the
2861          * facts capabilities indicate that its supported.
2862          */
2863         iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
2864         if ((ioc->facts.IOCCapabilities &
2865             MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
2866                 iounit_pg1_flags &=
2867                     ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2868         else
2869                 iounit_pg1_flags |=
2870                     MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
2871         ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
2872         mpt3sas_config_set_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
2873
2874         if (ioc->iounit_pg8.NumSensors)
2875                 ioc->temp_sensors_count = ioc->iounit_pg8.NumSensors;
2876 }
2877
2878 /**
2879  * _base_release_memory_pools - release memory
2880  * @ioc: per adapter object
2881  *
2882  * Free memory allocated from _base_allocate_memory_pools.
2883  *
2884  * Return nothing.
2885  */
2886 static void
2887 _base_release_memory_pools(struct MPT3SAS_ADAPTER *ioc)
2888 {
2889         int i = 0;
2890         struct reply_post_struct *rps;
2891
2892         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
2893             __func__));
2894
2895         if (ioc->request) {
2896                 pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
2897                     ioc->request,  ioc->request_dma);
2898                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2899                         "request_pool(0x%p): free\n",
2900                         ioc->name, ioc->request));
2901                 ioc->request = NULL;
2902         }
2903
2904         if (ioc->sense) {
2905                 pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
2906                 if (ioc->sense_dma_pool)
2907                         pci_pool_destroy(ioc->sense_dma_pool);
2908                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2909                         "sense_pool(0x%p): free\n",
2910                         ioc->name, ioc->sense));
2911                 ioc->sense = NULL;
2912         }
2913
2914         if (ioc->reply) {
2915                 pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
2916                 if (ioc->reply_dma_pool)
2917                         pci_pool_destroy(ioc->reply_dma_pool);
2918                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2919                         "reply_pool(0x%p): free\n",
2920                         ioc->name, ioc->reply));
2921                 ioc->reply = NULL;
2922         }
2923
2924         if (ioc->reply_free) {
2925                 pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
2926                     ioc->reply_free_dma);
2927                 if (ioc->reply_free_dma_pool)
2928                         pci_pool_destroy(ioc->reply_free_dma_pool);
2929                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2930                         "reply_free_pool(0x%p): free\n",
2931                         ioc->name, ioc->reply_free));
2932                 ioc->reply_free = NULL;
2933         }
2934
2935         if (ioc->reply_post) {
2936                 do {
2937                         rps = &ioc->reply_post[i];
2938                         if (rps->reply_post_free) {
2939                                 pci_pool_free(
2940                                     ioc->reply_post_free_dma_pool,
2941                                     rps->reply_post_free,
2942                                     rps->reply_post_free_dma);
2943                                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2944                                     "reply_post_free_pool(0x%p): free\n",
2945                                     ioc->name, rps->reply_post_free));
2946                                 rps->reply_post_free = NULL;
2947                         }
2948                 } while (ioc->rdpq_array_enable &&
2949                            (++i < ioc->reply_queue_count));
2950
2951                 if (ioc->reply_post_free_dma_pool)
2952                         pci_pool_destroy(ioc->reply_post_free_dma_pool);
2953                 kfree(ioc->reply_post);
2954         }
2955
2956         if (ioc->config_page) {
2957                 dexitprintk(ioc, pr_info(MPT3SAS_FMT
2958                     "config_page(0x%p): free\n", ioc->name,
2959                     ioc->config_page));
2960                 pci_free_consistent(ioc->pdev, ioc->config_page_sz,
2961                     ioc->config_page, ioc->config_page_dma);
2962         }
2963
2964         if (ioc->scsi_lookup) {
2965                 free_pages((ulong)ioc->scsi_lookup, ioc->scsi_lookup_pages);
2966                 ioc->scsi_lookup = NULL;
2967         }
2968         kfree(ioc->hpr_lookup);
2969         kfree(ioc->internal_lookup);
2970         if (ioc->chain_lookup) {
2971                 for (i = 0; i < ioc->chain_depth; i++) {
2972                         if (ioc->chain_lookup[i].chain_buffer)
2973                                 pci_pool_free(ioc->chain_dma_pool,
2974                                     ioc->chain_lookup[i].chain_buffer,
2975                                     ioc->chain_lookup[i].chain_buffer_dma);
2976                 }
2977                 if (ioc->chain_dma_pool)
2978                         pci_pool_destroy(ioc->chain_dma_pool);
2979                 free_pages((ulong)ioc->chain_lookup, ioc->chain_pages);
2980                 ioc->chain_lookup = NULL;
2981         }
2982 }
2983
2984 /**
2985  * _base_allocate_memory_pools - allocate start of day memory pools
2986  * @ioc: per adapter object
2987  * @sleep_flag: CAN_SLEEP or NO_SLEEP
2988  *
2989  * Returns 0 success, anything else error
2990  */
2991 static int
2992 _base_allocate_memory_pools(struct MPT3SAS_ADAPTER *ioc,  int sleep_flag)
2993 {
2994         struct mpt3sas_facts *facts;
2995         u16 max_sge_elements;
2996         u16 chains_needed_per_io;
2997         u32 sz, total_sz, reply_post_free_sz;
2998         u32 retry_sz;
2999         u16 max_request_credit;
3000         unsigned short sg_tablesize;
3001         u16 sge_size;
3002         int i;
3003
3004         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3005             __func__));
3006
3007
3008         retry_sz = 0;
3009         facts = &ioc->facts;
3010
3011         /* command line tunables for max sgl entries */
3012         if (max_sgl_entries != -1)
3013                 sg_tablesize = max_sgl_entries;
3014         else {
3015                 if (ioc->hba_mpi_version_belonged == MPI2_VERSION)
3016                         sg_tablesize = MPT2SAS_SG_DEPTH;
3017                 else
3018                         sg_tablesize = MPT3SAS_SG_DEPTH;
3019         }
3020
3021         if (sg_tablesize < MPT_MIN_PHYS_SEGMENTS)
3022                 sg_tablesize = MPT_MIN_PHYS_SEGMENTS;
3023         else if (sg_tablesize > MPT_MAX_PHYS_SEGMENTS) {
3024                 sg_tablesize = min_t(unsigned short, sg_tablesize,
3025                                       SCSI_MAX_SG_CHAIN_SEGMENTS);
3026                 pr_warn(MPT3SAS_FMT
3027                  "sg_tablesize(%u) is bigger than kernel"
3028                  " defined SCSI_MAX_SG_SEGMENTS(%u)\n", ioc->name,
3029                  sg_tablesize, MPT_MAX_PHYS_SEGMENTS);
3030         }
3031         ioc->shost->sg_tablesize = sg_tablesize;
3032
3033         ioc->hi_priority_depth = facts->HighPriorityCredit;
3034         ioc->internal_depth = ioc->hi_priority_depth + (5);
3035         /* command line tunables  for max controller queue depth */
3036         if (max_queue_depth != -1 && max_queue_depth != 0) {
3037                 max_request_credit = min_t(u16, max_queue_depth +
3038                     ioc->hi_priority_depth + ioc->internal_depth,
3039                     facts->RequestCredit);
3040                 if (max_request_credit > MAX_HBA_QUEUE_DEPTH)
3041                         max_request_credit =  MAX_HBA_QUEUE_DEPTH;
3042         } else
3043                 max_request_credit = min_t(u16, facts->RequestCredit,
3044                     MAX_HBA_QUEUE_DEPTH);
3045
3046         ioc->hba_queue_depth = max_request_credit;
3047
3048         /* request frame size */
3049         ioc->request_sz = facts->IOCRequestFrameSize * 4;
3050
3051         /* reply frame size */
3052         ioc->reply_sz = facts->ReplyFrameSize * 4;
3053
3054         /* calculate the max scatter element size */
3055         sge_size = max_t(u16, ioc->sge_size, ioc->sge_size_ieee);
3056
3057  retry_allocation:
3058         total_sz = 0;
3059         /* calculate number of sg elements left over in the 1st frame */
3060         max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
3061             sizeof(Mpi2SGEIOUnion_t)) + sge_size);
3062         ioc->max_sges_in_main_message = max_sge_elements/sge_size;
3063
3064         /* now do the same for a chain buffer */
3065         max_sge_elements = ioc->request_sz - sge_size;
3066         ioc->max_sges_in_chain_message = max_sge_elements/sge_size;
3067
3068         /*
3069          *  MPT3SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
3070          */
3071         chains_needed_per_io = ((ioc->shost->sg_tablesize -
3072            ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
3073             + 1;
3074         if (chains_needed_per_io > facts->MaxChainDepth) {
3075                 chains_needed_per_io = facts->MaxChainDepth;
3076                 ioc->shost->sg_tablesize = min_t(u16,
3077                 ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
3078                 * chains_needed_per_io), ioc->shost->sg_tablesize);
3079         }
3080         ioc->chains_needed_per_io = chains_needed_per_io;
3081
3082         /* reply free queue sizing - taking into account for 64 FW events */
3083         ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3084
3085         /* calculate reply descriptor post queue depth */
3086         ioc->reply_post_queue_depth = ioc->hba_queue_depth +
3087                                 ioc->reply_free_queue_depth +  1 ;
3088         /* align the reply post queue on the next 16 count boundary */
3089         if (ioc->reply_post_queue_depth % 16)
3090                 ioc->reply_post_queue_depth += 16 -
3091                 (ioc->reply_post_queue_depth % 16);
3092
3093
3094         if (ioc->reply_post_queue_depth >
3095             facts->MaxReplyDescriptorPostQueueDepth) {
3096                 ioc->reply_post_queue_depth =
3097                                 facts->MaxReplyDescriptorPostQueueDepth -
3098                     (facts->MaxReplyDescriptorPostQueueDepth % 16);
3099                 ioc->hba_queue_depth =
3100                                 ((ioc->reply_post_queue_depth - 64) / 2) - 1;
3101                 ioc->reply_free_queue_depth = ioc->hba_queue_depth + 64;
3102         }
3103
3104         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scatter gather: " \
3105             "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
3106             "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
3107             ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
3108             ioc->chains_needed_per_io));
3109
3110         /* reply post queue, 16 byte align */
3111         reply_post_free_sz = ioc->reply_post_queue_depth *
3112             sizeof(Mpi2DefaultReplyDescriptor_t);
3113
3114         sz = reply_post_free_sz;
3115         if (_base_is_controller_msix_enabled(ioc) && !ioc->rdpq_array_enable)
3116                 sz *= ioc->reply_queue_count;
3117
3118         ioc->reply_post = kcalloc((ioc->rdpq_array_enable) ?
3119             (ioc->reply_queue_count):1,
3120             sizeof(struct reply_post_struct), GFP_KERNEL);
3121
3122         if (!ioc->reply_post) {
3123                 pr_err(MPT3SAS_FMT "reply_post_free pool: kcalloc failed\n",
3124                         ioc->name);
3125                 goto out;
3126         }
3127         ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
3128             ioc->pdev, sz, 16, 0);
3129         if (!ioc->reply_post_free_dma_pool) {
3130                 pr_err(MPT3SAS_FMT
3131                  "reply_post_free pool: pci_pool_create failed\n",
3132                  ioc->name);
3133                 goto out;
3134         }
3135         i = 0;
3136         do {
3137                 ioc->reply_post[i].reply_post_free =
3138                     pci_pool_alloc(ioc->reply_post_free_dma_pool,
3139                     GFP_KERNEL,
3140                     &ioc->reply_post[i].reply_post_free_dma);
3141                 if (!ioc->reply_post[i].reply_post_free) {
3142                         pr_err(MPT3SAS_FMT
3143                         "reply_post_free pool: pci_pool_alloc failed\n",
3144                         ioc->name);
3145                         goto out;
3146                 }
3147                 memset(ioc->reply_post[i].reply_post_free, 0, sz);
3148                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3149                     "reply post free pool (0x%p): depth(%d),"
3150                     "element_size(%d), pool_size(%d kB)\n", ioc->name,
3151                     ioc->reply_post[i].reply_post_free,
3152                     ioc->reply_post_queue_depth, 8, sz/1024));
3153                 dinitprintk(ioc, pr_info(MPT3SAS_FMT
3154                     "reply_post_free_dma = (0x%llx)\n", ioc->name,
3155                     (unsigned long long)
3156                     ioc->reply_post[i].reply_post_free_dma));
3157                 total_sz += sz;
3158         } while (ioc->rdpq_array_enable && (++i < ioc->reply_queue_count));
3159
3160         if (ioc->dma_mask == 64) {
3161                 if (_base_change_consistent_dma_mask(ioc, ioc->pdev) != 0) {
3162                         pr_warn(MPT3SAS_FMT
3163                             "no suitable consistent DMA mask for %s\n",
3164                             ioc->name, pci_name(ioc->pdev));
3165                         goto out;
3166                 }
3167         }
3168
3169         ioc->scsiio_depth = ioc->hba_queue_depth -
3170             ioc->hi_priority_depth - ioc->internal_depth;
3171
3172         /* set the scsi host can_queue depth
3173          * with some internal commands that could be outstanding
3174          */
3175         ioc->shost->can_queue = ioc->scsiio_depth;
3176         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3177                 "scsi host: can_queue depth (%d)\n",
3178                 ioc->name, ioc->shost->can_queue));
3179
3180
3181         /* contiguous pool for request and chains, 16 byte align, one extra "
3182          * "frame for smid=0
3183          */
3184         ioc->chain_depth = ioc->chains_needed_per_io * ioc->scsiio_depth;
3185         sz = ((ioc->scsiio_depth + 1) * ioc->request_sz);
3186
3187         /* hi-priority queue */
3188         sz += (ioc->hi_priority_depth * ioc->request_sz);
3189
3190         /* internal queue */
3191         sz += (ioc->internal_depth * ioc->request_sz);
3192
3193         ioc->request_dma_sz = sz;
3194         ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
3195         if (!ioc->request) {
3196                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3197                     "failed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3198                     "total(%d kB)\n", ioc->name, ioc->hba_queue_depth,
3199                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3200                 if (ioc->scsiio_depth < MPT3SAS_SAS_QUEUE_DEPTH)
3201                         goto out;
3202                 retry_sz += 64;
3203                 ioc->hba_queue_depth = max_request_credit - retry_sz;
3204                 goto retry_allocation;
3205         }
3206
3207         if (retry_sz)
3208                 pr_err(MPT3SAS_FMT "request pool: pci_alloc_consistent " \
3209                     "succeed: hba_depth(%d), chains_per_io(%d), frame_sz(%d), "
3210                     "total(%d kb)\n", ioc->name, ioc->hba_queue_depth,
3211                     ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
3212
3213         /* hi-priority queue */
3214         ioc->hi_priority = ioc->request + ((ioc->scsiio_depth + 1) *
3215             ioc->request_sz);
3216         ioc->hi_priority_dma = ioc->request_dma + ((ioc->scsiio_depth + 1) *
3217             ioc->request_sz);
3218
3219         /* internal queue */
3220         ioc->internal = ioc->hi_priority + (ioc->hi_priority_depth *
3221             ioc->request_sz);
3222         ioc->internal_dma = ioc->hi_priority_dma + (ioc->hi_priority_depth *
3223             ioc->request_sz);
3224
3225         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3226                 "request pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3227                 ioc->name, ioc->request, ioc->hba_queue_depth, ioc->request_sz,
3228             (ioc->hba_queue_depth * ioc->request_sz)/1024));
3229
3230         dinitprintk(ioc, pr_info(MPT3SAS_FMT "request pool: dma(0x%llx)\n",
3231             ioc->name, (unsigned long long) ioc->request_dma));
3232         total_sz += sz;
3233
3234         sz = ioc->scsiio_depth * sizeof(struct scsiio_tracker);
3235         ioc->scsi_lookup_pages = get_order(sz);
3236         ioc->scsi_lookup = (struct scsiio_tracker *)__get_free_pages(
3237             GFP_KERNEL, ioc->scsi_lookup_pages);
3238         if (!ioc->scsi_lookup) {
3239                 pr_err(MPT3SAS_FMT "scsi_lookup: get_free_pages failed, sz(%d)\n",
3240                         ioc->name, (int)sz);
3241                 goto out;
3242         }
3243
3244         dinitprintk(ioc, pr_info(MPT3SAS_FMT "scsiio(0x%p): depth(%d)\n",
3245                 ioc->name, ioc->request, ioc->scsiio_depth));
3246
3247         ioc->chain_depth = min_t(u32, ioc->chain_depth, MAX_CHAIN_DEPTH);
3248         sz = ioc->chain_depth * sizeof(struct chain_tracker);
3249         ioc->chain_pages = get_order(sz);
3250         ioc->chain_lookup = (struct chain_tracker *)__get_free_pages(
3251             GFP_KERNEL, ioc->chain_pages);
3252         if (!ioc->chain_lookup) {
3253                 pr_err(MPT3SAS_FMT "chain_lookup: __get_free_pages failed\n",
3254                         ioc->name);
3255                 goto out;
3256         }
3257         ioc->chain_dma_pool = pci_pool_create("chain pool", ioc->pdev,
3258             ioc->request_sz, 16, 0);
3259         if (!ioc->chain_dma_pool) {
3260                 pr_err(MPT3SAS_FMT "chain_dma_pool: pci_pool_create failed\n",
3261                         ioc->name);
3262                 goto out;
3263         }
3264         for (i = 0; i < ioc->chain_depth; i++) {
3265                 ioc->chain_lookup[i].chain_buffer = pci_pool_alloc(
3266                     ioc->chain_dma_pool , GFP_KERNEL,
3267                     &ioc->chain_lookup[i].chain_buffer_dma);
3268                 if (!ioc->chain_lookup[i].chain_buffer) {
3269                         ioc->chain_depth = i;
3270                         goto chain_done;
3271                 }
3272                 total_sz += ioc->request_sz;
3273         }
3274  chain_done:
3275         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3276                 "chain pool depth(%d), frame_size(%d), pool_size(%d kB)\n",
3277                 ioc->name, ioc->chain_depth, ioc->request_sz,
3278                 ((ioc->chain_depth *  ioc->request_sz))/1024));
3279
3280         /* initialize hi-priority queue smid's */
3281         ioc->hpr_lookup = kcalloc(ioc->hi_priority_depth,
3282             sizeof(struct request_tracker), GFP_KERNEL);
3283         if (!ioc->hpr_lookup) {
3284                 pr_err(MPT3SAS_FMT "hpr_lookup: kcalloc failed\n",
3285                     ioc->name);
3286                 goto out;
3287         }
3288         ioc->hi_priority_smid = ioc->scsiio_depth + 1;
3289         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3290                 "hi_priority(0x%p): depth(%d), start smid(%d)\n",
3291                 ioc->name, ioc->hi_priority,
3292             ioc->hi_priority_depth, ioc->hi_priority_smid));
3293
3294         /* initialize internal queue smid's */
3295         ioc->internal_lookup = kcalloc(ioc->internal_depth,
3296             sizeof(struct request_tracker), GFP_KERNEL);
3297         if (!ioc->internal_lookup) {
3298                 pr_err(MPT3SAS_FMT "internal_lookup: kcalloc failed\n",
3299                     ioc->name);
3300                 goto out;
3301         }
3302         ioc->internal_smid = ioc->hi_priority_smid + ioc->hi_priority_depth;
3303         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3304                 "internal(0x%p): depth(%d), start smid(%d)\n",
3305                 ioc->name, ioc->internal,
3306             ioc->internal_depth, ioc->internal_smid));
3307
3308         /* sense buffers, 4 byte align */
3309         sz = ioc->scsiio_depth * SCSI_SENSE_BUFFERSIZE;
3310         ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
3311             0);
3312         if (!ioc->sense_dma_pool) {
3313                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_create failed\n",
3314                     ioc->name);
3315                 goto out;
3316         }
3317         ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
3318             &ioc->sense_dma);
3319         if (!ioc->sense) {
3320                 pr_err(MPT3SAS_FMT "sense pool: pci_pool_alloc failed\n",
3321                     ioc->name);
3322                 goto out;
3323         }
3324         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3325             "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
3326             "(%d kB)\n", ioc->name, ioc->sense, ioc->scsiio_depth,
3327             SCSI_SENSE_BUFFERSIZE, sz/1024));
3328         dinitprintk(ioc, pr_info(MPT3SAS_FMT "sense_dma(0x%llx)\n",
3329             ioc->name, (unsigned long long)ioc->sense_dma));
3330         total_sz += sz;
3331
3332         /* reply pool, 4 byte align */
3333         sz = ioc->reply_free_queue_depth * ioc->reply_sz;
3334         ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
3335             0);
3336         if (!ioc->reply_dma_pool) {
3337                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_create failed\n",
3338                     ioc->name);
3339                 goto out;
3340         }
3341         ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
3342             &ioc->reply_dma);
3343         if (!ioc->reply) {
3344                 pr_err(MPT3SAS_FMT "reply pool: pci_pool_alloc failed\n",
3345                     ioc->name);
3346                 goto out;
3347         }
3348         ioc->reply_dma_min_address = (u32)(ioc->reply_dma);
3349         ioc->reply_dma_max_address = (u32)(ioc->reply_dma) + sz;
3350         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3351                 "reply pool(0x%p): depth(%d), frame_size(%d), pool_size(%d kB)\n",
3352                 ioc->name, ioc->reply,
3353             ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
3354         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_dma(0x%llx)\n",
3355             ioc->name, (unsigned long long)ioc->reply_dma));
3356         total_sz += sz;
3357
3358         /* reply free queue, 16 byte align */
3359         sz = ioc->reply_free_queue_depth * 4;
3360         ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
3361             ioc->pdev, sz, 16, 0);
3362         if (!ioc->reply_free_dma_pool) {
3363                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_create failed\n",
3364                         ioc->name);
3365                 goto out;
3366         }
3367         ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
3368             &ioc->reply_free_dma);
3369         if (!ioc->reply_free) {
3370                 pr_err(MPT3SAS_FMT "reply_free pool: pci_pool_alloc failed\n",
3371                         ioc->name);
3372                 goto out;
3373         }
3374         memset(ioc->reply_free, 0, sz);
3375         dinitprintk(ioc, pr_info(MPT3SAS_FMT "reply_free pool(0x%p): " \
3376             "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
3377             ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
3378         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3379                 "reply_free_dma (0x%llx)\n",
3380                 ioc->name, (unsigned long long)ioc->reply_free_dma));
3381         total_sz += sz;
3382
3383         ioc->config_page_sz = 512;
3384         ioc->config_page = pci_alloc_consistent(ioc->pdev,
3385             ioc->config_page_sz, &ioc->config_page_dma);
3386         if (!ioc->config_page) {
3387                 pr_err(MPT3SAS_FMT
3388                         "config page: pci_pool_alloc failed\n",
3389                         ioc->name);
3390                 goto out;
3391         }
3392         dinitprintk(ioc, pr_info(MPT3SAS_FMT
3393                 "config page(0x%p): size(%d)\n",
3394                 ioc->name, ioc->config_page, ioc->config_page_sz));
3395         dinitprintk(ioc, pr_info(MPT3SAS_FMT "config_page_dma(0x%llx)\n",
3396                 ioc->name, (unsigned long long)ioc->config_page_dma));
3397         total_sz += ioc->config_page_sz;
3398
3399         pr_info(MPT3SAS_FMT "Allocated physical memory: size(%d kB)\n",
3400             ioc->name, total_sz/1024);
3401         pr_info(MPT3SAS_FMT
3402                 "Current Controller Queue Depth(%d),Max Controller Queue Depth(%d)\n",
3403             ioc->name, ioc->shost->can_queue, facts->RequestCredit);
3404         pr_info(MPT3SAS_FMT "Scatter Gather Elements per IO(%d)\n",
3405             ioc->name, ioc->shost->sg_tablesize);
3406         return 0;
3407
3408  out:
3409         return -ENOMEM;
3410 }
3411
3412 /**
3413  * mpt3sas_base_get_iocstate - Get the current state of a MPT adapter.
3414  * @ioc: Pointer to MPT_ADAPTER structure
3415  * @cooked: Request raw or cooked IOC state
3416  *
3417  * Returns all IOC Doorbell register bits if cooked==0, else just the
3418  * Doorbell bits in MPI_IOC_STATE_MASK.
3419  */
3420 u32
3421 mpt3sas_base_get_iocstate(struct MPT3SAS_ADAPTER *ioc, int cooked)
3422 {
3423         u32 s, sc;
3424
3425         s = readl(&ioc->chip->Doorbell);
3426         sc = s & MPI2_IOC_STATE_MASK;
3427         return cooked ? sc : s;
3428 }
3429
3430 /**
3431  * _base_wait_on_iocstate - waiting on a particular ioc state
3432  * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
3433  * @timeout: timeout in second
3434  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3435  *
3436  * Returns 0 for success, non-zero for failure.
3437  */
3438 static int
3439 _base_wait_on_iocstate(struct MPT3SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
3440         int sleep_flag)
3441 {
3442         u32 count, cntdn;
3443         u32 current_state;
3444
3445         count = 0;
3446         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3447         do {
3448                 current_state = mpt3sas_base_get_iocstate(ioc, 1);
3449                 if (current_state == ioc_state)
3450                         return 0;
3451                 if (count && current_state == MPI2_IOC_STATE_FAULT)
3452                         break;
3453                 if (sleep_flag == CAN_SLEEP)
3454                         usleep_range(1000, 1500);
3455                 else
3456                         udelay(500);
3457                 count++;
3458         } while (--cntdn);
3459
3460         return current_state;
3461 }
3462
3463 /**
3464  * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
3465  * a write to the doorbell)
3466  * @ioc: per adapter object
3467  * @timeout: timeout in second
3468  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3469  *
3470  * Returns 0 for success, non-zero for failure.
3471  *
3472  * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
3473  */
3474 static int
3475 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag);
3476
3477 static int
3478 _base_wait_for_doorbell_int(struct MPT3SAS_ADAPTER *ioc, int timeout,
3479         int sleep_flag)
3480 {
3481         u32 cntdn, count;
3482         u32 int_status;
3483
3484         count = 0;
3485         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3486         do {
3487                 int_status = readl(&ioc->chip->HostInterruptStatus);
3488                 if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3489                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3490                                 "%s: successful count(%d), timeout(%d)\n",
3491                                 ioc->name, __func__, count, timeout));
3492                         return 0;
3493                 }
3494                 if (sleep_flag == CAN_SLEEP)
3495                         usleep_range(1000, 1500);
3496                 else
3497                         udelay(500);
3498                 count++;
3499         } while (--cntdn);
3500
3501         pr_err(MPT3SAS_FMT
3502                 "%s: failed due to timeout count(%d), int_status(%x)!\n",
3503                 ioc->name, __func__, count, int_status);
3504         return -EFAULT;
3505 }
3506
3507 /**
3508  * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
3509  * @ioc: per adapter object
3510  * @timeout: timeout in second
3511  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3512  *
3513  * Returns 0 for success, non-zero for failure.
3514  *
3515  * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
3516  * doorbell.
3517  */
3518 static int
3519 _base_wait_for_doorbell_ack(struct MPT3SAS_ADAPTER *ioc, int timeout,
3520         int sleep_flag)
3521 {
3522         u32 cntdn, count;
3523         u32 int_status;
3524         u32 doorbell;
3525
3526         count = 0;
3527         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3528         do {
3529                 int_status = readl(&ioc->chip->HostInterruptStatus);
3530                 if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
3531                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3532                                 "%s: successful count(%d), timeout(%d)\n",
3533                                 ioc->name, __func__, count, timeout));
3534                         return 0;
3535                 } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
3536                         doorbell = readl(&ioc->chip->Doorbell);
3537                         if ((doorbell & MPI2_IOC_STATE_MASK) ==
3538                             MPI2_IOC_STATE_FAULT) {
3539                                 mpt3sas_base_fault_info(ioc , doorbell);
3540                                 return -EFAULT;
3541                         }
3542                 } else if (int_status == 0xFFFFFFFF)
3543                         goto out;
3544
3545                 if (sleep_flag == CAN_SLEEP)
3546                         usleep_range(1000, 1500);
3547                 else
3548                         udelay(500);
3549                 count++;
3550         } while (--cntdn);
3551
3552  out:
3553         pr_err(MPT3SAS_FMT
3554          "%s: failed due to timeout count(%d), int_status(%x)!\n",
3555          ioc->name, __func__, count, int_status);
3556         return -EFAULT;
3557 }
3558
3559 /**
3560  * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
3561  * @ioc: per adapter object
3562  * @timeout: timeout in second
3563  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3564  *
3565  * Returns 0 for success, non-zero for failure.
3566  *
3567  */
3568 static int
3569 _base_wait_for_doorbell_not_used(struct MPT3SAS_ADAPTER *ioc, int timeout,
3570         int sleep_flag)
3571 {
3572         u32 cntdn, count;
3573         u32 doorbell_reg;
3574
3575         count = 0;
3576         cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
3577         do {
3578                 doorbell_reg = readl(&ioc->chip->Doorbell);
3579                 if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
3580                         dhsprintk(ioc, pr_info(MPT3SAS_FMT
3581                                 "%s: successful count(%d), timeout(%d)\n",
3582                                 ioc->name, __func__, count, timeout));
3583                         return 0;
3584                 }
3585                 if (sleep_flag == CAN_SLEEP)
3586                         usleep_range(1000, 1500);
3587                 else
3588                         udelay(500);
3589                 count++;
3590         } while (--cntdn);
3591
3592         pr_err(MPT3SAS_FMT
3593                 "%s: failed due to timeout count(%d), doorbell_reg(%x)!\n",
3594                 ioc->name, __func__, count, doorbell_reg);
3595         return -EFAULT;
3596 }
3597
3598 /**
3599  * _base_send_ioc_reset - send doorbell reset
3600  * @ioc: per adapter object
3601  * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
3602  * @timeout: timeout in second
3603  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3604  *
3605  * Returns 0 for success, non-zero for failure.
3606  */
3607 static int
3608 _base_send_ioc_reset(struct MPT3SAS_ADAPTER *ioc, u8 reset_type, int timeout,
3609         int sleep_flag)
3610 {
3611         u32 ioc_state;
3612         int r = 0;
3613
3614         if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
3615                 pr_err(MPT3SAS_FMT "%s: unknown reset_type\n",
3616                     ioc->name, __func__);
3617                 return -EFAULT;
3618         }
3619
3620         if (!(ioc->facts.IOCCapabilities &
3621            MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
3622                 return -EFAULT;
3623
3624         pr_info(MPT3SAS_FMT "sending message unit reset !!\n", ioc->name);
3625
3626         writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
3627             &ioc->chip->Doorbell);
3628         if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
3629                 r = -EFAULT;
3630                 goto out;
3631         }
3632         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
3633             timeout, sleep_flag);
3634         if (ioc_state) {
3635                 pr_err(MPT3SAS_FMT
3636                         "%s: failed going to ready state (ioc_state=0x%x)\n",
3637                         ioc->name, __func__, ioc_state);
3638                 r = -EFAULT;
3639                 goto out;
3640         }
3641  out:
3642         pr_info(MPT3SAS_FMT "message unit reset: %s\n",
3643             ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
3644         return r;
3645 }
3646
3647 /**
3648  * _base_handshake_req_reply_wait - send request thru doorbell interface
3649  * @ioc: per adapter object
3650  * @request_bytes: request length
3651  * @request: pointer having request payload
3652  * @reply_bytes: reply length
3653  * @reply: pointer to reply payload
3654  * @timeout: timeout in second
3655  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3656  *
3657  * Returns 0 for success, non-zero for failure.
3658  */
3659 static int
3660 _base_handshake_req_reply_wait(struct MPT3SAS_ADAPTER *ioc, int request_bytes,
3661         u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
3662 {
3663         MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
3664         int i;
3665         u8 failed;
3666         u16 dummy;
3667         __le32 *mfp;
3668
3669         /* make sure doorbell is not in use */
3670         if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
3671                 pr_err(MPT3SAS_FMT
3672                         "doorbell is in use (line=%d)\n",
3673                         ioc->name, __LINE__);
3674                 return -EFAULT;
3675         }
3676
3677         /* clear pending doorbell interrupts from previous state changes */
3678         if (readl(&ioc->chip->HostInterruptStatus) &
3679             MPI2_HIS_IOC2SYS_DB_STATUS)
3680                 writel(0, &ioc->chip->HostInterruptStatus);
3681
3682         /* send message to ioc */
3683         writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
3684             ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
3685             &ioc->chip->Doorbell);
3686
3687         if ((_base_wait_for_doorbell_int(ioc, 5, NO_SLEEP))) {
3688                 pr_err(MPT3SAS_FMT
3689                         "doorbell handshake int failed (line=%d)\n",
3690                         ioc->name, __LINE__);
3691                 return -EFAULT;
3692         }
3693         writel(0, &ioc->chip->HostInterruptStatus);
3694
3695         if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
3696                 pr_err(MPT3SAS_FMT
3697                         "doorbell handshake ack failed (line=%d)\n",
3698                         ioc->name, __LINE__);
3699                 return -EFAULT;
3700         }
3701
3702         /* send message 32-bits at a time */
3703         for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
3704                 writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
3705                 if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
3706                         failed = 1;
3707         }
3708
3709         if (failed) {
3710                 pr_err(MPT3SAS_FMT
3711                         "doorbell handshake sending request failed (line=%d)\n",
3712                         ioc->name, __LINE__);
3713                 return -EFAULT;
3714         }
3715
3716         /* now wait for the reply */
3717         if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
3718                 pr_err(MPT3SAS_FMT
3719                         "doorbell handshake int failed (line=%d)\n",
3720                         ioc->name, __LINE__);
3721                 return -EFAULT;
3722         }
3723
3724         /* read the first two 16-bits, it gives the total length of the reply */
3725         reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3726             & MPI2_DOORBELL_DATA_MASK);
3727         writel(0, &ioc->chip->HostInterruptStatus);
3728         if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3729                 pr_err(MPT3SAS_FMT
3730                         "doorbell handshake int failed (line=%d)\n",
3731                         ioc->name, __LINE__);
3732                 return -EFAULT;
3733         }
3734         reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3735             & MPI2_DOORBELL_DATA_MASK);
3736         writel(0, &ioc->chip->HostInterruptStatus);
3737
3738         for (i = 2; i < default_reply->MsgLength * 2; i++)  {
3739                 if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
3740                         pr_err(MPT3SAS_FMT
3741                                 "doorbell handshake int failed (line=%d)\n",
3742                                 ioc->name, __LINE__);
3743                         return -EFAULT;
3744                 }
3745                 if (i >=  reply_bytes/2) /* overflow case */
3746                         dummy = readl(&ioc->chip->Doorbell);
3747                 else
3748                         reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
3749                             & MPI2_DOORBELL_DATA_MASK);
3750                 writel(0, &ioc->chip->HostInterruptStatus);
3751         }
3752
3753         _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
3754         if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
3755                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
3756                         "doorbell is in use (line=%d)\n", ioc->name, __LINE__));
3757         }
3758         writel(0, &ioc->chip->HostInterruptStatus);
3759
3760         if (ioc->logging_level & MPT_DEBUG_INIT) {
3761                 mfp = (__le32 *)reply;
3762                 pr_info("\toffset:data\n");
3763                 for (i = 0; i < reply_bytes/4; i++)
3764                         pr_info("\t[0x%02x]:%08x\n", i*4,
3765                             le32_to_cpu(mfp[i]));
3766         }
3767         return 0;
3768 }
3769
3770 /**
3771  * mpt3sas_base_sas_iounit_control - send sas iounit control to FW
3772  * @ioc: per adapter object
3773  * @mpi_reply: the reply payload from FW
3774  * @mpi_request: the request payload sent to FW
3775  *
3776  * The SAS IO Unit Control Request message allows the host to perform low-level
3777  * operations, such as resets on the PHYs of the IO Unit, also allows the host
3778  * to obtain the IOC assigned device handles for a device if it has other
3779  * identifying information about the device, in addition allows the host to
3780  * remove IOC resources associated with the device.
3781  *
3782  * Returns 0 for success, non-zero for failure.
3783  */
3784 int
3785 mpt3sas_base_sas_iounit_control(struct MPT3SAS_ADAPTER *ioc,
3786         Mpi2SasIoUnitControlReply_t *mpi_reply,
3787         Mpi2SasIoUnitControlRequest_t *mpi_request)
3788 {
3789         u16 smid;
3790         u32 ioc_state;
3791         unsigned long timeleft;
3792         bool issue_reset = false;
3793         int rc;
3794         void *request;
3795         u16 wait_state_count;
3796
3797         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3798             __func__));
3799
3800         mutex_lock(&ioc->base_cmds.mutex);
3801
3802         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
3803                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
3804                     ioc->name, __func__);
3805                 rc = -EAGAIN;
3806                 goto out;
3807         }
3808
3809         wait_state_count = 0;
3810         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3811         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3812                 if (wait_state_count++ == 10) {
3813                         pr_err(MPT3SAS_FMT
3814                             "%s: failed due to ioc not operational\n",
3815                             ioc->name, __func__);
3816                         rc = -EFAULT;
3817                         goto out;
3818                 }
3819                 ssleep(1);
3820                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3821                 pr_info(MPT3SAS_FMT
3822                         "%s: waiting for operational state(count=%d)\n",
3823                         ioc->name, __func__, wait_state_count);
3824         }
3825
3826         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
3827         if (!smid) {
3828                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
3829                     ioc->name, __func__);
3830                 rc = -EAGAIN;
3831                 goto out;
3832         }
3833
3834         rc = 0;
3835         ioc->base_cmds.status = MPT3_CMD_PENDING;
3836         request = mpt3sas_base_get_msg_frame(ioc, smid);
3837         ioc->base_cmds.smid = smid;
3838         memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
3839         if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3840             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
3841                 ioc->ioc_link_reset_in_progress = 1;
3842         init_completion(&ioc->base_cmds.done);
3843         mpt3sas_base_put_smid_default(ioc, smid);
3844         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3845             msecs_to_jiffies(10000));
3846         if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
3847             mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
3848             ioc->ioc_link_reset_in_progress)
3849                 ioc->ioc_link_reset_in_progress = 0;
3850         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
3851                 pr_err(MPT3SAS_FMT "%s: timeout\n",
3852                     ioc->name, __func__);
3853                 _debug_dump_mf(mpi_request,
3854                     sizeof(Mpi2SasIoUnitControlRequest_t)/4);
3855                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
3856                         issue_reset = true;
3857                 goto issue_host_reset;
3858         }
3859         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
3860                 memcpy(mpi_reply, ioc->base_cmds.reply,
3861                     sizeof(Mpi2SasIoUnitControlReply_t));
3862         else
3863                 memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
3864         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
3865         goto out;
3866
3867  issue_host_reset:
3868         if (issue_reset)
3869                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3870                     FORCE_BIG_HAMMER);
3871         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
3872         rc = -EFAULT;
3873  out:
3874         mutex_unlock(&ioc->base_cmds.mutex);
3875         return rc;
3876 }
3877
3878 /**
3879  * mpt3sas_base_scsi_enclosure_processor - sending request to sep device
3880  * @ioc: per adapter object
3881  * @mpi_reply: the reply payload from FW
3882  * @mpi_request: the request payload sent to FW
3883  *
3884  * The SCSI Enclosure Processor request message causes the IOC to
3885  * communicate with SES devices to control LED status signals.
3886  *
3887  * Returns 0 for success, non-zero for failure.
3888  */
3889 int
3890 mpt3sas_base_scsi_enclosure_processor(struct MPT3SAS_ADAPTER *ioc,
3891         Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
3892 {
3893         u16 smid;
3894         u32 ioc_state;
3895         unsigned long timeleft;
3896         bool issue_reset = false;
3897         int rc;
3898         void *request;
3899         u16 wait_state_count;
3900
3901         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3902             __func__));
3903
3904         mutex_lock(&ioc->base_cmds.mutex);
3905
3906         if (ioc->base_cmds.status != MPT3_CMD_NOT_USED) {
3907                 pr_err(MPT3SAS_FMT "%s: base_cmd in use\n",
3908                     ioc->name, __func__);
3909                 rc = -EAGAIN;
3910                 goto out;
3911         }
3912
3913         wait_state_count = 0;
3914         ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3915         while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
3916                 if (wait_state_count++ == 10) {
3917                         pr_err(MPT3SAS_FMT
3918                             "%s: failed due to ioc not operational\n",
3919                             ioc->name, __func__);
3920                         rc = -EFAULT;
3921                         goto out;
3922                 }
3923                 ssleep(1);
3924                 ioc_state = mpt3sas_base_get_iocstate(ioc, 1);
3925                 pr_info(MPT3SAS_FMT
3926                         "%s: waiting for operational state(count=%d)\n",
3927                         ioc->name,
3928                     __func__, wait_state_count);
3929         }
3930
3931         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
3932         if (!smid) {
3933                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
3934                     ioc->name, __func__);
3935                 rc = -EAGAIN;
3936                 goto out;
3937         }
3938
3939         rc = 0;
3940         ioc->base_cmds.status = MPT3_CMD_PENDING;
3941         request = mpt3sas_base_get_msg_frame(ioc, smid);
3942         ioc->base_cmds.smid = smid;
3943         memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
3944         init_completion(&ioc->base_cmds.done);
3945         mpt3sas_base_put_smid_default(ioc, smid);
3946         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
3947             msecs_to_jiffies(10000));
3948         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
3949                 pr_err(MPT3SAS_FMT "%s: timeout\n",
3950                     ioc->name, __func__);
3951                 _debug_dump_mf(mpi_request,
3952                     sizeof(Mpi2SepRequest_t)/4);
3953                 if (!(ioc->base_cmds.status & MPT3_CMD_RESET))
3954                         issue_reset = false;
3955                 goto issue_host_reset;
3956         }
3957         if (ioc->base_cmds.status & MPT3_CMD_REPLY_VALID)
3958                 memcpy(mpi_reply, ioc->base_cmds.reply,
3959                     sizeof(Mpi2SepReply_t));
3960         else
3961                 memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
3962         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
3963         goto out;
3964
3965  issue_host_reset:
3966         if (issue_reset)
3967                 mpt3sas_base_hard_reset_handler(ioc, CAN_SLEEP,
3968                     FORCE_BIG_HAMMER);
3969         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
3970         rc = -EFAULT;
3971  out:
3972         mutex_unlock(&ioc->base_cmds.mutex);
3973         return rc;
3974 }
3975
3976 /**
3977  * _base_get_port_facts - obtain port facts reply and save in ioc
3978  * @ioc: per adapter object
3979  * @sleep_flag: CAN_SLEEP or NO_SLEEP
3980  *
3981  * Returns 0 for success, non-zero for failure.
3982  */
3983 static int
3984 _base_get_port_facts(struct MPT3SAS_ADAPTER *ioc, int port, int sleep_flag)
3985 {
3986         Mpi2PortFactsRequest_t mpi_request;
3987         Mpi2PortFactsReply_t mpi_reply;
3988         struct mpt3sas_port_facts *pfacts;
3989         int mpi_reply_sz, mpi_request_sz, r;
3990
3991         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
3992             __func__));
3993
3994         mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
3995         mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
3996         memset(&mpi_request, 0, mpi_request_sz);
3997         mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
3998         mpi_request.PortNumber = port;
3999         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4000             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4001
4002         if (r != 0) {
4003                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4004                     ioc->name, __func__, r);
4005                 return r;
4006         }
4007
4008         pfacts = &ioc->pfacts[port];
4009         memset(pfacts, 0, sizeof(struct mpt3sas_port_facts));
4010         pfacts->PortNumber = mpi_reply.PortNumber;
4011         pfacts->VP_ID = mpi_reply.VP_ID;
4012         pfacts->VF_ID = mpi_reply.VF_ID;
4013         pfacts->MaxPostedCmdBuffers =
4014             le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
4015
4016         return 0;
4017 }
4018
4019 /**
4020  * _base_wait_for_iocstate - Wait until the card is in READY or OPERATIONAL
4021  * @ioc: per adapter object
4022  * @timeout:
4023  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4024  *
4025  * Returns 0 for success, non-zero for failure.
4026  */
4027 static int
4028 _base_wait_for_iocstate(struct MPT3SAS_ADAPTER *ioc, int timeout,
4029         int sleep_flag)
4030 {
4031         u32 ioc_state;
4032         int rc;
4033
4034         dinitprintk(ioc, printk(MPT3SAS_FMT "%s\n", ioc->name,
4035             __func__));
4036
4037         if (ioc->pci_error_recovery) {
4038                 dfailprintk(ioc, printk(MPT3SAS_FMT
4039                     "%s: host in pci error recovery\n", ioc->name, __func__));
4040                 return -EFAULT;
4041         }
4042
4043         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4044         dhsprintk(ioc, printk(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4045             ioc->name, __func__, ioc_state));
4046
4047         if (((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY) ||
4048             (ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4049                 return 0;
4050
4051         if (ioc_state & MPI2_DOORBELL_USED) {
4052                 dhsprintk(ioc, printk(MPT3SAS_FMT
4053                     "unexpected doorbell active!\n", ioc->name));
4054                 goto issue_diag_reset;
4055         }
4056
4057         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4058                 mpt3sas_base_fault_info(ioc, ioc_state &
4059                     MPI2_DOORBELL_DATA_MASK);
4060                 goto issue_diag_reset;
4061         }
4062
4063         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
4064             timeout, sleep_flag);
4065         if (ioc_state) {
4066                 dfailprintk(ioc, printk(MPT3SAS_FMT
4067                     "%s: failed going to ready state (ioc_state=0x%x)\n",
4068                     ioc->name, __func__, ioc_state));
4069                 return -EFAULT;
4070         }
4071
4072  issue_diag_reset:
4073         rc = _base_diag_reset(ioc, sleep_flag);
4074         return rc;
4075 }
4076
4077 /**
4078  * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
4079  * @ioc: per adapter object
4080  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4081  *
4082  * Returns 0 for success, non-zero for failure.
4083  */
4084 static int
4085 _base_get_ioc_facts(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4086 {
4087         Mpi2IOCFactsRequest_t mpi_request;
4088         Mpi2IOCFactsReply_t mpi_reply;
4089         struct mpt3sas_facts *facts;
4090         int mpi_reply_sz, mpi_request_sz, r;
4091
4092         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4093             __func__));
4094
4095         r = _base_wait_for_iocstate(ioc, 10, sleep_flag);
4096         if (r) {
4097                 dfailprintk(ioc, printk(MPT3SAS_FMT
4098                     "%s: failed getting to correct state\n",
4099                     ioc->name, __func__));
4100                 return r;
4101         }
4102         mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
4103         mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
4104         memset(&mpi_request, 0, mpi_request_sz);
4105         mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
4106         r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
4107             (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
4108
4109         if (r != 0) {
4110                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4111                     ioc->name, __func__, r);
4112                 return r;
4113         }
4114
4115         facts = &ioc->facts;
4116         memset(facts, 0, sizeof(struct mpt3sas_facts));
4117         facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
4118         facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
4119         facts->VP_ID = mpi_reply.VP_ID;
4120         facts->VF_ID = mpi_reply.VF_ID;
4121         facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
4122         facts->MaxChainDepth = mpi_reply.MaxChainDepth;
4123         facts->WhoInit = mpi_reply.WhoInit;
4124         facts->NumberOfPorts = mpi_reply.NumberOfPorts;
4125         facts->MaxMSIxVectors = mpi_reply.MaxMSIxVectors;
4126         facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
4127         facts->MaxReplyDescriptorPostQueueDepth =
4128             le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
4129         facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
4130         facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
4131         if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
4132                 ioc->ir_firmware = 1;
4133         if ((facts->IOCCapabilities &
4134               MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE))
4135                 ioc->rdpq_array_capable = 1;
4136         facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
4137         facts->IOCRequestFrameSize =
4138             le16_to_cpu(mpi_reply.IOCRequestFrameSize);
4139         facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
4140         facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
4141         ioc->shost->max_id = -1;
4142         facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
4143         facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
4144         facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
4145         facts->HighPriorityCredit =
4146             le16_to_cpu(mpi_reply.HighPriorityCredit);
4147         facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
4148         facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
4149
4150         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4151                 "hba queue depth(%d), max chains per io(%d)\n",
4152                 ioc->name, facts->RequestCredit,
4153             facts->MaxChainDepth));
4154         dinitprintk(ioc, pr_info(MPT3SAS_FMT
4155                 "request frame size(%d), reply frame size(%d)\n", ioc->name,
4156             facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
4157         return 0;
4158 }
4159
4160 /**
4161  * _base_send_ioc_init - send ioc_init to firmware
4162  * @ioc: per adapter object
4163  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4164  *
4165  * Returns 0 for success, non-zero for failure.
4166  */
4167 static int
4168 _base_send_ioc_init(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4169 {
4170         Mpi2IOCInitRequest_t mpi_request;
4171         Mpi2IOCInitReply_t mpi_reply;
4172         int i, r = 0;
4173         struct timeval current_time;
4174         u16 ioc_status;
4175         u32 reply_post_free_array_sz = 0;
4176         Mpi2IOCInitRDPQArrayEntry *reply_post_free_array = NULL;
4177         dma_addr_t reply_post_free_array_dma;
4178
4179         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4180             __func__));
4181
4182         memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
4183         mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
4184         mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
4185         mpi_request.VF_ID = 0; /* TODO */
4186         mpi_request.VP_ID = 0;
4187         mpi_request.MsgVersion = cpu_to_le16(ioc->hba_mpi_version_belonged);
4188         mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
4189
4190         if (_base_is_controller_msix_enabled(ioc))
4191                 mpi_request.HostMSIxVectors = ioc->reply_queue_count;
4192         mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
4193         mpi_request.ReplyDescriptorPostQueueDepth =
4194             cpu_to_le16(ioc->reply_post_queue_depth);
4195         mpi_request.ReplyFreeQueueDepth =
4196             cpu_to_le16(ioc->reply_free_queue_depth);
4197
4198         mpi_request.SenseBufferAddressHigh =
4199             cpu_to_le32((u64)ioc->sense_dma >> 32);
4200         mpi_request.SystemReplyAddressHigh =
4201             cpu_to_le32((u64)ioc->reply_dma >> 32);
4202         mpi_request.SystemRequestFrameBaseAddress =
4203             cpu_to_le64((u64)ioc->request_dma);
4204         mpi_request.ReplyFreeQueueAddress =
4205             cpu_to_le64((u64)ioc->reply_free_dma);
4206
4207         if (ioc->rdpq_array_enable) {
4208                 reply_post_free_array_sz = ioc->reply_queue_count *
4209                     sizeof(Mpi2IOCInitRDPQArrayEntry);
4210                 reply_post_free_array = pci_alloc_consistent(ioc->pdev,
4211                         reply_post_free_array_sz, &reply_post_free_array_dma);
4212                 if (!reply_post_free_array) {
4213                         pr_err(MPT3SAS_FMT
4214                         "reply_post_free_array: pci_alloc_consistent failed\n",
4215                         ioc->name);
4216                         r = -ENOMEM;
4217                         goto out;
4218                 }
4219                 memset(reply_post_free_array, 0, reply_post_free_array_sz);
4220                 for (i = 0; i < ioc->reply_queue_count; i++)
4221                         reply_post_free_array[i].RDPQBaseAddress =
4222                             cpu_to_le64(
4223                                 (u64)ioc->reply_post[i].reply_post_free_dma);
4224                 mpi_request.MsgFlags = MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE;
4225                 mpi_request.ReplyDescriptorPostQueueAddress =
4226                     cpu_to_le64((u64)reply_post_free_array_dma);
4227         } else {
4228                 mpi_request.ReplyDescriptorPostQueueAddress =
4229                     cpu_to_le64((u64)ioc->reply_post[0].reply_post_free_dma);
4230         }
4231
4232         /* This time stamp specifies number of milliseconds
4233          * since epoch ~ midnight January 1, 1970.
4234          */
4235         do_gettimeofday(&current_time);
4236         mpi_request.TimeStamp = cpu_to_le64((u64)current_time.tv_sec * 1000 +
4237             (current_time.tv_usec / 1000));
4238
4239         if (ioc->logging_level & MPT_DEBUG_INIT) {
4240                 __le32 *mfp;
4241                 int i;
4242
4243                 mfp = (__le32 *)&mpi_request;
4244                 pr_info("\toffset:data\n");
4245                 for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
4246                         pr_info("\t[0x%02x]:%08x\n", i*4,
4247                             le32_to_cpu(mfp[i]));
4248         }
4249
4250         r = _base_handshake_req_reply_wait(ioc,
4251             sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
4252             sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
4253             sleep_flag);
4254
4255         if (r != 0) {
4256                 pr_err(MPT3SAS_FMT "%s: handshake failed (r=%d)\n",
4257                     ioc->name, __func__, r);
4258                 goto out;
4259         }
4260
4261         ioc_status = le16_to_cpu(mpi_reply.IOCStatus) & MPI2_IOCSTATUS_MASK;
4262         if (ioc_status != MPI2_IOCSTATUS_SUCCESS ||
4263             mpi_reply.IOCLogInfo) {
4264                 pr_err(MPT3SAS_FMT "%s: failed\n", ioc->name, __func__);
4265                 r = -EIO;
4266         }
4267
4268 out:
4269         if (reply_post_free_array)
4270                 pci_free_consistent(ioc->pdev, reply_post_free_array_sz,
4271                                     reply_post_free_array,
4272                                     reply_post_free_array_dma);
4273         return r;
4274 }
4275
4276 /**
4277  * mpt3sas_port_enable_done - command completion routine for port enable
4278  * @ioc: per adapter object
4279  * @smid: system request message index
4280  * @msix_index: MSIX table index supplied by the OS
4281  * @reply: reply message frame(lower 32bit addr)
4282  *
4283  * Return 1 meaning mf should be freed from _base_interrupt
4284  *        0 means the mf is freed from this function.
4285  */
4286 u8
4287 mpt3sas_port_enable_done(struct MPT3SAS_ADAPTER *ioc, u16 smid, u8 msix_index,
4288         u32 reply)
4289 {
4290         MPI2DefaultReply_t *mpi_reply;
4291         u16 ioc_status;
4292
4293         if (ioc->port_enable_cmds.status == MPT3_CMD_NOT_USED)
4294                 return 1;
4295
4296         mpi_reply = mpt3sas_base_get_reply_virt_addr(ioc, reply);
4297         if (!mpi_reply)
4298                 return 1;
4299
4300         if (mpi_reply->Function != MPI2_FUNCTION_PORT_ENABLE)
4301                 return 1;
4302
4303         ioc->port_enable_cmds.status &= ~MPT3_CMD_PENDING;
4304         ioc->port_enable_cmds.status |= MPT3_CMD_COMPLETE;
4305         ioc->port_enable_cmds.status |= MPT3_CMD_REPLY_VALID;
4306         memcpy(ioc->port_enable_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
4307         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4308         if (ioc_status != MPI2_IOCSTATUS_SUCCESS)
4309                 ioc->port_enable_failed = 1;
4310
4311         if (ioc->is_driver_loading) {
4312                 if (ioc_status == MPI2_IOCSTATUS_SUCCESS) {
4313                         mpt3sas_port_enable_complete(ioc);
4314                         return 1;
4315                 } else {
4316                         ioc->start_scan_failed = ioc_status;
4317                         ioc->start_scan = 0;
4318                         return 1;
4319                 }
4320         }
4321         complete(&ioc->port_enable_cmds.done);
4322         return 1;
4323 }
4324
4325 /**
4326  * _base_send_port_enable - send port_enable(discovery stuff) to firmware
4327  * @ioc: per adapter object
4328  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4329  *
4330  * Returns 0 for success, non-zero for failure.
4331  */
4332 static int
4333 _base_send_port_enable(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4334 {
4335         Mpi2PortEnableRequest_t *mpi_request;
4336         Mpi2PortEnableReply_t *mpi_reply;
4337         unsigned long timeleft;
4338         int r = 0;
4339         u16 smid;
4340         u16 ioc_status;
4341
4342         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4343
4344         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4345                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4346                     ioc->name, __func__);
4347                 return -EAGAIN;
4348         }
4349
4350         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4351         if (!smid) {
4352                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4353                     ioc->name, __func__);
4354                 return -EAGAIN;
4355         }
4356
4357         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4358         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4359         ioc->port_enable_cmds.smid = smid;
4360         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4361         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4362
4363         init_completion(&ioc->port_enable_cmds.done);
4364         mpt3sas_base_put_smid_default(ioc, smid);
4365         timeleft = wait_for_completion_timeout(&ioc->port_enable_cmds.done,
4366             300*HZ);
4367         if (!(ioc->port_enable_cmds.status & MPT3_CMD_COMPLETE)) {
4368                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4369                     ioc->name, __func__);
4370                 _debug_dump_mf(mpi_request,
4371                     sizeof(Mpi2PortEnableRequest_t)/4);
4372                 if (ioc->port_enable_cmds.status & MPT3_CMD_RESET)
4373                         r = -EFAULT;
4374                 else
4375                         r = -ETIME;
4376                 goto out;
4377         }
4378
4379         mpi_reply = ioc->port_enable_cmds.reply;
4380         ioc_status = le16_to_cpu(mpi_reply->IOCStatus) & MPI2_IOCSTATUS_MASK;
4381         if (ioc_status != MPI2_IOCSTATUS_SUCCESS) {
4382                 pr_err(MPT3SAS_FMT "%s: failed with (ioc_status=0x%08x)\n",
4383                     ioc->name, __func__, ioc_status);
4384                 r = -EFAULT;
4385                 goto out;
4386         }
4387
4388  out:
4389         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
4390         pr_info(MPT3SAS_FMT "port enable: %s\n", ioc->name, ((r == 0) ?
4391             "SUCCESS" : "FAILED"));
4392         return r;
4393 }
4394
4395 /**
4396  * mpt3sas_port_enable - initiate firmware discovery (don't wait for reply)
4397  * @ioc: per adapter object
4398  *
4399  * Returns 0 for success, non-zero for failure.
4400  */
4401 int
4402 mpt3sas_port_enable(struct MPT3SAS_ADAPTER *ioc)
4403 {
4404         Mpi2PortEnableRequest_t *mpi_request;
4405         u16 smid;
4406
4407         pr_info(MPT3SAS_FMT "sending port enable !!\n", ioc->name);
4408
4409         if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
4410                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4411                     ioc->name, __func__);
4412                 return -EAGAIN;
4413         }
4414
4415         smid = mpt3sas_base_get_smid(ioc, ioc->port_enable_cb_idx);
4416         if (!smid) {
4417                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4418                     ioc->name, __func__);
4419                 return -EAGAIN;
4420         }
4421
4422         ioc->port_enable_cmds.status = MPT3_CMD_PENDING;
4423         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4424         ioc->port_enable_cmds.smid = smid;
4425         memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
4426         mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
4427
4428         mpt3sas_base_put_smid_default(ioc, smid);
4429         return 0;
4430 }
4431
4432 /**
4433  * _base_determine_wait_on_discovery - desposition
4434  * @ioc: per adapter object
4435  *
4436  * Decide whether to wait on discovery to complete. Used to either
4437  * locate boot device, or report volumes ahead of physical devices.
4438  *
4439  * Returns 1 for wait, 0 for don't wait
4440  */
4441 static int
4442 _base_determine_wait_on_discovery(struct MPT3SAS_ADAPTER *ioc)
4443 {
4444         /* We wait for discovery to complete if IR firmware is loaded.
4445          * The sas topology events arrive before PD events, so we need time to
4446          * turn on the bit in ioc->pd_handles to indicate PD
4447          * Also, it maybe required to report Volumes ahead of physical
4448          * devices when MPI2_IOCPAGE8_IRFLAGS_LOW_VOLUME_MAPPING is set.
4449          */
4450         if (ioc->ir_firmware)
4451                 return 1;
4452
4453         /* if no Bios, then we don't need to wait */
4454         if (!ioc->bios_pg3.BiosVersion)
4455                 return 0;
4456
4457         /* Bios is present, then we drop down here.
4458          *
4459          * If there any entries in the Bios Page 2, then we wait
4460          * for discovery to complete.
4461          */
4462
4463         /* Current Boot Device */
4464         if ((ioc->bios_pg2.CurrentBootDeviceForm &
4465             MPI2_BIOSPAGE2_FORM_MASK) ==
4466             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4467         /* Request Boot Device */
4468            (ioc->bios_pg2.ReqBootDeviceForm &
4469             MPI2_BIOSPAGE2_FORM_MASK) ==
4470             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED &&
4471         /* Alternate Request Boot Device */
4472            (ioc->bios_pg2.ReqAltBootDeviceForm &
4473             MPI2_BIOSPAGE2_FORM_MASK) ==
4474             MPI2_BIOSPAGE2_FORM_NO_DEVICE_SPECIFIED)
4475                 return 0;
4476
4477         return 1;
4478 }
4479
4480 /**
4481  * _base_unmask_events - turn on notification for this event
4482  * @ioc: per adapter object
4483  * @event: firmware event
4484  *
4485  * The mask is stored in ioc->event_masks.
4486  */
4487 static void
4488 _base_unmask_events(struct MPT3SAS_ADAPTER *ioc, u16 event)
4489 {
4490         u32 desired_event;
4491
4492         if (event >= 128)
4493                 return;
4494
4495         desired_event = (1 << (event % 32));
4496
4497         if (event < 32)
4498                 ioc->event_masks[0] &= ~desired_event;
4499         else if (event < 64)
4500                 ioc->event_masks[1] &= ~desired_event;
4501         else if (event < 96)
4502                 ioc->event_masks[2] &= ~desired_event;
4503         else if (event < 128)
4504                 ioc->event_masks[3] &= ~desired_event;
4505 }
4506
4507 /**
4508  * _base_event_notification - send event notification
4509  * @ioc: per adapter object
4510  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4511  *
4512  * Returns 0 for success, non-zero for failure.
4513  */
4514 static int
4515 _base_event_notification(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4516 {
4517         Mpi2EventNotificationRequest_t *mpi_request;
4518         unsigned long timeleft;
4519         u16 smid;
4520         int r = 0;
4521         int i;
4522
4523         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4524             __func__));
4525
4526         if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
4527                 pr_err(MPT3SAS_FMT "%s: internal command already in use\n",
4528                     ioc->name, __func__);
4529                 return -EAGAIN;
4530         }
4531
4532         smid = mpt3sas_base_get_smid(ioc, ioc->base_cb_idx);
4533         if (!smid) {
4534                 pr_err(MPT3SAS_FMT "%s: failed obtaining a smid\n",
4535                     ioc->name, __func__);
4536                 return -EAGAIN;
4537         }
4538         ioc->base_cmds.status = MPT3_CMD_PENDING;
4539         mpi_request = mpt3sas_base_get_msg_frame(ioc, smid);
4540         ioc->base_cmds.smid = smid;
4541         memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
4542         mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
4543         mpi_request->VF_ID = 0; /* TODO */
4544         mpi_request->VP_ID = 0;
4545         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
4546                 mpi_request->EventMasks[i] =
4547                     cpu_to_le32(ioc->event_masks[i]);
4548         init_completion(&ioc->base_cmds.done);
4549         mpt3sas_base_put_smid_default(ioc, smid);
4550         timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
4551         if (!(ioc->base_cmds.status & MPT3_CMD_COMPLETE)) {
4552                 pr_err(MPT3SAS_FMT "%s: timeout\n",
4553                     ioc->name, __func__);
4554                 _debug_dump_mf(mpi_request,
4555                     sizeof(Mpi2EventNotificationRequest_t)/4);
4556                 if (ioc->base_cmds.status & MPT3_CMD_RESET)
4557                         r = -EFAULT;
4558                 else
4559                         r = -ETIME;
4560         } else
4561                 dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s: complete\n",
4562                     ioc->name, __func__));
4563         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
4564         return r;
4565 }
4566
4567 /**
4568  * mpt3sas_base_validate_event_type - validating event types
4569  * @ioc: per adapter object
4570  * @event: firmware event
4571  *
4572  * This will turn on firmware event notification when application
4573  * ask for that event. We don't mask events that are already enabled.
4574  */
4575 void
4576 mpt3sas_base_validate_event_type(struct MPT3SAS_ADAPTER *ioc, u32 *event_type)
4577 {
4578         int i, j;
4579         u32 event_mask, desired_event;
4580         u8 send_update_to_fw;
4581
4582         for (i = 0, send_update_to_fw = 0; i <
4583             MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
4584                 event_mask = ~event_type[i];
4585                 desired_event = 1;
4586                 for (j = 0; j < 32; j++) {
4587                         if (!(event_mask & desired_event) &&
4588                             (ioc->event_masks[i] & desired_event)) {
4589                                 ioc->event_masks[i] &= ~desired_event;
4590                                 send_update_to_fw = 1;
4591                         }
4592                         desired_event = (desired_event << 1);
4593                 }
4594         }
4595
4596         if (!send_update_to_fw)
4597                 return;
4598
4599         mutex_lock(&ioc->base_cmds.mutex);
4600         _base_event_notification(ioc, CAN_SLEEP);
4601         mutex_unlock(&ioc->base_cmds.mutex);
4602 }
4603
4604 /**
4605  * _base_diag_reset - the "big hammer" start of day reset
4606  * @ioc: per adapter object
4607  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4608  *
4609  * Returns 0 for success, non-zero for failure.
4610  */
4611 static int
4612 _base_diag_reset(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4613 {
4614         u32 host_diagnostic;
4615         u32 ioc_state;
4616         u32 count;
4617         u32 hcb_size;
4618
4619         pr_info(MPT3SAS_FMT "sending diag reset !!\n", ioc->name);
4620
4621         drsprintk(ioc, pr_info(MPT3SAS_FMT "clear interrupts\n",
4622             ioc->name));
4623
4624         count = 0;
4625         do {
4626                 /* Write magic sequence to WriteSequence register
4627                  * Loop until in diagnostic mode
4628                  */
4629                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4630                         "write magic sequence\n", ioc->name));
4631                 writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4632                 writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
4633                 writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
4634                 writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
4635                 writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
4636                 writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
4637                 writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
4638
4639                 /* wait 100 msec */
4640                 if (sleep_flag == CAN_SLEEP)
4641                         msleep(100);
4642                 else
4643                         mdelay(100);
4644
4645                 if (count++ > 20)
4646                         goto out;
4647
4648                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4649                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4650                         "wrote magic sequence: count(%d), host_diagnostic(0x%08x)\n",
4651                     ioc->name, count, host_diagnostic));
4652
4653         } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
4654
4655         hcb_size = readl(&ioc->chip->HCBSize);
4656
4657         drsprintk(ioc, pr_info(MPT3SAS_FMT "diag reset: issued\n",
4658             ioc->name));
4659         writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
4660              &ioc->chip->HostDiagnostic);
4661
4662         /*This delay allows the chip PCIe hardware time to finish reset tasks*/
4663         if (sleep_flag == CAN_SLEEP)
4664                 msleep(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4665         else
4666                 mdelay(MPI2_HARD_RESET_PCIE_FIRST_READ_DELAY_MICRO_SEC/1000);
4667
4668         /* Approximately 300 second max wait */
4669         for (count = 0; count < (300000000 /
4670                 MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC); count++) {
4671
4672                 host_diagnostic = readl(&ioc->chip->HostDiagnostic);
4673
4674                 if (host_diagnostic == 0xFFFFFFFF)
4675                         goto out;
4676                 if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
4677                         break;
4678
4679                 /* Wait to pass the second read delay window */
4680                 if (sleep_flag == CAN_SLEEP)
4681                         msleep(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4682                                                                 / 1000);
4683                 else
4684                         mdelay(MPI2_HARD_RESET_PCIE_SECOND_READ_DELAY_MICRO_SEC
4685                                                                 / 1000);
4686         }
4687
4688         if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
4689
4690                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4691                 "restart the adapter assuming the HCB Address points to good F/W\n",
4692                     ioc->name));
4693                 host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
4694                 host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
4695                 writel(host_diagnostic, &ioc->chip->HostDiagnostic);
4696
4697                 drsprintk(ioc, pr_info(MPT3SAS_FMT
4698                     "re-enable the HCDW\n", ioc->name));
4699                 writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
4700                     &ioc->chip->HCBSize);
4701         }
4702
4703         drsprintk(ioc, pr_info(MPT3SAS_FMT "restart the adapter\n",
4704             ioc->name));
4705         writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
4706             &ioc->chip->HostDiagnostic);
4707
4708         drsprintk(ioc, pr_info(MPT3SAS_FMT
4709                 "disable writes to the diagnostic register\n", ioc->name));
4710         writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
4711
4712         drsprintk(ioc, pr_info(MPT3SAS_FMT
4713                 "Wait for FW to go to the READY state\n", ioc->name));
4714         ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
4715             sleep_flag);
4716         if (ioc_state) {
4717                 pr_err(MPT3SAS_FMT
4718                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4719                         ioc->name, __func__, ioc_state);
4720                 goto out;
4721         }
4722
4723         pr_info(MPT3SAS_FMT "diag reset: SUCCESS\n", ioc->name);
4724         return 0;
4725
4726  out:
4727         pr_err(MPT3SAS_FMT "diag reset: FAILED\n", ioc->name);
4728         return -EFAULT;
4729 }
4730
4731 /**
4732  * _base_make_ioc_ready - put controller in READY state
4733  * @ioc: per adapter object
4734  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4735  * @type: FORCE_BIG_HAMMER or SOFT_RESET
4736  *
4737  * Returns 0 for success, non-zero for failure.
4738  */
4739 static int
4740 _base_make_ioc_ready(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
4741         enum reset_type type)
4742 {
4743         u32 ioc_state;
4744         int rc;
4745         int count;
4746
4747         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4748             __func__));
4749
4750         if (ioc->pci_error_recovery)
4751                 return 0;
4752
4753         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4754         dhsprintk(ioc, pr_info(MPT3SAS_FMT "%s: ioc_state(0x%08x)\n",
4755             ioc->name, __func__, ioc_state));
4756
4757         /* if in RESET state, it should move to READY state shortly */
4758         count = 0;
4759         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_RESET) {
4760                 while ((ioc_state & MPI2_IOC_STATE_MASK) !=
4761                     MPI2_IOC_STATE_READY) {
4762                         if (count++ == 10) {
4763                                 pr_err(MPT3SAS_FMT
4764                                         "%s: failed going to ready state (ioc_state=0x%x)\n",
4765                                     ioc->name, __func__, ioc_state);
4766                                 return -EFAULT;
4767                         }
4768                         if (sleep_flag == CAN_SLEEP)
4769                                 ssleep(1);
4770                         else
4771                                 mdelay(1000);
4772                         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
4773                 }
4774         }
4775
4776         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
4777                 return 0;
4778
4779         if (ioc_state & MPI2_DOORBELL_USED) {
4780                 dhsprintk(ioc, pr_info(MPT3SAS_FMT
4781                         "unexpected doorbell active!\n",
4782                         ioc->name));
4783                 goto issue_diag_reset;
4784         }
4785
4786         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
4787                 mpt3sas_base_fault_info(ioc, ioc_state &
4788                     MPI2_DOORBELL_DATA_MASK);
4789                 goto issue_diag_reset;
4790         }
4791
4792         if (type == FORCE_BIG_HAMMER)
4793                 goto issue_diag_reset;
4794
4795         if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
4796                 if (!(_base_send_ioc_reset(ioc,
4797                     MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP))) {
4798                         return 0;
4799         }
4800
4801  issue_diag_reset:
4802         rc = _base_diag_reset(ioc, CAN_SLEEP);
4803         return rc;
4804 }
4805
4806 /**
4807  * _base_make_ioc_operational - put controller in OPERATIONAL state
4808  * @ioc: per adapter object
4809  * @sleep_flag: CAN_SLEEP or NO_SLEEP
4810  *
4811  * Returns 0 for success, non-zero for failure.
4812  */
4813 static int
4814 _base_make_ioc_operational(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
4815 {
4816         int r, i;
4817         unsigned long   flags;
4818         u32 reply_address;
4819         u16 smid;
4820         struct _tr_list *delayed_tr, *delayed_tr_next;
4821         struct adapter_reply_queue *reply_q;
4822         long reply_post_free;
4823         u32 reply_post_free_sz, index = 0;
4824
4825         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4826             __func__));
4827
4828         /* clean the delayed target reset list */
4829         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4830             &ioc->delayed_tr_list, list) {
4831                 list_del(&delayed_tr->list);
4832                 kfree(delayed_tr);
4833         }
4834
4835
4836         list_for_each_entry_safe(delayed_tr, delayed_tr_next,
4837             &ioc->delayed_tr_volume_list, list) {
4838                 list_del(&delayed_tr->list);
4839                 kfree(delayed_tr);
4840         }
4841
4842         /* initialize the scsi lookup free list */
4843         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
4844         INIT_LIST_HEAD(&ioc->free_list);
4845         smid = 1;
4846         for (i = 0; i < ioc->scsiio_depth; i++, smid++) {
4847                 INIT_LIST_HEAD(&ioc->scsi_lookup[i].chain_list);
4848                 ioc->scsi_lookup[i].cb_idx = 0xFF;
4849                 ioc->scsi_lookup[i].smid = smid;
4850                 ioc->scsi_lookup[i].scmd = NULL;
4851                 list_add_tail(&ioc->scsi_lookup[i].tracker_list,
4852                     &ioc->free_list);
4853         }
4854
4855         /* hi-priority queue */
4856         INIT_LIST_HEAD(&ioc->hpr_free_list);
4857         smid = ioc->hi_priority_smid;
4858         for (i = 0; i < ioc->hi_priority_depth; i++, smid++) {
4859                 ioc->hpr_lookup[i].cb_idx = 0xFF;
4860                 ioc->hpr_lookup[i].smid = smid;
4861                 list_add_tail(&ioc->hpr_lookup[i].tracker_list,
4862                     &ioc->hpr_free_list);
4863         }
4864
4865         /* internal queue */
4866         INIT_LIST_HEAD(&ioc->internal_free_list);
4867         smid = ioc->internal_smid;
4868         for (i = 0; i < ioc->internal_depth; i++, smid++) {
4869                 ioc->internal_lookup[i].cb_idx = 0xFF;
4870                 ioc->internal_lookup[i].smid = smid;
4871                 list_add_tail(&ioc->internal_lookup[i].tracker_list,
4872                     &ioc->internal_free_list);
4873         }
4874
4875         /* chain pool */
4876         INIT_LIST_HEAD(&ioc->free_chain_list);
4877         for (i = 0; i < ioc->chain_depth; i++)
4878                 list_add_tail(&ioc->chain_lookup[i].tracker_list,
4879                     &ioc->free_chain_list);
4880
4881         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
4882
4883         /* initialize Reply Free Queue */
4884         for (i = 0, reply_address = (u32)ioc->reply_dma ;
4885             i < ioc->reply_free_queue_depth ; i++, reply_address +=
4886             ioc->reply_sz)
4887                 ioc->reply_free[i] = cpu_to_le32(reply_address);
4888
4889         /* initialize reply queues */
4890         if (ioc->is_driver_loading)
4891                 _base_assign_reply_queues(ioc);
4892
4893         /* initialize Reply Post Free Queue */
4894         reply_post_free_sz = ioc->reply_post_queue_depth *
4895             sizeof(Mpi2DefaultReplyDescriptor_t);
4896         reply_post_free = (long)ioc->reply_post[index].reply_post_free;
4897         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4898                 reply_q->reply_post_host_index = 0;
4899                 reply_q->reply_post_free = (Mpi2ReplyDescriptorsUnion_t *)
4900                     reply_post_free;
4901                 for (i = 0; i < ioc->reply_post_queue_depth; i++)
4902                         reply_q->reply_post_free[i].Words =
4903                             cpu_to_le64(ULLONG_MAX);
4904                 if (!_base_is_controller_msix_enabled(ioc))
4905                         goto skip_init_reply_post_free_queue;
4906                 /*
4907                  * If RDPQ is enabled, switch to the next allocation.
4908                  * Otherwise advance within the contiguous region.
4909                  */
4910                 if (ioc->rdpq_array_enable)
4911                         reply_post_free = (long)
4912                             ioc->reply_post[++index].reply_post_free;
4913                 else
4914                         reply_post_free += reply_post_free_sz;
4915         }
4916  skip_init_reply_post_free_queue:
4917
4918         r = _base_send_ioc_init(ioc, sleep_flag);
4919         if (r)
4920                 return r;
4921
4922         /* initialize reply free host index */
4923         ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
4924         writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
4925
4926         /* initialize reply post host index */
4927         list_for_each_entry(reply_q, &ioc->reply_queue_list, list) {
4928                 if (ioc->msix96_vector)
4929                         writel((reply_q->msix_index & 7)<<
4930                            MPI2_RPHI_MSIX_INDEX_SHIFT,
4931                            ioc->replyPostRegisterIndex[reply_q->msix_index/8]);
4932                 else
4933                         writel(reply_q->msix_index <<
4934                                 MPI2_RPHI_MSIX_INDEX_SHIFT,
4935                                 &ioc->chip->ReplyPostHostIndex);
4936
4937                 if (!_base_is_controller_msix_enabled(ioc))
4938                         goto skip_init_reply_post_host_index;
4939         }
4940
4941  skip_init_reply_post_host_index:
4942
4943         _base_unmask_interrupts(ioc);
4944         r = _base_event_notification(ioc, sleep_flag);
4945         if (r)
4946                 return r;
4947
4948         if (sleep_flag == CAN_SLEEP)
4949                 _base_static_config_pages(ioc);
4950
4951
4952         if (ioc->is_driver_loading) {
4953                 ioc->wait_for_discovery_to_complete =
4954                     _base_determine_wait_on_discovery(ioc);
4955
4956                 return r; /* scan_start and scan_finished support */
4957         }
4958
4959         r = _base_send_port_enable(ioc, sleep_flag);
4960         if (r)
4961                 return r;
4962
4963         return r;
4964 }
4965
4966 /**
4967  * mpt3sas_base_free_resources - free resources controller resources
4968  * @ioc: per adapter object
4969  *
4970  * Return nothing.
4971  */
4972 void
4973 mpt3sas_base_free_resources(struct MPT3SAS_ADAPTER *ioc)
4974 {
4975         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
4976             __func__));
4977
4978         if (ioc->chip_phys && ioc->chip) {
4979                 _base_mask_interrupts(ioc);
4980                 ioc->shost_recovery = 1;
4981                 _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
4982                 ioc->shost_recovery = 0;
4983         }
4984
4985         mpt3sas_base_unmap_resources(ioc);
4986         return;
4987 }
4988
4989 /**
4990  * mpt3sas_base_attach - attach controller instance
4991  * @ioc: per adapter object
4992  *
4993  * Returns 0 for success, non-zero for failure.
4994  */
4995 int
4996 mpt3sas_base_attach(struct MPT3SAS_ADAPTER *ioc)
4997 {
4998         int r, i;
4999         int cpu_id, last_cpu_id = 0;
5000
5001         dinitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5002             __func__));
5003
5004         /* setup cpu_msix_table */
5005         ioc->cpu_count = num_online_cpus();
5006         for_each_online_cpu(cpu_id)
5007                 last_cpu_id = cpu_id;
5008         ioc->cpu_msix_table_sz = last_cpu_id + 1;
5009         ioc->cpu_msix_table = kzalloc(ioc->cpu_msix_table_sz, GFP_KERNEL);
5010         ioc->reply_queue_count = 1;
5011         if (!ioc->cpu_msix_table) {
5012                 dfailprintk(ioc, pr_info(MPT3SAS_FMT
5013                         "allocation for cpu_msix_table failed!!!\n",
5014                         ioc->name));
5015                 r = -ENOMEM;
5016                 goto out_free_resources;
5017         }
5018
5019         ioc->rdpq_array_enable_assigned = 0;
5020         ioc->dma_mask = 0;
5021         r = mpt3sas_base_map_resources(ioc);
5022         if (r)
5023                 goto out_free_resources;
5024
5025
5026         pci_set_drvdata(ioc->pdev, ioc->shost);
5027         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5028         if (r)
5029                 goto out_free_resources;
5030
5031         switch (ioc->hba_mpi_version_belonged) {
5032         case MPI2_VERSION:
5033                 ioc->build_sg_scmd = &_base_build_sg_scmd;
5034                 ioc->build_sg = &_base_build_sg;
5035                 ioc->build_zero_len_sge = &_base_build_zero_len_sge;
5036                 break;
5037         case MPI25_VERSION:
5038                 /*
5039                  * In SAS3.0,
5040                  * SCSI_IO, SMP_PASSTHRU, SATA_PASSTHRU, Target Assist, and
5041                  * Target Status - all require the IEEE formated scatter gather
5042                  * elements.
5043                  */
5044                 ioc->build_sg_scmd = &_base_build_sg_scmd_ieee;
5045                 ioc->build_sg = &_base_build_sg_ieee;
5046                 ioc->build_zero_len_sge = &_base_build_zero_len_sge_ieee;
5047                 ioc->sge_size_ieee = sizeof(Mpi2IeeeSgeSimple64_t);
5048                 break;
5049         }
5050
5051         /*
5052          * These function pointers for other requests that don't
5053          * the require IEEE scatter gather elements.
5054          *
5055          * For example Configuration Pages and SAS IOUNIT Control don't.
5056          */
5057         ioc->build_sg_mpi = &_base_build_sg;
5058         ioc->build_zero_len_sge_mpi = &_base_build_zero_len_sge;
5059
5060         r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
5061         if (r)
5062                 goto out_free_resources;
5063
5064         ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
5065             sizeof(struct mpt3sas_port_facts), GFP_KERNEL);
5066         if (!ioc->pfacts) {
5067                 r = -ENOMEM;
5068                 goto out_free_resources;
5069         }
5070
5071         for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
5072                 r = _base_get_port_facts(ioc, i, CAN_SLEEP);
5073                 if (r)
5074                         goto out_free_resources;
5075         }
5076
5077         r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
5078         if (r)
5079                 goto out_free_resources;
5080
5081         init_waitqueue_head(&ioc->reset_wq);
5082
5083         /* allocate memory pd handle bitmask list */
5084         ioc->pd_handles_sz = (ioc->facts.MaxDevHandle / 8);
5085         if (ioc->facts.MaxDevHandle % 8)
5086                 ioc->pd_handles_sz++;
5087         ioc->pd_handles = kzalloc(ioc->pd_handles_sz,
5088             GFP_KERNEL);
5089         if (!ioc->pd_handles) {
5090                 r = -ENOMEM;
5091                 goto out_free_resources;
5092         }
5093         ioc->blocking_handles = kzalloc(ioc->pd_handles_sz,
5094             GFP_KERNEL);
5095         if (!ioc->blocking_handles) {
5096                 r = -ENOMEM;
5097                 goto out_free_resources;
5098         }
5099
5100         ioc->fwfault_debug = mpt3sas_fwfault_debug;
5101
5102         /* base internal command bits */
5103         mutex_init(&ioc->base_cmds.mutex);
5104         ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5105         ioc->base_cmds.status = MPT3_CMD_NOT_USED;
5106
5107         /* port_enable command bits */
5108         ioc->port_enable_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5109         ioc->port_enable_cmds.status = MPT3_CMD_NOT_USED;
5110
5111         /* transport internal command bits */
5112         ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5113         ioc->transport_cmds.status = MPT3_CMD_NOT_USED;
5114         mutex_init(&ioc->transport_cmds.mutex);
5115
5116         /* scsih internal command bits */
5117         ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5118         ioc->scsih_cmds.status = MPT3_CMD_NOT_USED;
5119         mutex_init(&ioc->scsih_cmds.mutex);
5120
5121         /* task management internal command bits */
5122         ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5123         ioc->tm_cmds.status = MPT3_CMD_NOT_USED;
5124         mutex_init(&ioc->tm_cmds.mutex);
5125
5126         /* config page internal command bits */
5127         ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5128         ioc->config_cmds.status = MPT3_CMD_NOT_USED;
5129         mutex_init(&ioc->config_cmds.mutex);
5130
5131         /* ctl module internal command bits */
5132         ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
5133         ioc->ctl_cmds.sense = kzalloc(SCSI_SENSE_BUFFERSIZE, GFP_KERNEL);
5134         ioc->ctl_cmds.status = MPT3_CMD_NOT_USED;
5135         mutex_init(&ioc->ctl_cmds.mutex);
5136
5137         if (!ioc->base_cmds.reply || !ioc->transport_cmds.reply ||
5138             !ioc->scsih_cmds.reply || !ioc->tm_cmds.reply ||
5139             !ioc->config_cmds.reply || !ioc->ctl_cmds.reply ||
5140             !ioc->ctl_cmds.sense) {
5141                 r = -ENOMEM;
5142                 goto out_free_resources;
5143         }
5144
5145         for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
5146                 ioc->event_masks[i] = -1;
5147
5148         /* here we enable the events we care about */
5149         _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
5150         _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
5151         _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
5152         _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
5153         _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
5154         _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
5155         _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
5156         _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
5157         _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
5158         _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
5159         _base_unmask_events(ioc, MPI2_EVENT_TEMP_THRESHOLD);
5160
5161         r = _base_make_ioc_operational(ioc, CAN_SLEEP);
5162         if (r)
5163                 goto out_free_resources;
5164
5165         return 0;
5166
5167  out_free_resources:
5168
5169         ioc->remove_host = 1;
5170
5171         mpt3sas_base_free_resources(ioc);
5172         _base_release_memory_pools(ioc);
5173         pci_set_drvdata(ioc->pdev, NULL);
5174         kfree(ioc->cpu_msix_table);
5175         kfree(ioc->pd_handles);
5176         kfree(ioc->blocking_handles);
5177         kfree(ioc->tm_cmds.reply);
5178         kfree(ioc->transport_cmds.reply);
5179         kfree(ioc->scsih_cmds.reply);
5180         kfree(ioc->config_cmds.reply);
5181         kfree(ioc->base_cmds.reply);
5182         kfree(ioc->port_enable_cmds.reply);
5183         kfree(ioc->ctl_cmds.reply);
5184         kfree(ioc->ctl_cmds.sense);
5185         kfree(ioc->pfacts);
5186         ioc->ctl_cmds.reply = NULL;
5187         ioc->base_cmds.reply = NULL;
5188         ioc->tm_cmds.reply = NULL;
5189         ioc->scsih_cmds.reply = NULL;
5190         ioc->transport_cmds.reply = NULL;
5191         ioc->config_cmds.reply = NULL;
5192         ioc->pfacts = NULL;
5193         return r;
5194 }
5195
5196
5197 /**
5198  * mpt3sas_base_detach - remove controller instance
5199  * @ioc: per adapter object
5200  *
5201  * Return nothing.
5202  */
5203 void
5204 mpt3sas_base_detach(struct MPT3SAS_ADAPTER *ioc)
5205 {
5206         dexitprintk(ioc, pr_info(MPT3SAS_FMT "%s\n", ioc->name,
5207             __func__));
5208
5209         mpt3sas_base_stop_watchdog(ioc);
5210         mpt3sas_base_free_resources(ioc);
5211         _base_release_memory_pools(ioc);
5212         pci_set_drvdata(ioc->pdev, NULL);
5213         kfree(ioc->cpu_msix_table);
5214         kfree(ioc->pd_handles);
5215         kfree(ioc->blocking_handles);
5216         kfree(ioc->pfacts);
5217         kfree(ioc->ctl_cmds.reply);
5218         kfree(ioc->ctl_cmds.sense);
5219         kfree(ioc->base_cmds.reply);
5220         kfree(ioc->port_enable_cmds.reply);
5221         kfree(ioc->tm_cmds.reply);
5222         kfree(ioc->transport_cmds.reply);
5223         kfree(ioc->scsih_cmds.reply);
5224         kfree(ioc->config_cmds.reply);
5225 }
5226
5227 /**
5228  * _base_reset_handler - reset callback handler (for base)
5229  * @ioc: per adapter object
5230  * @reset_phase: phase
5231  *
5232  * The handler for doing any required cleanup or initialization.
5233  *
5234  * The reset phase can be MPT3_IOC_PRE_RESET, MPT3_IOC_AFTER_RESET,
5235  * MPT3_IOC_DONE_RESET
5236  *
5237  * Return nothing.
5238  */
5239 static void
5240 _base_reset_handler(struct MPT3SAS_ADAPTER *ioc, int reset_phase)
5241 {
5242         mpt3sas_scsih_reset_handler(ioc, reset_phase);
5243         mpt3sas_ctl_reset_handler(ioc, reset_phase);
5244         switch (reset_phase) {
5245         case MPT3_IOC_PRE_RESET:
5246                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5247                 "%s: MPT3_IOC_PRE_RESET\n", ioc->name, __func__));
5248                 break;
5249         case MPT3_IOC_AFTER_RESET:
5250                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5251                 "%s: MPT3_IOC_AFTER_RESET\n", ioc->name, __func__));
5252                 if (ioc->transport_cmds.status & MPT3_CMD_PENDING) {
5253                         ioc->transport_cmds.status |= MPT3_CMD_RESET;
5254                         mpt3sas_base_free_smid(ioc, ioc->transport_cmds.smid);
5255                         complete(&ioc->transport_cmds.done);
5256                 }
5257                 if (ioc->base_cmds.status & MPT3_CMD_PENDING) {
5258                         ioc->base_cmds.status |= MPT3_CMD_RESET;
5259                         mpt3sas_base_free_smid(ioc, ioc->base_cmds.smid);
5260                         complete(&ioc->base_cmds.done);
5261                 }
5262                 if (ioc->port_enable_cmds.status & MPT3_CMD_PENDING) {
5263                         ioc->port_enable_failed = 1;
5264                         ioc->port_enable_cmds.status |= MPT3_CMD_RESET;
5265                         mpt3sas_base_free_smid(ioc, ioc->port_enable_cmds.smid);
5266                         if (ioc->is_driver_loading) {
5267                                 ioc->start_scan_failed =
5268                                     MPI2_IOCSTATUS_INTERNAL_ERROR;
5269                                 ioc->start_scan = 0;
5270                                 ioc->port_enable_cmds.status =
5271                                     MPT3_CMD_NOT_USED;
5272                         } else
5273                                 complete(&ioc->port_enable_cmds.done);
5274                 }
5275                 if (ioc->config_cmds.status & MPT3_CMD_PENDING) {
5276                         ioc->config_cmds.status |= MPT3_CMD_RESET;
5277                         mpt3sas_base_free_smid(ioc, ioc->config_cmds.smid);
5278                         ioc->config_cmds.smid = USHRT_MAX;
5279                         complete(&ioc->config_cmds.done);
5280                 }
5281                 break;
5282         case MPT3_IOC_DONE_RESET:
5283                 dtmprintk(ioc, pr_info(MPT3SAS_FMT
5284                         "%s: MPT3_IOC_DONE_RESET\n", ioc->name, __func__));
5285                 break;
5286         }
5287 }
5288
5289 /**
5290  * _wait_for_commands_to_complete - reset controller
5291  * @ioc: Pointer to MPT_ADAPTER structure
5292  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5293  *
5294  * This function waiting(3s) for all pending commands to complete
5295  * prior to putting controller in reset.
5296  */
5297 static void
5298 _wait_for_commands_to_complete(struct MPT3SAS_ADAPTER *ioc, int sleep_flag)
5299 {
5300         u32 ioc_state;
5301         unsigned long flags;
5302         u16 i;
5303
5304         ioc->pending_io_count = 0;
5305         if (sleep_flag != CAN_SLEEP)
5306                 return;
5307
5308         ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5309         if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
5310                 return;
5311
5312         /* pending command count */
5313         spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
5314         for (i = 0; i < ioc->scsiio_depth; i++)
5315                 if (ioc->scsi_lookup[i].cb_idx != 0xFF)
5316                         ioc->pending_io_count++;
5317         spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
5318
5319         if (!ioc->pending_io_count)
5320                 return;
5321
5322         /* wait for pending commands to complete */
5323         wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 10 * HZ);
5324 }
5325
5326 /**
5327  * mpt3sas_base_hard_reset_handler - reset controller
5328  * @ioc: Pointer to MPT_ADAPTER structure
5329  * @sleep_flag: CAN_SLEEP or NO_SLEEP
5330  * @type: FORCE_BIG_HAMMER or SOFT_RESET
5331  *
5332  * Returns 0 for success, non-zero for failure.
5333  */
5334 int
5335 mpt3sas_base_hard_reset_handler(struct MPT3SAS_ADAPTER *ioc, int sleep_flag,
5336         enum reset_type type)
5337 {
5338         int r;
5339         unsigned long flags;
5340         u32 ioc_state;
5341         u8 is_fault = 0, is_trigger = 0;
5342
5343         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: enter\n", ioc->name,
5344             __func__));
5345
5346         if (ioc->pci_error_recovery) {
5347                 pr_err(MPT3SAS_FMT "%s: pci error recovery reset\n",
5348                     ioc->name, __func__);
5349                 r = 0;
5350                 goto out_unlocked;
5351         }
5352
5353         if (mpt3sas_fwfault_debug)
5354                 mpt3sas_halt_firmware(ioc);
5355
5356         /* TODO - What we really should be doing is pulling
5357          * out all the code associated with NO_SLEEP; its never used.
5358          * That is legacy code from mpt fusion driver, ported over.
5359          * I will leave this BUG_ON here for now till its been resolved.
5360          */
5361         BUG_ON(sleep_flag == NO_SLEEP);
5362
5363         /* wait for an active reset in progress to complete */
5364         if (!mutex_trylock(&ioc->reset_in_progress_mutex)) {
5365                 do {
5366                         ssleep(1);
5367                 } while (ioc->shost_recovery == 1);
5368                 dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5369                     __func__));
5370                 return ioc->ioc_reset_in_progress_status;
5371         }
5372
5373         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5374         ioc->shost_recovery = 1;
5375         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5376
5377         if ((ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5378             MPT3_DIAG_BUFFER_IS_REGISTERED) &&
5379             (!(ioc->diag_buffer_status[MPI2_DIAG_BUF_TYPE_TRACE] &
5380             MPT3_DIAG_BUFFER_IS_RELEASED))) {
5381                 is_trigger = 1;
5382                 ioc_state = mpt3sas_base_get_iocstate(ioc, 0);
5383                 if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
5384                         is_fault = 1;
5385         }
5386         _base_reset_handler(ioc, MPT3_IOC_PRE_RESET);
5387         _wait_for_commands_to_complete(ioc, sleep_flag);
5388         _base_mask_interrupts(ioc);
5389         r = _base_make_ioc_ready(ioc, sleep_flag, type);
5390         if (r)
5391                 goto out;
5392         _base_reset_handler(ioc, MPT3_IOC_AFTER_RESET);
5393
5394         /* If this hard reset is called while port enable is active, then
5395          * there is no reason to call make_ioc_operational
5396          */
5397         if (ioc->is_driver_loading && ioc->port_enable_failed) {
5398                 ioc->remove_host = 1;
5399                 r = -EFAULT;
5400                 goto out;
5401         }
5402         r = _base_get_ioc_facts(ioc, CAN_SLEEP);
5403         if (r)
5404                 goto out;
5405
5406         if (ioc->rdpq_array_enable && !ioc->rdpq_array_capable)
5407                 panic("%s: Issue occurred with flashing controller firmware."
5408                       "Please reboot the system and ensure that the correct"
5409                       " firmware version is running\n", ioc->name);
5410
5411         r = _base_make_ioc_operational(ioc, sleep_flag);
5412         if (!r)
5413                 _base_reset_handler(ioc, MPT3_IOC_DONE_RESET);
5414
5415  out:
5416         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: %s\n",
5417             ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
5418
5419         spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
5420         ioc->ioc_reset_in_progress_status = r;
5421         ioc->shost_recovery = 0;
5422         spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
5423         ioc->ioc_reset_count++;
5424         mutex_unlock(&ioc->reset_in_progress_mutex);
5425
5426  out_unlocked:
5427         if ((r == 0) && is_trigger) {
5428                 if (is_fault)
5429                         mpt3sas_trigger_master(ioc, MASTER_TRIGGER_FW_FAULT);
5430                 else
5431                         mpt3sas_trigger_master(ioc,
5432                             MASTER_TRIGGER_ADAPTER_RESET);
5433         }
5434         dtmprintk(ioc, pr_info(MPT3SAS_FMT "%s: exit\n", ioc->name,
5435             __func__));
5436         return r;
5437 }