2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
11 * You should have received a copy of the GNU General Public License
12 * along with this program. If not, see <http://www.gnu.org/licenses/>.
14 * Copyright (C) 2014 ARM Limited
16 * Author: Will Deacon <will.deacon@arm.com>
19 #include <linux/kernel.h>
20 #include <linux/module.h>
21 #include <linux/of_address.h>
22 #include <linux/of_pci.h>
23 #include <linux/platform_device.h>
25 #include "pci-host-common.h"
27 static void gen_pci_release_of_pci_ranges(struct gen_pci *pci)
29 pci_free_resource_list(&pci->resources);
32 static int gen_pci_parse_request_of_pci_ranges(struct gen_pci *pci)
34 int err, res_valid = 0;
35 struct device *dev = pci->host.dev.parent;
36 struct device_node *np = dev->of_node;
37 resource_size_t iobase;
38 struct resource_entry *win;
40 err = of_pci_get_host_bridge_resources(np, 0, 0xff, &pci->resources,
45 resource_list_for_each_entry(win, &pci->resources) {
46 struct resource *parent, *res = win->res;
48 switch (resource_type(res)) {
50 parent = &ioport_resource;
51 err = pci_remap_iospace(res, iobase);
53 dev_warn(dev, "error %d: failed to map resource %pR\n",
59 parent = &iomem_resource;
60 res_valid |= !(res->flags & IORESOURCE_PREFETCH);
63 pci->cfg.bus_range = res;
68 err = devm_request_resource(dev, parent, res);
74 dev_err(dev, "non-prefetchable memory resource required\n");
82 gen_pci_release_of_pci_ranges(pci);
86 static int gen_pci_parse_map_cfg_windows(struct gen_pci *pci)
91 struct resource *bus_range;
92 struct device *dev = pci->host.dev.parent;
93 struct device_node *np = dev->of_node;
94 u32 sz = 1 << pci->cfg.ops->bus_shift;
96 err = of_address_to_resource(np, 0, &pci->cfg.res);
98 dev_err(dev, "missing \"reg\" property\n");
102 /* Limit the bus-range to fit within reg */
103 bus_max = pci->cfg.bus_range->start +
104 (resource_size(&pci->cfg.res) >> pci->cfg.ops->bus_shift) - 1;
105 pci->cfg.bus_range->end = min_t(resource_size_t,
106 pci->cfg.bus_range->end, bus_max);
108 pci->cfg.win = devm_kcalloc(dev, resource_size(pci->cfg.bus_range),
109 sizeof(*pci->cfg.win), GFP_KERNEL);
113 /* Map our Configuration Space windows */
114 if (!devm_request_mem_region(dev, pci->cfg.res.start,
115 resource_size(&pci->cfg.res),
116 "Configuration Space"))
119 bus_range = pci->cfg.bus_range;
120 for (busn = bus_range->start; busn <= bus_range->end; ++busn) {
121 u32 idx = busn - bus_range->start;
123 pci->cfg.win[idx] = devm_ioremap(dev,
124 pci->cfg.res.start + idx * sz,
126 if (!pci->cfg.win[idx])
133 int pci_host_common_probe(struct platform_device *pdev,
138 struct device *dev = &pdev->dev;
139 struct device_node *np = dev->of_node;
140 struct pci_bus *bus, *child;
142 type = of_get_property(np, "device_type", NULL);
143 if (!type || strcmp(type, "pci")) {
144 dev_err(dev, "invalid \"device_type\" %s\n", type);
148 of_pci_check_probe_only();
150 pci->host.dev.parent = dev;
151 INIT_LIST_HEAD(&pci->host.windows);
152 INIT_LIST_HEAD(&pci->resources);
154 /* Parse our PCI ranges and request their resources */
155 err = gen_pci_parse_request_of_pci_ranges(pci);
159 /* Parse and map our Configuration Space windows */
160 err = gen_pci_parse_map_cfg_windows(pci);
162 gen_pci_release_of_pci_ranges(pci);
166 /* Do not reassign resources if probe only */
167 if (!pci_has_flag(PCI_PROBE_ONLY))
168 pci_add_flags(PCI_REASSIGN_ALL_RSRC | PCI_REASSIGN_ALL_BUS);
171 bus = pci_scan_root_bus(dev, pci->cfg.bus_range->start,
172 &pci->cfg.ops->ops, pci, &pci->resources);
174 dev_err(dev, "Scanning rootbus failed");
178 pci_fixup_irqs(pci_common_swizzle, of_irq_parse_and_map_pci);
180 if (!pci_has_flag(PCI_PROBE_ONLY)) {
181 pci_bus_size_bridges(bus);
182 pci_bus_assign_resources(bus);
184 list_for_each_entry(child, &bus->children, node)
185 pcie_bus_configure_settings(child);
188 pci_bus_add_devices(bus);
192 MODULE_DESCRIPTION("Generic PCI host driver common code");
193 MODULE_AUTHOR("Will Deacon <will.deacon@arm.com>");
194 MODULE_LICENSE("GPL v2");