NVMe: default to 4k device page size
[linux-2.6-block.git] / drivers / nvme / host / pci.c
1 /*
2  * NVM Express device driver
3  * Copyright (c) 2011-2014, Intel Corporation.
4  *
5  * This program is free software; you can redistribute it and/or modify it
6  * under the terms and conditions of the GNU General Public License,
7  * version 2, as published by the Free Software Foundation.
8  *
9  * This program is distributed in the hope it will be useful, but WITHOUT
10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12  * more details.
13  */
14
15 #include <linux/bitops.h>
16 #include <linux/blkdev.h>
17 #include <linux/blk-mq.h>
18 #include <linux/cpu.h>
19 #include <linux/delay.h>
20 #include <linux/errno.h>
21 #include <linux/fs.h>
22 #include <linux/genhd.h>
23 #include <linux/hdreg.h>
24 #include <linux/idr.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/io.h>
28 #include <linux/kdev_t.h>
29 #include <linux/kthread.h>
30 #include <linux/kernel.h>
31 #include <linux/list_sort.h>
32 #include <linux/mm.h>
33 #include <linux/module.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pci.h>
36 #include <linux/poison.h>
37 #include <linux/ptrace.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/t10-pi.h>
41 #include <linux/types.h>
42 #include <linux/pr.h>
43 #include <scsi/sg.h>
44 #include <linux/io-64-nonatomic-lo-hi.h>
45 #include <asm/unaligned.h>
46
47 #include <uapi/linux/nvme_ioctl.h>
48 #include "nvme.h"
49
50 #define NVME_MINORS             (1U << MINORBITS)
51 #define NVME_Q_DEPTH            1024
52 #define NVME_AQ_DEPTH           256
53 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
54 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
55 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
56 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
57
58 static unsigned char admin_timeout = 60;
59 module_param(admin_timeout, byte, 0644);
60 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
61
62 unsigned char nvme_io_timeout = 30;
63 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
64 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
65
66 static unsigned char shutdown_timeout = 5;
67 module_param(shutdown_timeout, byte, 0644);
68 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
69
70 static int nvme_major;
71 module_param(nvme_major, int, 0);
72
73 static int nvme_char_major;
74 module_param(nvme_char_major, int, 0);
75
76 static int use_threaded_interrupts;
77 module_param(use_threaded_interrupts, int, 0);
78
79 static bool use_cmb_sqes = true;
80 module_param(use_cmb_sqes, bool, 0644);
81 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
82
83 static DEFINE_SPINLOCK(dev_list_lock);
84 static LIST_HEAD(dev_list);
85 static struct task_struct *nvme_thread;
86 static struct workqueue_struct *nvme_workq;
87 static wait_queue_head_t nvme_kthread_wait;
88
89 static struct class *nvme_class;
90
91 static int __nvme_reset(struct nvme_dev *dev);
92 static int nvme_reset(struct nvme_dev *dev);
93 static void nvme_process_cq(struct nvme_queue *nvmeq);
94 static void nvme_dead_ctrl(struct nvme_dev *dev);
95
96 struct async_cmd_info {
97         struct kthread_work work;
98         struct kthread_worker *worker;
99         struct request *req;
100         u32 result;
101         int status;
102         void *ctx;
103 };
104
105 /*
106  * An NVM Express queue.  Each device has at least two (one for admin
107  * commands and one for I/O commands).
108  */
109 struct nvme_queue {
110         struct device *q_dmadev;
111         struct nvme_dev *dev;
112         char irqname[24];       /* nvme4294967295-65535\0 */
113         spinlock_t q_lock;
114         struct nvme_command *sq_cmds;
115         struct nvme_command __iomem *sq_cmds_io;
116         volatile struct nvme_completion *cqes;
117         struct blk_mq_tags **tags;
118         dma_addr_t sq_dma_addr;
119         dma_addr_t cq_dma_addr;
120         u32 __iomem *q_db;
121         u16 q_depth;
122         s16 cq_vector;
123         u16 sq_head;
124         u16 sq_tail;
125         u16 cq_head;
126         u16 qid;
127         u8 cq_phase;
128         u8 cqe_seen;
129         struct async_cmd_info cmdinfo;
130 };
131
132 /*
133  * Check we didin't inadvertently grow the command struct
134  */
135 static inline void _nvme_check_size(void)
136 {
137         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
138         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
139         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
140         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
141         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
142         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
143         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
144         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
145         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
146         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
147         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
148         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
149 }
150
151 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
152                                                 struct nvme_completion *);
153
154 struct nvme_cmd_info {
155         nvme_completion_fn fn;
156         void *ctx;
157         int aborted;
158         struct nvme_queue *nvmeq;
159         struct nvme_iod iod[0];
160 };
161
162 /*
163  * Max size of iod being embedded in the request payload
164  */
165 #define NVME_INT_PAGES          2
166 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
167 #define NVME_INT_MASK           0x01
168
169 /*
170  * Will slightly overestimate the number of pages needed.  This is OK
171  * as it only leads to a small amount of wasted memory for the lifetime of
172  * the I/O.
173  */
174 static int nvme_npages(unsigned size, struct nvme_dev *dev)
175 {
176         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
177         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
178 }
179
180 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
181 {
182         unsigned int ret = sizeof(struct nvme_cmd_info);
183
184         ret += sizeof(struct nvme_iod);
185         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
186         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
187
188         return ret;
189 }
190
191 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
192                                 unsigned int hctx_idx)
193 {
194         struct nvme_dev *dev = data;
195         struct nvme_queue *nvmeq = dev->queues[0];
196
197         WARN_ON(hctx_idx != 0);
198         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
199         WARN_ON(nvmeq->tags);
200
201         hctx->driver_data = nvmeq;
202         nvmeq->tags = &dev->admin_tagset.tags[0];
203         return 0;
204 }
205
206 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
207 {
208         struct nvme_queue *nvmeq = hctx->driver_data;
209
210         nvmeq->tags = NULL;
211 }
212
213 static int nvme_admin_init_request(void *data, struct request *req,
214                                 unsigned int hctx_idx, unsigned int rq_idx,
215                                 unsigned int numa_node)
216 {
217         struct nvme_dev *dev = data;
218         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
219         struct nvme_queue *nvmeq = dev->queues[0];
220
221         BUG_ON(!nvmeq);
222         cmd->nvmeq = nvmeq;
223         return 0;
224 }
225
226 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
227                           unsigned int hctx_idx)
228 {
229         struct nvme_dev *dev = data;
230         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
231
232         if (!nvmeq->tags)
233                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
234
235         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
236         hctx->driver_data = nvmeq;
237         return 0;
238 }
239
240 static int nvme_init_request(void *data, struct request *req,
241                                 unsigned int hctx_idx, unsigned int rq_idx,
242                                 unsigned int numa_node)
243 {
244         struct nvme_dev *dev = data;
245         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
246         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
247
248         BUG_ON(!nvmeq);
249         cmd->nvmeq = nvmeq;
250         return 0;
251 }
252
253 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
254                                 nvme_completion_fn handler)
255 {
256         cmd->fn = handler;
257         cmd->ctx = ctx;
258         cmd->aborted = 0;
259         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
260 }
261
262 static void *iod_get_private(struct nvme_iod *iod)
263 {
264         return (void *) (iod->private & ~0x1UL);
265 }
266
267 /*
268  * If bit 0 is set, the iod is embedded in the request payload.
269  */
270 static bool iod_should_kfree(struct nvme_iod *iod)
271 {
272         return (iod->private & NVME_INT_MASK) == 0;
273 }
274
275 /* Special values must be less than 0x1000 */
276 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
277 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
278 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
279 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
280
281 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
282                                                 struct nvme_completion *cqe)
283 {
284         if (ctx == CMD_CTX_CANCELLED)
285                 return;
286         if (ctx == CMD_CTX_COMPLETED) {
287                 dev_warn(nvmeq->q_dmadev,
288                                 "completed id %d twice on queue %d\n",
289                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
290                 return;
291         }
292         if (ctx == CMD_CTX_INVALID) {
293                 dev_warn(nvmeq->q_dmadev,
294                                 "invalid id %d completed on queue %d\n",
295                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
296                 return;
297         }
298         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
299 }
300
301 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
302 {
303         void *ctx;
304
305         if (fn)
306                 *fn = cmd->fn;
307         ctx = cmd->ctx;
308         cmd->fn = special_completion;
309         cmd->ctx = CMD_CTX_CANCELLED;
310         return ctx;
311 }
312
313 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
314                                                 struct nvme_completion *cqe)
315 {
316         u32 result = le32_to_cpup(&cqe->result);
317         u16 status = le16_to_cpup(&cqe->status) >> 1;
318
319         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
320                 ++nvmeq->dev->event_limit;
321         if (status != NVME_SC_SUCCESS)
322                 return;
323
324         switch (result & 0xff07) {
325         case NVME_AER_NOTICE_NS_CHANGED:
326                 dev_info(nvmeq->q_dmadev, "rescanning\n");
327                 schedule_work(&nvmeq->dev->scan_work);
328         default:
329                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
330         }
331 }
332
333 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
334                                                 struct nvme_completion *cqe)
335 {
336         struct request *req = ctx;
337
338         u16 status = le16_to_cpup(&cqe->status) >> 1;
339         u32 result = le32_to_cpup(&cqe->result);
340
341         blk_mq_free_request(req);
342
343         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
344         ++nvmeq->dev->abort_limit;
345 }
346
347 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
348                                                 struct nvme_completion *cqe)
349 {
350         struct async_cmd_info *cmdinfo = ctx;
351         cmdinfo->result = le32_to_cpup(&cqe->result);
352         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
353         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
354         blk_mq_free_request(cmdinfo->req);
355 }
356
357 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
358                                   unsigned int tag)
359 {
360         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
361
362         return blk_mq_rq_to_pdu(req);
363 }
364
365 /*
366  * Called with local interrupts disabled and the q_lock held.  May not sleep.
367  */
368 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
369                                                 nvme_completion_fn *fn)
370 {
371         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
372         void *ctx;
373         if (tag >= nvmeq->q_depth) {
374                 *fn = special_completion;
375                 return CMD_CTX_INVALID;
376         }
377         if (fn)
378                 *fn = cmd->fn;
379         ctx = cmd->ctx;
380         cmd->fn = special_completion;
381         cmd->ctx = CMD_CTX_COMPLETED;
382         return ctx;
383 }
384
385 /**
386  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
387  * @nvmeq: The queue to use
388  * @cmd: The command to send
389  *
390  * Safe to use from interrupt context
391  */
392 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
393                                                 struct nvme_command *cmd)
394 {
395         u16 tail = nvmeq->sq_tail;
396
397         if (nvmeq->sq_cmds_io)
398                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
399         else
400                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
401
402         if (++tail == nvmeq->q_depth)
403                 tail = 0;
404         writel(tail, nvmeq->q_db);
405         nvmeq->sq_tail = tail;
406 }
407
408 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
409 {
410         unsigned long flags;
411         spin_lock_irqsave(&nvmeq->q_lock, flags);
412         __nvme_submit_cmd(nvmeq, cmd);
413         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
414 }
415
416 static __le64 **iod_list(struct nvme_iod *iod)
417 {
418         return ((void *)iod) + iod->offset;
419 }
420
421 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
422                             unsigned nseg, unsigned long private)
423 {
424         iod->private = private;
425         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
426         iod->npages = -1;
427         iod->length = nbytes;
428         iod->nents = 0;
429 }
430
431 static struct nvme_iod *
432 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
433                  unsigned long priv, gfp_t gfp)
434 {
435         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
436                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
437                                 sizeof(struct scatterlist) * nseg, gfp);
438
439         if (iod)
440                 iod_init(iod, bytes, nseg, priv);
441
442         return iod;
443 }
444
445 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
446                                        gfp_t gfp)
447 {
448         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
449                                                 sizeof(struct nvme_dsm_range);
450         struct nvme_iod *iod;
451
452         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
453             size <= NVME_INT_BYTES(dev)) {
454                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
455
456                 iod = cmd->iod;
457                 iod_init(iod, size, rq->nr_phys_segments,
458                                 (unsigned long) rq | NVME_INT_MASK);
459                 return iod;
460         }
461
462         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
463                                 (unsigned long) rq, gfp);
464 }
465
466 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
467 {
468         const int last_prp = dev->page_size / 8 - 1;
469         int i;
470         __le64 **list = iod_list(iod);
471         dma_addr_t prp_dma = iod->first_dma;
472
473         if (iod->npages == 0)
474                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
475         for (i = 0; i < iod->npages; i++) {
476                 __le64 *prp_list = list[i];
477                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
478                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
479                 prp_dma = next_prp_dma;
480         }
481
482         if (iod_should_kfree(iod))
483                 kfree(iod);
484 }
485
486 static int nvme_error_status(u16 status)
487 {
488         switch (status & 0x7ff) {
489         case NVME_SC_SUCCESS:
490                 return 0;
491         case NVME_SC_CAP_EXCEEDED:
492                 return -ENOSPC;
493         default:
494                 return -EIO;
495         }
496 }
497
498 #ifdef CONFIG_BLK_DEV_INTEGRITY
499 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
500 {
501         if (be32_to_cpu(pi->ref_tag) == v)
502                 pi->ref_tag = cpu_to_be32(p);
503 }
504
505 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
506 {
507         if (be32_to_cpu(pi->ref_tag) == p)
508                 pi->ref_tag = cpu_to_be32(v);
509 }
510
511 /**
512  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
513  *
514  * The virtual start sector is the one that was originally submitted by the
515  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
516  * start sector may be different. Remap protection information to match the
517  * physical LBA on writes, and back to the original seed on reads.
518  *
519  * Type 0 and 3 do not have a ref tag, so no remapping required.
520  */
521 static void nvme_dif_remap(struct request *req,
522                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
523 {
524         struct nvme_ns *ns = req->rq_disk->private_data;
525         struct bio_integrity_payload *bip;
526         struct t10_pi_tuple *pi;
527         void *p, *pmap;
528         u32 i, nlb, ts, phys, virt;
529
530         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
531                 return;
532
533         bip = bio_integrity(req->bio);
534         if (!bip)
535                 return;
536
537         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
538
539         p = pmap;
540         virt = bip_get_seed(bip);
541         phys = nvme_block_nr(ns, blk_rq_pos(req));
542         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
543         ts = ns->disk->queue->integrity.tuple_size;
544
545         for (i = 0; i < nlb; i++, virt++, phys++) {
546                 pi = (struct t10_pi_tuple *)p;
547                 dif_swap(phys, virt, pi);
548                 p += ts;
549         }
550         kunmap_atomic(pmap);
551 }
552
553 static void nvme_init_integrity(struct nvme_ns *ns)
554 {
555         struct blk_integrity integrity;
556
557         switch (ns->pi_type) {
558         case NVME_NS_DPS_PI_TYPE3:
559                 integrity.profile = &t10_pi_type3_crc;
560                 break;
561         case NVME_NS_DPS_PI_TYPE1:
562         case NVME_NS_DPS_PI_TYPE2:
563                 integrity.profile = &t10_pi_type1_crc;
564                 break;
565         default:
566                 integrity.profile = NULL;
567                 break;
568         }
569         integrity.tuple_size = ns->ms;
570         blk_integrity_register(ns->disk, &integrity);
571         blk_queue_max_integrity_segments(ns->queue, 1);
572 }
573 #else /* CONFIG_BLK_DEV_INTEGRITY */
574 static void nvme_dif_remap(struct request *req,
575                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
576 {
577 }
578 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
579 {
580 }
581 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
582 {
583 }
584 static void nvme_init_integrity(struct nvme_ns *ns)
585 {
586 }
587 #endif
588
589 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
590                                                 struct nvme_completion *cqe)
591 {
592         struct nvme_iod *iod = ctx;
593         struct request *req = iod_get_private(iod);
594         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
595         u16 status = le16_to_cpup(&cqe->status) >> 1;
596         bool requeue = false;
597         int error = 0;
598
599         if (unlikely(status)) {
600                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
601                     && (jiffies - req->start_time) < req->timeout) {
602                         unsigned long flags;
603
604                         requeue = true;
605                         blk_mq_requeue_request(req);
606                         spin_lock_irqsave(req->q->queue_lock, flags);
607                         if (!blk_queue_stopped(req->q))
608                                 blk_mq_kick_requeue_list(req->q);
609                         spin_unlock_irqrestore(req->q->queue_lock, flags);
610                         goto release_iod;
611                 }
612
613                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
614                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
615                                 error = -EINTR;
616                         else
617                                 error = status;
618                 } else {
619                         error = nvme_error_status(status);
620                 }
621         }
622
623         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
624                 u32 result = le32_to_cpup(&cqe->result);
625                 req->special = (void *)(uintptr_t)result;
626         }
627
628         if (cmd_rq->aborted)
629                 dev_warn(nvmeq->dev->dev,
630                         "completing aborted command with status:%04x\n",
631                         error);
632
633 release_iod:
634         if (iod->nents) {
635                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
636                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
637                 if (blk_integrity_rq(req)) {
638                         if (!rq_data_dir(req))
639                                 nvme_dif_remap(req, nvme_dif_complete);
640                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
641                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
642                 }
643         }
644         nvme_free_iod(nvmeq->dev, iod);
645
646         if (likely(!requeue))
647                 blk_mq_complete_request(req, error);
648 }
649
650 /* length is in bytes.  gfp flags indicates whether we may sleep. */
651 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
652                 int total_len, gfp_t gfp)
653 {
654         struct dma_pool *pool;
655         int length = total_len;
656         struct scatterlist *sg = iod->sg;
657         int dma_len = sg_dma_len(sg);
658         u64 dma_addr = sg_dma_address(sg);
659         u32 page_size = dev->page_size;
660         int offset = dma_addr & (page_size - 1);
661         __le64 *prp_list;
662         __le64 **list = iod_list(iod);
663         dma_addr_t prp_dma;
664         int nprps, i;
665
666         length -= (page_size - offset);
667         if (length <= 0)
668                 return total_len;
669
670         dma_len -= (page_size - offset);
671         if (dma_len) {
672                 dma_addr += (page_size - offset);
673         } else {
674                 sg = sg_next(sg);
675                 dma_addr = sg_dma_address(sg);
676                 dma_len = sg_dma_len(sg);
677         }
678
679         if (length <= page_size) {
680                 iod->first_dma = dma_addr;
681                 return total_len;
682         }
683
684         nprps = DIV_ROUND_UP(length, page_size);
685         if (nprps <= (256 / 8)) {
686                 pool = dev->prp_small_pool;
687                 iod->npages = 0;
688         } else {
689                 pool = dev->prp_page_pool;
690                 iod->npages = 1;
691         }
692
693         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
694         if (!prp_list) {
695                 iod->first_dma = dma_addr;
696                 iod->npages = -1;
697                 return (total_len - length) + page_size;
698         }
699         list[0] = prp_list;
700         iod->first_dma = prp_dma;
701         i = 0;
702         for (;;) {
703                 if (i == page_size >> 3) {
704                         __le64 *old_prp_list = prp_list;
705                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
706                         if (!prp_list)
707                                 return total_len - length;
708                         list[iod->npages++] = prp_list;
709                         prp_list[0] = old_prp_list[i - 1];
710                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
711                         i = 1;
712                 }
713                 prp_list[i++] = cpu_to_le64(dma_addr);
714                 dma_len -= page_size;
715                 dma_addr += page_size;
716                 length -= page_size;
717                 if (length <= 0)
718                         break;
719                 if (dma_len > 0)
720                         continue;
721                 BUG_ON(dma_len < 0);
722                 sg = sg_next(sg);
723                 dma_addr = sg_dma_address(sg);
724                 dma_len = sg_dma_len(sg);
725         }
726
727         return total_len;
728 }
729
730 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
731                 struct nvme_iod *iod)
732 {
733         struct nvme_command cmnd;
734
735         memcpy(&cmnd, req->cmd, sizeof(cmnd));
736         cmnd.rw.command_id = req->tag;
737         if (req->nr_phys_segments) {
738                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
739                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
740         }
741
742         __nvme_submit_cmd(nvmeq, &cmnd);
743 }
744
745 /*
746  * We reuse the small pool to allocate the 16-byte range here as it is not
747  * worth having a special pool for these or additional cases to handle freeing
748  * the iod.
749  */
750 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
751                 struct request *req, struct nvme_iod *iod)
752 {
753         struct nvme_dsm_range *range =
754                                 (struct nvme_dsm_range *)iod_list(iod)[0];
755         struct nvme_command cmnd;
756
757         range->cattr = cpu_to_le32(0);
758         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
759         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
760
761         memset(&cmnd, 0, sizeof(cmnd));
762         cmnd.dsm.opcode = nvme_cmd_dsm;
763         cmnd.dsm.command_id = req->tag;
764         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
765         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
766         cmnd.dsm.nr = 0;
767         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
768
769         __nvme_submit_cmd(nvmeq, &cmnd);
770 }
771
772 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
773                                                                 int cmdid)
774 {
775         struct nvme_command cmnd;
776
777         memset(&cmnd, 0, sizeof(cmnd));
778         cmnd.common.opcode = nvme_cmd_flush;
779         cmnd.common.command_id = cmdid;
780         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
781
782         __nvme_submit_cmd(nvmeq, &cmnd);
783 }
784
785 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
786                                                         struct nvme_ns *ns)
787 {
788         struct request *req = iod_get_private(iod);
789         struct nvme_command cmnd;
790         u16 control = 0;
791         u32 dsmgmt = 0;
792
793         if (req->cmd_flags & REQ_FUA)
794                 control |= NVME_RW_FUA;
795         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
796                 control |= NVME_RW_LR;
797
798         if (req->cmd_flags & REQ_RAHEAD)
799                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
800
801         memset(&cmnd, 0, sizeof(cmnd));
802         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
803         cmnd.rw.command_id = req->tag;
804         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
805         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
806         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
807         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
808         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
809
810         if (ns->ms) {
811                 switch (ns->pi_type) {
812                 case NVME_NS_DPS_PI_TYPE3:
813                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
814                         break;
815                 case NVME_NS_DPS_PI_TYPE1:
816                 case NVME_NS_DPS_PI_TYPE2:
817                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
818                                         NVME_RW_PRINFO_PRCHK_REF;
819                         cmnd.rw.reftag = cpu_to_le32(
820                                         nvme_block_nr(ns, blk_rq_pos(req)));
821                         break;
822                 }
823                 if (blk_integrity_rq(req))
824                         cmnd.rw.metadata =
825                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
826                 else
827                         control |= NVME_RW_PRINFO_PRACT;
828         }
829
830         cmnd.rw.control = cpu_to_le16(control);
831         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
832
833         __nvme_submit_cmd(nvmeq, &cmnd);
834
835         return 0;
836 }
837
838 /*
839  * NOTE: ns is NULL when called on the admin queue.
840  */
841 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
842                          const struct blk_mq_queue_data *bd)
843 {
844         struct nvme_ns *ns = hctx->queue->queuedata;
845         struct nvme_queue *nvmeq = hctx->driver_data;
846         struct nvme_dev *dev = nvmeq->dev;
847         struct request *req = bd->rq;
848         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
849         struct nvme_iod *iod;
850         enum dma_data_direction dma_dir;
851
852         /*
853          * If formated with metadata, require the block layer provide a buffer
854          * unless this namespace is formated such that the metadata can be
855          * stripped/generated by the controller with PRACT=1.
856          */
857         if (ns && ns->ms && !blk_integrity_rq(req)) {
858                 if (!(ns->pi_type && ns->ms == 8) &&
859                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
860                         blk_mq_complete_request(req, -EFAULT);
861                         return BLK_MQ_RQ_QUEUE_OK;
862                 }
863         }
864
865         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
866         if (!iod)
867                 return BLK_MQ_RQ_QUEUE_BUSY;
868
869         if (req->cmd_flags & REQ_DISCARD) {
870                 void *range;
871                 /*
872                  * We reuse the small pool to allocate the 16-byte range here
873                  * as it is not worth having a special pool for these or
874                  * additional cases to handle freeing the iod.
875                  */
876                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
877                                                 &iod->first_dma);
878                 if (!range)
879                         goto retry_cmd;
880                 iod_list(iod)[0] = (__le64 *)range;
881                 iod->npages = 0;
882         } else if (req->nr_phys_segments) {
883                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
884
885                 sg_init_table(iod->sg, req->nr_phys_segments);
886                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
887                 if (!iod->nents)
888                         goto error_cmd;
889
890                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
891                         goto retry_cmd;
892
893                 if (blk_rq_bytes(req) !=
894                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
895                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
896                         goto retry_cmd;
897                 }
898                 if (blk_integrity_rq(req)) {
899                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
900                                 goto error_cmd;
901
902                         sg_init_table(iod->meta_sg, 1);
903                         if (blk_rq_map_integrity_sg(
904                                         req->q, req->bio, iod->meta_sg) != 1)
905                                 goto error_cmd;
906
907                         if (rq_data_dir(req))
908                                 nvme_dif_remap(req, nvme_dif_prep);
909
910                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
911                                 goto error_cmd;
912                 }
913         }
914
915         nvme_set_info(cmd, iod, req_completion);
916         spin_lock_irq(&nvmeq->q_lock);
917         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
918                 nvme_submit_priv(nvmeq, req, iod);
919         else if (req->cmd_flags & REQ_DISCARD)
920                 nvme_submit_discard(nvmeq, ns, req, iod);
921         else if (req->cmd_flags & REQ_FLUSH)
922                 nvme_submit_flush(nvmeq, ns, req->tag);
923         else
924                 nvme_submit_iod(nvmeq, iod, ns);
925
926         nvme_process_cq(nvmeq);
927         spin_unlock_irq(&nvmeq->q_lock);
928         return BLK_MQ_RQ_QUEUE_OK;
929
930  error_cmd:
931         nvme_free_iod(dev, iod);
932         return BLK_MQ_RQ_QUEUE_ERROR;
933  retry_cmd:
934         nvme_free_iod(dev, iod);
935         return BLK_MQ_RQ_QUEUE_BUSY;
936 }
937
938 static void __nvme_process_cq(struct nvme_queue *nvmeq, unsigned int *tag)
939 {
940         u16 head, phase;
941
942         head = nvmeq->cq_head;
943         phase = nvmeq->cq_phase;
944
945         for (;;) {
946                 void *ctx;
947                 nvme_completion_fn fn;
948                 struct nvme_completion cqe = nvmeq->cqes[head];
949                 if ((le16_to_cpu(cqe.status) & 1) != phase)
950                         break;
951                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
952                 if (++head == nvmeq->q_depth) {
953                         head = 0;
954                         phase = !phase;
955                 }
956                 if (tag && *tag == cqe.command_id)
957                         *tag = -1;
958                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
959                 fn(nvmeq, ctx, &cqe);
960         }
961
962         /* If the controller ignores the cq head doorbell and continuously
963          * writes to the queue, it is theoretically possible to wrap around
964          * the queue twice and mistakenly return IRQ_NONE.  Linux only
965          * requires that 0.1% of your interrupts are handled, so this isn't
966          * a big problem.
967          */
968         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
969                 return;
970
971         if (likely(nvmeq->cq_vector >= 0))
972                 writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
973         nvmeq->cq_head = head;
974         nvmeq->cq_phase = phase;
975
976         nvmeq->cqe_seen = 1;
977 }
978
979 static void nvme_process_cq(struct nvme_queue *nvmeq)
980 {
981         __nvme_process_cq(nvmeq, NULL);
982 }
983
984 static irqreturn_t nvme_irq(int irq, void *data)
985 {
986         irqreturn_t result;
987         struct nvme_queue *nvmeq = data;
988         spin_lock(&nvmeq->q_lock);
989         nvme_process_cq(nvmeq);
990         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
991         nvmeq->cqe_seen = 0;
992         spin_unlock(&nvmeq->q_lock);
993         return result;
994 }
995
996 static irqreturn_t nvme_irq_check(int irq, void *data)
997 {
998         struct nvme_queue *nvmeq = data;
999         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
1000         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1001                 return IRQ_NONE;
1002         return IRQ_WAKE_THREAD;
1003 }
1004
1005 static int nvme_poll(struct blk_mq_hw_ctx *hctx, unsigned int tag)
1006 {
1007         struct nvme_queue *nvmeq = hctx->driver_data;
1008
1009         if ((le16_to_cpu(nvmeq->cqes[nvmeq->cq_head].status) & 1) ==
1010             nvmeq->cq_phase) {
1011                 spin_lock_irq(&nvmeq->q_lock);
1012                 __nvme_process_cq(nvmeq, &tag);
1013                 spin_unlock_irq(&nvmeq->q_lock);
1014
1015                 if (tag == -1)
1016                         return 1;
1017         }
1018
1019         return 0;
1020 }
1021
1022 /*
1023  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1024  * if the result is positive, it's an NVM Express status code
1025  */
1026 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1027                 void *buffer, void __user *ubuffer, unsigned bufflen,
1028                 u32 *result, unsigned timeout)
1029 {
1030         bool write = cmd->common.opcode & 1;
1031         struct bio *bio = NULL;
1032         struct request *req;
1033         int ret;
1034
1035         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1036         if (IS_ERR(req))
1037                 return PTR_ERR(req);
1038
1039         req->cmd_type = REQ_TYPE_DRV_PRIV;
1040         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1041         req->__data_len = 0;
1042         req->__sector = (sector_t) -1;
1043         req->bio = req->biotail = NULL;
1044
1045         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1046
1047         req->cmd = (unsigned char *)cmd;
1048         req->cmd_len = sizeof(struct nvme_command);
1049         req->special = (void *)0;
1050
1051         if (buffer && bufflen) {
1052                 ret = blk_rq_map_kern(q, req, buffer, bufflen,
1053                                       __GFP_DIRECT_RECLAIM);
1054                 if (ret)
1055                         goto out;
1056         } else if (ubuffer && bufflen) {
1057                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen,
1058                                       __GFP_DIRECT_RECLAIM);
1059                 if (ret)
1060                         goto out;
1061                 bio = req->bio;
1062         }
1063
1064         blk_execute_rq(req->q, NULL, req, 0);
1065         if (bio)
1066                 blk_rq_unmap_user(bio);
1067         if (result)
1068                 *result = (u32)(uintptr_t)req->special;
1069         ret = req->errors;
1070  out:
1071         blk_mq_free_request(req);
1072         return ret;
1073 }
1074
1075 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1076                 void *buffer, unsigned bufflen)
1077 {
1078         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1079 }
1080
1081 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1082 {
1083         struct nvme_queue *nvmeq = dev->queues[0];
1084         struct nvme_command c;
1085         struct nvme_cmd_info *cmd_info;
1086         struct request *req;
1087
1088         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1089         if (IS_ERR(req))
1090                 return PTR_ERR(req);
1091
1092         req->cmd_flags |= REQ_NO_TIMEOUT;
1093         cmd_info = blk_mq_rq_to_pdu(req);
1094         nvme_set_info(cmd_info, NULL, async_req_completion);
1095
1096         memset(&c, 0, sizeof(c));
1097         c.common.opcode = nvme_admin_async_event;
1098         c.common.command_id = req->tag;
1099
1100         blk_mq_free_request(req);
1101         __nvme_submit_cmd(nvmeq, &c);
1102         return 0;
1103 }
1104
1105 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1106                         struct nvme_command *cmd,
1107                         struct async_cmd_info *cmdinfo, unsigned timeout)
1108 {
1109         struct nvme_queue *nvmeq = dev->queues[0];
1110         struct request *req;
1111         struct nvme_cmd_info *cmd_rq;
1112
1113         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1114         if (IS_ERR(req))
1115                 return PTR_ERR(req);
1116
1117         req->timeout = timeout;
1118         cmd_rq = blk_mq_rq_to_pdu(req);
1119         cmdinfo->req = req;
1120         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1121         cmdinfo->status = -EINTR;
1122
1123         cmd->common.command_id = req->tag;
1124
1125         nvme_submit_cmd(nvmeq, cmd);
1126         return 0;
1127 }
1128
1129 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1130 {
1131         struct nvme_command c;
1132
1133         memset(&c, 0, sizeof(c));
1134         c.delete_queue.opcode = opcode;
1135         c.delete_queue.qid = cpu_to_le16(id);
1136
1137         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1138 }
1139
1140 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1141                                                 struct nvme_queue *nvmeq)
1142 {
1143         struct nvme_command c;
1144         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1145
1146         /*
1147          * Note: we (ab)use the fact the the prp fields survive if no data
1148          * is attached to the request.
1149          */
1150         memset(&c, 0, sizeof(c));
1151         c.create_cq.opcode = nvme_admin_create_cq;
1152         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1153         c.create_cq.cqid = cpu_to_le16(qid);
1154         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1155         c.create_cq.cq_flags = cpu_to_le16(flags);
1156         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1157
1158         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1159 }
1160
1161 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1162                                                 struct nvme_queue *nvmeq)
1163 {
1164         struct nvme_command c;
1165         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1166
1167         /*
1168          * Note: we (ab)use the fact the the prp fields survive if no data
1169          * is attached to the request.
1170          */
1171         memset(&c, 0, sizeof(c));
1172         c.create_sq.opcode = nvme_admin_create_sq;
1173         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1174         c.create_sq.sqid = cpu_to_le16(qid);
1175         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1176         c.create_sq.sq_flags = cpu_to_le16(flags);
1177         c.create_sq.cqid = cpu_to_le16(qid);
1178
1179         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1180 }
1181
1182 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1183 {
1184         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1185 }
1186
1187 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1188 {
1189         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1190 }
1191
1192 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1193 {
1194         struct nvme_command c = { };
1195         int error;
1196
1197         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1198         c.identify.opcode = nvme_admin_identify;
1199         c.identify.cns = cpu_to_le32(1);
1200
1201         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1202         if (!*id)
1203                 return -ENOMEM;
1204
1205         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1206                         sizeof(struct nvme_id_ctrl));
1207         if (error)
1208                 kfree(*id);
1209         return error;
1210 }
1211
1212 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1213                 struct nvme_id_ns **id)
1214 {
1215         struct nvme_command c = { };
1216         int error;
1217
1218         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1219         c.identify.opcode = nvme_admin_identify,
1220         c.identify.nsid = cpu_to_le32(nsid),
1221
1222         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1223         if (!*id)
1224                 return -ENOMEM;
1225
1226         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1227                         sizeof(struct nvme_id_ns));
1228         if (error)
1229                 kfree(*id);
1230         return error;
1231 }
1232
1233 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1234                                         dma_addr_t dma_addr, u32 *result)
1235 {
1236         struct nvme_command c;
1237
1238         memset(&c, 0, sizeof(c));
1239         c.features.opcode = nvme_admin_get_features;
1240         c.features.nsid = cpu_to_le32(nsid);
1241         c.features.prp1 = cpu_to_le64(dma_addr);
1242         c.features.fid = cpu_to_le32(fid);
1243
1244         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1245                         result, 0);
1246 }
1247
1248 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1249                                         dma_addr_t dma_addr, u32 *result)
1250 {
1251         struct nvme_command c;
1252
1253         memset(&c, 0, sizeof(c));
1254         c.features.opcode = nvme_admin_set_features;
1255         c.features.prp1 = cpu_to_le64(dma_addr);
1256         c.features.fid = cpu_to_le32(fid);
1257         c.features.dword11 = cpu_to_le32(dword11);
1258
1259         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1260                         result, 0);
1261 }
1262
1263 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1264 {
1265         struct nvme_command c = { };
1266         int error;
1267
1268         c.common.opcode = nvme_admin_get_log_page,
1269         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1270         c.common.cdw10[0] = cpu_to_le32(
1271                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1272                          NVME_LOG_SMART),
1273
1274         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1275         if (!*log)
1276                 return -ENOMEM;
1277
1278         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1279                         sizeof(struct nvme_smart_log));
1280         if (error)
1281                 kfree(*log);
1282         return error;
1283 }
1284
1285 /**
1286  * nvme_abort_req - Attempt aborting a request
1287  *
1288  * Schedule controller reset if the command was already aborted once before and
1289  * still hasn't been returned to the driver, or if this is the admin queue.
1290  */
1291 static void nvme_abort_req(struct request *req)
1292 {
1293         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1294         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1295         struct nvme_dev *dev = nvmeq->dev;
1296         struct request *abort_req;
1297         struct nvme_cmd_info *abort_cmd;
1298         struct nvme_command cmd;
1299
1300         if (!nvmeq->qid || cmd_rq->aborted) {
1301                 spin_lock(&dev_list_lock);
1302                 if (!__nvme_reset(dev)) {
1303                         dev_warn(dev->dev,
1304                                  "I/O %d QID %d timeout, reset controller\n",
1305                                  req->tag, nvmeq->qid);
1306                 }
1307                 spin_unlock(&dev_list_lock);
1308                 return;
1309         }
1310
1311         if (!dev->abort_limit)
1312                 return;
1313
1314         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1315                                                                         false);
1316         if (IS_ERR(abort_req))
1317                 return;
1318
1319         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1320         nvme_set_info(abort_cmd, abort_req, abort_completion);
1321
1322         memset(&cmd, 0, sizeof(cmd));
1323         cmd.abort.opcode = nvme_admin_abort_cmd;
1324         cmd.abort.cid = req->tag;
1325         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1326         cmd.abort.command_id = abort_req->tag;
1327
1328         --dev->abort_limit;
1329         cmd_rq->aborted = 1;
1330
1331         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1332                                                         nvmeq->qid);
1333         nvme_submit_cmd(dev->queues[0], &cmd);
1334 }
1335
1336 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1337 {
1338         struct nvme_queue *nvmeq = data;
1339         void *ctx;
1340         nvme_completion_fn fn;
1341         struct nvme_cmd_info *cmd;
1342         struct nvme_completion cqe;
1343
1344         if (!blk_mq_request_started(req))
1345                 return;
1346
1347         cmd = blk_mq_rq_to_pdu(req);
1348
1349         if (cmd->ctx == CMD_CTX_CANCELLED)
1350                 return;
1351
1352         if (blk_queue_dying(req->q))
1353                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1354         else
1355                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1356
1357
1358         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1359                                                 req->tag, nvmeq->qid);
1360         ctx = cancel_cmd_info(cmd, &fn);
1361         fn(nvmeq, ctx, &cqe);
1362 }
1363
1364 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1365 {
1366         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1367         struct nvme_queue *nvmeq = cmd->nvmeq;
1368
1369         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1370                                                         nvmeq->qid);
1371         spin_lock_irq(&nvmeq->q_lock);
1372         nvme_abort_req(req);
1373         spin_unlock_irq(&nvmeq->q_lock);
1374
1375         /*
1376          * The aborted req will be completed on receiving the abort req.
1377          * We enable the timer again. If hit twice, it'll cause a device reset,
1378          * as the device then is in a faulty state.
1379          */
1380         return BLK_EH_RESET_TIMER;
1381 }
1382
1383 static void nvme_free_queue(struct nvme_queue *nvmeq)
1384 {
1385         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1386                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1387         if (nvmeq->sq_cmds)
1388                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1389                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1390         kfree(nvmeq);
1391 }
1392
1393 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1394 {
1395         int i;
1396
1397         for (i = dev->queue_count - 1; i >= lowest; i--) {
1398                 struct nvme_queue *nvmeq = dev->queues[i];
1399                 dev->queue_count--;
1400                 dev->queues[i] = NULL;
1401                 nvme_free_queue(nvmeq);
1402         }
1403 }
1404
1405 /**
1406  * nvme_suspend_queue - put queue into suspended state
1407  * @nvmeq - queue to suspend
1408  */
1409 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1410 {
1411         int vector;
1412
1413         spin_lock_irq(&nvmeq->q_lock);
1414         if (nvmeq->cq_vector == -1) {
1415                 spin_unlock_irq(&nvmeq->q_lock);
1416                 return 1;
1417         }
1418         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1419         nvmeq->dev->online_queues--;
1420         nvmeq->cq_vector = -1;
1421         spin_unlock_irq(&nvmeq->q_lock);
1422
1423         if (!nvmeq->qid && nvmeq->dev->admin_q)
1424                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1425
1426         irq_set_affinity_hint(vector, NULL);
1427         free_irq(vector, nvmeq);
1428
1429         return 0;
1430 }
1431
1432 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1433 {
1434         spin_lock_irq(&nvmeq->q_lock);
1435         if (nvmeq->tags && *nvmeq->tags)
1436                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1437         spin_unlock_irq(&nvmeq->q_lock);
1438 }
1439
1440 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1441 {
1442         struct nvme_queue *nvmeq = dev->queues[qid];
1443
1444         if (!nvmeq)
1445                 return;
1446         if (nvme_suspend_queue(nvmeq))
1447                 return;
1448
1449         /* Don't tell the adapter to delete the admin queue.
1450          * Don't tell a removed adapter to delete IO queues. */
1451         if (qid && readl(&dev->bar->csts) != -1) {
1452                 adapter_delete_sq(dev, qid);
1453                 adapter_delete_cq(dev, qid);
1454         }
1455
1456         spin_lock_irq(&nvmeq->q_lock);
1457         nvme_process_cq(nvmeq);
1458         spin_unlock_irq(&nvmeq->q_lock);
1459 }
1460
1461 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1462                                 int entry_size)
1463 {
1464         int q_depth = dev->q_depth;
1465         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1466
1467         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1468                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1469                 mem_per_q = round_down(mem_per_q, dev->page_size);
1470                 q_depth = div_u64(mem_per_q, entry_size);
1471
1472                 /*
1473                  * Ensure the reduced q_depth is above some threshold where it
1474                  * would be better to map queues in system memory with the
1475                  * original depth
1476                  */
1477                 if (q_depth < 64)
1478                         return -ENOMEM;
1479         }
1480
1481         return q_depth;
1482 }
1483
1484 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1485                                 int qid, int depth)
1486 {
1487         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1488                 unsigned offset = (qid - 1) *
1489                                         roundup(SQ_SIZE(depth), dev->page_size);
1490                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1491                 nvmeq->sq_cmds_io = dev->cmb + offset;
1492         } else {
1493                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1494                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1495                 if (!nvmeq->sq_cmds)
1496                         return -ENOMEM;
1497         }
1498
1499         return 0;
1500 }
1501
1502 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1503                                                         int depth)
1504 {
1505         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1506         if (!nvmeq)
1507                 return NULL;
1508
1509         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1510                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1511         if (!nvmeq->cqes)
1512                 goto free_nvmeq;
1513
1514         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1515                 goto free_cqdma;
1516
1517         nvmeq->q_dmadev = dev->dev;
1518         nvmeq->dev = dev;
1519         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1520                         dev->instance, qid);
1521         spin_lock_init(&nvmeq->q_lock);
1522         nvmeq->cq_head = 0;
1523         nvmeq->cq_phase = 1;
1524         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1525         nvmeq->q_depth = depth;
1526         nvmeq->qid = qid;
1527         nvmeq->cq_vector = -1;
1528         dev->queues[qid] = nvmeq;
1529
1530         /* make sure queue descriptor is set before queue count, for kthread */
1531         mb();
1532         dev->queue_count++;
1533
1534         return nvmeq;
1535
1536  free_cqdma:
1537         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1538                                                         nvmeq->cq_dma_addr);
1539  free_nvmeq:
1540         kfree(nvmeq);
1541         return NULL;
1542 }
1543
1544 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1545                                                         const char *name)
1546 {
1547         if (use_threaded_interrupts)
1548                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1549                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1550                                         name, nvmeq);
1551         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1552                                 IRQF_SHARED, name, nvmeq);
1553 }
1554
1555 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1556 {
1557         struct nvme_dev *dev = nvmeq->dev;
1558
1559         spin_lock_irq(&nvmeq->q_lock);
1560         nvmeq->sq_tail = 0;
1561         nvmeq->cq_head = 0;
1562         nvmeq->cq_phase = 1;
1563         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1564         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1565         dev->online_queues++;
1566         spin_unlock_irq(&nvmeq->q_lock);
1567 }
1568
1569 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1570 {
1571         struct nvme_dev *dev = nvmeq->dev;
1572         int result;
1573
1574         nvmeq->cq_vector = qid - 1;
1575         result = adapter_alloc_cq(dev, qid, nvmeq);
1576         if (result < 0)
1577                 return result;
1578
1579         result = adapter_alloc_sq(dev, qid, nvmeq);
1580         if (result < 0)
1581                 goto release_cq;
1582
1583         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1584         if (result < 0)
1585                 goto release_sq;
1586
1587         nvme_init_queue(nvmeq, qid);
1588         return result;
1589
1590  release_sq:
1591         adapter_delete_sq(dev, qid);
1592  release_cq:
1593         adapter_delete_cq(dev, qid);
1594         return result;
1595 }
1596
1597 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1598 {
1599         unsigned long timeout;
1600         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1601
1602         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1603
1604         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1605                 msleep(100);
1606                 if (fatal_signal_pending(current))
1607                         return -EINTR;
1608                 if (time_after(jiffies, timeout)) {
1609                         dev_err(dev->dev,
1610                                 "Device not ready; aborting %s\n", enabled ?
1611                                                 "initialisation" : "reset");
1612                         return -ENODEV;
1613                 }
1614         }
1615
1616         return 0;
1617 }
1618
1619 /*
1620  * If the device has been passed off to us in an enabled state, just clear
1621  * the enabled bit.  The spec says we should set the 'shutdown notification
1622  * bits', but doing so may cause the device to complete commands to the
1623  * admin queue ... and we don't know what memory that might be pointing at!
1624  */
1625 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1626 {
1627         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1628         dev->ctrl_config &= ~NVME_CC_ENABLE;
1629         writel(dev->ctrl_config, &dev->bar->cc);
1630
1631         return nvme_wait_ready(dev, cap, false);
1632 }
1633
1634 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1635 {
1636         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1637         dev->ctrl_config |= NVME_CC_ENABLE;
1638         writel(dev->ctrl_config, &dev->bar->cc);
1639
1640         return nvme_wait_ready(dev, cap, true);
1641 }
1642
1643 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1644 {
1645         unsigned long timeout;
1646
1647         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1648         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1649
1650         writel(dev->ctrl_config, &dev->bar->cc);
1651
1652         timeout = SHUTDOWN_TIMEOUT + jiffies;
1653         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1654                                                         NVME_CSTS_SHST_CMPLT) {
1655                 msleep(100);
1656                 if (fatal_signal_pending(current))
1657                         return -EINTR;
1658                 if (time_after(jiffies, timeout)) {
1659                         dev_err(dev->dev,
1660                                 "Device shutdown incomplete; abort shutdown\n");
1661                         return -ENODEV;
1662                 }
1663         }
1664
1665         return 0;
1666 }
1667
1668 static struct blk_mq_ops nvme_mq_admin_ops = {
1669         .queue_rq       = nvme_queue_rq,
1670         .map_queue      = blk_mq_map_queue,
1671         .init_hctx      = nvme_admin_init_hctx,
1672         .exit_hctx      = nvme_admin_exit_hctx,
1673         .init_request   = nvme_admin_init_request,
1674         .timeout        = nvme_timeout,
1675 };
1676
1677 static struct blk_mq_ops nvme_mq_ops = {
1678         .queue_rq       = nvme_queue_rq,
1679         .map_queue      = blk_mq_map_queue,
1680         .init_hctx      = nvme_init_hctx,
1681         .init_request   = nvme_init_request,
1682         .timeout        = nvme_timeout,
1683         .poll           = nvme_poll,
1684 };
1685
1686 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1687 {
1688         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1689                 blk_cleanup_queue(dev->admin_q);
1690                 blk_mq_free_tag_set(&dev->admin_tagset);
1691         }
1692 }
1693
1694 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1695 {
1696         if (!dev->admin_q) {
1697                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1698                 dev->admin_tagset.nr_hw_queues = 1;
1699                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1700                 dev->admin_tagset.reserved_tags = 1;
1701                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1702                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1703                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1704                 dev->admin_tagset.driver_data = dev;
1705
1706                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1707                         return -ENOMEM;
1708
1709                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1710                 if (IS_ERR(dev->admin_q)) {
1711                         blk_mq_free_tag_set(&dev->admin_tagset);
1712                         return -ENOMEM;
1713                 }
1714                 if (!blk_get_queue(dev->admin_q)) {
1715                         nvme_dev_remove_admin(dev);
1716                         dev->admin_q = NULL;
1717                         return -ENODEV;
1718                 }
1719         } else
1720                 blk_mq_unfreeze_queue(dev->admin_q);
1721
1722         return 0;
1723 }
1724
1725 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1726 {
1727         int result;
1728         u32 aqa;
1729         u64 cap = lo_hi_readq(&dev->bar->cap);
1730         struct nvme_queue *nvmeq;
1731         /*
1732          * default to a 4K page size, with the intention to update this
1733          * path in the future to accomodate architectures with differing
1734          * kernel and IO page sizes.
1735          */
1736         unsigned page_shift = 12;
1737         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1738
1739         if (page_shift < dev_page_min) {
1740                 dev_err(dev->dev,
1741                                 "Minimum device page size (%u) too large for "
1742                                 "host (%u)\n", 1 << dev_page_min,
1743                                 1 << page_shift);
1744                 return -ENODEV;
1745         }
1746
1747         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1748                                                 NVME_CAP_NSSRC(cap) : 0;
1749
1750         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1751                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1752
1753         result = nvme_disable_ctrl(dev, cap);
1754         if (result < 0)
1755                 return result;
1756
1757         nvmeq = dev->queues[0];
1758         if (!nvmeq) {
1759                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1760                 if (!nvmeq)
1761                         return -ENOMEM;
1762         }
1763
1764         aqa = nvmeq->q_depth - 1;
1765         aqa |= aqa << 16;
1766
1767         dev->page_size = 1 << page_shift;
1768
1769         dev->ctrl_config = NVME_CC_CSS_NVM;
1770         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1771         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1772         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1773
1774         writel(aqa, &dev->bar->aqa);
1775         lo_hi_writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1776         lo_hi_writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1777
1778         result = nvme_enable_ctrl(dev, cap);
1779         if (result)
1780                 goto free_nvmeq;
1781
1782         nvmeq->cq_vector = 0;
1783         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1784         if (result) {
1785                 nvmeq->cq_vector = -1;
1786                 goto free_nvmeq;
1787         }
1788
1789         return result;
1790
1791  free_nvmeq:
1792         nvme_free_queues(dev, 0);
1793         return result;
1794 }
1795
1796 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1797 {
1798         struct nvme_dev *dev = ns->dev;
1799         struct nvme_user_io io;
1800         struct nvme_command c;
1801         unsigned length, meta_len;
1802         int status, write;
1803         dma_addr_t meta_dma = 0;
1804         void *meta = NULL;
1805         void __user *metadata;
1806
1807         if (copy_from_user(&io, uio, sizeof(io)))
1808                 return -EFAULT;
1809
1810         switch (io.opcode) {
1811         case nvme_cmd_write:
1812         case nvme_cmd_read:
1813         case nvme_cmd_compare:
1814                 break;
1815         default:
1816                 return -EINVAL;
1817         }
1818
1819         length = (io.nblocks + 1) << ns->lba_shift;
1820         meta_len = (io.nblocks + 1) * ns->ms;
1821         metadata = (void __user *)(uintptr_t)io.metadata;
1822         write = io.opcode & 1;
1823
1824         if (ns->ext) {
1825                 length += meta_len;
1826                 meta_len = 0;
1827         }
1828         if (meta_len) {
1829                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1830                         return -EINVAL;
1831
1832                 meta = dma_alloc_coherent(dev->dev, meta_len,
1833                                                 &meta_dma, GFP_KERNEL);
1834
1835                 if (!meta) {
1836                         status = -ENOMEM;
1837                         goto unmap;
1838                 }
1839                 if (write) {
1840                         if (copy_from_user(meta, metadata, meta_len)) {
1841                                 status = -EFAULT;
1842                                 goto unmap;
1843                         }
1844                 }
1845         }
1846
1847         memset(&c, 0, sizeof(c));
1848         c.rw.opcode = io.opcode;
1849         c.rw.flags = io.flags;
1850         c.rw.nsid = cpu_to_le32(ns->ns_id);
1851         c.rw.slba = cpu_to_le64(io.slba);
1852         c.rw.length = cpu_to_le16(io.nblocks);
1853         c.rw.control = cpu_to_le16(io.control);
1854         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1855         c.rw.reftag = cpu_to_le32(io.reftag);
1856         c.rw.apptag = cpu_to_le16(io.apptag);
1857         c.rw.appmask = cpu_to_le16(io.appmask);
1858         c.rw.metadata = cpu_to_le64(meta_dma);
1859
1860         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1861                         (void __user *)(uintptr_t)io.addr, length, NULL, 0);
1862  unmap:
1863         if (meta) {
1864                 if (status == NVME_SC_SUCCESS && !write) {
1865                         if (copy_to_user(metadata, meta, meta_len))
1866                                 status = -EFAULT;
1867                 }
1868                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1869         }
1870         return status;
1871 }
1872
1873 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1874                         struct nvme_passthru_cmd __user *ucmd)
1875 {
1876         struct nvme_passthru_cmd cmd;
1877         struct nvme_command c;
1878         unsigned timeout = 0;
1879         int status;
1880
1881         if (!capable(CAP_SYS_ADMIN))
1882                 return -EACCES;
1883         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1884                 return -EFAULT;
1885
1886         memset(&c, 0, sizeof(c));
1887         c.common.opcode = cmd.opcode;
1888         c.common.flags = cmd.flags;
1889         c.common.nsid = cpu_to_le32(cmd.nsid);
1890         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1891         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1892         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1893         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1894         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1895         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1896         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1897         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1898
1899         if (cmd.timeout_ms)
1900                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1901
1902         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1903                         NULL, (void __user *)(uintptr_t)cmd.addr, cmd.data_len,
1904                         &cmd.result, timeout);
1905         if (status >= 0) {
1906                 if (put_user(cmd.result, &ucmd->result))
1907                         return -EFAULT;
1908         }
1909
1910         return status;
1911 }
1912
1913 static int nvme_subsys_reset(struct nvme_dev *dev)
1914 {
1915         if (!dev->subsystem)
1916                 return -ENOTTY;
1917
1918         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1919         return 0;
1920 }
1921
1922 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1923                                                         unsigned long arg)
1924 {
1925         struct nvme_ns *ns = bdev->bd_disk->private_data;
1926
1927         switch (cmd) {
1928         case NVME_IOCTL_ID:
1929                 force_successful_syscall_return();
1930                 return ns->ns_id;
1931         case NVME_IOCTL_ADMIN_CMD:
1932                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1933         case NVME_IOCTL_IO_CMD:
1934                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1935         case NVME_IOCTL_SUBMIT_IO:
1936                 return nvme_submit_io(ns, (void __user *)arg);
1937         case SG_GET_VERSION_NUM:
1938                 return nvme_sg_get_version_num((void __user *)arg);
1939         case SG_IO:
1940                 return nvme_sg_io(ns, (void __user *)arg);
1941         default:
1942                 return -ENOTTY;
1943         }
1944 }
1945
1946 #ifdef CONFIG_COMPAT
1947 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1948                                         unsigned int cmd, unsigned long arg)
1949 {
1950         switch (cmd) {
1951         case SG_IO:
1952                 return -ENOIOCTLCMD;
1953         }
1954         return nvme_ioctl(bdev, mode, cmd, arg);
1955 }
1956 #else
1957 #define nvme_compat_ioctl       NULL
1958 #endif
1959
1960 static void nvme_free_dev(struct kref *kref);
1961 static void nvme_free_ns(struct kref *kref)
1962 {
1963         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1964
1965         if (ns->type == NVME_NS_LIGHTNVM)
1966                 nvme_nvm_unregister(ns->queue, ns->disk->disk_name);
1967
1968         spin_lock(&dev_list_lock);
1969         ns->disk->private_data = NULL;
1970         spin_unlock(&dev_list_lock);
1971
1972         kref_put(&ns->dev->kref, nvme_free_dev);
1973         put_disk(ns->disk);
1974         kfree(ns);
1975 }
1976
1977 static int nvme_open(struct block_device *bdev, fmode_t mode)
1978 {
1979         int ret = 0;
1980         struct nvme_ns *ns;
1981
1982         spin_lock(&dev_list_lock);
1983         ns = bdev->bd_disk->private_data;
1984         if (!ns)
1985                 ret = -ENXIO;
1986         else if (!kref_get_unless_zero(&ns->kref))
1987                 ret = -ENXIO;
1988         spin_unlock(&dev_list_lock);
1989
1990         return ret;
1991 }
1992
1993 static void nvme_release(struct gendisk *disk, fmode_t mode)
1994 {
1995         struct nvme_ns *ns = disk->private_data;
1996         kref_put(&ns->kref, nvme_free_ns);
1997 }
1998
1999 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
2000 {
2001         /* some standard values */
2002         geo->heads = 1 << 6;
2003         geo->sectors = 1 << 5;
2004         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
2005         return 0;
2006 }
2007
2008 static void nvme_config_discard(struct nvme_ns *ns)
2009 {
2010         u32 logical_block_size = queue_logical_block_size(ns->queue);
2011         ns->queue->limits.discard_zeroes_data = 0;
2012         ns->queue->limits.discard_alignment = logical_block_size;
2013         ns->queue->limits.discard_granularity = logical_block_size;
2014         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
2015         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
2016 }
2017
2018 static int nvme_revalidate_disk(struct gendisk *disk)
2019 {
2020         struct nvme_ns *ns = disk->private_data;
2021         struct nvme_dev *dev = ns->dev;
2022         struct nvme_id_ns *id;
2023         u8 lbaf, pi_type;
2024         u16 old_ms;
2025         unsigned short bs;
2026
2027         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2028                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2029                                                 dev->instance, ns->ns_id);
2030                 return -ENODEV;
2031         }
2032         if (id->ncap == 0) {
2033                 kfree(id);
2034                 return -ENODEV;
2035         }
2036
2037         if (nvme_nvm_ns_supported(ns, id) && ns->type != NVME_NS_LIGHTNVM) {
2038                 if (nvme_nvm_register(ns->queue, disk->disk_name)) {
2039                         dev_warn(dev->dev,
2040                                 "%s: LightNVM init failure\n", __func__);
2041                         kfree(id);
2042                         return -ENODEV;
2043                 }
2044                 ns->type = NVME_NS_LIGHTNVM;
2045         }
2046
2047         old_ms = ns->ms;
2048         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2049         ns->lba_shift = id->lbaf[lbaf].ds;
2050         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2051         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2052
2053         /*
2054          * If identify namespace failed, use default 512 byte block size so
2055          * block layer can use before failing read/write for 0 capacity.
2056          */
2057         if (ns->lba_shift == 0)
2058                 ns->lba_shift = 9;
2059         bs = 1 << ns->lba_shift;
2060
2061         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2062         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2063                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2064
2065         blk_mq_freeze_queue(disk->queue);
2066         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2067                                 ns->ms != old_ms ||
2068                                 bs != queue_logical_block_size(disk->queue) ||
2069                                 (ns->ms && ns->ext)))
2070                 blk_integrity_unregister(disk);
2071
2072         ns->pi_type = pi_type;
2073         blk_queue_logical_block_size(ns->queue, bs);
2074
2075         if (ns->ms && !ns->ext)
2076                 nvme_init_integrity(ns);
2077
2078         if ((ns->ms && !(ns->ms == 8 && ns->pi_type) &&
2079                                                 !blk_get_integrity(disk)) ||
2080                                                 ns->type == NVME_NS_LIGHTNVM)
2081                 set_capacity(disk, 0);
2082         else
2083                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2084
2085         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2086                 nvme_config_discard(ns);
2087         blk_mq_unfreeze_queue(disk->queue);
2088
2089         kfree(id);
2090         return 0;
2091 }
2092
2093 static char nvme_pr_type(enum pr_type type)
2094 {
2095         switch (type) {
2096         case PR_WRITE_EXCLUSIVE:
2097                 return 1;
2098         case PR_EXCLUSIVE_ACCESS:
2099                 return 2;
2100         case PR_WRITE_EXCLUSIVE_REG_ONLY:
2101                 return 3;
2102         case PR_EXCLUSIVE_ACCESS_REG_ONLY:
2103                 return 4;
2104         case PR_WRITE_EXCLUSIVE_ALL_REGS:
2105                 return 5;
2106         case PR_EXCLUSIVE_ACCESS_ALL_REGS:
2107                 return 6;
2108         default:
2109                 return 0;
2110         }
2111 };
2112
2113 static int nvme_pr_command(struct block_device *bdev, u32 cdw10,
2114                                 u64 key, u64 sa_key, u8 op)
2115 {
2116         struct nvme_ns *ns = bdev->bd_disk->private_data;
2117         struct nvme_command c;
2118         u8 data[16] = { 0, };
2119
2120         put_unaligned_le64(key, &data[0]);
2121         put_unaligned_le64(sa_key, &data[8]);
2122
2123         memset(&c, 0, sizeof(c));
2124         c.common.opcode = op;
2125         c.common.nsid = cpu_to_le32(ns->ns_id);
2126         c.common.cdw10[0] = cpu_to_le32(cdw10);
2127
2128         return nvme_submit_sync_cmd(ns->queue, &c, data, 16);
2129 }
2130
2131 static int nvme_pr_register(struct block_device *bdev, u64 old,
2132                 u64 new, unsigned flags)
2133 {
2134         u32 cdw10;
2135
2136         if (flags & ~PR_FL_IGNORE_KEY)
2137                 return -EOPNOTSUPP;
2138
2139         cdw10 = old ? 2 : 0;
2140         cdw10 |= (flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0;
2141         cdw10 |= (1 << 30) | (1 << 31); /* PTPL=1 */
2142         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_register);
2143 }
2144
2145 static int nvme_pr_reserve(struct block_device *bdev, u64 key,
2146                 enum pr_type type, unsigned flags)
2147 {
2148         u32 cdw10;
2149
2150         if (flags & ~PR_FL_IGNORE_KEY)
2151                 return -EOPNOTSUPP;
2152
2153         cdw10 = nvme_pr_type(type) << 8;
2154         cdw10 |= ((flags & PR_FL_IGNORE_KEY) ? 1 << 3 : 0);
2155         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_acquire);
2156 }
2157
2158 static int nvme_pr_preempt(struct block_device *bdev, u64 old, u64 new,
2159                 enum pr_type type, bool abort)
2160 {
2161         u32 cdw10 = nvme_pr_type(type) << 8 | abort ? 2 : 1;
2162         return nvme_pr_command(bdev, cdw10, old, new, nvme_cmd_resv_acquire);
2163 }
2164
2165 static int nvme_pr_clear(struct block_device *bdev, u64 key)
2166 {
2167         u32 cdw10 = 1 | (key ? 1 << 3 : 0);
2168         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_register);
2169 }
2170
2171 static int nvme_pr_release(struct block_device *bdev, u64 key, enum pr_type type)
2172 {
2173         u32 cdw10 = nvme_pr_type(type) << 8 | key ? 1 << 3 : 0;
2174         return nvme_pr_command(bdev, cdw10, key, 0, nvme_cmd_resv_release);
2175 }
2176
2177 static const struct pr_ops nvme_pr_ops = {
2178         .pr_register    = nvme_pr_register,
2179         .pr_reserve     = nvme_pr_reserve,
2180         .pr_release     = nvme_pr_release,
2181         .pr_preempt     = nvme_pr_preempt,
2182         .pr_clear       = nvme_pr_clear,
2183 };
2184
2185 static const struct block_device_operations nvme_fops = {
2186         .owner          = THIS_MODULE,
2187         .ioctl          = nvme_ioctl,
2188         .compat_ioctl   = nvme_compat_ioctl,
2189         .open           = nvme_open,
2190         .release        = nvme_release,
2191         .getgeo         = nvme_getgeo,
2192         .revalidate_disk= nvme_revalidate_disk,
2193         .pr_ops         = &nvme_pr_ops,
2194 };
2195
2196 static int nvme_kthread(void *data)
2197 {
2198         struct nvme_dev *dev, *next;
2199
2200         while (!kthread_should_stop()) {
2201                 set_current_state(TASK_INTERRUPTIBLE);
2202                 spin_lock(&dev_list_lock);
2203                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2204                         int i;
2205                         u32 csts = readl(&dev->bar->csts);
2206
2207                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2208                                                         csts & NVME_CSTS_CFS) {
2209                                 if (!__nvme_reset(dev)) {
2210                                         dev_warn(dev->dev,
2211                                                 "Failed status: %x, reset controller\n",
2212                                                 readl(&dev->bar->csts));
2213                                 }
2214                                 continue;
2215                         }
2216                         for (i = 0; i < dev->queue_count; i++) {
2217                                 struct nvme_queue *nvmeq = dev->queues[i];
2218                                 if (!nvmeq)
2219                                         continue;
2220                                 spin_lock_irq(&nvmeq->q_lock);
2221                                 nvme_process_cq(nvmeq);
2222
2223                                 while ((i == 0) && (dev->event_limit > 0)) {
2224                                         if (nvme_submit_async_admin_req(dev))
2225                                                 break;
2226                                         dev->event_limit--;
2227                                 }
2228                                 spin_unlock_irq(&nvmeq->q_lock);
2229                         }
2230                 }
2231                 spin_unlock(&dev_list_lock);
2232                 schedule_timeout(round_jiffies_relative(HZ));
2233         }
2234         return 0;
2235 }
2236
2237 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2238 {
2239         struct nvme_ns *ns;
2240         struct gendisk *disk;
2241         int node = dev_to_node(dev->dev);
2242
2243         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2244         if (!ns)
2245                 return;
2246
2247         ns->queue = blk_mq_init_queue(&dev->tagset);
2248         if (IS_ERR(ns->queue))
2249                 goto out_free_ns;
2250         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2251         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2252         ns->dev = dev;
2253         ns->queue->queuedata = ns;
2254
2255         disk = alloc_disk_node(0, node);
2256         if (!disk)
2257                 goto out_free_queue;
2258
2259         kref_init(&ns->kref);
2260         ns->ns_id = nsid;
2261         ns->disk = disk;
2262         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2263         list_add_tail(&ns->list, &dev->namespaces);
2264
2265         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2266         if (dev->max_hw_sectors) {
2267                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2268                 blk_queue_max_segments(ns->queue,
2269                         (dev->max_hw_sectors / (dev->page_size >> 9)) + 1);
2270         }
2271         if (dev->stripe_size)
2272                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2273         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2274                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2275         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2276
2277         disk->major = nvme_major;
2278         disk->first_minor = 0;
2279         disk->fops = &nvme_fops;
2280         disk->private_data = ns;
2281         disk->queue = ns->queue;
2282         disk->driverfs_dev = dev->device;
2283         disk->flags = GENHD_FL_EXT_DEVT;
2284         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2285
2286         /*
2287          * Initialize capacity to 0 until we establish the namespace format and
2288          * setup integrity extentions if necessary. The revalidate_disk after
2289          * add_disk allows the driver to register with integrity if the format
2290          * requires it.
2291          */
2292         set_capacity(disk, 0);
2293         if (nvme_revalidate_disk(ns->disk))
2294                 goto out_free_disk;
2295
2296         kref_get(&dev->kref);
2297         if (ns->type != NVME_NS_LIGHTNVM) {
2298                 add_disk(ns->disk);
2299                 if (ns->ms) {
2300                         struct block_device *bd = bdget_disk(ns->disk, 0);
2301                         if (!bd)
2302                                 return;
2303                         if (blkdev_get(bd, FMODE_READ, NULL)) {
2304                                 bdput(bd);
2305                                 return;
2306                         }
2307                         blkdev_reread_part(bd);
2308                         blkdev_put(bd, FMODE_READ);
2309                 }
2310         }
2311         return;
2312  out_free_disk:
2313         kfree(disk);
2314         list_del(&ns->list);
2315  out_free_queue:
2316         blk_cleanup_queue(ns->queue);
2317  out_free_ns:
2318         kfree(ns);
2319 }
2320
2321 /*
2322  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2323  * we can continue with less than the desired amount of queues, and
2324  * even a controller without I/O queues an still be used to issue
2325  * admin commands.  This might be useful to upgrade a buggy firmware
2326  * for example.
2327  */
2328 static void nvme_create_io_queues(struct nvme_dev *dev)
2329 {
2330         unsigned i;
2331
2332         for (i = dev->queue_count; i <= dev->max_qid; i++)
2333                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2334                         break;
2335
2336         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2337                 if (nvme_create_queue(dev->queues[i], i)) {
2338                         nvme_free_queues(dev, i);
2339                         break;
2340                 }
2341 }
2342
2343 static int set_queue_count(struct nvme_dev *dev, int count)
2344 {
2345         int status;
2346         u32 result;
2347         u32 q_count = (count - 1) | ((count - 1) << 16);
2348
2349         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2350                                                                 &result);
2351         if (status < 0)
2352                 return status;
2353         if (status > 0) {
2354                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2355                 return 0;
2356         }
2357         return min(result & 0xffff, result >> 16) + 1;
2358 }
2359
2360 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2361 {
2362         u64 szu, size, offset;
2363         u32 cmbloc;
2364         resource_size_t bar_size;
2365         struct pci_dev *pdev = to_pci_dev(dev->dev);
2366         void __iomem *cmb;
2367         dma_addr_t dma_addr;
2368
2369         if (!use_cmb_sqes)
2370                 return NULL;
2371
2372         dev->cmbsz = readl(&dev->bar->cmbsz);
2373         if (!(NVME_CMB_SZ(dev->cmbsz)))
2374                 return NULL;
2375
2376         cmbloc = readl(&dev->bar->cmbloc);
2377
2378         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2379         size = szu * NVME_CMB_SZ(dev->cmbsz);
2380         offset = szu * NVME_CMB_OFST(cmbloc);
2381         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2382
2383         if (offset > bar_size)
2384                 return NULL;
2385
2386         /*
2387          * Controllers may support a CMB size larger than their BAR,
2388          * for example, due to being behind a bridge. Reduce the CMB to
2389          * the reported size of the BAR
2390          */
2391         if (size > bar_size - offset)
2392                 size = bar_size - offset;
2393
2394         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2395         cmb = ioremap_wc(dma_addr, size);
2396         if (!cmb)
2397                 return NULL;
2398
2399         dev->cmb_dma_addr = dma_addr;
2400         dev->cmb_size = size;
2401         return cmb;
2402 }
2403
2404 static inline void nvme_release_cmb(struct nvme_dev *dev)
2405 {
2406         if (dev->cmb) {
2407                 iounmap(dev->cmb);
2408                 dev->cmb = NULL;
2409         }
2410 }
2411
2412 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2413 {
2414         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2415 }
2416
2417 static int nvme_setup_io_queues(struct nvme_dev *dev)
2418 {
2419         struct nvme_queue *adminq = dev->queues[0];
2420         struct pci_dev *pdev = to_pci_dev(dev->dev);
2421         int result, i, vecs, nr_io_queues, size;
2422
2423         nr_io_queues = num_possible_cpus();
2424         result = set_queue_count(dev, nr_io_queues);
2425         if (result <= 0)
2426                 return result;
2427         if (result < nr_io_queues)
2428                 nr_io_queues = result;
2429
2430         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2431                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2432                                 sizeof(struct nvme_command));
2433                 if (result > 0)
2434                         dev->q_depth = result;
2435                 else
2436                         nvme_release_cmb(dev);
2437         }
2438
2439         size = db_bar_size(dev, nr_io_queues);
2440         if (size > 8192) {
2441                 iounmap(dev->bar);
2442                 do {
2443                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2444                         if (dev->bar)
2445                                 break;
2446                         if (!--nr_io_queues)
2447                                 return -ENOMEM;
2448                         size = db_bar_size(dev, nr_io_queues);
2449                 } while (1);
2450                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2451                 adminq->q_db = dev->dbs;
2452         }
2453
2454         /* Deregister the admin queue's interrupt */
2455         free_irq(dev->entry[0].vector, adminq);
2456
2457         /*
2458          * If we enable msix early due to not intx, disable it again before
2459          * setting up the full range we need.
2460          */
2461         if (!pdev->irq)
2462                 pci_disable_msix(pdev);
2463
2464         for (i = 0; i < nr_io_queues; i++)
2465                 dev->entry[i].entry = i;
2466         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2467         if (vecs < 0) {
2468                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2469                 if (vecs < 0) {
2470                         vecs = 1;
2471                 } else {
2472                         for (i = 0; i < vecs; i++)
2473                                 dev->entry[i].vector = i + pdev->irq;
2474                 }
2475         }
2476
2477         /*
2478          * Should investigate if there's a performance win from allocating
2479          * more queues than interrupt vectors; it might allow the submission
2480          * path to scale better, even if the receive path is limited by the
2481          * number of interrupts.
2482          */
2483         nr_io_queues = vecs;
2484         dev->max_qid = nr_io_queues;
2485
2486         result = queue_request_irq(dev, adminq, adminq->irqname);
2487         if (result) {
2488                 adminq->cq_vector = -1;
2489                 goto free_queues;
2490         }
2491
2492         /* Free previously allocated queues that are no longer usable */
2493         nvme_free_queues(dev, nr_io_queues + 1);
2494         nvme_create_io_queues(dev);
2495
2496         return 0;
2497
2498  free_queues:
2499         nvme_free_queues(dev, 1);
2500         return result;
2501 }
2502
2503 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2504 {
2505         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2506         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2507
2508         return nsa->ns_id - nsb->ns_id;
2509 }
2510
2511 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2512 {
2513         struct nvme_ns *ns;
2514
2515         list_for_each_entry(ns, &dev->namespaces, list) {
2516                 if (ns->ns_id == nsid)
2517                         return ns;
2518                 if (ns->ns_id > nsid)
2519                         break;
2520         }
2521         return NULL;
2522 }
2523
2524 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2525 {
2526         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2527                                                         dev->online_queues < 2);
2528 }
2529
2530 static void nvme_ns_remove(struct nvme_ns *ns)
2531 {
2532         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2533
2534         if (kill)
2535                 blk_set_queue_dying(ns->queue);
2536         if (ns->disk->flags & GENHD_FL_UP)
2537                 del_gendisk(ns->disk);
2538         if (kill || !blk_queue_dying(ns->queue)) {
2539                 blk_mq_abort_requeue_list(ns->queue);
2540                 blk_cleanup_queue(ns->queue);
2541         }
2542         list_del_init(&ns->list);
2543         kref_put(&ns->kref, nvme_free_ns);
2544 }
2545
2546 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2547 {
2548         struct nvme_ns *ns, *next;
2549         unsigned i;
2550
2551         for (i = 1; i <= nn; i++) {
2552                 ns = nvme_find_ns(dev, i);
2553                 if (ns) {
2554                         if (revalidate_disk(ns->disk))
2555                                 nvme_ns_remove(ns);
2556                 } else
2557                         nvme_alloc_ns(dev, i);
2558         }
2559         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2560                 if (ns->ns_id > nn)
2561                         nvme_ns_remove(ns);
2562         }
2563         list_sort(NULL, &dev->namespaces, ns_cmp);
2564 }
2565
2566 static void nvme_set_irq_hints(struct nvme_dev *dev)
2567 {
2568         struct nvme_queue *nvmeq;
2569         int i;
2570
2571         for (i = 0; i < dev->online_queues; i++) {
2572                 nvmeq = dev->queues[i];
2573
2574                 if (!nvmeq->tags || !(*nvmeq->tags))
2575                         continue;
2576
2577                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2578                                         blk_mq_tags_cpumask(*nvmeq->tags));
2579         }
2580 }
2581
2582 static void nvme_dev_scan(struct work_struct *work)
2583 {
2584         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2585         struct nvme_id_ctrl *ctrl;
2586
2587         if (!dev->tagset.tags)
2588                 return;
2589         if (nvme_identify_ctrl(dev, &ctrl))
2590                 return;
2591         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2592         kfree(ctrl);
2593         nvme_set_irq_hints(dev);
2594 }
2595
2596 /*
2597  * Return: error value if an error occurred setting up the queues or calling
2598  * Identify Device.  0 if these succeeded, even if adding some of the
2599  * namespaces failed.  At the moment, these failures are silent.  TBD which
2600  * failures should be reported.
2601  */
2602 static int nvme_dev_add(struct nvme_dev *dev)
2603 {
2604         struct pci_dev *pdev = to_pci_dev(dev->dev);
2605         int res;
2606         struct nvme_id_ctrl *ctrl;
2607         int shift = NVME_CAP_MPSMIN(lo_hi_readq(&dev->bar->cap)) + 12;
2608
2609         res = nvme_identify_ctrl(dev, &ctrl);
2610         if (res) {
2611                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2612                 return -EIO;
2613         }
2614
2615         dev->oncs = le16_to_cpup(&ctrl->oncs);
2616         dev->abort_limit = ctrl->acl + 1;
2617         dev->vwc = ctrl->vwc;
2618         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2619         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2620         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2621         if (ctrl->mdts)
2622                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2623         else
2624                 dev->max_hw_sectors = UINT_MAX;
2625         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2626                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2627                 unsigned int max_hw_sectors;
2628
2629                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2630                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2631                 if (dev->max_hw_sectors) {
2632                         dev->max_hw_sectors = min(max_hw_sectors,
2633                                                         dev->max_hw_sectors);
2634                 } else
2635                         dev->max_hw_sectors = max_hw_sectors;
2636         }
2637         kfree(ctrl);
2638
2639         if (!dev->tagset.tags) {
2640                 dev->tagset.ops = &nvme_mq_ops;
2641                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2642                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2643                 dev->tagset.numa_node = dev_to_node(dev->dev);
2644                 dev->tagset.queue_depth =
2645                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2646                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2647                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2648                 dev->tagset.driver_data = dev;
2649
2650                 if (blk_mq_alloc_tag_set(&dev->tagset))
2651                         return 0;
2652         }
2653         schedule_work(&dev->scan_work);
2654         return 0;
2655 }
2656
2657 static int nvme_dev_map(struct nvme_dev *dev)
2658 {
2659         u64 cap;
2660         int bars, result = -ENOMEM;
2661         struct pci_dev *pdev = to_pci_dev(dev->dev);
2662
2663         if (pci_enable_device_mem(pdev))
2664                 return result;
2665
2666         dev->entry[0].vector = pdev->irq;
2667         pci_set_master(pdev);
2668         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2669         if (!bars)
2670                 goto disable_pci;
2671
2672         if (pci_request_selected_regions(pdev, bars, "nvme"))
2673                 goto disable_pci;
2674
2675         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2676             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2677                 goto disable;
2678
2679         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2680         if (!dev->bar)
2681                 goto disable;
2682
2683         if (readl(&dev->bar->csts) == -1) {
2684                 result = -ENODEV;
2685                 goto unmap;
2686         }
2687
2688         /*
2689          * Some devices don't advertse INTx interrupts, pre-enable a single
2690          * MSIX vec for setup. We'll adjust this later.
2691          */
2692         if (!pdev->irq) {
2693                 result = pci_enable_msix(pdev, dev->entry, 1);
2694                 if (result < 0)
2695                         goto unmap;
2696         }
2697
2698         cap = lo_hi_readq(&dev->bar->cap);
2699         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2700         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2701         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2702         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2703                 dev->cmb = nvme_map_cmb(dev);
2704
2705         return 0;
2706
2707  unmap:
2708         iounmap(dev->bar);
2709         dev->bar = NULL;
2710  disable:
2711         pci_release_regions(pdev);
2712  disable_pci:
2713         pci_disable_device(pdev);
2714         return result;
2715 }
2716
2717 static void nvme_dev_unmap(struct nvme_dev *dev)
2718 {
2719         struct pci_dev *pdev = to_pci_dev(dev->dev);
2720
2721         if (pdev->msi_enabled)
2722                 pci_disable_msi(pdev);
2723         else if (pdev->msix_enabled)
2724                 pci_disable_msix(pdev);
2725
2726         if (dev->bar) {
2727                 iounmap(dev->bar);
2728                 dev->bar = NULL;
2729                 pci_release_regions(pdev);
2730         }
2731
2732         if (pci_is_enabled(pdev))
2733                 pci_disable_device(pdev);
2734 }
2735
2736 struct nvme_delq_ctx {
2737         struct task_struct *waiter;
2738         struct kthread_worker *worker;
2739         atomic_t refcount;
2740 };
2741
2742 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2743 {
2744         dq->waiter = current;
2745         mb();
2746
2747         for (;;) {
2748                 set_current_state(TASK_KILLABLE);
2749                 if (!atomic_read(&dq->refcount))
2750                         break;
2751                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2752                                         fatal_signal_pending(current)) {
2753                         /*
2754                          * Disable the controller first since we can't trust it
2755                          * at this point, but leave the admin queue enabled
2756                          * until all queue deletion requests are flushed.
2757                          * FIXME: This may take a while if there are more h/w
2758                          * queues than admin tags.
2759                          */
2760                         set_current_state(TASK_RUNNING);
2761                         nvme_disable_ctrl(dev, lo_hi_readq(&dev->bar->cap));
2762                         nvme_clear_queue(dev->queues[0]);
2763                         flush_kthread_worker(dq->worker);
2764                         nvme_disable_queue(dev, 0);
2765                         return;
2766                 }
2767         }
2768         set_current_state(TASK_RUNNING);
2769 }
2770
2771 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2772 {
2773         atomic_dec(&dq->refcount);
2774         if (dq->waiter)
2775                 wake_up_process(dq->waiter);
2776 }
2777
2778 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2779 {
2780         atomic_inc(&dq->refcount);
2781         return dq;
2782 }
2783
2784 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2785 {
2786         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2787         nvme_put_dq(dq);
2788
2789         spin_lock_irq(&nvmeq->q_lock);
2790         nvme_process_cq(nvmeq);
2791         spin_unlock_irq(&nvmeq->q_lock);
2792 }
2793
2794 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2795                                                 kthread_work_func_t fn)
2796 {
2797         struct nvme_command c;
2798
2799         memset(&c, 0, sizeof(c));
2800         c.delete_queue.opcode = opcode;
2801         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2802
2803         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2804         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2805                                                                 ADMIN_TIMEOUT);
2806 }
2807
2808 static void nvme_del_cq_work_handler(struct kthread_work *work)
2809 {
2810         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2811                                                         cmdinfo.work);
2812         nvme_del_queue_end(nvmeq);
2813 }
2814
2815 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2816 {
2817         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2818                                                 nvme_del_cq_work_handler);
2819 }
2820
2821 static void nvme_del_sq_work_handler(struct kthread_work *work)
2822 {
2823         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2824                                                         cmdinfo.work);
2825         int status = nvmeq->cmdinfo.status;
2826
2827         if (!status)
2828                 status = nvme_delete_cq(nvmeq);
2829         if (status)
2830                 nvme_del_queue_end(nvmeq);
2831 }
2832
2833 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2834 {
2835         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2836                                                 nvme_del_sq_work_handler);
2837 }
2838
2839 static void nvme_del_queue_start(struct kthread_work *work)
2840 {
2841         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2842                                                         cmdinfo.work);
2843         if (nvme_delete_sq(nvmeq))
2844                 nvme_del_queue_end(nvmeq);
2845 }
2846
2847 static void nvme_disable_io_queues(struct nvme_dev *dev)
2848 {
2849         int i;
2850         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2851         struct nvme_delq_ctx dq;
2852         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2853                                         &worker, "nvme%d", dev->instance);
2854
2855         if (IS_ERR(kworker_task)) {
2856                 dev_err(dev->dev,
2857                         "Failed to create queue del task\n");
2858                 for (i = dev->queue_count - 1; i > 0; i--)
2859                         nvme_disable_queue(dev, i);
2860                 return;
2861         }
2862
2863         dq.waiter = NULL;
2864         atomic_set(&dq.refcount, 0);
2865         dq.worker = &worker;
2866         for (i = dev->queue_count - 1; i > 0; i--) {
2867                 struct nvme_queue *nvmeq = dev->queues[i];
2868
2869                 if (nvme_suspend_queue(nvmeq))
2870                         continue;
2871                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2872                 nvmeq->cmdinfo.worker = dq.worker;
2873                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2874                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2875         }
2876         nvme_wait_dq(&dq, dev);
2877         kthread_stop(kworker_task);
2878 }
2879
2880 /*
2881 * Remove the node from the device list and check
2882 * for whether or not we need to stop the nvme_thread.
2883 */
2884 static void nvme_dev_list_remove(struct nvme_dev *dev)
2885 {
2886         struct task_struct *tmp = NULL;
2887
2888         spin_lock(&dev_list_lock);
2889         list_del_init(&dev->node);
2890         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2891                 tmp = nvme_thread;
2892                 nvme_thread = NULL;
2893         }
2894         spin_unlock(&dev_list_lock);
2895
2896         if (tmp)
2897                 kthread_stop(tmp);
2898 }
2899
2900 static void nvme_freeze_queues(struct nvme_dev *dev)
2901 {
2902         struct nvme_ns *ns;
2903
2904         list_for_each_entry(ns, &dev->namespaces, list) {
2905                 blk_mq_freeze_queue_start(ns->queue);
2906
2907                 spin_lock_irq(ns->queue->queue_lock);
2908                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2909                 spin_unlock_irq(ns->queue->queue_lock);
2910
2911                 blk_mq_cancel_requeue_work(ns->queue);
2912                 blk_mq_stop_hw_queues(ns->queue);
2913         }
2914 }
2915
2916 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2917 {
2918         struct nvme_ns *ns;
2919
2920         list_for_each_entry(ns, &dev->namespaces, list) {
2921                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2922                 blk_mq_unfreeze_queue(ns->queue);
2923                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2924                 blk_mq_kick_requeue_list(ns->queue);
2925         }
2926 }
2927
2928 static void nvme_dev_shutdown(struct nvme_dev *dev)
2929 {
2930         int i;
2931         u32 csts = -1;
2932
2933         nvme_dev_list_remove(dev);
2934
2935         if (dev->bar) {
2936                 nvme_freeze_queues(dev);
2937                 csts = readl(&dev->bar->csts);
2938         }
2939         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2940                 for (i = dev->queue_count - 1; i >= 0; i--) {
2941                         struct nvme_queue *nvmeq = dev->queues[i];
2942                         nvme_suspend_queue(nvmeq);
2943                 }
2944         } else {
2945                 nvme_disable_io_queues(dev);
2946                 nvme_shutdown_ctrl(dev);
2947                 nvme_disable_queue(dev, 0);
2948         }
2949         nvme_dev_unmap(dev);
2950
2951         for (i = dev->queue_count - 1; i >= 0; i--)
2952                 nvme_clear_queue(dev->queues[i]);
2953 }
2954
2955 static void nvme_dev_remove(struct nvme_dev *dev)
2956 {
2957         struct nvme_ns *ns, *next;
2958
2959         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2960                 nvme_ns_remove(ns);
2961 }
2962
2963 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2964 {
2965         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2966                                                 PAGE_SIZE, PAGE_SIZE, 0);
2967         if (!dev->prp_page_pool)
2968                 return -ENOMEM;
2969
2970         /* Optimisation for I/Os between 4k and 128k */
2971         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2972                                                 256, 256, 0);
2973         if (!dev->prp_small_pool) {
2974                 dma_pool_destroy(dev->prp_page_pool);
2975                 return -ENOMEM;
2976         }
2977         return 0;
2978 }
2979
2980 static void nvme_release_prp_pools(struct nvme_dev *dev)
2981 {
2982         dma_pool_destroy(dev->prp_page_pool);
2983         dma_pool_destroy(dev->prp_small_pool);
2984 }
2985
2986 static DEFINE_IDA(nvme_instance_ida);
2987
2988 static int nvme_set_instance(struct nvme_dev *dev)
2989 {
2990         int instance, error;
2991
2992         do {
2993                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2994                         return -ENODEV;
2995
2996                 spin_lock(&dev_list_lock);
2997                 error = ida_get_new(&nvme_instance_ida, &instance);
2998                 spin_unlock(&dev_list_lock);
2999         } while (error == -EAGAIN);
3000
3001         if (error)
3002                 return -ENODEV;
3003
3004         dev->instance = instance;
3005         return 0;
3006 }
3007
3008 static void nvme_release_instance(struct nvme_dev *dev)
3009 {
3010         spin_lock(&dev_list_lock);
3011         ida_remove(&nvme_instance_ida, dev->instance);
3012         spin_unlock(&dev_list_lock);
3013 }
3014
3015 static void nvme_free_dev(struct kref *kref)
3016 {
3017         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
3018
3019         put_device(dev->dev);
3020         put_device(dev->device);
3021         nvme_release_instance(dev);
3022         if (dev->tagset.tags)
3023                 blk_mq_free_tag_set(&dev->tagset);
3024         if (dev->admin_q)
3025                 blk_put_queue(dev->admin_q);
3026         kfree(dev->queues);
3027         kfree(dev->entry);
3028         kfree(dev);
3029 }
3030
3031 static int nvme_dev_open(struct inode *inode, struct file *f)
3032 {
3033         struct nvme_dev *dev;
3034         int instance = iminor(inode);
3035         int ret = -ENODEV;
3036
3037         spin_lock(&dev_list_lock);
3038         list_for_each_entry(dev, &dev_list, node) {
3039                 if (dev->instance == instance) {
3040                         if (!dev->admin_q) {
3041                                 ret = -EWOULDBLOCK;
3042                                 break;
3043                         }
3044                         if (!kref_get_unless_zero(&dev->kref))
3045                                 break;
3046                         f->private_data = dev;
3047                         ret = 0;
3048                         break;
3049                 }
3050         }
3051         spin_unlock(&dev_list_lock);
3052
3053         return ret;
3054 }
3055
3056 static int nvme_dev_release(struct inode *inode, struct file *f)
3057 {
3058         struct nvme_dev *dev = f->private_data;
3059         kref_put(&dev->kref, nvme_free_dev);
3060         return 0;
3061 }
3062
3063 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
3064 {
3065         struct nvme_dev *dev = f->private_data;
3066         struct nvme_ns *ns;
3067
3068         switch (cmd) {
3069         case NVME_IOCTL_ADMIN_CMD:
3070                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
3071         case NVME_IOCTL_IO_CMD:
3072                 if (list_empty(&dev->namespaces))
3073                         return -ENOTTY;
3074                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
3075                 return nvme_user_cmd(dev, ns, (void __user *)arg);
3076         case NVME_IOCTL_RESET:
3077                 dev_warn(dev->dev, "resetting controller\n");
3078                 return nvme_reset(dev);
3079         case NVME_IOCTL_SUBSYS_RESET:
3080                 return nvme_subsys_reset(dev);
3081         default:
3082                 return -ENOTTY;
3083         }
3084 }
3085
3086 static const struct file_operations nvme_dev_fops = {
3087         .owner          = THIS_MODULE,
3088         .open           = nvme_dev_open,
3089         .release        = nvme_dev_release,
3090         .unlocked_ioctl = nvme_dev_ioctl,
3091         .compat_ioctl   = nvme_dev_ioctl,
3092 };
3093
3094 static void nvme_probe_work(struct work_struct *work)
3095 {
3096         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3097         bool start_thread = false;
3098         int result;
3099
3100         result = nvme_dev_map(dev);
3101         if (result)
3102                 goto out;
3103
3104         result = nvme_configure_admin_queue(dev);
3105         if (result)
3106                 goto unmap;
3107
3108         spin_lock(&dev_list_lock);
3109         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
3110                 start_thread = true;
3111                 nvme_thread = NULL;
3112         }
3113         list_add(&dev->node, &dev_list);
3114         spin_unlock(&dev_list_lock);
3115
3116         if (start_thread) {
3117                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
3118                 wake_up_all(&nvme_kthread_wait);
3119         } else
3120                 wait_event_killable(nvme_kthread_wait, nvme_thread);
3121
3122         if (IS_ERR_OR_NULL(nvme_thread)) {
3123                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
3124                 goto disable;
3125         }
3126
3127         nvme_init_queue(dev->queues[0], 0);
3128         result = nvme_alloc_admin_tags(dev);
3129         if (result)
3130                 goto disable;
3131
3132         result = nvme_setup_io_queues(dev);
3133         if (result)
3134                 goto free_tags;
3135
3136         dev->event_limit = 1;
3137
3138         /*
3139          * Keep the controller around but remove all namespaces if we don't have
3140          * any working I/O queue.
3141          */
3142         if (dev->online_queues < 2) {
3143                 dev_warn(dev->dev, "IO queues not created\n");
3144                 nvme_dev_remove(dev);
3145         } else {
3146                 nvme_unfreeze_queues(dev);
3147                 nvme_dev_add(dev);
3148         }
3149
3150         return;
3151
3152  free_tags:
3153         nvme_dev_remove_admin(dev);
3154         blk_put_queue(dev->admin_q);
3155         dev->admin_q = NULL;
3156         dev->queues[0]->tags = NULL;
3157  disable:
3158         nvme_disable_queue(dev, 0);
3159         nvme_dev_list_remove(dev);
3160  unmap:
3161         nvme_dev_unmap(dev);
3162  out:
3163         if (!work_busy(&dev->reset_work))
3164                 nvme_dead_ctrl(dev);
3165 }
3166
3167 static int nvme_remove_dead_ctrl(void *arg)
3168 {
3169         struct nvme_dev *dev = (struct nvme_dev *)arg;
3170         struct pci_dev *pdev = to_pci_dev(dev->dev);
3171
3172         if (pci_get_drvdata(pdev))
3173                 pci_stop_and_remove_bus_device_locked(pdev);
3174         kref_put(&dev->kref, nvme_free_dev);
3175         return 0;
3176 }
3177
3178 static void nvme_dead_ctrl(struct nvme_dev *dev)
3179 {
3180         dev_warn(dev->dev, "Device failed to resume\n");
3181         kref_get(&dev->kref);
3182         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3183                                                 dev->instance))) {
3184                 dev_err(dev->dev,
3185                         "Failed to start controller remove task\n");
3186                 kref_put(&dev->kref, nvme_free_dev);
3187         }
3188 }
3189
3190 static void nvme_reset_work(struct work_struct *ws)
3191 {
3192         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3193         bool in_probe = work_busy(&dev->probe_work);
3194
3195         nvme_dev_shutdown(dev);
3196
3197         /* Synchronize with device probe so that work will see failure status
3198          * and exit gracefully without trying to schedule another reset */
3199         flush_work(&dev->probe_work);
3200
3201         /* Fail this device if reset occured during probe to avoid
3202          * infinite initialization loops. */
3203         if (in_probe) {
3204                 nvme_dead_ctrl(dev);
3205                 return;
3206         }
3207         /* Schedule device resume asynchronously so the reset work is available
3208          * to cleanup errors that may occur during reinitialization */
3209         schedule_work(&dev->probe_work);
3210 }
3211
3212 static int __nvme_reset(struct nvme_dev *dev)
3213 {
3214         if (work_pending(&dev->reset_work))
3215                 return -EBUSY;
3216         list_del_init(&dev->node);
3217         queue_work(nvme_workq, &dev->reset_work);
3218         return 0;
3219 }
3220
3221 static int nvme_reset(struct nvme_dev *dev)
3222 {
3223         int ret;
3224
3225         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3226                 return -ENODEV;
3227
3228         spin_lock(&dev_list_lock);
3229         ret = __nvme_reset(dev);
3230         spin_unlock(&dev_list_lock);
3231
3232         if (!ret) {
3233                 flush_work(&dev->reset_work);
3234                 flush_work(&dev->probe_work);
3235                 return 0;
3236         }
3237
3238         return ret;
3239 }
3240
3241 static ssize_t nvme_sysfs_reset(struct device *dev,
3242                                 struct device_attribute *attr, const char *buf,
3243                                 size_t count)
3244 {
3245         struct nvme_dev *ndev = dev_get_drvdata(dev);
3246         int ret;
3247
3248         ret = nvme_reset(ndev);
3249         if (ret < 0)
3250                 return ret;
3251
3252         return count;
3253 }
3254 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3255
3256 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3257 {
3258         int node, result = -ENOMEM;
3259         struct nvme_dev *dev;
3260
3261         node = dev_to_node(&pdev->dev);
3262         if (node == NUMA_NO_NODE)
3263                 set_dev_node(&pdev->dev, 0);
3264
3265         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3266         if (!dev)
3267                 return -ENOMEM;
3268         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3269                                                         GFP_KERNEL, node);
3270         if (!dev->entry)
3271                 goto free;
3272         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3273                                                         GFP_KERNEL, node);
3274         if (!dev->queues)
3275                 goto free;
3276
3277         INIT_LIST_HEAD(&dev->namespaces);
3278         INIT_WORK(&dev->reset_work, nvme_reset_work);
3279         dev->dev = get_device(&pdev->dev);
3280         pci_set_drvdata(pdev, dev);
3281         result = nvme_set_instance(dev);
3282         if (result)
3283                 goto put_pci;
3284
3285         result = nvme_setup_prp_pools(dev);
3286         if (result)
3287                 goto release;
3288
3289         kref_init(&dev->kref);
3290         dev->device = device_create(nvme_class, &pdev->dev,
3291                                 MKDEV(nvme_char_major, dev->instance),
3292                                 dev, "nvme%d", dev->instance);
3293         if (IS_ERR(dev->device)) {
3294                 result = PTR_ERR(dev->device);
3295                 goto release_pools;
3296         }
3297         get_device(dev->device);
3298         dev_set_drvdata(dev->device, dev);
3299
3300         result = device_create_file(dev->device, &dev_attr_reset_controller);
3301         if (result)
3302                 goto put_dev;
3303
3304         INIT_LIST_HEAD(&dev->node);
3305         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3306         INIT_WORK(&dev->probe_work, nvme_probe_work);
3307         schedule_work(&dev->probe_work);
3308         return 0;
3309
3310  put_dev:
3311         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3312         put_device(dev->device);
3313  release_pools:
3314         nvme_release_prp_pools(dev);
3315  release:
3316         nvme_release_instance(dev);
3317  put_pci:
3318         put_device(dev->dev);
3319  free:
3320         kfree(dev->queues);
3321         kfree(dev->entry);
3322         kfree(dev);
3323         return result;
3324 }
3325
3326 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3327 {
3328         struct nvme_dev *dev = pci_get_drvdata(pdev);
3329
3330         if (prepare)
3331                 nvme_dev_shutdown(dev);
3332         else
3333                 schedule_work(&dev->probe_work);
3334 }
3335
3336 static void nvme_shutdown(struct pci_dev *pdev)
3337 {
3338         struct nvme_dev *dev = pci_get_drvdata(pdev);
3339         nvme_dev_shutdown(dev);
3340 }
3341
3342 static void nvme_remove(struct pci_dev *pdev)
3343 {
3344         struct nvme_dev *dev = pci_get_drvdata(pdev);
3345
3346         spin_lock(&dev_list_lock);
3347         list_del_init(&dev->node);
3348         spin_unlock(&dev_list_lock);
3349
3350         pci_set_drvdata(pdev, NULL);
3351         flush_work(&dev->probe_work);
3352         flush_work(&dev->reset_work);
3353         flush_work(&dev->scan_work);
3354         device_remove_file(dev->device, &dev_attr_reset_controller);
3355         nvme_dev_remove(dev);
3356         nvme_dev_shutdown(dev);
3357         nvme_dev_remove_admin(dev);
3358         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3359         nvme_free_queues(dev, 0);
3360         nvme_release_cmb(dev);
3361         nvme_release_prp_pools(dev);
3362         kref_put(&dev->kref, nvme_free_dev);
3363 }
3364
3365 /* These functions are yet to be implemented */
3366 #define nvme_error_detected NULL
3367 #define nvme_dump_registers NULL
3368 #define nvme_link_reset NULL
3369 #define nvme_slot_reset NULL
3370 #define nvme_error_resume NULL
3371
3372 #ifdef CONFIG_PM_SLEEP
3373 static int nvme_suspend(struct device *dev)
3374 {
3375         struct pci_dev *pdev = to_pci_dev(dev);
3376         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3377
3378         nvme_dev_shutdown(ndev);
3379         return 0;
3380 }
3381
3382 static int nvme_resume(struct device *dev)
3383 {
3384         struct pci_dev *pdev = to_pci_dev(dev);
3385         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3386
3387         schedule_work(&ndev->probe_work);
3388         return 0;
3389 }
3390 #endif
3391
3392 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3393
3394 static const struct pci_error_handlers nvme_err_handler = {
3395         .error_detected = nvme_error_detected,
3396         .mmio_enabled   = nvme_dump_registers,
3397         .link_reset     = nvme_link_reset,
3398         .slot_reset     = nvme_slot_reset,
3399         .resume         = nvme_error_resume,
3400         .reset_notify   = nvme_reset_notify,
3401 };
3402
3403 /* Move to pci_ids.h later */
3404 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3405
3406 static const struct pci_device_id nvme_id_table[] = {
3407         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3408         { PCI_DEVICE(PCI_VENDOR_ID_APPLE, 0x2001) },
3409         { 0, }
3410 };
3411 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3412
3413 static struct pci_driver nvme_driver = {
3414         .name           = "nvme",
3415         .id_table       = nvme_id_table,
3416         .probe          = nvme_probe,
3417         .remove         = nvme_remove,
3418         .shutdown       = nvme_shutdown,
3419         .driver         = {
3420                 .pm     = &nvme_dev_pm_ops,
3421         },
3422         .err_handler    = &nvme_err_handler,
3423 };
3424
3425 static int __init nvme_init(void)
3426 {
3427         int result;
3428
3429         init_waitqueue_head(&nvme_kthread_wait);
3430
3431         nvme_workq = create_singlethread_workqueue("nvme");
3432         if (!nvme_workq)
3433                 return -ENOMEM;
3434
3435         result = register_blkdev(nvme_major, "nvme");
3436         if (result < 0)
3437                 goto kill_workq;
3438         else if (result > 0)
3439                 nvme_major = result;
3440
3441         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3442                                                         &nvme_dev_fops);
3443         if (result < 0)
3444                 goto unregister_blkdev;
3445         else if (result > 0)
3446                 nvme_char_major = result;
3447
3448         nvme_class = class_create(THIS_MODULE, "nvme");
3449         if (IS_ERR(nvme_class)) {
3450                 result = PTR_ERR(nvme_class);
3451                 goto unregister_chrdev;
3452         }
3453
3454         result = pci_register_driver(&nvme_driver);
3455         if (result)
3456                 goto destroy_class;
3457         return 0;
3458
3459  destroy_class:
3460         class_destroy(nvme_class);
3461  unregister_chrdev:
3462         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3463  unregister_blkdev:
3464         unregister_blkdev(nvme_major, "nvme");
3465  kill_workq:
3466         destroy_workqueue(nvme_workq);
3467         return result;
3468 }
3469
3470 static void __exit nvme_exit(void)
3471 {
3472         pci_unregister_driver(&nvme_driver);
3473         unregister_blkdev(nvme_major, "nvme");
3474         destroy_workqueue(nvme_workq);
3475         class_destroy(nvme_class);
3476         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3477         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3478         _nvme_check_size();
3479 }
3480
3481 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3482 MODULE_LICENSE("GPL");
3483 MODULE_VERSION("1.0");
3484 module_init(nvme_init);
3485 module_exit(nvme_exit);