drivers/nvme/host/core.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * NVM Express device driver
   4  * Copyright (c) 2011-2014, Intel Corporation.
   5  */
   6
   7 #include <linux/blkdev.h>
   8 #include <linux/blk-mq.h>
   9 #include <linux/blk-integrity.h>
  10 #include <linux/compat.h>
  11 #include <linux/delay.h>
  12 #include <linux/errno.h>
  13 #include <linux/hdreg.h>
  14 #include <linux/kernel.h>
  15 #include <linux/module.h>
  16 #include <linux/backing-dev.h>
  17 #include <linux/slab.h>
  18 #include <linux/types.h>
  19 #include <linux/pr.h>
  20 #include <linux/ptrace.h>
  21 #include <linux/nvme_ioctl.h>
  22 #include <linux/pm_qos.h>
  23 #include <linux/ratelimit.h>
  24 #include <asm/unaligned.h>
  25
  26 #include "nvme.h"
  27 #include "fabrics.h"
  28 #include <linux/nvme-auth.h>
  29
  30 #define CREATE_TRACE_POINTS
  31 #include "trace.h"
  32
  33 #define NVME_MINORS             (1U << MINORBITS)
  34
  35 struct nvme_ns_info {
  36         struct nvme_ns_ids ids;
  37         u32 nsid;
  38         __le32 anagrpid;
  39         bool is_shared;
  40         bool is_readonly;
  41         bool is_ready;
  42         bool is_removed;
  43 };
  44
  45 unsigned int admin_timeout = 60;
  46 module_param(admin_timeout, uint, 0644);
  47 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  48 EXPORT_SYMBOL_GPL(admin_timeout);
  49
  50 unsigned int nvme_io_timeout = 30;
  51 module_param_named(io_timeout, nvme_io_timeout, uint, 0644);
  52 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  53 EXPORT_SYMBOL_GPL(nvme_io_timeout);
  54
  55 static unsigned char shutdown_timeout = 5;
  56 module_param(shutdown_timeout, byte, 0644);
  57 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  58
  59 static u8 nvme_max_retries = 5;
  60 module_param_named(max_retries, nvme_max_retries, byte, 0644);
  61 MODULE_PARM_DESC(max_retries, "max number of retries a command may have");
  62
  63 static unsigned long default_ps_max_latency_us = 100000;
  64 module_param(default_ps_max_latency_us, ulong, 0644);
  65 MODULE_PARM_DESC(default_ps_max_latency_us,
  66                  "max power saving latency for new devices; use PM QOS to change per device");
  67
  68 static bool force_apst;
  69 module_param(force_apst, bool, 0644);
  70 MODULE_PARM_DESC(force_apst, "allow APST for newly enumerated devices even if quirked off");
  71
  72 static unsigned long apst_primary_timeout_ms = 100;
  73 module_param(apst_primary_timeout_ms, ulong, 0644);
  74 MODULE_PARM_DESC(apst_primary_timeout_ms,
  75         "primary APST timeout in ms");
  76
  77 static unsigned long apst_secondary_timeout_ms = 2000;
  78 module_param(apst_secondary_timeout_ms, ulong, 0644);
  79 MODULE_PARM_DESC(apst_secondary_timeout_ms,
  80         "secondary APST timeout in ms");
  81
  82 static unsigned long apst_primary_latency_tol_us = 15000;
  83 module_param(apst_primary_latency_tol_us, ulong, 0644);
  84 MODULE_PARM_DESC(apst_primary_latency_tol_us,
  85         "primary APST latency tolerance in us");
  86
  87 static unsigned long apst_secondary_latency_tol_us = 100000;
  88 module_param(apst_secondary_latency_tol_us, ulong, 0644);
  89 MODULE_PARM_DESC(apst_secondary_latency_tol_us,
  90         "secondary APST latency tolerance in us");
  91
  92 /*
  93  * nvme_wq - hosts nvme related works that are not reset or delete
  94  * nvme_reset_wq - hosts nvme reset works
  95  * nvme_delete_wq - hosts nvme delete works
  96  *
  97  * nvme_wq will host works such as scan, aen handling, fw activation,
  98  * keep-alive, periodic reconnects etc. nvme_reset_wq
  99  * runs reset works which also flush works hosted on nvme_wq for
 100  * serialization purposes. nvme_delete_wq host controller deletion
 101  * works which flush reset works for serialization.
 102  */
 103 struct workqueue_struct *nvme_wq;
 104 EXPORT_SYMBOL_GPL(nvme_wq);
 105
 106 struct workqueue_struct *nvme_reset_wq;
 107 EXPORT_SYMBOL_GPL(nvme_reset_wq);
 108
 109 struct workqueue_struct *nvme_delete_wq;
 110 EXPORT_SYMBOL_GPL(nvme_delete_wq);
 111
 112 static LIST_HEAD(nvme_subsystems);
 113 static DEFINE_MUTEX(nvme_subsystems_lock);
 114
 115 static DEFINE_IDA(nvme_instance_ida);
 116 static dev_t nvme_ctrl_base_chr_devt;
 117 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env);
 118 static const struct class nvme_class = {
 119         .name = "nvme",
 120         .dev_uevent = nvme_class_uevent,
 121 };
 122
 123 static const struct class nvme_subsys_class = {
 124         .name = "nvme-subsystem",
 125 };
 126
 127 static DEFINE_IDA(nvme_ns_chr_minor_ida);
 128 static dev_t nvme_ns_chr_devt;
 129 static const struct class nvme_ns_chr_class = {
 130         .name = "nvme-generic",
 131 };
 132
 133 static void nvme_put_subsystem(struct nvme_subsystem *subsys);
 134 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
 135                                            unsigned nsid);
 136 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
 137                                    struct nvme_command *cmd);
 138
 139 void nvme_queue_scan(struct nvme_ctrl *ctrl)
 140 {
 141         /*
 142          * Only new queue scan work when admin and IO queues are both alive
 143          */
 144         if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE && ctrl->tagset)
 145                 queue_work(nvme_wq, &ctrl->scan_work);
 146 }
 147
 148 /*
 149  * Use this function to proceed with scheduling reset_work for a controller
 150  * that had previously been set to the resetting state. This is intended for
 151  * code paths that can't be interrupted by other reset attempts. A hot removal
 152  * may prevent this from succeeding.
 153  */
 154 int nvme_try_sched_reset(struct nvme_ctrl *ctrl)
 155 {
 156         if (nvme_ctrl_state(ctrl) != NVME_CTRL_RESETTING)
 157                 return -EBUSY;
 158         if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
 159                 return -EBUSY;
 160         return 0;
 161 }
 162 EXPORT_SYMBOL_GPL(nvme_try_sched_reset);
 163
 164 static void nvme_failfast_work(struct work_struct *work)
 165 {
 166         struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
 167                         struct nvme_ctrl, failfast_work);
 168
 169         if (nvme_ctrl_state(ctrl) != NVME_CTRL_CONNECTING)
 170                 return;
 171
 172         set_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
 173         dev_info(ctrl->device, "failfast expired\n");
 174         nvme_kick_requeue_lists(ctrl);
 175 }
 176
 177 static inline void nvme_start_failfast_work(struct nvme_ctrl *ctrl)
 178 {
 179         if (!ctrl->opts || ctrl->opts->fast_io_fail_tmo == -1)
 180                 return;
 181
 182         schedule_delayed_work(&ctrl->failfast_work,
 183                               ctrl->opts->fast_io_fail_tmo * HZ);
 184 }
 185
 186 static inline void nvme_stop_failfast_work(struct nvme_ctrl *ctrl)
 187 {
 188         if (!ctrl->opts)
 189                 return;
 190
 191         cancel_delayed_work_sync(&ctrl->failfast_work);
 192         clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
 193 }
 194
 195
 196 int nvme_reset_ctrl(struct nvme_ctrl *ctrl)
 197 {
 198         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING))
 199                 return -EBUSY;
 200         if (!queue_work(nvme_reset_wq, &ctrl->reset_work))
 201                 return -EBUSY;
 202         return 0;
 203 }
 204 EXPORT_SYMBOL_GPL(nvme_reset_ctrl);
 205
 206 int nvme_reset_ctrl_sync(struct nvme_ctrl *ctrl)
 207 {
 208         int ret;
 209
 210         ret = nvme_reset_ctrl(ctrl);
 211         if (!ret) {
 212                 flush_work(&ctrl->reset_work);
 213                 if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE)
 214                         ret = -ENETRESET;
 215         }
 216
 217         return ret;
 218 }
 219
 220 static void nvme_do_delete_ctrl(struct nvme_ctrl *ctrl)
 221 {
 222         dev_info(ctrl->device,
 223                  "Removing ctrl: NQN \"%s\"\n", nvmf_ctrl_subsysnqn(ctrl));
 224
 225         flush_work(&ctrl->reset_work);
 226         nvme_stop_ctrl(ctrl);
 227         nvme_remove_namespaces(ctrl);
 228         ctrl->ops->delete_ctrl(ctrl);
 229         nvme_uninit_ctrl(ctrl);
 230 }
 231
 232 static void nvme_delete_ctrl_work(struct work_struct *work)
 233 {
 234         struct nvme_ctrl *ctrl =
 235                 container_of(work, struct nvme_ctrl, delete_work);
 236
 237         nvme_do_delete_ctrl(ctrl);
 238 }
 239
 240 int nvme_delete_ctrl(struct nvme_ctrl *ctrl)
 241 {
 242         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
 243                 return -EBUSY;
 244         if (!queue_work(nvme_delete_wq, &ctrl->delete_work))
 245                 return -EBUSY;
 246         return 0;
 247 }
 248 EXPORT_SYMBOL_GPL(nvme_delete_ctrl);
 249
 250 void nvme_delete_ctrl_sync(struct nvme_ctrl *ctrl)
 251 {
 252         /*
 253          * Keep a reference until nvme_do_delete_ctrl() complete,
 254          * since ->delete_ctrl can free the controller.
 255          */
 256         nvme_get_ctrl(ctrl);
 257         if (nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING))
 258                 nvme_do_delete_ctrl(ctrl);
 259         nvme_put_ctrl(ctrl);
 260 }
 261
 262 static blk_status_t nvme_error_status(u16 status)
 263 {
 264         switch (status & 0x7ff) {
 265         case NVME_SC_SUCCESS:
 266                 return BLK_STS_OK;
 267         case NVME_SC_CAP_EXCEEDED:
 268                 return BLK_STS_NOSPC;
 269         case NVME_SC_LBA_RANGE:
 270         case NVME_SC_CMD_INTERRUPTED:
 271         case NVME_SC_NS_NOT_READY:
 272                 return BLK_STS_TARGET;
 273         case NVME_SC_BAD_ATTRIBUTES:
 274         case NVME_SC_ONCS_NOT_SUPPORTED:
 275         case NVME_SC_INVALID_OPCODE:
 276         case NVME_SC_INVALID_FIELD:
 277         case NVME_SC_INVALID_NS:
 278                 return BLK_STS_NOTSUPP;
 279         case NVME_SC_WRITE_FAULT:
 280         case NVME_SC_READ_ERROR:
 281         case NVME_SC_UNWRITTEN_BLOCK:
 282         case NVME_SC_ACCESS_DENIED:
 283         case NVME_SC_READ_ONLY:
 284         case NVME_SC_COMPARE_FAILED:
 285                 return BLK_STS_MEDIUM;
 286         case NVME_SC_GUARD_CHECK:
 287         case NVME_SC_APPTAG_CHECK:
 288         case NVME_SC_REFTAG_CHECK:
 289         case NVME_SC_INVALID_PI:
 290                 return BLK_STS_PROTECTION;
 291         case NVME_SC_RESERVATION_CONFLICT:
 292                 return BLK_STS_RESV_CONFLICT;
 293         case NVME_SC_HOST_PATH_ERROR:
 294                 return BLK_STS_TRANSPORT;
 295         case NVME_SC_ZONE_TOO_MANY_ACTIVE:
 296                 return BLK_STS_ZONE_ACTIVE_RESOURCE;
 297         case NVME_SC_ZONE_TOO_MANY_OPEN:
 298                 return BLK_STS_ZONE_OPEN_RESOURCE;
 299         default:
 300                 return BLK_STS_IOERR;
 301         }
 302 }
 303
 304 static void nvme_retry_req(struct request *req)
 305 {
 306         unsigned long delay = 0;
 307         u16 crd;
 308
 309         /* The mask and shift result must be <= 3 */
 310         crd = (nvme_req(req)->status & NVME_SC_CRD) >> 11;
 311         if (crd)
 312                 delay = nvme_req(req)->ctrl->crdt[crd - 1] * 100;
 313
 314         nvme_req(req)->retries++;
 315         blk_mq_requeue_request(req, false);
 316         blk_mq_delay_kick_requeue_list(req->q, delay);
 317 }
 318
 319 static void nvme_log_error(struct request *req)
 320 {
 321         struct nvme_ns *ns = req->q->queuedata;
 322         struct nvme_request *nr = nvme_req(req);
 323
 324         if (ns) {
 325                 pr_err_ratelimited("%s: %s(0x%x) @ LBA %llu, %u blocks, %s (sct 0x%x / sc 0x%x) %s%s\n",
 326                        ns->disk ? ns->disk->disk_name : "?",
 327                        nvme_get_opcode_str(nr->cmd->common.opcode),
 328                        nr->cmd->common.opcode,
 329                        nvme_sect_to_lba(ns->head, blk_rq_pos(req)),
 330                        blk_rq_bytes(req) >> ns->head->lba_shift,
 331                        nvme_get_error_status_str(nr->status),
 332                        nr->status >> 8 & 7,     /* Status Code Type */
 333                        nr->status & 0xff,       /* Status Code */
 334                        nr->status & NVME_SC_MORE ? "MORE " : "",
 335                        nr->status & NVME_SC_DNR  ? "DNR "  : "");
 336                 return;
 337         }
 338
 339         pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s\n",
 340                            dev_name(nr->ctrl->device),
 341                            nvme_get_admin_opcode_str(nr->cmd->common.opcode),
 342                            nr->cmd->common.opcode,
 343                            nvme_get_error_status_str(nr->status),
 344                            nr->status >> 8 & 7, /* Status Code Type */
 345                            nr->status & 0xff,   /* Status Code */
 346                            nr->status & NVME_SC_MORE ? "MORE " : "",
 347                            nr->status & NVME_SC_DNR  ? "DNR "  : "");
 348 }
 349
 350 static void nvme_log_err_passthru(struct request *req)
 351 {
 352         struct nvme_ns *ns = req->q->queuedata;
 353         struct nvme_request *nr = nvme_req(req);
 354
 355         pr_err_ratelimited("%s: %s(0x%x), %s (sct 0x%x / sc 0x%x) %s%s"
 356                 "cdw10=0x%x cdw11=0x%x cdw12=0x%x cdw13=0x%x cdw14=0x%x cdw15=0x%x\n",
 357                 ns ? ns->disk->disk_name : dev_name(nr->ctrl->device),
 358                 ns ? nvme_get_opcode_str(nr->cmd->common.opcode) :
 359                      nvme_get_admin_opcode_str(nr->cmd->common.opcode),
 360                 nr->cmd->common.opcode,
 361                 nvme_get_error_status_str(nr->status),
 362                 nr->status >> 8 & 7,    /* Status Code Type */
 363                 nr->status & 0xff,      /* Status Code */
 364                 nr->status & NVME_SC_MORE ? "MORE " : "",
 365                 nr->status & NVME_SC_DNR  ? "DNR "  : "",
 366                 nr->cmd->common.cdw10,
 367                 nr->cmd->common.cdw11,
 368                 nr->cmd->common.cdw12,
 369                 nr->cmd->common.cdw13,
 370                 nr->cmd->common.cdw14,
 371                 nr->cmd->common.cdw14);
 372 }
 373
 374 enum nvme_disposition {
 375         COMPLETE,
 376         RETRY,
 377         FAILOVER,
 378         AUTHENTICATE,
 379 };
 380
 381 static inline enum nvme_disposition nvme_decide_disposition(struct request *req)
 382 {
 383         if (likely(nvme_req(req)->status == 0))
 384                 return COMPLETE;
 385
 386         if ((nvme_req(req)->status & 0x7ff) == NVME_SC_AUTH_REQUIRED)
 387                 return AUTHENTICATE;
 388
 389         if (blk_noretry_request(req) ||
 390             (nvme_req(req)->status & NVME_SC_DNR) ||
 391             nvme_req(req)->retries >= nvme_max_retries)
 392                 return COMPLETE;
 393
 394         if (req->cmd_flags & REQ_NVME_MPATH) {
 395                 if (nvme_is_path_error(nvme_req(req)->status) ||
 396                     blk_queue_dying(req->q))
 397                         return FAILOVER;
 398         } else {
 399                 if (blk_queue_dying(req->q))
 400                         return COMPLETE;
 401         }
 402
 403         return RETRY;
 404 }
 405
 406 static inline void nvme_end_req_zoned(struct request *req)
 407 {
 408         if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
 409             req_op(req) == REQ_OP_ZONE_APPEND) {
 410                 struct nvme_ns *ns = req->q->queuedata;
 411
 412                 req->__sector = nvme_lba_to_sect(ns->head,
 413                         le64_to_cpu(nvme_req(req)->result.u64));
 414         }
 415 }
 416
 417 static inline void nvme_end_req(struct request *req)
 418 {
 419         blk_status_t status = nvme_error_status(nvme_req(req)->status);
 420
 421         if (unlikely(nvme_req(req)->status && !(req->rq_flags & RQF_QUIET))) {
 422                 if (blk_rq_is_passthrough(req))
 423                         nvme_log_err_passthru(req);
 424                 else
 425                         nvme_log_error(req);
 426         }
 427         nvme_end_req_zoned(req);
 428         nvme_trace_bio_complete(req);
 429         if (req->cmd_flags & REQ_NVME_MPATH)
 430                 nvme_mpath_end_request(req);
 431         blk_mq_end_request(req, status);
 432 }
 433
 434 void nvme_complete_rq(struct request *req)
 435 {
 436         struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
 437
 438         trace_nvme_complete_rq(req);
 439         nvme_cleanup_cmd(req);
 440
 441         /*
 442          * Completions of long-running commands should not be able to
 443          * defer sending of periodic keep alives, since the controller
 444          * may have completed processing such commands a long time ago
 445          * (arbitrarily close to command submission time).
 446          * req->deadline - req->timeout is the command submission time
 447          * in jiffies.
 448          */
 449         if (ctrl->kas &&
 450             req->deadline - req->timeout >= ctrl->ka_last_check_time)
 451                 ctrl->comp_seen = true;
 452
 453         switch (nvme_decide_disposition(req)) {
 454         case COMPLETE:
 455                 nvme_end_req(req);
 456                 return;
 457         case RETRY:
 458                 nvme_retry_req(req);
 459                 return;
 460         case FAILOVER:
 461                 nvme_failover_req(req);
 462                 return;
 463         case AUTHENTICATE:
 464 #ifdef CONFIG_NVME_HOST_AUTH
 465                 queue_work(nvme_wq, &ctrl->dhchap_auth_work);
 466                 nvme_retry_req(req);
 467 #else
 468                 nvme_end_req(req);
 469 #endif
 470                 return;
 471         }
 472 }
 473 EXPORT_SYMBOL_GPL(nvme_complete_rq);
 474
 475 void nvme_complete_batch_req(struct request *req)
 476 {
 477         trace_nvme_complete_rq(req);
 478         nvme_cleanup_cmd(req);
 479         nvme_end_req_zoned(req);
 480 }
 481 EXPORT_SYMBOL_GPL(nvme_complete_batch_req);
 482
 483 /*
 484  * Called to unwind from ->queue_rq on a failed command submission so that the
 485  * multipathing code gets called to potentially failover to another path.
 486  * The caller needs to unwind all transport specific resource allocations and
 487  * must return propagate the return value.
 488  */
 489 blk_status_t nvme_host_path_error(struct request *req)
 490 {
 491         nvme_req(req)->status = NVME_SC_HOST_PATH_ERROR;
 492         blk_mq_set_request_complete(req);
 493         nvme_complete_rq(req);
 494         return BLK_STS_OK;
 495 }
 496 EXPORT_SYMBOL_GPL(nvme_host_path_error);
 497
 498 bool nvme_cancel_request(struct request *req, void *data)
 499 {
 500         dev_dbg_ratelimited(((struct nvme_ctrl *) data)->device,
 501                                 "Cancelling I/O %d", req->tag);
 502
 503         /* don't abort one completed or idle request */
 504         if (blk_mq_rq_state(req) != MQ_RQ_IN_FLIGHT)
 505                 return true;
 506
 507         nvme_req(req)->status = NVME_SC_HOST_ABORTED_CMD;
 508         nvme_req(req)->flags |= NVME_REQ_CANCELLED;
 509         blk_mq_complete_request(req);
 510         return true;
 511 }
 512 EXPORT_SYMBOL_GPL(nvme_cancel_request);
 513
 514 void nvme_cancel_tagset(struct nvme_ctrl *ctrl)
 515 {
 516         if (ctrl->tagset) {
 517                 blk_mq_tagset_busy_iter(ctrl->tagset,
 518                                 nvme_cancel_request, ctrl);
 519                 blk_mq_tagset_wait_completed_request(ctrl->tagset);
 520         }
 521 }
 522 EXPORT_SYMBOL_GPL(nvme_cancel_tagset);
 523
 524 void nvme_cancel_admin_tagset(struct nvme_ctrl *ctrl)
 525 {
 526         if (ctrl->admin_tagset) {
 527                 blk_mq_tagset_busy_iter(ctrl->admin_tagset,
 528                                 nvme_cancel_request, ctrl);
 529                 blk_mq_tagset_wait_completed_request(ctrl->admin_tagset);
 530         }
 531 }
 532 EXPORT_SYMBOL_GPL(nvme_cancel_admin_tagset);
 533
 534 bool nvme_change_ctrl_state(struct nvme_ctrl *ctrl,
 535                 enum nvme_ctrl_state new_state)
 536 {
 537         enum nvme_ctrl_state old_state;
 538         unsigned long flags;
 539         bool changed = false;
 540
 541         spin_lock_irqsave(&ctrl->lock, flags);
 542
 543         old_state = nvme_ctrl_state(ctrl);
 544         switch (new_state) {
 545         case NVME_CTRL_LIVE:
 546                 switch (old_state) {
 547                 case NVME_CTRL_NEW:
 548                 case NVME_CTRL_RESETTING:
 549                 case NVME_CTRL_CONNECTING:
 550                         changed = true;
 551                         fallthrough;
 552                 default:
 553                         break;
 554                 }
 555                 break;
 556         case NVME_CTRL_RESETTING:
 557                 switch (old_state) {
 558                 case NVME_CTRL_NEW:
 559                 case NVME_CTRL_LIVE:
 560                         changed = true;
 561                         fallthrough;
 562                 default:
 563                         break;
 564                 }
 565                 break;
 566         case NVME_CTRL_CONNECTING:
 567                 switch (old_state) {
 568                 case NVME_CTRL_NEW:
 569                 case NVME_CTRL_RESETTING:
 570                         changed = true;
 571                         fallthrough;
 572                 default:
 573                         break;
 574                 }
 575                 break;
 576         case NVME_CTRL_DELETING:
 577                 switch (old_state) {
 578                 case NVME_CTRL_LIVE:
 579                 case NVME_CTRL_RESETTING:
 580                 case NVME_CTRL_CONNECTING:
 581                         changed = true;
 582                         fallthrough;
 583                 default:
 584                         break;
 585                 }
 586                 break;
 587         case NVME_CTRL_DELETING_NOIO:
 588                 switch (old_state) {
 589                 case NVME_CTRL_DELETING:
 590                 case NVME_CTRL_DEAD:
 591                         changed = true;
 592                         fallthrough;
 593                 default:
 594                         break;
 595                 }
 596                 break;
 597         case NVME_CTRL_DEAD:
 598                 switch (old_state) {
 599                 case NVME_CTRL_DELETING:
 600                         changed = true;
 601                         fallthrough;
 602                 default:
 603                         break;
 604                 }
 605                 break;
 606         default:
 607                 break;
 608         }
 609
 610         if (changed) {
 611                 WRITE_ONCE(ctrl->state, new_state);
 612                 wake_up_all(&ctrl->state_wq);
 613         }
 614
 615         spin_unlock_irqrestore(&ctrl->lock, flags);
 616         if (!changed)
 617                 return false;
 618
 619         if (new_state == NVME_CTRL_LIVE) {
 620                 if (old_state == NVME_CTRL_CONNECTING)
 621                         nvme_stop_failfast_work(ctrl);
 622                 nvme_kick_requeue_lists(ctrl);
 623         } else if (new_state == NVME_CTRL_CONNECTING &&
 624                 old_state == NVME_CTRL_RESETTING) {
 625                 nvme_start_failfast_work(ctrl);
 626         }
 627         return changed;
 628 }
 629 EXPORT_SYMBOL_GPL(nvme_change_ctrl_state);
 630
 631 /*
 632  * Returns true for sink states that can't ever transition back to live.
 633  */
 634 static bool nvme_state_terminal(struct nvme_ctrl *ctrl)
 635 {
 636         switch (nvme_ctrl_state(ctrl)) {
 637         case NVME_CTRL_NEW:
 638         case NVME_CTRL_LIVE:
 639         case NVME_CTRL_RESETTING:
 640         case NVME_CTRL_CONNECTING:
 641                 return false;
 642         case NVME_CTRL_DELETING:
 643         case NVME_CTRL_DELETING_NOIO:
 644         case NVME_CTRL_DEAD:
 645                 return true;
 646         default:
 647                 WARN_ONCE(1, "Unhandled ctrl state:%d", ctrl->state);
 648                 return true;
 649         }
 650 }
 651
 652 /*
 653  * Waits for the controller state to be resetting, or returns false if it is
 654  * not possible to ever transition to that state.
 655  */
 656 bool nvme_wait_reset(struct nvme_ctrl *ctrl)
 657 {
 658         wait_event(ctrl->state_wq,
 659                    nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING) ||
 660                    nvme_state_terminal(ctrl));
 661         return nvme_ctrl_state(ctrl) == NVME_CTRL_RESETTING;
 662 }
 663 EXPORT_SYMBOL_GPL(nvme_wait_reset);
 664
 665 static void nvme_free_ns_head(struct kref *ref)
 666 {
 667         struct nvme_ns_head *head =
 668                 container_of(ref, struct nvme_ns_head, ref);
 669
 670         nvme_mpath_remove_disk(head);
 671         ida_free(&head->subsys->ns_ida, head->instance);
 672         cleanup_srcu_struct(&head->srcu);
 673         nvme_put_subsystem(head->subsys);
 674         kfree(head);
 675 }
 676
 677 bool nvme_tryget_ns_head(struct nvme_ns_head *head)
 678 {
 679         return kref_get_unless_zero(&head->ref);
 680 }
 681
 682 void nvme_put_ns_head(struct nvme_ns_head *head)
 683 {
 684         kref_put(&head->ref, nvme_free_ns_head);
 685 }
 686
 687 static void nvme_free_ns(struct kref *kref)
 688 {
 689         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
 690
 691         put_disk(ns->disk);
 692         nvme_put_ns_head(ns->head);
 693         nvme_put_ctrl(ns->ctrl);
 694         kfree(ns);
 695 }
 696
 697 static inline bool nvme_get_ns(struct nvme_ns *ns)
 698 {
 699         return kref_get_unless_zero(&ns->kref);
 700 }
 701
 702 void nvme_put_ns(struct nvme_ns *ns)
 703 {
 704         kref_put(&ns->kref, nvme_free_ns);
 705 }
 706 EXPORT_SYMBOL_NS_GPL(nvme_put_ns, NVME_TARGET_PASSTHRU);
 707
 708 static inline void nvme_clear_nvme_request(struct request *req)
 709 {
 710         nvme_req(req)->status = 0;
 711         nvme_req(req)->retries = 0;
 712         nvme_req(req)->flags = 0;
 713         req->rq_flags |= RQF_DONTPREP;
 714 }
 715
 716 /* initialize a passthrough request */
 717 void nvme_init_request(struct request *req, struct nvme_command *cmd)
 718 {
 719         struct nvme_request *nr = nvme_req(req);
 720         bool logging_enabled;
 721
 722         if (req->q->queuedata) {
 723                 struct nvme_ns *ns = req->q->disk->private_data;
 724
 725                 logging_enabled = ns->passthru_err_log_enabled;
 726                 req->timeout = NVME_IO_TIMEOUT;
 727         } else { /* no queuedata implies admin queue */
 728                 logging_enabled = nr->ctrl->passthru_err_log_enabled;
 729                 req->timeout = NVME_ADMIN_TIMEOUT;
 730         }
 731
 732         if (!logging_enabled)
 733                 req->rq_flags |= RQF_QUIET;
 734
 735         /* passthru commands should let the driver set the SGL flags */
 736         cmd->common.flags &= ~NVME_CMD_SGL_ALL;
 737
 738         req->cmd_flags |= REQ_FAILFAST_DRIVER;
 739         if (req->mq_hctx->type == HCTX_TYPE_POLL)
 740                 req->cmd_flags |= REQ_POLLED;
 741         nvme_clear_nvme_request(req);
 742         memcpy(nr->cmd, cmd, sizeof(*cmd));
 743 }
 744 EXPORT_SYMBOL_GPL(nvme_init_request);
 745
 746 /*
 747  * For something we're not in a state to send to the device the default action
 748  * is to busy it and retry it after the controller state is recovered.  However,
 749  * if the controller is deleting or if anything is marked for failfast or
 750  * nvme multipath it is immediately failed.
 751  *
 752  * Note: commands used to initialize the controller will be marked for failfast.
 753  * Note: nvme cli/ioctl commands are marked for failfast.
 754  */
 755 blk_status_t nvme_fail_nonready_command(struct nvme_ctrl *ctrl,
 756                 struct request *rq)
 757 {
 758         enum nvme_ctrl_state state = nvme_ctrl_state(ctrl);
 759
 760         if (state != NVME_CTRL_DELETING_NOIO &&
 761             state != NVME_CTRL_DELETING &&
 762             state != NVME_CTRL_DEAD &&
 763             !test_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags) &&
 764             !blk_noretry_request(rq) && !(rq->cmd_flags & REQ_NVME_MPATH))
 765                 return BLK_STS_RESOURCE;
 766         return nvme_host_path_error(rq);
 767 }
 768 EXPORT_SYMBOL_GPL(nvme_fail_nonready_command);
 769
 770 bool __nvme_check_ready(struct nvme_ctrl *ctrl, struct request *rq,
 771                 bool queue_live, enum nvme_ctrl_state state)
 772 {
 773         struct nvme_request *req = nvme_req(rq);
 774
 775         /*
 776          * currently we have a problem sending passthru commands
 777          * on the admin_q if the controller is not LIVE because we can't
 778          * make sure that they are going out after the admin connect,
 779          * controller enable and/or other commands in the initialization
 780          * sequence. until the controller will be LIVE, fail with
 781          * BLK_STS_RESOURCE so that they will be rescheduled.
 782          */
 783         if (rq->q == ctrl->admin_q && (req->flags & NVME_REQ_USERCMD))
 784                 return false;
 785
 786         if (ctrl->ops->flags & NVME_F_FABRICS) {
 787                 /*
 788                  * Only allow commands on a live queue, except for the connect
 789                  * command, which is require to set the queue live in the
 790                  * appropinquate states.
 791                  */
 792                 switch (state) {
 793                 case NVME_CTRL_CONNECTING:
 794                         if (blk_rq_is_passthrough(rq) && nvme_is_fabrics(req->cmd) &&
 795                             (req->cmd->fabrics.fctype == nvme_fabrics_type_connect ||
 796                              req->cmd->fabrics.fctype == nvme_fabrics_type_auth_send ||
 797                              req->cmd->fabrics.fctype == nvme_fabrics_type_auth_receive))
 798                                 return true;
 799                         break;
 800                 default:
 801                         break;
 802                 case NVME_CTRL_DEAD:
 803                         return false;
 804                 }
 805         }
 806
 807         return queue_live;
 808 }
 809 EXPORT_SYMBOL_GPL(__nvme_check_ready);
 810
 811 static inline void nvme_setup_flush(struct nvme_ns *ns,
 812                 struct nvme_command *cmnd)
 813 {
 814         memset(cmnd, 0, sizeof(*cmnd));
 815         cmnd->common.opcode = nvme_cmd_flush;
 816         cmnd->common.nsid = cpu_to_le32(ns->head->ns_id);
 817 }
 818
 819 static blk_status_t nvme_setup_discard(struct nvme_ns *ns, struct request *req,
 820                 struct nvme_command *cmnd)
 821 {
 822         unsigned short segments = blk_rq_nr_discard_segments(req), n = 0;
 823         struct nvme_dsm_range *range;
 824         struct bio *bio;
 825
 826         /*
 827          * Some devices do not consider the DSM 'Number of Ranges' field when
 828          * determining how much data to DMA. Always allocate memory for maximum
 829          * number of segments to prevent device reading beyond end of buffer.
 830          */
 831         static const size_t alloc_size = sizeof(*range) * NVME_DSM_MAX_RANGES;
 832
 833         range = kzalloc(alloc_size, GFP_ATOMIC | __GFP_NOWARN);
 834         if (!range) {
 835                 /*
 836                  * If we fail allocation our range, fallback to the controller
 837                  * discard page. If that's also busy, it's safe to return
 838                  * busy, as we know we can make progress once that's freed.
 839                  */
 840                 if (test_and_set_bit_lock(0, &ns->ctrl->discard_page_busy))
 841                         return BLK_STS_RESOURCE;
 842
 843                 range = page_address(ns->ctrl->discard_page);
 844         }
 845
 846         if (queue_max_discard_segments(req->q) == 1) {
 847                 u64 slba = nvme_sect_to_lba(ns->head, blk_rq_pos(req));
 848                 u32 nlb = blk_rq_sectors(req) >> (ns->head->lba_shift - 9);
 849
 850                 range[0].cattr = cpu_to_le32(0);
 851                 range[0].nlb = cpu_to_le32(nlb);
 852                 range[0].slba = cpu_to_le64(slba);
 853                 n = 1;
 854         } else {
 855                 __rq_for_each_bio(bio, req) {
 856                         u64 slba = nvme_sect_to_lba(ns->head,
 857                                                     bio->bi_iter.bi_sector);
 858                         u32 nlb = bio->bi_iter.bi_size >> ns->head->lba_shift;
 859
 860                         if (n < segments) {
 861                                 range[n].cattr = cpu_to_le32(0);
 862                                 range[n].nlb = cpu_to_le32(nlb);
 863                                 range[n].slba = cpu_to_le64(slba);
 864                         }
 865                         n++;
 866                 }
 867         }
 868
 869         if (WARN_ON_ONCE(n != segments)) {
 870                 if (virt_to_page(range) == ns->ctrl->discard_page)
 871                         clear_bit_unlock(0, &ns->ctrl->discard_page_busy);
 872                 else
 873                         kfree(range);
 874                 return BLK_STS_IOERR;
 875         }
 876
 877         memset(cmnd, 0, sizeof(*cmnd));
 878         cmnd->dsm.opcode = nvme_cmd_dsm;
 879         cmnd->dsm.nsid = cpu_to_le32(ns->head->ns_id);
 880         cmnd->dsm.nr = cpu_to_le32(segments - 1);
 881         cmnd->dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 882
 883         bvec_set_virt(&req->special_vec, range, alloc_size);
 884         req->rq_flags |= RQF_SPECIAL_PAYLOAD;
 885
 886         return BLK_STS_OK;
 887 }
 888
 889 static void nvme_set_ref_tag(struct nvme_ns *ns, struct nvme_command *cmnd,
 890                               struct request *req)
 891 {
 892         u32 upper, lower;
 893         u64 ref48;
 894
 895         /* both rw and write zeroes share the same reftag format */
 896         switch (ns->head->guard_type) {
 897         case NVME_NVM_NS_16B_GUARD:
 898                 cmnd->rw.reftag = cpu_to_le32(t10_pi_ref_tag(req));
 899                 break;
 900         case NVME_NVM_NS_64B_GUARD:
 901                 ref48 = ext_pi_ref_tag(req);
 902                 lower = lower_32_bits(ref48);
 903                 upper = upper_32_bits(ref48);
 904
 905                 cmnd->rw.reftag = cpu_to_le32(lower);
 906                 cmnd->rw.cdw3 = cpu_to_le32(upper);
 907                 break;
 908         default:
 909                 break;
 910         }
 911 }
 912
 913 static inline blk_status_t nvme_setup_write_zeroes(struct nvme_ns *ns,
 914                 struct request *req, struct nvme_command *cmnd)
 915 {
 916         memset(cmnd, 0, sizeof(*cmnd));
 917
 918         if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
 919                 return nvme_setup_discard(ns, req, cmnd);
 920
 921         cmnd->write_zeroes.opcode = nvme_cmd_write_zeroes;
 922         cmnd->write_zeroes.nsid = cpu_to_le32(ns->head->ns_id);
 923         cmnd->write_zeroes.slba =
 924                 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
 925         cmnd->write_zeroes.length =
 926                 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
 927
 928         if (!(req->cmd_flags & REQ_NOUNMAP) &&
 929             (ns->head->features & NVME_NS_DEAC))
 930                 cmnd->write_zeroes.control |= cpu_to_le16(NVME_WZ_DEAC);
 931
 932         if (nvme_ns_has_pi(ns->head)) {
 933                 cmnd->write_zeroes.control |= cpu_to_le16(NVME_RW_PRINFO_PRACT);
 934
 935                 switch (ns->head->pi_type) {
 936                 case NVME_NS_DPS_PI_TYPE1:
 937                 case NVME_NS_DPS_PI_TYPE2:
 938                         nvme_set_ref_tag(ns, cmnd, req);
 939                         break;
 940                 }
 941         }
 942
 943         return BLK_STS_OK;
 944 }
 945
 946 static inline blk_status_t nvme_setup_rw(struct nvme_ns *ns,
 947                 struct request *req, struct nvme_command *cmnd,
 948                 enum nvme_opcode op)
 949 {
 950         u16 control = 0;
 951         u32 dsmgmt = 0;
 952
 953         if (req->cmd_flags & REQ_FUA)
 954                 control |= NVME_RW_FUA;
 955         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 956                 control |= NVME_RW_LR;
 957
 958         if (req->cmd_flags & REQ_RAHEAD)
 959                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 960
 961         cmnd->rw.opcode = op;
 962         cmnd->rw.flags = 0;
 963         cmnd->rw.nsid = cpu_to_le32(ns->head->ns_id);
 964         cmnd->rw.cdw2 = 0;
 965         cmnd->rw.cdw3 = 0;
 966         cmnd->rw.metadata = 0;
 967         cmnd->rw.slba =
 968                 cpu_to_le64(nvme_sect_to_lba(ns->head, blk_rq_pos(req)));
 969         cmnd->rw.length =
 970                 cpu_to_le16((blk_rq_bytes(req) >> ns->head->lba_shift) - 1);
 971         cmnd->rw.reftag = 0;
 972         cmnd->rw.apptag = 0;
 973         cmnd->rw.appmask = 0;
 974
 975         if (ns->head->ms) {
 976                 /*
 977                  * If formated with metadata, the block layer always provides a
 978                  * metadata buffer if CONFIG_BLK_DEV_INTEGRITY is enabled.  Else
 979                  * we enable the PRACT bit for protection information or set the
 980                  * namespace capacity to zero to prevent any I/O.
 981                  */
 982                 if (!blk_integrity_rq(req)) {
 983                         if (WARN_ON_ONCE(!nvme_ns_has_pi(ns->head)))
 984                                 return BLK_STS_NOTSUPP;
 985                         control |= NVME_RW_PRINFO_PRACT;
 986                 }
 987
 988                 switch (ns->head->pi_type) {
 989                 case NVME_NS_DPS_PI_TYPE3:
 990                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 991                         break;
 992                 case NVME_NS_DPS_PI_TYPE1:
 993                 case NVME_NS_DPS_PI_TYPE2:
 994                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 995                                         NVME_RW_PRINFO_PRCHK_REF;
 996                         if (op == nvme_cmd_zone_append)
 997                                 control |= NVME_RW_APPEND_PIREMAP;
 998                         nvme_set_ref_tag(ns, cmnd, req);
 999                         break;
1000                 }
1001         }
1002
1003         cmnd->rw.control = cpu_to_le16(control);
1004         cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
1005         return 0;
1006 }
1007
1008 void nvme_cleanup_cmd(struct request *req)
1009 {
1010         if (req->rq_flags & RQF_SPECIAL_PAYLOAD) {
1011                 struct nvme_ctrl *ctrl = nvme_req(req)->ctrl;
1012
1013                 if (req->special_vec.bv_page == ctrl->discard_page)
1014                         clear_bit_unlock(0, &ctrl->discard_page_busy);
1015                 else
1016                         kfree(bvec_virt(&req->special_vec));
1017         }
1018 }
1019 EXPORT_SYMBOL_GPL(nvme_cleanup_cmd);
1020
1021 blk_status_t nvme_setup_cmd(struct nvme_ns *ns, struct request *req)
1022 {
1023         struct nvme_command *cmd = nvme_req(req)->cmd;
1024         blk_status_t ret = BLK_STS_OK;
1025
1026         if (!(req->rq_flags & RQF_DONTPREP))
1027                 nvme_clear_nvme_request(req);
1028
1029         switch (req_op(req)) {
1030         case REQ_OP_DRV_IN:
1031         case REQ_OP_DRV_OUT:
1032                 /* these are setup prior to execution in nvme_init_request() */
1033                 break;
1034         case REQ_OP_FLUSH:
1035                 nvme_setup_flush(ns, cmd);
1036                 break;
1037         case REQ_OP_ZONE_RESET_ALL:
1038         case REQ_OP_ZONE_RESET:
1039                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_RESET);
1040                 break;
1041         case REQ_OP_ZONE_OPEN:
1042                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_OPEN);
1043                 break;
1044         case REQ_OP_ZONE_CLOSE:
1045                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_CLOSE);
1046                 break;
1047         case REQ_OP_ZONE_FINISH:
1048                 ret = nvme_setup_zone_mgmt_send(ns, req, cmd, NVME_ZONE_FINISH);
1049                 break;
1050         case REQ_OP_WRITE_ZEROES:
1051                 ret = nvme_setup_write_zeroes(ns, req, cmd);
1052                 break;
1053         case REQ_OP_DISCARD:
1054                 ret = nvme_setup_discard(ns, req, cmd);
1055                 break;
1056         case REQ_OP_READ:
1057                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_read);
1058                 break;
1059         case REQ_OP_WRITE:
1060                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_write);
1061                 break;
1062         case REQ_OP_ZONE_APPEND:
1063                 ret = nvme_setup_rw(ns, req, cmd, nvme_cmd_zone_append);
1064                 break;
1065         default:
1066                 WARN_ON_ONCE(1);
1067                 return BLK_STS_IOERR;
1068         }
1069
1070         cmd->common.command_id = nvme_cid(req);
1071         trace_nvme_setup_cmd(req, cmd);
1072         return ret;
1073 }
1074 EXPORT_SYMBOL_GPL(nvme_setup_cmd);
1075
1076 /*
1077  * Return values:
1078  * 0:  success
1079  * >0: nvme controller's cqe status response
1080  * <0: kernel error in lieu of controller response
1081  */
1082 int nvme_execute_rq(struct request *rq, bool at_head)
1083 {
1084         blk_status_t status;
1085
1086         status = blk_execute_rq(rq, at_head);
1087         if (nvme_req(rq)->flags & NVME_REQ_CANCELLED)
1088                 return -EINTR;
1089         if (nvme_req(rq)->status)
1090                 return nvme_req(rq)->status;
1091         return blk_status_to_errno(status);
1092 }
1093 EXPORT_SYMBOL_NS_GPL(nvme_execute_rq, NVME_TARGET_PASSTHRU);
1094
1095 /*
1096  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1097  * if the result is positive, it's an NVM Express status code
1098  */
1099 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1100                 union nvme_result *result, void *buffer, unsigned bufflen,
1101                 int qid, nvme_submit_flags_t flags)
1102 {
1103         struct request *req;
1104         int ret;
1105         blk_mq_req_flags_t blk_flags = 0;
1106
1107         if (flags & NVME_SUBMIT_NOWAIT)
1108                 blk_flags |= BLK_MQ_REQ_NOWAIT;
1109         if (flags & NVME_SUBMIT_RESERVED)
1110                 blk_flags |= BLK_MQ_REQ_RESERVED;
1111         if (qid == NVME_QID_ANY)
1112                 req = blk_mq_alloc_request(q, nvme_req_op(cmd), blk_flags);
1113         else
1114                 req = blk_mq_alloc_request_hctx(q, nvme_req_op(cmd), blk_flags,
1115                                                 qid - 1);
1116
1117         if (IS_ERR(req))
1118                 return PTR_ERR(req);
1119         nvme_init_request(req, cmd);
1120         if (flags & NVME_SUBMIT_RETRY)
1121                 req->cmd_flags &= ~REQ_FAILFAST_DRIVER;
1122
1123         if (buffer && bufflen) {
1124                 ret = blk_rq_map_kern(q, req, buffer, bufflen, GFP_KERNEL);
1125                 if (ret)
1126                         goto out;
1127         }
1128
1129         ret = nvme_execute_rq(req, flags & NVME_SUBMIT_AT_HEAD);
1130         if (result && ret >= 0)
1131                 *result = nvme_req(req)->result;
1132  out:
1133         blk_mq_free_request(req);
1134         return ret;
1135 }
1136 EXPORT_SYMBOL_GPL(__nvme_submit_sync_cmd);
1137
1138 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1139                 void *buffer, unsigned bufflen)
1140 {
1141         return __nvme_submit_sync_cmd(q, cmd, NULL, buffer, bufflen,
1142                         NVME_QID_ANY, 0);
1143 }
1144 EXPORT_SYMBOL_GPL(nvme_submit_sync_cmd);
1145
1146 u32 nvme_command_effects(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1147 {
1148         u32 effects = 0;
1149
1150         if (ns) {
1151                 effects = le32_to_cpu(ns->head->effects->iocs[opcode]);
1152                 if (effects & ~(NVME_CMD_EFFECTS_CSUPP | NVME_CMD_EFFECTS_LBCC))
1153                         dev_warn_once(ctrl->device,
1154                                 "IO command:%02x has unusual effects:%08x\n",
1155                                 opcode, effects);
1156
1157                 /*
1158                  * NVME_CMD_EFFECTS_CSE_MASK causes a freeze all I/O queues,
1159                  * which would deadlock when done on an I/O command.  Note that
1160                  * We already warn about an unusual effect above.
1161                  */
1162                 effects &= ~NVME_CMD_EFFECTS_CSE_MASK;
1163         } else {
1164                 effects = le32_to_cpu(ctrl->effects->acs[opcode]);
1165         }
1166
1167         return effects;
1168 }
1169 EXPORT_SYMBOL_NS_GPL(nvme_command_effects, NVME_TARGET_PASSTHRU);
1170
1171 u32 nvme_passthru_start(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u8 opcode)
1172 {
1173         u32 effects = nvme_command_effects(ctrl, ns, opcode);
1174
1175         /*
1176          * For simplicity, IO to all namespaces is quiesced even if the command
1177          * effects say only one namespace is affected.
1178          */
1179         if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1180                 mutex_lock(&ctrl->scan_lock);
1181                 mutex_lock(&ctrl->subsys->lock);
1182                 nvme_mpath_start_freeze(ctrl->subsys);
1183                 nvme_mpath_wait_freeze(ctrl->subsys);
1184                 nvme_start_freeze(ctrl);
1185                 nvme_wait_freeze(ctrl);
1186         }
1187         return effects;
1188 }
1189 EXPORT_SYMBOL_NS_GPL(nvme_passthru_start, NVME_TARGET_PASSTHRU);
1190
1191 void nvme_passthru_end(struct nvme_ctrl *ctrl, struct nvme_ns *ns, u32 effects,
1192                        struct nvme_command *cmd, int status)
1193 {
1194         if (effects & NVME_CMD_EFFECTS_CSE_MASK) {
1195                 nvme_unfreeze(ctrl);
1196                 nvme_mpath_unfreeze(ctrl->subsys);
1197                 mutex_unlock(&ctrl->subsys->lock);
1198                 mutex_unlock(&ctrl->scan_lock);
1199         }
1200         if (effects & NVME_CMD_EFFECTS_CCC) {
1201                 if (!test_and_set_bit(NVME_CTRL_DIRTY_CAPABILITY,
1202                                       &ctrl->flags)) {
1203                         dev_info(ctrl->device,
1204 "controller capabilities changed, reset may be required to take effect.\n");
1205                 }
1206         }
1207         if (effects & (NVME_CMD_EFFECTS_NIC | NVME_CMD_EFFECTS_NCC)) {
1208                 nvme_queue_scan(ctrl);
1209                 flush_work(&ctrl->scan_work);
1210         }
1211         if (ns)
1212                 return;
1213
1214         switch (cmd->common.opcode) {
1215         case nvme_admin_set_features:
1216                 switch (le32_to_cpu(cmd->common.cdw10) & 0xFF) {
1217                 case NVME_FEAT_KATO:
1218                         /*
1219                          * Keep alive commands interval on the host should be
1220                          * updated when KATO is modified by Set Features
1221                          * commands.
1222                          */
1223                         if (!status)
1224                                 nvme_update_keep_alive(ctrl, cmd);
1225                         break;
1226                 default:
1227                         break;
1228                 }
1229                 break;
1230         default:
1231                 break;
1232         }
1233 }
1234 EXPORT_SYMBOL_NS_GPL(nvme_passthru_end, NVME_TARGET_PASSTHRU);
1235
1236 /*
1237  * Recommended frequency for KATO commands per NVMe 1.4 section 7.12.1:
1238  *
1239  *   The host should send Keep Alive commands at half of the Keep Alive Timeout
1240  *   accounting for transport roundtrip times [..].
1241  */
1242 static unsigned long nvme_keep_alive_work_period(struct nvme_ctrl *ctrl)
1243 {
1244         unsigned long delay = ctrl->kato * HZ / 2;
1245
1246         /*
1247          * When using Traffic Based Keep Alive, we need to run
1248          * nvme_keep_alive_work at twice the normal frequency, as one
1249          * command completion can postpone sending a keep alive command
1250          * by up to twice the delay between runs.
1251          */
1252         if (ctrl->ctratt & NVME_CTRL_ATTR_TBKAS)
1253                 delay /= 2;
1254         return delay;
1255 }
1256
1257 static void nvme_queue_keep_alive_work(struct nvme_ctrl *ctrl)
1258 {
1259         unsigned long now = jiffies;
1260         unsigned long delay = nvme_keep_alive_work_period(ctrl);
1261         unsigned long ka_next_check_tm = ctrl->ka_last_check_time + delay;
1262
1263         if (time_after(now, ka_next_check_tm))
1264                 delay = 0;
1265         else
1266                 delay = ka_next_check_tm - now;
1267
1268         queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1269 }
1270
1271 static enum rq_end_io_ret nvme_keep_alive_end_io(struct request *rq,
1272                                                  blk_status_t status)
1273 {
1274         struct nvme_ctrl *ctrl = rq->end_io_data;
1275         unsigned long flags;
1276         bool startka = false;
1277         unsigned long rtt = jiffies - (rq->deadline - rq->timeout);
1278         unsigned long delay = nvme_keep_alive_work_period(ctrl);
1279
1280         /*
1281          * Subtract off the keepalive RTT so nvme_keep_alive_work runs
1282          * at the desired frequency.
1283          */
1284         if (rtt <= delay) {
1285                 delay -= rtt;
1286         } else {
1287                 dev_warn(ctrl->device, "long keepalive RTT (%u ms)\n",
1288                          jiffies_to_msecs(rtt));
1289                 delay = 0;
1290         }
1291
1292         blk_mq_free_request(rq);
1293
1294         if (status) {
1295                 dev_err(ctrl->device,
1296                         "failed nvme_keep_alive_end_io error=%d\n",
1297                                 status);
1298                 return RQ_END_IO_NONE;
1299         }
1300
1301         ctrl->ka_last_check_time = jiffies;
1302         ctrl->comp_seen = false;
1303         spin_lock_irqsave(&ctrl->lock, flags);
1304         if (ctrl->state == NVME_CTRL_LIVE ||
1305             ctrl->state == NVME_CTRL_CONNECTING)
1306                 startka = true;
1307         spin_unlock_irqrestore(&ctrl->lock, flags);
1308         if (startka)
1309                 queue_delayed_work(nvme_wq, &ctrl->ka_work, delay);
1310         return RQ_END_IO_NONE;
1311 }
1312
1313 static void nvme_keep_alive_work(struct work_struct *work)
1314 {
1315         struct nvme_ctrl *ctrl = container_of(to_delayed_work(work),
1316                         struct nvme_ctrl, ka_work);
1317         bool comp_seen = ctrl->comp_seen;
1318         struct request *rq;
1319
1320         ctrl->ka_last_check_time = jiffies;
1321
1322         if ((ctrl->ctratt & NVME_CTRL_ATTR_TBKAS) && comp_seen) {
1323                 dev_dbg(ctrl->device,
1324                         "reschedule traffic based keep-alive timer\n");
1325                 ctrl->comp_seen = false;
1326                 nvme_queue_keep_alive_work(ctrl);
1327                 return;
1328         }
1329
1330         rq = blk_mq_alloc_request(ctrl->admin_q, nvme_req_op(&ctrl->ka_cmd),
1331                                   BLK_MQ_REQ_RESERVED | BLK_MQ_REQ_NOWAIT);
1332         if (IS_ERR(rq)) {
1333                 /* allocation failure, reset the controller */
1334                 dev_err(ctrl->device, "keep-alive failed: %ld\n", PTR_ERR(rq));
1335                 nvme_reset_ctrl(ctrl);
1336                 return;
1337         }
1338         nvme_init_request(rq, &ctrl->ka_cmd);
1339
1340         rq->timeout = ctrl->kato * HZ;
1341         rq->end_io = nvme_keep_alive_end_io;
1342         rq->end_io_data = ctrl;
1343         blk_execute_rq_nowait(rq, false);
1344 }
1345
1346 static void nvme_start_keep_alive(struct nvme_ctrl *ctrl)
1347 {
1348         if (unlikely(ctrl->kato == 0))
1349                 return;
1350
1351         nvme_queue_keep_alive_work(ctrl);
1352 }
1353
1354 void nvme_stop_keep_alive(struct nvme_ctrl *ctrl)
1355 {
1356         if (unlikely(ctrl->kato == 0))
1357                 return;
1358
1359         cancel_delayed_work_sync(&ctrl->ka_work);
1360 }
1361 EXPORT_SYMBOL_GPL(nvme_stop_keep_alive);
1362
1363 static void nvme_update_keep_alive(struct nvme_ctrl *ctrl,
1364                                    struct nvme_command *cmd)
1365 {
1366         unsigned int new_kato =
1367                 DIV_ROUND_UP(le32_to_cpu(cmd->common.cdw11), 1000);
1368
1369         dev_info(ctrl->device,
1370                  "keep alive interval updated from %u ms to %u ms\n",
1371                  ctrl->kato * 1000 / 2, new_kato * 1000 / 2);
1372
1373         nvme_stop_keep_alive(ctrl);
1374         ctrl->kato = new_kato;
1375         nvme_start_keep_alive(ctrl);
1376 }
1377
1378 /*
1379  * In NVMe 1.0 the CNS field was just a binary controller or namespace
1380  * flag, thus sending any new CNS opcodes has a big chance of not working.
1381  * Qemu unfortunately had that bug after reporting a 1.1 version compliance
1382  * (but not for any later version).
1383  */
1384 static bool nvme_ctrl_limited_cns(struct nvme_ctrl *ctrl)
1385 {
1386         if (ctrl->quirks & NVME_QUIRK_IDENTIFY_CNS)
1387                 return ctrl->vs < NVME_VS(1, 2, 0);
1388         return ctrl->vs < NVME_VS(1, 1, 0);
1389 }
1390
1391 static int nvme_identify_ctrl(struct nvme_ctrl *dev, struct nvme_id_ctrl **id)
1392 {
1393         struct nvme_command c = { };
1394         int error;
1395
1396         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1397         c.identify.opcode = nvme_admin_identify;
1398         c.identify.cns = NVME_ID_CNS_CTRL;
1399
1400         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1401         if (!*id)
1402                 return -ENOMEM;
1403
1404         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1405                         sizeof(struct nvme_id_ctrl));
1406         if (error) {
1407                 kfree(*id);
1408                 *id = NULL;
1409         }
1410         return error;
1411 }
1412
1413 static int nvme_process_ns_desc(struct nvme_ctrl *ctrl, struct nvme_ns_ids *ids,
1414                 struct nvme_ns_id_desc *cur, bool *csi_seen)
1415 {
1416         const char *warn_str = "ctrl returned bogus length:";
1417         void *data = cur;
1418
1419         switch (cur->nidt) {
1420         case NVME_NIDT_EUI64:
1421                 if (cur->nidl != NVME_NIDT_EUI64_LEN) {
1422                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_EUI64\n",
1423                                  warn_str, cur->nidl);
1424                         return -1;
1425                 }
1426                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1427                         return NVME_NIDT_EUI64_LEN;
1428                 memcpy(ids->eui64, data + sizeof(*cur), NVME_NIDT_EUI64_LEN);
1429                 return NVME_NIDT_EUI64_LEN;
1430         case NVME_NIDT_NGUID:
1431                 if (cur->nidl != NVME_NIDT_NGUID_LEN) {
1432                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_NGUID\n",
1433                                  warn_str, cur->nidl);
1434                         return -1;
1435                 }
1436                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1437                         return NVME_NIDT_NGUID_LEN;
1438                 memcpy(ids->nguid, data + sizeof(*cur), NVME_NIDT_NGUID_LEN);
1439                 return NVME_NIDT_NGUID_LEN;
1440         case NVME_NIDT_UUID:
1441                 if (cur->nidl != NVME_NIDT_UUID_LEN) {
1442                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_UUID\n",
1443                                  warn_str, cur->nidl);
1444                         return -1;
1445                 }
1446                 if (ctrl->quirks & NVME_QUIRK_BOGUS_NID)
1447                         return NVME_NIDT_UUID_LEN;
1448                 uuid_copy(&ids->uuid, data + sizeof(*cur));
1449                 return NVME_NIDT_UUID_LEN;
1450         case NVME_NIDT_CSI:
1451                 if (cur->nidl != NVME_NIDT_CSI_LEN) {
1452                         dev_warn(ctrl->device, "%s %d for NVME_NIDT_CSI\n",
1453                                  warn_str, cur->nidl);
1454                         return -1;
1455                 }
1456                 memcpy(&ids->csi, data + sizeof(*cur), NVME_NIDT_CSI_LEN);
1457                 *csi_seen = true;
1458                 return NVME_NIDT_CSI_LEN;
1459         default:
1460                 /* Skip unknown types */
1461                 return cur->nidl;
1462         }
1463 }
1464
1465 static int nvme_identify_ns_descs(struct nvme_ctrl *ctrl,
1466                 struct nvme_ns_info *info)
1467 {
1468         struct nvme_command c = { };
1469         bool csi_seen = false;
1470         int status, pos, len;
1471         void *data;
1472
1473         if (ctrl->vs < NVME_VS(1, 3, 0) && !nvme_multi_css(ctrl))
1474                 return 0;
1475         if (ctrl->quirks & NVME_QUIRK_NO_NS_DESC_LIST)
1476                 return 0;
1477
1478         c.identify.opcode = nvme_admin_identify;
1479         c.identify.nsid = cpu_to_le32(info->nsid);
1480         c.identify.cns = NVME_ID_CNS_NS_DESC_LIST;
1481
1482         data = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
1483         if (!data)
1484                 return -ENOMEM;
1485
1486         status = nvme_submit_sync_cmd(ctrl->admin_q, &c, data,
1487                                       NVME_IDENTIFY_DATA_SIZE);
1488         if (status) {
1489                 dev_warn(ctrl->device,
1490                         "Identify Descriptors failed (nsid=%u, status=0x%x)\n",
1491                         info->nsid, status);
1492                 goto free_data;
1493         }
1494
1495         for (pos = 0; pos < NVME_IDENTIFY_DATA_SIZE; pos += len) {
1496                 struct nvme_ns_id_desc *cur = data + pos;
1497
1498                 if (cur->nidl == 0)
1499                         break;
1500
1501                 len = nvme_process_ns_desc(ctrl, &info->ids, cur, &csi_seen);
1502                 if (len < 0)
1503                         break;
1504
1505                 len += sizeof(*cur);
1506         }
1507
1508         if (nvme_multi_css(ctrl) && !csi_seen) {
1509                 dev_warn(ctrl->device, "Command set not reported for nsid:%d\n",
1510                          info->nsid);
1511                 status = -EINVAL;
1512         }
1513
1514 free_data:
1515         kfree(data);
1516         return status;
1517 }
1518
1519 int nvme_identify_ns(struct nvme_ctrl *ctrl, unsigned nsid,
1520                         struct nvme_id_ns **id)
1521 {
1522         struct nvme_command c = { };
1523         int error;
1524
1525         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1526         c.identify.opcode = nvme_admin_identify;
1527         c.identify.nsid = cpu_to_le32(nsid);
1528         c.identify.cns = NVME_ID_CNS_NS;
1529
1530         *id = kmalloc(sizeof(**id), GFP_KERNEL);
1531         if (!*id)
1532                 return -ENOMEM;
1533
1534         error = nvme_submit_sync_cmd(ctrl->admin_q, &c, *id, sizeof(**id));
1535         if (error) {
1536                 dev_warn(ctrl->device, "Identify namespace failed (%d)\n", error);
1537                 kfree(*id);
1538                 *id = NULL;
1539         }
1540         return error;
1541 }
1542
1543 static int nvme_ns_info_from_identify(struct nvme_ctrl *ctrl,
1544                 struct nvme_ns_info *info)
1545 {
1546         struct nvme_ns_ids *ids = &info->ids;
1547         struct nvme_id_ns *id;
1548         int ret;
1549
1550         ret = nvme_identify_ns(ctrl, info->nsid, &id);
1551         if (ret)
1552                 return ret;
1553
1554         if (id->ncap == 0) {
1555                 /* namespace not allocated or attached */
1556                 info->is_removed = true;
1557                 ret = -ENODEV;
1558                 goto error;
1559         }
1560
1561         info->anagrpid = id->anagrpid;
1562         info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1563         info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1564         info->is_ready = true;
1565         if (ctrl->quirks & NVME_QUIRK_BOGUS_NID) {
1566                 dev_info(ctrl->device,
1567                          "Ignoring bogus Namespace Identifiers\n");
1568         } else {
1569                 if (ctrl->vs >= NVME_VS(1, 1, 0) &&
1570                     !memchr_inv(ids->eui64, 0, sizeof(ids->eui64)))
1571                         memcpy(ids->eui64, id->eui64, sizeof(ids->eui64));
1572                 if (ctrl->vs >= NVME_VS(1, 2, 0) &&
1573                     !memchr_inv(ids->nguid, 0, sizeof(ids->nguid)))
1574                         memcpy(ids->nguid, id->nguid, sizeof(ids->nguid));
1575         }
1576
1577 error:
1578         kfree(id);
1579         return ret;
1580 }
1581
1582 static int nvme_ns_info_from_id_cs_indep(struct nvme_ctrl *ctrl,
1583                 struct nvme_ns_info *info)
1584 {
1585         struct nvme_id_ns_cs_indep *id;
1586         struct nvme_command c = {
1587                 .identify.opcode        = nvme_admin_identify,
1588                 .identify.nsid          = cpu_to_le32(info->nsid),
1589                 .identify.cns           = NVME_ID_CNS_NS_CS_INDEP,
1590         };
1591         int ret;
1592
1593         id = kmalloc(sizeof(*id), GFP_KERNEL);
1594         if (!id)
1595                 return -ENOMEM;
1596
1597         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
1598         if (!ret) {
1599                 info->anagrpid = id->anagrpid;
1600                 info->is_shared = id->nmic & NVME_NS_NMIC_SHARED;
1601                 info->is_readonly = id->nsattr & NVME_NS_ATTR_RO;
1602                 info->is_ready = id->nstat & NVME_NSTAT_NRDY;
1603         }
1604         kfree(id);
1605         return ret;
1606 }
1607
1608 static int nvme_features(struct nvme_ctrl *dev, u8 op, unsigned int fid,
1609                 unsigned int dword11, void *buffer, size_t buflen, u32 *result)
1610 {
1611         union nvme_result res = { 0 };
1612         struct nvme_command c = { };
1613         int ret;
1614
1615         c.features.opcode = op;
1616         c.features.fid = cpu_to_le32(fid);
1617         c.features.dword11 = cpu_to_le32(dword11);
1618
1619         ret = __nvme_submit_sync_cmd(dev->admin_q, &c, &res,
1620                         buffer, buflen, NVME_QID_ANY, 0);
1621         if (ret >= 0 && result)
1622                 *result = le32_to_cpu(res.u32);
1623         return ret;
1624 }
1625
1626 int nvme_set_features(struct nvme_ctrl *dev, unsigned int fid,
1627                       unsigned int dword11, void *buffer, size_t buflen,
1628                       u32 *result)
1629 {
1630         return nvme_features(dev, nvme_admin_set_features, fid, dword11, buffer,
1631                              buflen, result);
1632 }
1633 EXPORT_SYMBOL_GPL(nvme_set_features);
1634
1635 int nvme_get_features(struct nvme_ctrl *dev, unsigned int fid,
1636                       unsigned int dword11, void *buffer, size_t buflen,
1637                       u32 *result)
1638 {
1639         return nvme_features(dev, nvme_admin_get_features, fid, dword11, buffer,
1640                              buflen, result);
1641 }
1642 EXPORT_SYMBOL_GPL(nvme_get_features);
1643
1644 int nvme_set_queue_count(struct nvme_ctrl *ctrl, int *count)
1645 {
1646         u32 q_count = (*count - 1) | ((*count - 1) << 16);
1647         u32 result;
1648         int status, nr_io_queues;
1649
1650         status = nvme_set_features(ctrl, NVME_FEAT_NUM_QUEUES, q_count, NULL, 0,
1651                         &result);
1652         if (status < 0)
1653                 return status;
1654
1655         /*
1656          * Degraded controllers might return an error when setting the queue
1657          * count.  We still want to be able to bring them online and offer
1658          * access to the admin queue, as that might be only way to fix them up.
1659          */
1660         if (status > 0) {
1661                 dev_err(ctrl->device, "Could not set queue count (%d)\n", status);
1662                 *count = 0;
1663         } else {
1664                 nr_io_queues = min(result & 0xffff, result >> 16) + 1;
1665                 *count = min(*count, nr_io_queues);
1666         }
1667
1668         return 0;
1669 }
1670 EXPORT_SYMBOL_GPL(nvme_set_queue_count);
1671
1672 #define NVME_AEN_SUPPORTED \
1673         (NVME_AEN_CFG_NS_ATTR | NVME_AEN_CFG_FW_ACT | \
1674          NVME_AEN_CFG_ANA_CHANGE | NVME_AEN_CFG_DISC_CHANGE)
1675
1676 static void nvme_enable_aen(struct nvme_ctrl *ctrl)
1677 {
1678         u32 result, supported_aens = ctrl->oaes & NVME_AEN_SUPPORTED;
1679         int status;
1680
1681         if (!supported_aens)
1682                 return;
1683
1684         status = nvme_set_features(ctrl, NVME_FEAT_ASYNC_EVENT, supported_aens,
1685                         NULL, 0, &result);
1686         if (status)
1687                 dev_warn(ctrl->device, "Failed to configure AEN (cfg %x)\n",
1688                          supported_aens);
1689
1690         queue_work(nvme_wq, &ctrl->async_event_work);
1691 }
1692
1693 static int nvme_ns_open(struct nvme_ns *ns)
1694 {
1695
1696         /* should never be called due to GENHD_FL_HIDDEN */
1697         if (WARN_ON_ONCE(nvme_ns_head_multipath(ns->head)))
1698                 goto fail;
1699         if (!nvme_get_ns(ns))
1700                 goto fail;
1701         if (!try_module_get(ns->ctrl->ops->module))
1702                 goto fail_put_ns;
1703
1704         return 0;
1705
1706 fail_put_ns:
1707         nvme_put_ns(ns);
1708 fail:
1709         return -ENXIO;
1710 }
1711
1712 static void nvme_ns_release(struct nvme_ns *ns)
1713 {
1714
1715         module_put(ns->ctrl->ops->module);
1716         nvme_put_ns(ns);
1717 }
1718
1719 static int nvme_open(struct gendisk *disk, blk_mode_t mode)
1720 {
1721         return nvme_ns_open(disk->private_data);
1722 }
1723
1724 static void nvme_release(struct gendisk *disk)
1725 {
1726         nvme_ns_release(disk->private_data);
1727 }
1728
1729 int nvme_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1730 {
1731         /* some standard values */
1732         geo->heads = 1 << 6;
1733         geo->sectors = 1 << 5;
1734         geo->cylinders = get_capacity(bdev->bd_disk) >> 11;
1735         return 0;
1736 }
1737
1738 static bool nvme_init_integrity(struct gendisk *disk, struct nvme_ns_head *head)
1739 {
1740         struct blk_integrity integrity = { };
1741
1742         blk_integrity_unregister(disk);
1743
1744         if (!head->ms)
1745                 return true;
1746
1747         /*
1748          * PI can always be supported as we can ask the controller to simply
1749          * insert/strip it, which is not possible for other kinds of metadata.
1750          */
1751         if (!IS_ENABLED(CONFIG_BLK_DEV_INTEGRITY) ||
1752             !(head->features & NVME_NS_METADATA_SUPPORTED))
1753                 return nvme_ns_has_pi(head);
1754
1755         switch (head->pi_type) {
1756         case NVME_NS_DPS_PI_TYPE3:
1757                 switch (head->guard_type) {
1758                 case NVME_NVM_NS_16B_GUARD:
1759                         integrity.profile = &t10_pi_type3_crc;
1760                         integrity.tag_size = sizeof(u16) + sizeof(u32);
1761                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1762                         break;
1763                 case NVME_NVM_NS_64B_GUARD:
1764                         integrity.profile = &ext_pi_type3_crc64;
1765                         integrity.tag_size = sizeof(u16) + 6;
1766                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1767                         break;
1768                 default:
1769                         integrity.profile = NULL;
1770                         break;
1771                 }
1772                 break;
1773         case NVME_NS_DPS_PI_TYPE1:
1774         case NVME_NS_DPS_PI_TYPE2:
1775                 switch (head->guard_type) {
1776                 case NVME_NVM_NS_16B_GUARD:
1777                         integrity.profile = &t10_pi_type1_crc;
1778                         integrity.tag_size = sizeof(u16);
1779                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1780                         break;
1781                 case NVME_NVM_NS_64B_GUARD:
1782                         integrity.profile = &ext_pi_type1_crc64;
1783                         integrity.tag_size = sizeof(u16);
1784                         integrity.flags |= BLK_INTEGRITY_DEVICE_CAPABLE;
1785                         break;
1786                 default:
1787                         integrity.profile = NULL;
1788                         break;
1789                 }
1790                 break;
1791         default:
1792                 integrity.profile = NULL;
1793                 break;
1794         }
1795
1796         integrity.tuple_size = head->ms;
1797         integrity.pi_offset = head->pi_offset;
1798         blk_integrity_register(disk, &integrity);
1799         return true;
1800 }
1801
1802 static void nvme_config_discard(struct nvme_ns *ns, struct queue_limits *lim)
1803 {
1804         struct nvme_ctrl *ctrl = ns->ctrl;
1805
1806         BUILD_BUG_ON(PAGE_SIZE / sizeof(struct nvme_dsm_range) <
1807                         NVME_DSM_MAX_RANGES);
1808
1809         if (ctrl->dmrsl && ctrl->dmrsl <= nvme_sect_to_lba(ns->head, UINT_MAX))
1810                 lim->max_hw_discard_sectors =
1811                         nvme_lba_to_sect(ns->head, ctrl->dmrsl);
1812         else if (ctrl->oncs & NVME_CTRL_ONCS_DSM)
1813                 lim->max_hw_discard_sectors = UINT_MAX;
1814         else
1815                 lim->max_hw_discard_sectors = 0;
1816
1817         lim->discard_granularity = lim->logical_block_size;
1818
1819         if (ctrl->dmrl)
1820                 lim->max_discard_segments = ctrl->dmrl;
1821         else
1822                 lim->max_discard_segments = NVME_DSM_MAX_RANGES;
1823 }
1824
1825 static bool nvme_ns_ids_equal(struct nvme_ns_ids *a, struct nvme_ns_ids *b)
1826 {
1827         return uuid_equal(&a->uuid, &b->uuid) &&
1828                 memcmp(&a->nguid, &b->nguid, sizeof(a->nguid)) == 0 &&
1829                 memcmp(&a->eui64, &b->eui64, sizeof(a->eui64)) == 0 &&
1830                 a->csi == b->csi;
1831 }
1832
1833 static int nvme_identify_ns_nvm(struct nvme_ctrl *ctrl, unsigned int nsid,
1834                 struct nvme_id_ns_nvm **nvmp)
1835 {
1836         struct nvme_command c = {
1837                 .identify.opcode        = nvme_admin_identify,
1838                 .identify.nsid          = cpu_to_le32(nsid),
1839                 .identify.cns           = NVME_ID_CNS_CS_NS,
1840                 .identify.csi           = NVME_CSI_NVM,
1841         };
1842         struct nvme_id_ns_nvm *nvm;
1843         int ret;
1844
1845         nvm = kzalloc(sizeof(*nvm), GFP_KERNEL);
1846         if (!nvm)
1847                 return -ENOMEM;
1848
1849         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, nvm, sizeof(*nvm));
1850         if (ret)
1851                 kfree(nvm);
1852         else
1853                 *nvmp = nvm;
1854         return ret;
1855 }
1856
1857 static void nvme_configure_pi_elbas(struct nvme_ns_head *head,
1858                 struct nvme_id_ns *id, struct nvme_id_ns_nvm *nvm)
1859 {
1860         u32 elbaf = le32_to_cpu(nvm->elbaf[nvme_lbaf_index(id->flbas)]);
1861
1862         /* no support for storage tag formats right now */
1863         if (nvme_elbaf_sts(elbaf))
1864                 return;
1865
1866         head->guard_type = nvme_elbaf_guard_type(elbaf);
1867         switch (head->guard_type) {
1868         case NVME_NVM_NS_64B_GUARD:
1869                 head->pi_size = sizeof(struct crc64_pi_tuple);
1870                 break;
1871         case NVME_NVM_NS_16B_GUARD:
1872                 head->pi_size = sizeof(struct t10_pi_tuple);
1873                 break;
1874         default:
1875                 break;
1876         }
1877 }
1878
1879 static void nvme_configure_metadata(struct nvme_ctrl *ctrl,
1880                 struct nvme_ns_head *head, struct nvme_id_ns *id,
1881                 struct nvme_id_ns_nvm *nvm)
1882 {
1883         head->features &= ~(NVME_NS_METADATA_SUPPORTED | NVME_NS_EXT_LBAS);
1884         head->pi_type = 0;
1885         head->pi_size = 0;
1886         head->pi_offset = 0;
1887         head->ms = le16_to_cpu(id->lbaf[nvme_lbaf_index(id->flbas)].ms);
1888         if (!head->ms || !(ctrl->ops->flags & NVME_F_METADATA_SUPPORTED))
1889                 return;
1890
1891         if (nvm && (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)) {
1892                 nvme_configure_pi_elbas(head, id, nvm);
1893         } else {
1894                 head->pi_size = sizeof(struct t10_pi_tuple);
1895                 head->guard_type = NVME_NVM_NS_16B_GUARD;
1896         }
1897
1898         if (head->pi_size && head->ms >= head->pi_size)
1899                 head->pi_type = id->dps & NVME_NS_DPS_PI_MASK;
1900         if (!(id->dps & NVME_NS_DPS_PI_FIRST))
1901                 head->pi_offset = head->ms - head->pi_size;
1902
1903         if (ctrl->ops->flags & NVME_F_FABRICS) {
1904                 /*
1905                  * The NVMe over Fabrics specification only supports metadata as
1906                  * part of the extended data LBA.  We rely on HCA/HBA support to
1907                  * remap the separate metadata buffer from the block layer.
1908                  */
1909                 if (WARN_ON_ONCE(!(id->flbas & NVME_NS_FLBAS_META_EXT)))
1910                         return;
1911
1912                 head->features |= NVME_NS_EXT_LBAS;
1913
1914                 /*
1915                  * The current fabrics transport drivers support namespace
1916                  * metadata formats only if nvme_ns_has_pi() returns true.
1917                  * Suppress support for all other formats so the namespace will
1918                  * have a 0 capacity and not be usable through the block stack.
1919                  *
1920                  * Note, this check will need to be modified if any drivers
1921                  * gain the ability to use other metadata formats.
1922                  */
1923                 if (ctrl->max_integrity_segments && nvme_ns_has_pi(head))
1924                         head->features |= NVME_NS_METADATA_SUPPORTED;
1925         } else {
1926                 /*
1927                  * For PCIe controllers, we can't easily remap the separate
1928                  * metadata buffer from the block layer and thus require a
1929                  * separate metadata buffer for block layer metadata/PI support.
1930                  * We allow extended LBAs for the passthrough interface, though.
1931                  */
1932                 if (id->flbas & NVME_NS_FLBAS_META_EXT)
1933                         head->features |= NVME_NS_EXT_LBAS;
1934                 else
1935                         head->features |= NVME_NS_METADATA_SUPPORTED;
1936         }
1937 }
1938
1939 static u32 nvme_max_drv_segments(struct nvme_ctrl *ctrl)
1940 {
1941         return ctrl->max_hw_sectors / (NVME_CTRL_PAGE_SIZE >> SECTOR_SHIFT) + 1;
1942 }
1943
1944 static void nvme_set_ctrl_limits(struct nvme_ctrl *ctrl,
1945                 struct queue_limits *lim)
1946 {
1947         lim->max_hw_sectors = ctrl->max_hw_sectors;
1948         lim->max_segments = min_t(u32, USHRT_MAX,
1949                 min_not_zero(nvme_max_drv_segments(ctrl), ctrl->max_segments));
1950         lim->max_integrity_segments = ctrl->max_integrity_segments;
1951         lim->virt_boundary_mask = NVME_CTRL_PAGE_SIZE - 1;
1952         lim->max_segment_size = UINT_MAX;
1953         lim->dma_alignment = 3;
1954 }
1955
1956 static bool nvme_update_disk_info(struct nvme_ns *ns, struct nvme_id_ns *id,
1957                 struct queue_limits *lim)
1958 {
1959         struct nvme_ns_head *head = ns->head;
1960         u32 bs = 1U << head->lba_shift;
1961         u32 atomic_bs, phys_bs, io_opt = 0;
1962         bool valid = true;
1963
1964         /*
1965          * The block layer can't support LBA sizes larger than the page size
1966          * or smaller than a sector size yet, so catch this early and don't
1967          * allow block I/O.
1968          */
1969         if (head->lba_shift > PAGE_SHIFT || head->lba_shift < SECTOR_SHIFT) {
1970                 bs = (1 << 9);
1971                 valid = false;
1972         }
1973
1974         atomic_bs = phys_bs = bs;
1975         if (id->nabo == 0) {
1976                 /*
1977                  * Bit 1 indicates whether NAWUPF is defined for this namespace
1978                  * and whether it should be used instead of AWUPF. If NAWUPF ==
1979                  * 0 then AWUPF must be used instead.
1980                  */
1981                 if (id->nsfeat & NVME_NS_FEAT_ATOMICS && id->nawupf)
1982                         atomic_bs = (1 + le16_to_cpu(id->nawupf)) * bs;
1983                 else
1984                         atomic_bs = (1 + ns->ctrl->subsys->awupf) * bs;
1985         }
1986
1987         if (id->nsfeat & NVME_NS_FEAT_IO_OPT) {
1988                 /* NPWG = Namespace Preferred Write Granularity */
1989                 phys_bs = bs * (1 + le16_to_cpu(id->npwg));
1990                 /* NOWS = Namespace Optimal Write Size */
1991                 io_opt = bs * (1 + le16_to_cpu(id->nows));
1992         }
1993
1994         /*
1995          * Linux filesystems assume writing a single physical block is
1996          * an atomic operation. Hence limit the physical block size to the
1997          * value of the Atomic Write Unit Power Fail parameter.
1998          */
1999         lim->logical_block_size = bs;
2000         lim->physical_block_size = min(phys_bs, atomic_bs);
2001         lim->io_min = phys_bs;
2002         lim->io_opt = io_opt;
2003         if (ns->ctrl->quirks & NVME_QUIRK_DEALLOCATE_ZEROES)
2004                 lim->max_write_zeroes_sectors = UINT_MAX;
2005         else
2006                 lim->max_write_zeroes_sectors = ns->ctrl->max_zeroes_sectors;
2007         return valid;
2008 }
2009
2010 static bool nvme_ns_is_readonly(struct nvme_ns *ns, struct nvme_ns_info *info)
2011 {
2012         return info->is_readonly || test_bit(NVME_NS_FORCE_RO, &ns->flags);
2013 }
2014
2015 static inline bool nvme_first_scan(struct gendisk *disk)
2016 {
2017         /* nvme_alloc_ns() scans the disk prior to adding it */
2018         return !disk_live(disk);
2019 }
2020
2021 static void nvme_set_chunk_sectors(struct nvme_ns *ns, struct nvme_id_ns *id,
2022                 struct queue_limits *lim)
2023 {
2024         struct nvme_ctrl *ctrl = ns->ctrl;
2025         u32 iob;
2026
2027         if ((ctrl->quirks & NVME_QUIRK_STRIPE_SIZE) &&
2028             is_power_of_2(ctrl->max_hw_sectors))
2029                 iob = ctrl->max_hw_sectors;
2030         else
2031                 iob = nvme_lba_to_sect(ns->head, le16_to_cpu(id->noiob));
2032
2033         if (!iob)
2034                 return;
2035
2036         if (!is_power_of_2(iob)) {
2037                 if (nvme_first_scan(ns->disk))
2038                         pr_warn("%s: ignoring unaligned IO boundary:%u\n",
2039                                 ns->disk->disk_name, iob);
2040                 return;
2041         }
2042
2043         if (blk_queue_is_zoned(ns->disk->queue)) {
2044                 if (nvme_first_scan(ns->disk))
2045                         pr_warn("%s: ignoring zoned namespace IO boundary\n",
2046                                 ns->disk->disk_name);
2047                 return;
2048         }
2049
2050         lim->chunk_sectors = iob;
2051 }
2052
2053 static int nvme_update_ns_info_generic(struct nvme_ns *ns,
2054                 struct nvme_ns_info *info)
2055 {
2056         struct queue_limits lim;
2057         int ret;
2058
2059         blk_mq_freeze_queue(ns->disk->queue);
2060         lim = queue_limits_start_update(ns->disk->queue);
2061         nvme_set_ctrl_limits(ns->ctrl, &lim);
2062         ret = queue_limits_commit_update(ns->disk->queue, &lim);
2063         set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2064         blk_mq_unfreeze_queue(ns->disk->queue);
2065
2066         /* Hide the block-interface for these devices */
2067         if (!ret)
2068                 ret = -ENODEV;
2069         return ret;
2070 }
2071
2072 static int nvme_update_ns_info_block(struct nvme_ns *ns,
2073                 struct nvme_ns_info *info)
2074 {
2075         bool vwc = ns->ctrl->vwc & NVME_CTRL_VWC_PRESENT;
2076         struct queue_limits lim;
2077         struct nvme_id_ns_nvm *nvm = NULL;
2078         struct nvme_id_ns *id;
2079         sector_t capacity;
2080         unsigned lbaf;
2081         int ret;
2082
2083         ret = nvme_identify_ns(ns->ctrl, info->nsid, &id);
2084         if (ret)
2085                 return ret;
2086
2087         if (id->ncap == 0) {
2088                 /* namespace not allocated or attached */
2089                 info->is_removed = true;
2090                 ret = -ENODEV;
2091                 goto out;
2092         }
2093
2094         if (ns->ctrl->ctratt & NVME_CTRL_ATTR_ELBAS) {
2095                 ret = nvme_identify_ns_nvm(ns->ctrl, info->nsid, &nvm);
2096                 if (ret < 0)
2097                         goto out;
2098         }
2099
2100         blk_mq_freeze_queue(ns->disk->queue);
2101         lbaf = nvme_lbaf_index(id->flbas);
2102         ns->head->lba_shift = id->lbaf[lbaf].ds;
2103         ns->head->nuse = le64_to_cpu(id->nuse);
2104         capacity = nvme_lba_to_sect(ns->head, le64_to_cpu(id->nsze));
2105
2106         lim = queue_limits_start_update(ns->disk->queue);
2107         nvme_set_ctrl_limits(ns->ctrl, &lim);
2108         nvme_configure_metadata(ns->ctrl, ns->head, id, nvm);
2109         nvme_set_chunk_sectors(ns, id, &lim);
2110         if (!nvme_update_disk_info(ns, id, &lim))
2111                 capacity = 0;
2112         nvme_config_discard(ns, &lim);
2113         if (IS_ENABLED(CONFIG_BLK_DEV_ZONED) &&
2114             ns->head->ids.csi == NVME_CSI_ZNS) {
2115                 ret = nvme_update_zone_info(ns, lbaf, &lim);
2116                 if (ret) {
2117                         blk_mq_unfreeze_queue(ns->disk->queue);
2118                         goto out;
2119                 }
2120         }
2121         ret = queue_limits_commit_update(ns->disk->queue, &lim);
2122         if (ret) {
2123                 blk_mq_unfreeze_queue(ns->disk->queue);
2124                 goto out;
2125         }
2126
2127         /*
2128          * Register a metadata profile for PI, or the plain non-integrity NVMe
2129          * metadata masquerading as Type 0 if supported, otherwise reject block
2130          * I/O to namespaces with metadata except when the namespace supports
2131          * PI, as it can strip/insert in that case.
2132          */
2133         if (!nvme_init_integrity(ns->disk, ns->head))
2134                 capacity = 0;
2135
2136         set_capacity_and_notify(ns->disk, capacity);
2137
2138         /*
2139          * Only set the DEAC bit if the device guarantees that reads from
2140          * deallocated data return zeroes.  While the DEAC bit does not
2141          * require that, it must be a no-op if reads from deallocated data
2142          * do not return zeroes.
2143          */
2144         if ((id->dlfeat & 0x7) == 0x1 && (id->dlfeat & (1 << 3)))
2145                 ns->head->features |= NVME_NS_DEAC;
2146         set_disk_ro(ns->disk, nvme_ns_is_readonly(ns, info));
2147         blk_queue_write_cache(ns->disk->queue, vwc, vwc);
2148         set_bit(NVME_NS_READY, &ns->flags);
2149         blk_mq_unfreeze_queue(ns->disk->queue);
2150
2151         if (blk_queue_is_zoned(ns->queue)) {
2152                 ret = blk_revalidate_disk_zones(ns->disk, NULL);
2153                 if (ret && !nvme_first_scan(ns->disk))
2154                         goto out;
2155         }
2156
2157         ret = 0;
2158 out:
2159         kfree(nvm);
2160         kfree(id);
2161         return ret;
2162 }
2163
2164 static int nvme_update_ns_info(struct nvme_ns *ns, struct nvme_ns_info *info)
2165 {
2166         bool unsupported = false;
2167         int ret;
2168
2169         switch (info->ids.csi) {
2170         case NVME_CSI_ZNS:
2171                 if (!IS_ENABLED(CONFIG_BLK_DEV_ZONED)) {
2172                         dev_info(ns->ctrl->device,
2173         "block device for nsid %u not supported without CONFIG_BLK_DEV_ZONED\n",
2174                                 info->nsid);
2175                         ret = nvme_update_ns_info_generic(ns, info);
2176                         break;
2177                 }
2178                 ret = nvme_update_ns_info_block(ns, info);
2179                 break;
2180         case NVME_CSI_NVM:
2181                 ret = nvme_update_ns_info_block(ns, info);
2182                 break;
2183         default:
2184                 dev_info(ns->ctrl->device,
2185                         "block device for nsid %u not supported (csi %u)\n",
2186                         info->nsid, info->ids.csi);
2187                 ret = nvme_update_ns_info_generic(ns, info);
2188                 break;
2189         }
2190
2191         /*
2192          * If probing fails due an unsupported feature, hide the block device,
2193          * but still allow other access.
2194          */
2195         if (ret == -ENODEV) {
2196                 ns->disk->flags |= GENHD_FL_HIDDEN;
2197                 set_bit(NVME_NS_READY, &ns->flags);
2198                 unsupported = true;
2199                 ret = 0;
2200         }
2201
2202         if (!ret && nvme_ns_head_multipath(ns->head)) {
2203                 struct queue_limits lim;
2204
2205                 blk_mq_freeze_queue(ns->head->disk->queue);
2206                 if (unsupported)
2207                         ns->head->disk->flags |= GENHD_FL_HIDDEN;
2208                 else
2209                         nvme_init_integrity(ns->head->disk, ns->head);
2210                 set_capacity_and_notify(ns->head->disk, get_capacity(ns->disk));
2211                 set_disk_ro(ns->head->disk, nvme_ns_is_readonly(ns, info));
2212                 nvme_mpath_revalidate_paths(ns);
2213
2214                 lim = queue_limits_start_update(ns->head->disk->queue);
2215                 queue_limits_stack_bdev(&lim, ns->disk->part0, 0,
2216                                         ns->head->disk->disk_name);
2217                 ret = queue_limits_commit_update(ns->head->disk->queue, &lim);
2218                 blk_mq_unfreeze_queue(ns->head->disk->queue);
2219         }
2220
2221         return ret;
2222 }
2223
2224 #ifdef CONFIG_BLK_SED_OPAL
2225 static int nvme_sec_submit(void *data, u16 spsp, u8 secp, void *buffer, size_t len,
2226                 bool send)
2227 {
2228         struct nvme_ctrl *ctrl = data;
2229         struct nvme_command cmd = { };
2230
2231         if (send)
2232                 cmd.common.opcode = nvme_admin_security_send;
2233         else
2234                 cmd.common.opcode = nvme_admin_security_recv;
2235         cmd.common.nsid = 0;
2236         cmd.common.cdw10 = cpu_to_le32(((u32)secp) << 24 | ((u32)spsp) << 8);
2237         cmd.common.cdw11 = cpu_to_le32(len);
2238
2239         return __nvme_submit_sync_cmd(ctrl->admin_q, &cmd, NULL, buffer, len,
2240                         NVME_QID_ANY, NVME_SUBMIT_AT_HEAD);
2241 }
2242
2243 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2244 {
2245         if (ctrl->oacs & NVME_CTRL_OACS_SEC_SUPP) {
2246                 if (!ctrl->opal_dev)
2247                         ctrl->opal_dev = init_opal_dev(ctrl, &nvme_sec_submit);
2248                 else if (was_suspended)
2249                         opal_unlock_from_suspend(ctrl->opal_dev);
2250         } else {
2251                 free_opal_dev(ctrl->opal_dev);
2252                 ctrl->opal_dev = NULL;
2253         }
2254 }
2255 #else
2256 static void nvme_configure_opal(struct nvme_ctrl *ctrl, bool was_suspended)
2257 {
2258 }
2259 #endif /* CONFIG_BLK_SED_OPAL */
2260
2261 #ifdef CONFIG_BLK_DEV_ZONED
2262 static int nvme_report_zones(struct gendisk *disk, sector_t sector,
2263                 unsigned int nr_zones, report_zones_cb cb, void *data)
2264 {
2265         return nvme_ns_report_zones(disk->private_data, sector, nr_zones, cb,
2266                         data);
2267 }
2268 #else
2269 #define nvme_report_zones       NULL
2270 #endif /* CONFIG_BLK_DEV_ZONED */
2271
2272 const struct block_device_operations nvme_bdev_ops = {
2273         .owner          = THIS_MODULE,
2274         .ioctl          = nvme_ioctl,
2275         .compat_ioctl   = blkdev_compat_ptr_ioctl,
2276         .open           = nvme_open,
2277         .release        = nvme_release,
2278         .getgeo         = nvme_getgeo,
2279         .report_zones   = nvme_report_zones,
2280         .pr_ops         = &nvme_pr_ops,
2281 };
2282
2283 static int nvme_wait_ready(struct nvme_ctrl *ctrl, u32 mask, u32 val,
2284                 u32 timeout, const char *op)
2285 {
2286         unsigned long timeout_jiffies = jiffies + timeout * HZ;
2287         u32 csts;
2288         int ret;
2289
2290         while ((ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts)) == 0) {
2291                 if (csts == ~0)
2292                         return -ENODEV;
2293                 if ((csts & mask) == val)
2294                         break;
2295
2296                 usleep_range(1000, 2000);
2297                 if (fatal_signal_pending(current))
2298                         return -EINTR;
2299                 if (time_after(jiffies, timeout_jiffies)) {
2300                         dev_err(ctrl->device,
2301                                 "Device not ready; aborting %s, CSTS=0x%x\n",
2302                                 op, csts);
2303                         return -ENODEV;
2304                 }
2305         }
2306
2307         return ret;
2308 }
2309
2310 int nvme_disable_ctrl(struct nvme_ctrl *ctrl, bool shutdown)
2311 {
2312         int ret;
2313
2314         ctrl->ctrl_config &= ~NVME_CC_SHN_MASK;
2315         if (shutdown)
2316                 ctrl->ctrl_config |= NVME_CC_SHN_NORMAL;
2317         else
2318                 ctrl->ctrl_config &= ~NVME_CC_ENABLE;
2319
2320         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2321         if (ret)
2322                 return ret;
2323
2324         if (shutdown) {
2325                 return nvme_wait_ready(ctrl, NVME_CSTS_SHST_MASK,
2326                                        NVME_CSTS_SHST_CMPLT,
2327                                        ctrl->shutdown_timeout, "shutdown");
2328         }
2329         if (ctrl->quirks & NVME_QUIRK_DELAY_BEFORE_CHK_RDY)
2330                 msleep(NVME_QUIRK_DELAY_AMOUNT);
2331         return nvme_wait_ready(ctrl, NVME_CSTS_RDY, 0,
2332                                (NVME_CAP_TIMEOUT(ctrl->cap) + 1) / 2, "reset");
2333 }
2334 EXPORT_SYMBOL_GPL(nvme_disable_ctrl);
2335
2336 int nvme_enable_ctrl(struct nvme_ctrl *ctrl)
2337 {
2338         unsigned dev_page_min;
2339         u32 timeout;
2340         int ret;
2341
2342         ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2343         if (ret) {
2344                 dev_err(ctrl->device, "Reading CAP failed (%d)\n", ret);
2345                 return ret;
2346         }
2347         dev_page_min = NVME_CAP_MPSMIN(ctrl->cap) + 12;
2348
2349         if (NVME_CTRL_PAGE_SHIFT < dev_page_min) {
2350                 dev_err(ctrl->device,
2351                         "Minimum device page size %u too large for host (%u)\n",
2352                         1 << dev_page_min, 1 << NVME_CTRL_PAGE_SHIFT);
2353                 return -ENODEV;
2354         }
2355
2356         if (NVME_CAP_CSS(ctrl->cap) & NVME_CAP_CSS_CSI)
2357                 ctrl->ctrl_config = NVME_CC_CSS_CSI;
2358         else
2359                 ctrl->ctrl_config = NVME_CC_CSS_NVM;
2360
2361         if (ctrl->cap & NVME_CAP_CRMS_CRWMS && ctrl->cap & NVME_CAP_CRMS_CRIMS)
2362                 ctrl->ctrl_config |= NVME_CC_CRIME;
2363
2364         ctrl->ctrl_config |= (NVME_CTRL_PAGE_SHIFT - 12) << NVME_CC_MPS_SHIFT;
2365         ctrl->ctrl_config |= NVME_CC_AMS_RR | NVME_CC_SHN_NONE;
2366         ctrl->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
2367         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2368         if (ret)
2369                 return ret;
2370
2371         /* Flush write to device (required if transport is PCI) */
2372         ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CC, &ctrl->ctrl_config);
2373         if (ret)
2374                 return ret;
2375
2376         /* CAP value may change after initial CC write */
2377         ret = ctrl->ops->reg_read64(ctrl, NVME_REG_CAP, &ctrl->cap);
2378         if (ret)
2379                 return ret;
2380
2381         timeout = NVME_CAP_TIMEOUT(ctrl->cap);
2382         if (ctrl->cap & NVME_CAP_CRMS_CRWMS) {
2383                 u32 crto, ready_timeout;
2384
2385                 ret = ctrl->ops->reg_read32(ctrl, NVME_REG_CRTO, &crto);
2386                 if (ret) {
2387                         dev_err(ctrl->device, "Reading CRTO failed (%d)\n",
2388                                 ret);
2389                         return ret;
2390                 }
2391
2392                 /*
2393                  * CRTO should always be greater or equal to CAP.TO, but some
2394                  * devices are known to get this wrong. Use the larger of the
2395                  * two values.
2396                  */
2397                 if (ctrl->ctrl_config & NVME_CC_CRIME)
2398                         ready_timeout = NVME_CRTO_CRIMT(crto);
2399                 else
2400                         ready_timeout = NVME_CRTO_CRWMT(crto);
2401
2402                 if (ready_timeout < timeout)
2403                         dev_warn_once(ctrl->device, "bad crto:%x cap:%llx\n",
2404                                       crto, ctrl->cap);
2405                 else
2406                         timeout = ready_timeout;
2407         }
2408
2409         ctrl->ctrl_config |= NVME_CC_ENABLE;
2410         ret = ctrl->ops->reg_write32(ctrl, NVME_REG_CC, ctrl->ctrl_config);
2411         if (ret)
2412                 return ret;
2413         return nvme_wait_ready(ctrl, NVME_CSTS_RDY, NVME_CSTS_RDY,
2414                                (timeout + 1) / 2, "initialisation");
2415 }
2416 EXPORT_SYMBOL_GPL(nvme_enable_ctrl);
2417
2418 static int nvme_configure_timestamp(struct nvme_ctrl *ctrl)
2419 {
2420         __le64 ts;
2421         int ret;
2422
2423         if (!(ctrl->oncs & NVME_CTRL_ONCS_TIMESTAMP))
2424                 return 0;
2425
2426         ts = cpu_to_le64(ktime_to_ms(ktime_get_real()));
2427         ret = nvme_set_features(ctrl, NVME_FEAT_TIMESTAMP, 0, &ts, sizeof(ts),
2428                         NULL);
2429         if (ret)
2430                 dev_warn_once(ctrl->device,
2431                         "could not set timestamp (%d)\n", ret);
2432         return ret;
2433 }
2434
2435 static int nvme_configure_host_options(struct nvme_ctrl *ctrl)
2436 {
2437         struct nvme_feat_host_behavior *host;
2438         u8 acre = 0, lbafee = 0;
2439         int ret;
2440
2441         /* Don't bother enabling the feature if retry delay is not reported */
2442         if (ctrl->crdt[0])
2443                 acre = NVME_ENABLE_ACRE;
2444         if (ctrl->ctratt & NVME_CTRL_ATTR_ELBAS)
2445                 lbafee = NVME_ENABLE_LBAFEE;
2446
2447         if (!acre && !lbafee)
2448                 return 0;
2449
2450         host = kzalloc(sizeof(*host), GFP_KERNEL);
2451         if (!host)
2452                 return 0;
2453
2454         host->acre = acre;
2455         host->lbafee = lbafee;
2456         ret = nvme_set_features(ctrl, NVME_FEAT_HOST_BEHAVIOR, 0,
2457                                 host, sizeof(*host), NULL);
2458         kfree(host);
2459         return ret;
2460 }
2461
2462 /*
2463  * The function checks whether the given total (exlat + enlat) latency of
2464  * a power state allows the latter to be used as an APST transition target.
2465  * It does so by comparing the latency to the primary and secondary latency
2466  * tolerances defined by module params. If there's a match, the corresponding
2467  * timeout value is returned and the matching tolerance index (1 or 2) is
2468  * reported.
2469  */
2470 static bool nvme_apst_get_transition_time(u64 total_latency,
2471                 u64 *transition_time, unsigned *last_index)
2472 {
2473         if (total_latency <= apst_primary_latency_tol_us) {
2474                 if (*last_index == 1)
2475                         return false;
2476                 *last_index = 1;
2477                 *transition_time = apst_primary_timeout_ms;
2478                 return true;
2479         }
2480         if (apst_secondary_timeout_ms &&
2481                 total_latency <= apst_secondary_latency_tol_us) {
2482                 if (*last_index <= 2)
2483                         return false;
2484                 *last_index = 2;
2485                 *transition_time = apst_secondary_timeout_ms;
2486                 return true;
2487         }
2488         return false;
2489 }
2490
2491 /*
2492  * APST (Autonomous Power State Transition) lets us program a table of power
2493  * state transitions that the controller will perform automatically.
2494  *
2495  * Depending on module params, one of the two supported techniques will be used:
2496  *
2497  * - If the parameters provide explicit timeouts and tolerances, they will be
2498  *   used to build a table with up to 2 non-operational states to transition to.
2499  *   The default parameter values were selected based on the values used by
2500  *   Microsoft's and Intel's NVMe drivers. Yet, since we don't implement dynamic
2501  *   regeneration of the APST table in the event of switching between external
2502  *   and battery power, the timeouts and tolerances reflect a compromise
2503  *   between values used by Microsoft for AC and battery scenarios.
2504  * - If not, we'll configure the table with a simple heuristic: we are willing
2505  *   to spend at most 2% of the time transitioning between power states.
2506  *   Therefore, when running in any given state, we will enter the next
2507  *   lower-power non-operational state after waiting 50 * (enlat + exlat)
2508  *   microseconds, as long as that state's exit latency is under the requested
2509  *   maximum latency.
2510  *
2511  * We will not autonomously enter any non-operational state for which the total
2512  * latency exceeds ps_max_latency_us.
2513  *
2514  * Users can set ps_max_latency_us to zero to turn off APST.
2515  */
2516 static int nvme_configure_apst(struct nvme_ctrl *ctrl)
2517 {
2518         struct nvme_feat_auto_pst *table;
2519         unsigned apste = 0;
2520         u64 max_lat_us = 0;
2521         __le64 target = 0;
2522         int max_ps = -1;
2523         int state;
2524         int ret;
2525         unsigned last_lt_index = UINT_MAX;
2526
2527         /*
2528          * If APST isn't supported or if we haven't been initialized yet,
2529          * then don't do anything.
2530          */
2531         if (!ctrl->apsta)
2532                 return 0;
2533
2534         if (ctrl->npss > 31) {
2535                 dev_warn(ctrl->device, "NPSS is invalid; not using APST\n");
2536                 return 0;
2537         }
2538
2539         table = kzalloc(sizeof(*table), GFP_KERNEL);
2540         if (!table)
2541                 return 0;
2542
2543         if (!ctrl->apst_enabled || ctrl->ps_max_latency_us == 0) {
2544                 /* Turn off APST. */
2545                 dev_dbg(ctrl->device, "APST disabled\n");
2546                 goto done;
2547         }
2548
2549         /*
2550          * Walk through all states from lowest- to highest-power.
2551          * According to the spec, lower-numbered states use more power.  NPSS,
2552          * despite the name, is the index of the lowest-power state, not the
2553          * number of states.
2554          */
2555         for (state = (int)ctrl->npss; state >= 0; state--) {
2556                 u64 total_latency_us, exit_latency_us, transition_ms;
2557
2558                 if (target)
2559                         table->entries[state] = target;
2560
2561                 /*
2562                  * Don't allow transitions to the deepest state if it's quirked
2563                  * off.
2564                  */
2565                 if (state == ctrl->npss &&
2566                     (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS))
2567                         continue;
2568
2569                 /*
2570                  * Is this state a useful non-operational state for higher-power
2571                  * states to autonomously transition to?
2572                  */
2573                 if (!(ctrl->psd[state].flags & NVME_PS_FLAGS_NON_OP_STATE))
2574                         continue;
2575
2576                 exit_latency_us = (u64)le32_to_cpu(ctrl->psd[state].exit_lat);
2577                 if (exit_latency_us > ctrl->ps_max_latency_us)
2578                         continue;
2579
2580                 total_latency_us = exit_latency_us +
2581                         le32_to_cpu(ctrl->psd[state].entry_lat);
2582
2583                 /*
2584                  * This state is good. It can be used as the APST idle target
2585                  * for higher power states.
2586                  */
2587                 if (apst_primary_timeout_ms && apst_primary_latency_tol_us) {
2588                         if (!nvme_apst_get_transition_time(total_latency_us,
2589                                         &transition_ms, &last_lt_index))
2590                                 continue;
2591                 } else {
2592                         transition_ms = total_latency_us + 19;
2593                         do_div(transition_ms, 20);
2594                         if (transition_ms > (1 << 24) - 1)
2595                                 transition_ms = (1 << 24) - 1;
2596                 }
2597
2598                 target = cpu_to_le64((state << 3) | (transition_ms << 8));
2599                 if (max_ps == -1)
2600                         max_ps = state;
2601                 if (total_latency_us > max_lat_us)
2602                         max_lat_us = total_latency_us;
2603         }
2604
2605         if (max_ps == -1)
2606                 dev_dbg(ctrl->device, "APST enabled but no non-operational states are available\n");
2607         else
2608                 dev_dbg(ctrl->device, "APST enabled: max PS = %d, max round-trip latency = %lluus, table = %*phN\n",
2609                         max_ps, max_lat_us, (int)sizeof(*table), table);
2610         apste = 1;
2611
2612 done:
2613         ret = nvme_set_features(ctrl, NVME_FEAT_AUTO_PST, apste,
2614                                 table, sizeof(*table), NULL);
2615         if (ret)
2616                 dev_err(ctrl->device, "failed to set APST feature (%d)\n", ret);
2617         kfree(table);
2618         return ret;
2619 }
2620
2621 static void nvme_set_latency_tolerance(struct device *dev, s32 val)
2622 {
2623         struct nvme_ctrl *ctrl = dev_get_drvdata(dev);
2624         u64 latency;
2625
2626         switch (val) {
2627         case PM_QOS_LATENCY_TOLERANCE_NO_CONSTRAINT:
2628         case PM_QOS_LATENCY_ANY:
2629                 latency = U64_MAX;
2630                 break;
2631
2632         default:
2633                 latency = val;
2634         }
2635
2636         if (ctrl->ps_max_latency_us != latency) {
2637                 ctrl->ps_max_latency_us = latency;
2638                 if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
2639                         nvme_configure_apst(ctrl);
2640         }
2641 }
2642
2643 struct nvme_core_quirk_entry {
2644         /*
2645          * NVMe model and firmware strings are padded with spaces.  For
2646          * simplicity, strings in the quirk table are padded with NULLs
2647          * instead.
2648          */
2649         u16 vid;
2650         const char *mn;
2651         const char *fr;
2652         unsigned long quirks;
2653 };
2654
2655 static const struct nvme_core_quirk_entry core_quirks[] = {
2656         {
2657                 /*
2658                  * This Toshiba device seems to die using any APST states.  See:
2659                  * https://bugs.launchpad.net/ubuntu/+source/linux/+bug/1678184/comments/11
2660                  */
2661                 .vid = 0x1179,
2662                 .mn = "THNSF5256GPUK TOSHIBA",
2663                 .quirks = NVME_QUIRK_NO_APST,
2664         },
2665         {
2666                 /*
2667                  * This LiteON CL1-3D*-Q11 firmware version has a race
2668                  * condition associated with actions related to suspend to idle
2669                  * LiteON has resolved the problem in future firmware
2670                  */
2671                 .vid = 0x14a4,
2672                 .fr = "22301111",
2673                 .quirks = NVME_QUIRK_SIMPLE_SUSPEND,
2674         },
2675         {
2676                 /*
2677                  * This Kioxia CD6-V Series / HPE PE8030 device times out and
2678                  * aborts I/O during any load, but more easily reproducible
2679                  * with discards (fstrim).
2680                  *
2681                  * The device is left in a state where it is also not possible
2682                  * to use "nvme set-feature" to disable APST, but booting with
2683                  * nvme_core.default_ps_max_latency=0 works.
2684                  */
2685                 .vid = 0x1e0f,
2686                 .mn = "KCD6XVUL6T40",
2687                 .quirks = NVME_QUIRK_NO_APST,
2688         },
2689         {
2690                 /*
2691                  * The external Samsung X5 SSD fails initialization without a
2692                  * delay before checking if it is ready and has a whole set of
2693                  * other problems.  To make this even more interesting, it
2694                  * shares the PCI ID with internal Samsung 970 Evo Plus that
2695                  * does not need or want these quirks.
2696                  */
2697                 .vid = 0x144d,
2698                 .mn = "Samsung Portable SSD X5",
2699                 .quirks = NVME_QUIRK_DELAY_BEFORE_CHK_RDY |
2700                           NVME_QUIRK_NO_DEEPEST_PS |
2701                           NVME_QUIRK_IGNORE_DEV_SUBNQN,
2702         }
2703 };
2704
2705 /* match is null-terminated but idstr is space-padded. */
2706 static bool string_matches(const char *idstr, const char *match, size_t len)
2707 {
2708         size_t matchlen;
2709
2710         if (!match)
2711                 return true;
2712
2713         matchlen = strlen(match);
2714         WARN_ON_ONCE(matchlen > len);
2715
2716         if (memcmp(idstr, match, matchlen))
2717                 return false;
2718
2719         for (; matchlen < len; matchlen++)
2720                 if (idstr[matchlen] != ' ')
2721                         return false;
2722
2723         return true;
2724 }
2725
2726 static bool quirk_matches(const struct nvme_id_ctrl *id,
2727                           const struct nvme_core_quirk_entry *q)
2728 {
2729         return q->vid == le16_to_cpu(id->vid) &&
2730                 string_matches(id->mn, q->mn, sizeof(id->mn)) &&
2731                 string_matches(id->fr, q->fr, sizeof(id->fr));
2732 }
2733
2734 static void nvme_init_subnqn(struct nvme_subsystem *subsys, struct nvme_ctrl *ctrl,
2735                 struct nvme_id_ctrl *id)
2736 {
2737         size_t nqnlen;
2738         int off;
2739
2740         if(!(ctrl->quirks & NVME_QUIRK_IGNORE_DEV_SUBNQN)) {
2741                 nqnlen = strnlen(id->subnqn, NVMF_NQN_SIZE);
2742                 if (nqnlen > 0 && nqnlen < NVMF_NQN_SIZE) {
2743                         strscpy(subsys->subnqn, id->subnqn, NVMF_NQN_SIZE);
2744                         return;
2745                 }
2746
2747                 if (ctrl->vs >= NVME_VS(1, 2, 1))
2748                         dev_warn(ctrl->device, "missing or invalid SUBNQN field.\n");
2749         }
2750
2751         /*
2752          * Generate a "fake" NQN similar to the one in Section 4.5 of the NVMe
2753          * Base Specification 2.0.  It is slightly different from the format
2754          * specified there due to historic reasons, and we can't change it now.
2755          */
2756         off = snprintf(subsys->subnqn, NVMF_NQN_SIZE,
2757                         "nqn.2014.08.org.nvmexpress:%04x%04x",
2758                         le16_to_cpu(id->vid), le16_to_cpu(id->ssvid));
2759         memcpy(subsys->subnqn + off, id->sn, sizeof(id->sn));
2760         off += sizeof(id->sn);
2761         memcpy(subsys->subnqn + off, id->mn, sizeof(id->mn));
2762         off += sizeof(id->mn);
2763         memset(subsys->subnqn + off, 0, sizeof(subsys->subnqn) - off);
2764 }
2765
2766 static void nvme_release_subsystem(struct device *dev)
2767 {
2768         struct nvme_subsystem *subsys =
2769                 container_of(dev, struct nvme_subsystem, dev);
2770
2771         if (subsys->instance >= 0)
2772                 ida_free(&nvme_instance_ida, subsys->instance);
2773         kfree(subsys);
2774 }
2775
2776 static void nvme_destroy_subsystem(struct kref *ref)
2777 {
2778         struct nvme_subsystem *subsys =
2779                         container_of(ref, struct nvme_subsystem, ref);
2780
2781         mutex_lock(&nvme_subsystems_lock);
2782         list_del(&subsys->entry);
2783         mutex_unlock(&nvme_subsystems_lock);
2784
2785         ida_destroy(&subsys->ns_ida);
2786         device_del(&subsys->dev);
2787         put_device(&subsys->dev);
2788 }
2789
2790 static void nvme_put_subsystem(struct nvme_subsystem *subsys)
2791 {
2792         kref_put(&subsys->ref, nvme_destroy_subsystem);
2793 }
2794
2795 static struct nvme_subsystem *__nvme_find_get_subsystem(const char *subsysnqn)
2796 {
2797         struct nvme_subsystem *subsys;
2798
2799         lockdep_assert_held(&nvme_subsystems_lock);
2800
2801         /*
2802          * Fail matches for discovery subsystems. This results
2803          * in each discovery controller bound to a unique subsystem.
2804          * This avoids issues with validating controller values
2805          * that can only be true when there is a single unique subsystem.
2806          * There may be multiple and completely independent entities
2807          * that provide discovery controllers.
2808          */
2809         if (!strcmp(subsysnqn, NVME_DISC_SUBSYS_NAME))
2810                 return NULL;
2811
2812         list_for_each_entry(subsys, &nvme_subsystems, entry) {
2813                 if (strcmp(subsys->subnqn, subsysnqn))
2814                         continue;
2815                 if (!kref_get_unless_zero(&subsys->ref))
2816                         continue;
2817                 return subsys;
2818         }
2819
2820         return NULL;
2821 }
2822
2823 static inline bool nvme_discovery_ctrl(struct nvme_ctrl *ctrl)
2824 {
2825         return ctrl->opts && ctrl->opts->discovery_nqn;
2826 }
2827
2828 static bool nvme_validate_cntlid(struct nvme_subsystem *subsys,
2829                 struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2830 {
2831         struct nvme_ctrl *tmp;
2832
2833         lockdep_assert_held(&nvme_subsystems_lock);
2834
2835         list_for_each_entry(tmp, &subsys->ctrls, subsys_entry) {
2836                 if (nvme_state_terminal(tmp))
2837                         continue;
2838
2839                 if (tmp->cntlid == ctrl->cntlid) {
2840                         dev_err(ctrl->device,
2841                                 "Duplicate cntlid %u with %s, subsys %s, rejecting\n",
2842                                 ctrl->cntlid, dev_name(tmp->device),
2843                                 subsys->subnqn);
2844                         return false;
2845                 }
2846
2847                 if ((id->cmic & NVME_CTRL_CMIC_MULTI_CTRL) ||
2848                     nvme_discovery_ctrl(ctrl))
2849                         continue;
2850
2851                 dev_err(ctrl->device,
2852                         "Subsystem does not support multiple controllers\n");
2853                 return false;
2854         }
2855
2856         return true;
2857 }
2858
2859 static int nvme_init_subsystem(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
2860 {
2861         struct nvme_subsystem *subsys, *found;
2862         int ret;
2863
2864         subsys = kzalloc(sizeof(*subsys), GFP_KERNEL);
2865         if (!subsys)
2866                 return -ENOMEM;
2867
2868         subsys->instance = -1;
2869         mutex_init(&subsys->lock);
2870         kref_init(&subsys->ref);
2871         INIT_LIST_HEAD(&subsys->ctrls);
2872         INIT_LIST_HEAD(&subsys->nsheads);
2873         nvme_init_subnqn(subsys, ctrl, id);
2874         memcpy(subsys->serial, id->sn, sizeof(subsys->serial));
2875         memcpy(subsys->model, id->mn, sizeof(subsys->model));
2876         subsys->vendor_id = le16_to_cpu(id->vid);
2877         subsys->cmic = id->cmic;
2878
2879         /* Versions prior to 1.4 don't necessarily report a valid type */
2880         if (id->cntrltype == NVME_CTRL_DISC ||
2881             !strcmp(subsys->subnqn, NVME_DISC_SUBSYS_NAME))
2882                 subsys->subtype = NVME_NQN_DISC;
2883         else
2884                 subsys->subtype = NVME_NQN_NVME;
2885
2886         if (nvme_discovery_ctrl(ctrl) && subsys->subtype != NVME_NQN_DISC) {
2887                 dev_err(ctrl->device,
2888                         "Subsystem %s is not a discovery controller",
2889                         subsys->subnqn);
2890                 kfree(subsys);
2891                 return -EINVAL;
2892         }
2893         subsys->awupf = le16_to_cpu(id->awupf);
2894         nvme_mpath_default_iopolicy(subsys);
2895
2896         subsys->dev.class = &nvme_subsys_class;
2897         subsys->dev.release = nvme_release_subsystem;
2898         subsys->dev.groups = nvme_subsys_attrs_groups;
2899         dev_set_name(&subsys->dev, "nvme-subsys%d", ctrl->instance);
2900         device_initialize(&subsys->dev);
2901
2902         mutex_lock(&nvme_subsystems_lock);
2903         found = __nvme_find_get_subsystem(subsys->subnqn);
2904         if (found) {
2905                 put_device(&subsys->dev);
2906                 subsys = found;
2907
2908                 if (!nvme_validate_cntlid(subsys, ctrl, id)) {
2909                         ret = -EINVAL;
2910                         goto out_put_subsystem;
2911                 }
2912         } else {
2913                 ret = device_add(&subsys->dev);
2914                 if (ret) {
2915                         dev_err(ctrl->device,
2916                                 "failed to register subsystem device.\n");
2917                         put_device(&subsys->dev);
2918                         goto out_unlock;
2919                 }
2920                 ida_init(&subsys->ns_ida);
2921                 list_add_tail(&subsys->entry, &nvme_subsystems);
2922         }
2923
2924         ret = sysfs_create_link(&subsys->dev.kobj, &ctrl->device->kobj,
2925                                 dev_name(ctrl->device));
2926         if (ret) {
2927                 dev_err(ctrl->device,
2928                         "failed to create sysfs link from subsystem.\n");
2929                 goto out_put_subsystem;
2930         }
2931
2932         if (!found)
2933                 subsys->instance = ctrl->instance;
2934         ctrl->subsys = subsys;
2935         list_add_tail(&ctrl->subsys_entry, &subsys->ctrls);
2936         mutex_unlock(&nvme_subsystems_lock);
2937         return 0;
2938
2939 out_put_subsystem:
2940         nvme_put_subsystem(subsys);
2941 out_unlock:
2942         mutex_unlock(&nvme_subsystems_lock);
2943         return ret;
2944 }
2945
2946 int nvme_get_log(struct nvme_ctrl *ctrl, u32 nsid, u8 log_page, u8 lsp, u8 csi,
2947                 void *log, size_t size, u64 offset)
2948 {
2949         struct nvme_command c = { };
2950         u32 dwlen = nvme_bytes_to_numd(size);
2951
2952         c.get_log_page.opcode = nvme_admin_get_log_page;
2953         c.get_log_page.nsid = cpu_to_le32(nsid);
2954         c.get_log_page.lid = log_page;
2955         c.get_log_page.lsp = lsp;
2956         c.get_log_page.numdl = cpu_to_le16(dwlen & ((1 << 16) - 1));
2957         c.get_log_page.numdu = cpu_to_le16(dwlen >> 16);
2958         c.get_log_page.lpol = cpu_to_le32(lower_32_bits(offset));
2959         c.get_log_page.lpou = cpu_to_le32(upper_32_bits(offset));
2960         c.get_log_page.csi = csi;
2961
2962         return nvme_submit_sync_cmd(ctrl->admin_q, &c, log, size);
2963 }
2964
2965 static int nvme_get_effects_log(struct nvme_ctrl *ctrl, u8 csi,
2966                                 struct nvme_effects_log **log)
2967 {
2968         struct nvme_effects_log *cel = xa_load(&ctrl->cels, csi);
2969         int ret;
2970
2971         if (cel)
2972                 goto out;
2973
2974         cel = kzalloc(sizeof(*cel), GFP_KERNEL);
2975         if (!cel)
2976                 return -ENOMEM;
2977
2978         ret = nvme_get_log(ctrl, 0x00, NVME_LOG_CMD_EFFECTS, 0, csi,
2979                         cel, sizeof(*cel), 0);
2980         if (ret) {
2981                 kfree(cel);
2982                 return ret;
2983         }
2984
2985         xa_store(&ctrl->cels, csi, cel, GFP_KERNEL);
2986 out:
2987         *log = cel;
2988         return 0;
2989 }
2990
2991 static inline u32 nvme_mps_to_sectors(struct nvme_ctrl *ctrl, u32 units)
2992 {
2993         u32 page_shift = NVME_CAP_MPSMIN(ctrl->cap) + 12, val;
2994
2995         if (check_shl_overflow(1U, units + page_shift - 9, &val))
2996                 return UINT_MAX;
2997         return val;
2998 }
2999
3000 static int nvme_init_non_mdts_limits(struct nvme_ctrl *ctrl)
3001 {
3002         struct nvme_command c = { };
3003         struct nvme_id_ctrl_nvm *id;
3004         int ret;
3005
3006         /*
3007          * Even though NVMe spec explicitly states that MDTS is not applicable
3008          * to the write-zeroes, we are cautious and limit the size to the
3009          * controllers max_hw_sectors value, which is based on the MDTS field
3010          * and possibly other limiting factors.
3011          */
3012         if ((ctrl->oncs & NVME_CTRL_ONCS_WRITE_ZEROES) &&
3013             !(ctrl->quirks & NVME_QUIRK_DISABLE_WRITE_ZEROES))
3014                 ctrl->max_zeroes_sectors = ctrl->max_hw_sectors;
3015         else
3016                 ctrl->max_zeroes_sectors = 0;
3017
3018         if (ctrl->subsys->subtype != NVME_NQN_NVME ||
3019             nvme_ctrl_limited_cns(ctrl) ||
3020             test_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags))
3021                 return 0;
3022
3023         id = kzalloc(sizeof(*id), GFP_KERNEL);
3024         if (!id)
3025                 return -ENOMEM;
3026
3027         c.identify.opcode = nvme_admin_identify;
3028         c.identify.cns = NVME_ID_CNS_CS_CTRL;
3029         c.identify.csi = NVME_CSI_NVM;
3030
3031         ret = nvme_submit_sync_cmd(ctrl->admin_q, &c, id, sizeof(*id));
3032         if (ret)
3033                 goto free_data;
3034
3035         ctrl->dmrl = id->dmrl;
3036         ctrl->dmrsl = le32_to_cpu(id->dmrsl);
3037         if (id->wzsl)
3038                 ctrl->max_zeroes_sectors = nvme_mps_to_sectors(ctrl, id->wzsl);
3039
3040 free_data:
3041         if (ret > 0)
3042                 set_bit(NVME_CTRL_SKIP_ID_CNS_CS, &ctrl->flags);
3043         kfree(id);
3044         return ret;
3045 }
3046
3047 static void nvme_init_known_nvm_effects(struct nvme_ctrl *ctrl)
3048 {
3049         struct nvme_effects_log *log = ctrl->effects;
3050
3051         log->acs[nvme_admin_format_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3052                                                 NVME_CMD_EFFECTS_NCC |
3053                                                 NVME_CMD_EFFECTS_CSE_MASK);
3054         log->acs[nvme_admin_sanitize_nvm] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC |
3055                                                 NVME_CMD_EFFECTS_CSE_MASK);
3056
3057         /*
3058          * The spec says the result of a security receive command depends on
3059          * the previous security send command. As such, many vendors log this
3060          * command as one to submitted only when no other commands to the same
3061          * namespace are outstanding. The intention is to tell the host to
3062          * prevent mixing security send and receive.
3063          *
3064          * This driver can only enforce such exclusive access against IO
3065          * queues, though. We are not readily able to enforce such a rule for
3066          * two commands to the admin queue, which is the only queue that
3067          * matters for this command.
3068          *
3069          * Rather than blindly freezing the IO queues for this effect that
3070          * doesn't even apply to IO, mask it off.
3071          */
3072         log->acs[nvme_admin_security_recv] &= cpu_to_le32(~NVME_CMD_EFFECTS_CSE_MASK);
3073
3074         log->iocs[nvme_cmd_write] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3075         log->iocs[nvme_cmd_write_zeroes] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3076         log->iocs[nvme_cmd_write_uncor] |= cpu_to_le32(NVME_CMD_EFFECTS_LBCC);
3077 }
3078
3079 static int nvme_init_effects(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3080 {
3081         int ret = 0;
3082
3083         if (ctrl->effects)
3084                 return 0;
3085
3086         if (id->lpa & NVME_CTRL_LPA_CMD_EFFECTS_LOG) {
3087                 ret = nvme_get_effects_log(ctrl, NVME_CSI_NVM, &ctrl->effects);
3088                 if (ret < 0)
3089                         return ret;
3090         }
3091
3092         if (!ctrl->effects) {
3093                 ctrl->effects = kzalloc(sizeof(*ctrl->effects), GFP_KERNEL);
3094                 if (!ctrl->effects)
3095                         return -ENOMEM;
3096                 xa_store(&ctrl->cels, NVME_CSI_NVM, ctrl->effects, GFP_KERNEL);
3097         }
3098
3099         nvme_init_known_nvm_effects(ctrl);
3100         return 0;
3101 }
3102
3103 static int nvme_check_ctrl_fabric_info(struct nvme_ctrl *ctrl, struct nvme_id_ctrl *id)
3104 {
3105         /*
3106          * In fabrics we need to verify the cntlid matches the
3107          * admin connect
3108          */
3109         if (ctrl->cntlid != le16_to_cpu(id->cntlid)) {
3110                 dev_err(ctrl->device,
3111                         "Mismatching cntlid: Connect %u vs Identify %u, rejecting\n",
3112                         ctrl->cntlid, le16_to_cpu(id->cntlid));
3113                 return -EINVAL;
3114         }
3115
3116         if (!nvme_discovery_ctrl(ctrl) && !ctrl->kas) {
3117                 dev_err(ctrl->device,
3118                         "keep-alive support is mandatory for fabrics\n");
3119                 return -EINVAL;
3120         }
3121
3122         if (!nvme_discovery_ctrl(ctrl) && ctrl->ioccsz < 4) {
3123                 dev_err(ctrl->device,
3124                         "I/O queue command capsule supported size %d < 4\n",
3125                         ctrl->ioccsz);
3126                 return -EINVAL;
3127         }
3128
3129         if (!nvme_discovery_ctrl(ctrl) && ctrl->iorcsz < 1) {
3130                 dev_err(ctrl->device,
3131                         "I/O queue response capsule supported size %d < 1\n",
3132                         ctrl->iorcsz);
3133                 return -EINVAL;
3134         }
3135
3136         if (!ctrl->maxcmd) {
3137                 dev_err(ctrl->device, "Maximum outstanding commands is 0\n");
3138                 return -EINVAL;
3139         }
3140
3141         return 0;
3142 }
3143
3144 static int nvme_init_identify(struct nvme_ctrl *ctrl)
3145 {
3146         struct queue_limits lim;
3147         struct nvme_id_ctrl *id;
3148         u32 max_hw_sectors;
3149         bool prev_apst_enabled;
3150         int ret;
3151
3152         ret = nvme_identify_ctrl(ctrl, &id);
3153         if (ret) {
3154                 dev_err(ctrl->device, "Identify Controller failed (%d)\n", ret);
3155                 return -EIO;
3156         }
3157
3158         if (!(ctrl->ops->flags & NVME_F_FABRICS))
3159                 ctrl->cntlid = le16_to_cpu(id->cntlid);
3160
3161         if (!ctrl->identified) {
3162                 unsigned int i;
3163
3164                 /*
3165                  * Check for quirks.  Quirk can depend on firmware version,
3166                  * so, in principle, the set of quirks present can change
3167                  * across a reset.  As a possible future enhancement, we
3168                  * could re-scan for quirks every time we reinitialize
3169                  * the device, but we'd have to make sure that the driver
3170                  * behaves intelligently if the quirks change.
3171                  */
3172                 for (i = 0; i < ARRAY_SIZE(core_quirks); i++) {
3173                         if (quirk_matches(id, &core_quirks[i]))
3174                                 ctrl->quirks |= core_quirks[i].quirks;
3175                 }
3176
3177                 ret = nvme_init_subsystem(ctrl, id);
3178                 if (ret)
3179                         goto out_free;
3180
3181                 ret = nvme_init_effects(ctrl, id);
3182                 if (ret)
3183                         goto out_free;
3184         }
3185         memcpy(ctrl->subsys->firmware_rev, id->fr,
3186                sizeof(ctrl->subsys->firmware_rev));
3187
3188         if (force_apst && (ctrl->quirks & NVME_QUIRK_NO_DEEPEST_PS)) {
3189                 dev_warn(ctrl->device, "forcibly allowing all power states due to nvme_core.force_apst -- use at your own risk\n");
3190                 ctrl->quirks &= ~NVME_QUIRK_NO_DEEPEST_PS;
3191         }
3192
3193         ctrl->crdt[0] = le16_to_cpu(id->crdt1);
3194         ctrl->crdt[1] = le16_to_cpu(id->crdt2);
3195         ctrl->crdt[2] = le16_to_cpu(id->crdt3);
3196
3197         ctrl->oacs = le16_to_cpu(id->oacs);
3198         ctrl->oncs = le16_to_cpu(id->oncs);
3199         ctrl->mtfa = le16_to_cpu(id->mtfa);
3200         ctrl->oaes = le32_to_cpu(id->oaes);
3201         ctrl->wctemp = le16_to_cpu(id->wctemp);
3202         ctrl->cctemp = le16_to_cpu(id->cctemp);
3203
3204         atomic_set(&ctrl->abort_limit, id->acl + 1);
3205         ctrl->vwc = id->vwc;
3206         if (id->mdts)
3207                 max_hw_sectors = nvme_mps_to_sectors(ctrl, id->mdts);
3208         else
3209                 max_hw_sectors = UINT_MAX;
3210         ctrl->max_hw_sectors =
3211                 min_not_zero(ctrl->max_hw_sectors, max_hw_sectors);
3212
3213         lim = queue_limits_start_update(ctrl->admin_q);
3214         nvme_set_ctrl_limits(ctrl, &lim);
3215         ret = queue_limits_commit_update(ctrl->admin_q, &lim);
3216         if (ret)
3217                 goto out_free;
3218
3219         ctrl->sgls = le32_to_cpu(id->sgls);
3220         ctrl->kas = le16_to_cpu(id->kas);
3221         ctrl->max_namespaces = le32_to_cpu(id->mnan);
3222         ctrl->ctratt = le32_to_cpu(id->ctratt);
3223
3224         ctrl->cntrltype = id->cntrltype;
3225         ctrl->dctype = id->dctype;
3226
3227         if (id->rtd3e) {
3228                 /* us -> s */
3229                 u32 transition_time = le32_to_cpu(id->rtd3e) / USEC_PER_SEC;
3230
3231                 ctrl->shutdown_timeout = clamp_t(unsigned int, transition_time,
3232                                                  shutdown_timeout, 60);
3233
3234                 if (ctrl->shutdown_timeout != shutdown_timeout)
3235                         dev_info(ctrl->device,
3236                                  "D3 entry latency set to %u seconds\n",
3237                                  ctrl->shutdown_timeout);
3238         } else
3239                 ctrl->shutdown_timeout = shutdown_timeout;
3240
3241         ctrl->npss = id->npss;
3242         ctrl->apsta = id->apsta;
3243         prev_apst_enabled = ctrl->apst_enabled;
3244         if (ctrl->quirks & NVME_QUIRK_NO_APST) {
3245                 if (force_apst && id->apsta) {
3246                         dev_warn(ctrl->device, "forcibly allowing APST due to nvme_core.force_apst -- use at your own risk\n");
3247                         ctrl->apst_enabled = true;
3248                 } else {
3249                         ctrl->apst_enabled = false;
3250                 }
3251         } else {
3252                 ctrl->apst_enabled = id->apsta;
3253         }
3254         memcpy(ctrl->psd, id->psd, sizeof(ctrl->psd));
3255
3256         if (ctrl->ops->flags & NVME_F_FABRICS) {
3257                 ctrl->icdoff = le16_to_cpu(id->icdoff);
3258                 ctrl->ioccsz = le32_to_cpu(id->ioccsz);
3259                 ctrl->iorcsz = le32_to_cpu(id->iorcsz);
3260                 ctrl->maxcmd = le16_to_cpu(id->maxcmd);
3261
3262                 ret = nvme_check_ctrl_fabric_info(ctrl, id);
3263                 if (ret)
3264                         goto out_free;
3265         } else {
3266                 ctrl->hmpre = le32_to_cpu(id->hmpre);
3267                 ctrl->hmmin = le32_to_cpu(id->hmmin);
3268                 ctrl->hmminds = le32_to_cpu(id->hmminds);
3269                 ctrl->hmmaxd = le16_to_cpu(id->hmmaxd);
3270         }
3271
3272         ret = nvme_mpath_init_identify(ctrl, id);
3273         if (ret < 0)
3274                 goto out_free;
3275
3276         if (ctrl->apst_enabled && !prev_apst_enabled)
3277                 dev_pm_qos_expose_latency_tolerance(ctrl->device);
3278         else if (!ctrl->apst_enabled && prev_apst_enabled)
3279                 dev_pm_qos_hide_latency_tolerance(ctrl->device);
3280
3281 out_free:
3282         kfree(id);
3283         return ret;
3284 }
3285
3286 /*
3287  * Initialize the cached copies of the Identify data and various controller
3288  * register in our nvme_ctrl structure.  This should be called as soon as
3289  * the admin queue is fully up and running.
3290  */
3291 int nvme_init_ctrl_finish(struct nvme_ctrl *ctrl, bool was_suspended)
3292 {
3293         int ret;
3294
3295         ret = ctrl->ops->reg_read32(ctrl, NVME_REG_VS, &ctrl->vs);
3296         if (ret) {
3297                 dev_err(ctrl->device, "Reading VS failed (%d)\n", ret);
3298                 return ret;
3299         }
3300
3301         ctrl->sqsize = min_t(u16, NVME_CAP_MQES(ctrl->cap), ctrl->sqsize);
3302
3303         if (ctrl->vs >= NVME_VS(1, 1, 0))
3304                 ctrl->subsystem = NVME_CAP_NSSRC(ctrl->cap);
3305
3306         ret = nvme_init_identify(ctrl);
3307         if (ret)
3308                 return ret;
3309
3310         ret = nvme_configure_apst(ctrl);
3311         if (ret < 0)
3312                 return ret;
3313
3314         ret = nvme_configure_timestamp(ctrl);
3315         if (ret < 0)
3316                 return ret;
3317
3318         ret = nvme_configure_host_options(ctrl);
3319         if (ret < 0)
3320                 return ret;
3321
3322         nvme_configure_opal(ctrl, was_suspended);
3323
3324         if (!ctrl->identified && !nvme_discovery_ctrl(ctrl)) {
3325                 /*
3326                  * Do not return errors unless we are in a controller reset,
3327                  * the controller works perfectly fine without hwmon.
3328                  */
3329                 ret = nvme_hwmon_init(ctrl);
3330                 if (ret == -EINTR)
3331                         return ret;
3332         }
3333
3334         clear_bit(NVME_CTRL_DIRTY_CAPABILITY, &ctrl->flags);
3335         ctrl->identified = true;
3336
3337         nvme_start_keep_alive(ctrl);
3338
3339         return 0;
3340 }
3341 EXPORT_SYMBOL_GPL(nvme_init_ctrl_finish);
3342
3343 static int nvme_dev_open(struct inode *inode, struct file *file)
3344 {
3345         struct nvme_ctrl *ctrl =
3346                 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3347
3348         switch (nvme_ctrl_state(ctrl)) {
3349         case NVME_CTRL_LIVE:
3350                 break;
3351         default:
3352                 return -EWOULDBLOCK;
3353         }
3354
3355         nvme_get_ctrl(ctrl);
3356         if (!try_module_get(ctrl->ops->module)) {
3357                 nvme_put_ctrl(ctrl);
3358                 return -EINVAL;
3359         }
3360
3361         file->private_data = ctrl;
3362         return 0;
3363 }
3364
3365 static int nvme_dev_release(struct inode *inode, struct file *file)
3366 {
3367         struct nvme_ctrl *ctrl =
3368                 container_of(inode->i_cdev, struct nvme_ctrl, cdev);
3369
3370         module_put(ctrl->ops->module);
3371         nvme_put_ctrl(ctrl);
3372         return 0;
3373 }
3374
3375 static const struct file_operations nvme_dev_fops = {
3376         .owner          = THIS_MODULE,
3377         .open           = nvme_dev_open,
3378         .release        = nvme_dev_release,
3379         .unlocked_ioctl = nvme_dev_ioctl,
3380         .compat_ioctl   = compat_ptr_ioctl,
3381         .uring_cmd      = nvme_dev_uring_cmd,
3382 };
3383
3384 static struct nvme_ns_head *nvme_find_ns_head(struct nvme_ctrl *ctrl,
3385                 unsigned nsid)
3386 {
3387         struct nvme_ns_head *h;
3388
3389         lockdep_assert_held(&ctrl->subsys->lock);
3390
3391         list_for_each_entry(h, &ctrl->subsys->nsheads, entry) {
3392                 /*
3393                  * Private namespaces can share NSIDs under some conditions.
3394                  * In that case we can't use the same ns_head for namespaces
3395                  * with the same NSID.
3396                  */
3397                 if (h->ns_id != nsid || !nvme_is_unique_nsid(ctrl, h))
3398                         continue;
3399                 if (!list_empty(&h->list) && nvme_tryget_ns_head(h))
3400                         return h;
3401         }
3402
3403         return NULL;
3404 }
3405
3406 static int nvme_subsys_check_duplicate_ids(struct nvme_subsystem *subsys,
3407                 struct nvme_ns_ids *ids)
3408 {
3409         bool has_uuid = !uuid_is_null(&ids->uuid);
3410         bool has_nguid = memchr_inv(ids->nguid, 0, sizeof(ids->nguid));
3411         bool has_eui64 = memchr_inv(ids->eui64, 0, sizeof(ids->eui64));
3412         struct nvme_ns_head *h;
3413
3414         lockdep_assert_held(&subsys->lock);
3415
3416         list_for_each_entry(h, &subsys->nsheads, entry) {
3417                 if (has_uuid && uuid_equal(&ids->uuid, &h->ids.uuid))
3418                         return -EINVAL;
3419                 if (has_nguid &&
3420                     memcmp(&ids->nguid, &h->ids.nguid, sizeof(ids->nguid)) == 0)
3421                         return -EINVAL;
3422                 if (has_eui64 &&
3423                     memcmp(&ids->eui64, &h->ids.eui64, sizeof(ids->eui64)) == 0)
3424                         return -EINVAL;
3425         }
3426
3427         return 0;
3428 }
3429
3430 static void nvme_cdev_rel(struct device *dev)
3431 {
3432         ida_free(&nvme_ns_chr_minor_ida, MINOR(dev->devt));
3433 }
3434
3435 void nvme_cdev_del(struct cdev *cdev, struct device *cdev_device)
3436 {
3437         cdev_device_del(cdev, cdev_device);
3438         put_device(cdev_device);
3439 }
3440
3441 int nvme_cdev_add(struct cdev *cdev, struct device *cdev_device,
3442                 const struct file_operations *fops, struct module *owner)
3443 {
3444         int minor, ret;
3445
3446         minor = ida_alloc(&nvme_ns_chr_minor_ida, GFP_KERNEL);
3447         if (minor < 0)
3448                 return minor;
3449         cdev_device->devt = MKDEV(MAJOR(nvme_ns_chr_devt), minor);
3450         cdev_device->class = &nvme_ns_chr_class;
3451         cdev_device->release = nvme_cdev_rel;
3452         device_initialize(cdev_device);
3453         cdev_init(cdev, fops);
3454         cdev->owner = owner;
3455         ret = cdev_device_add(cdev, cdev_device);
3456         if (ret)
3457                 put_device(cdev_device);
3458
3459         return ret;
3460 }
3461
3462 static int nvme_ns_chr_open(struct inode *inode, struct file *file)
3463 {
3464         return nvme_ns_open(container_of(inode->i_cdev, struct nvme_ns, cdev));
3465 }
3466
3467 static int nvme_ns_chr_release(struct inode *inode, struct file *file)
3468 {
3469         nvme_ns_release(container_of(inode->i_cdev, struct nvme_ns, cdev));
3470         return 0;
3471 }
3472
3473 static const struct file_operations nvme_ns_chr_fops = {
3474         .owner          = THIS_MODULE,
3475         .open           = nvme_ns_chr_open,
3476         .release        = nvme_ns_chr_release,
3477         .unlocked_ioctl = nvme_ns_chr_ioctl,
3478         .compat_ioctl   = compat_ptr_ioctl,
3479         .uring_cmd      = nvme_ns_chr_uring_cmd,
3480         .uring_cmd_iopoll = nvme_ns_chr_uring_cmd_iopoll,
3481 };
3482
3483 static int nvme_add_ns_cdev(struct nvme_ns *ns)
3484 {
3485         int ret;
3486
3487         ns->cdev_device.parent = ns->ctrl->device;
3488         ret = dev_set_name(&ns->cdev_device, "ng%dn%d",
3489                            ns->ctrl->instance, ns->head->instance);
3490         if (ret)
3491                 return ret;
3492
3493         return nvme_cdev_add(&ns->cdev, &ns->cdev_device, &nvme_ns_chr_fops,
3494                              ns->ctrl->ops->module);
3495 }
3496
3497 static struct nvme_ns_head *nvme_alloc_ns_head(struct nvme_ctrl *ctrl,
3498                 struct nvme_ns_info *info)
3499 {
3500         struct nvme_ns_head *head;
3501         size_t size = sizeof(*head);
3502         int ret = -ENOMEM;
3503
3504 #ifdef CONFIG_NVME_MULTIPATH
3505         size += num_possible_nodes() * sizeof(struct nvme_ns *);
3506 #endif
3507
3508         head = kzalloc(size, GFP_KERNEL);
3509         if (!head)
3510                 goto out;
3511         ret = ida_alloc_min(&ctrl->subsys->ns_ida, 1, GFP_KERNEL);
3512         if (ret < 0)
3513                 goto out_free_head;
3514         head->instance = ret;
3515         INIT_LIST_HEAD(&head->list);
3516         ret = init_srcu_struct(&head->srcu);
3517         if (ret)
3518                 goto out_ida_remove;
3519         head->subsys = ctrl->subsys;
3520         head->ns_id = info->nsid;
3521         head->ids = info->ids;
3522         head->shared = info->is_shared;
3523         ratelimit_state_init(&head->rs_nuse, 5 * HZ, 1);
3524         ratelimit_set_flags(&head->rs_nuse, RATELIMIT_MSG_ON_RELEASE);
3525         kref_init(&head->ref);
3526
3527         if (head->ids.csi) {
3528                 ret = nvme_get_effects_log(ctrl, head->ids.csi, &head->effects);
3529                 if (ret)
3530                         goto out_cleanup_srcu;
3531         } else
3532                 head->effects = ctrl->effects;
3533
3534         ret = nvme_mpath_alloc_disk(ctrl, head);
3535         if (ret)
3536                 goto out_cleanup_srcu;
3537
3538         list_add_tail(&head->entry, &ctrl->subsys->nsheads);
3539
3540         kref_get(&ctrl->subsys->ref);
3541
3542         return head;
3543 out_cleanup_srcu:
3544         cleanup_srcu_struct(&head->srcu);
3545 out_ida_remove:
3546         ida_free(&ctrl->subsys->ns_ida, head->instance);
3547 out_free_head:
3548         kfree(head);
3549 out:
3550         if (ret > 0)
3551                 ret = blk_status_to_errno(nvme_error_status(ret));
3552         return ERR_PTR(ret);
3553 }
3554
3555 static int nvme_global_check_duplicate_ids(struct nvme_subsystem *this,
3556                 struct nvme_ns_ids *ids)
3557 {
3558         struct nvme_subsystem *s;
3559         int ret = 0;
3560
3561         /*
3562          * Note that this check is racy as we try to avoid holding the global
3563          * lock over the whole ns_head creation.  But it is only intended as
3564          * a sanity check anyway.
3565          */
3566         mutex_lock(&nvme_subsystems_lock);
3567         list_for_each_entry(s, &nvme_subsystems, entry) {
3568                 if (s == this)
3569                         continue;
3570                 mutex_lock(&s->lock);
3571                 ret = nvme_subsys_check_duplicate_ids(s, ids);
3572                 mutex_unlock(&s->lock);
3573                 if (ret)
3574                         break;
3575         }
3576         mutex_unlock(&nvme_subsystems_lock);
3577
3578         return ret;
3579 }
3580
3581 static int nvme_init_ns_head(struct nvme_ns *ns, struct nvme_ns_info *info)
3582 {
3583         struct nvme_ctrl *ctrl = ns->ctrl;
3584         struct nvme_ns_head *head = NULL;
3585         int ret;
3586
3587         ret = nvme_global_check_duplicate_ids(ctrl->subsys, &info->ids);
3588         if (ret) {
3589                 /*
3590                  * We've found two different namespaces on two different
3591                  * subsystems that report the same ID.  This is pretty nasty
3592                  * for anything that actually requires unique device
3593                  * identification.  In the kernel we need this for multipathing,
3594                  * and in user space the /dev/disk/by-id/ links rely on it.
3595                  *
3596                  * If the device also claims to be multi-path capable back off
3597                  * here now and refuse the probe the second device as this is a
3598                  * recipe for data corruption.  If not this is probably a
3599                  * cheap consumer device if on the PCIe bus, so let the user
3600                  * proceed and use the shiny toy, but warn that with changing
3601                  * probing order (which due to our async probing could just be
3602                  * device taking longer to startup) the other device could show
3603                  * up at any time.
3604                  */
3605                 nvme_print_device_info(ctrl);
3606                 if ((ns->ctrl->ops->flags & NVME_F_FABRICS) || /* !PCIe */
3607                     ((ns->ctrl->subsys->cmic & NVME_CTRL_CMIC_MULTI_CTRL) &&
3608                      info->is_shared)) {
3609                         dev_err(ctrl->device,
3610                                 "ignoring nsid %d because of duplicate IDs\n",
3611                                 info->nsid);
3612                         return ret;
3613                 }
3614
3615                 dev_err(ctrl->device,
3616                         "clearing duplicate IDs for nsid %d\n", info->nsid);
3617                 dev_err(ctrl->device,
3618                         "use of /dev/disk/by-id/ may cause data corruption\n");
3619                 memset(&info->ids.nguid, 0, sizeof(info->ids.nguid));
3620                 memset(&info->ids.uuid, 0, sizeof(info->ids.uuid));
3621                 memset(&info->ids.eui64, 0, sizeof(info->ids.eui64));
3622                 ctrl->quirks |= NVME_QUIRK_BOGUS_NID;
3623         }
3624
3625         mutex_lock(&ctrl->subsys->lock);
3626         head = nvme_find_ns_head(ctrl, info->nsid);
3627         if (!head) {
3628                 ret = nvme_subsys_check_duplicate_ids(ctrl->subsys, &info->ids);
3629                 if (ret) {
3630                         dev_err(ctrl->device,
3631                                 "duplicate IDs in subsystem for nsid %d\n",
3632                                 info->nsid);
3633                         goto out_unlock;
3634                 }
3635                 head = nvme_alloc_ns_head(ctrl, info);
3636                 if (IS_ERR(head)) {
3637                         ret = PTR_ERR(head);
3638                         goto out_unlock;
3639                 }
3640         } else {
3641                 ret = -EINVAL;
3642                 if (!info->is_shared || !head->shared) {
3643                         dev_err(ctrl->device,
3644                                 "Duplicate unshared namespace %d\n",
3645                                 info->nsid);
3646                         goto out_put_ns_head;
3647                 }
3648                 if (!nvme_ns_ids_equal(&head->ids, &info->ids)) {
3649                         dev_err(ctrl->device,
3650                                 "IDs don't match for shared namespace %d\n",
3651                                         info->nsid);
3652                         goto out_put_ns_head;
3653                 }
3654
3655                 if (!multipath) {
3656                         dev_warn(ctrl->device,
3657                                 "Found shared namespace %d, but multipathing not supported.\n",
3658                                 info->nsid);
3659                         dev_warn_once(ctrl->device,
3660                                 "Support for shared namespaces without CONFIG_NVME_MULTIPATH is deprecated and will be removed in Linux 6.0\n.");
3661                 }
3662         }
3663
3664         list_add_tail_rcu(&ns->siblings, &head->list);
3665         ns->head = head;
3666         mutex_unlock(&ctrl->subsys->lock);
3667         return 0;
3668
3669 out_put_ns_head:
3670         nvme_put_ns_head(head);
3671 out_unlock:
3672         mutex_unlock(&ctrl->subsys->lock);
3673         return ret;
3674 }
3675
3676 struct nvme_ns *nvme_find_get_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3677 {
3678         struct nvme_ns *ns, *ret = NULL;
3679
3680         down_read(&ctrl->namespaces_rwsem);
3681         list_for_each_entry(ns, &ctrl->namespaces, list) {
3682                 if (ns->head->ns_id == nsid) {
3683                         if (!nvme_get_ns(ns))
3684                                 continue;
3685                         ret = ns;
3686                         break;
3687                 }
3688                 if (ns->head->ns_id > nsid)
3689                         break;
3690         }
3691         up_read(&ctrl->namespaces_rwsem);
3692         return ret;
3693 }
3694 EXPORT_SYMBOL_NS_GPL(nvme_find_get_ns, NVME_TARGET_PASSTHRU);
3695
3696 /*
3697  * Add the namespace to the controller list while keeping the list ordered.
3698  */
3699 static void nvme_ns_add_to_ctrl_list(struct nvme_ns *ns)
3700 {
3701         struct nvme_ns *tmp;
3702
3703         list_for_each_entry_reverse(tmp, &ns->ctrl->namespaces, list) {
3704                 if (tmp->head->ns_id < ns->head->ns_id) {
3705                         list_add(&ns->list, &tmp->list);
3706                         return;
3707                 }
3708         }
3709         list_add(&ns->list, &ns->ctrl->namespaces);
3710 }
3711
3712 static void nvme_alloc_ns(struct nvme_ctrl *ctrl, struct nvme_ns_info *info)
3713 {
3714         struct nvme_ns *ns;
3715         struct gendisk *disk;
3716         int node = ctrl->numa_node;
3717
3718         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
3719         if (!ns)
3720                 return;
3721
3722         disk = blk_mq_alloc_disk(ctrl->tagset, NULL, ns);
3723         if (IS_ERR(disk))
3724                 goto out_free_ns;
3725         disk->fops = &nvme_bdev_ops;
3726         disk->private_data = ns;
3727
3728         ns->disk = disk;
3729         ns->queue = disk->queue;
3730         ns->passthru_err_log_enabled = false;
3731
3732         if (ctrl->opts && ctrl->opts->data_digest)
3733                 blk_queue_flag_set(QUEUE_FLAG_STABLE_WRITES, ns->queue);
3734
3735         blk_queue_flag_set(QUEUE_FLAG_NONROT, ns->queue);
3736         if (ctrl->ops->supports_pci_p2pdma &&
3737             ctrl->ops->supports_pci_p2pdma(ctrl))
3738                 blk_queue_flag_set(QUEUE_FLAG_PCI_P2PDMA, ns->queue);
3739
3740         ns->ctrl = ctrl;
3741         kref_init(&ns->kref);
3742
3743         if (nvme_init_ns_head(ns, info))
3744                 goto out_cleanup_disk;
3745
3746         /*
3747          * If multipathing is enabled, the device name for all disks and not
3748          * just those that represent shared namespaces needs to be based on the
3749          * subsystem instance.  Using the controller instance for private
3750          * namespaces could lead to naming collisions between shared and private
3751          * namespaces if they don't use a common numbering scheme.
3752          *
3753          * If multipathing is not enabled, disk names must use the controller
3754          * instance as shared namespaces will show up as multiple block
3755          * devices.
3756          */
3757         if (nvme_ns_head_multipath(ns->head)) {
3758                 sprintf(disk->disk_name, "nvme%dc%dn%d", ctrl->subsys->instance,
3759                         ctrl->instance, ns->head->instance);
3760                 disk->flags |= GENHD_FL_HIDDEN;
3761         } else if (multipath) {
3762                 sprintf(disk->disk_name, "nvme%dn%d", ctrl->subsys->instance,
3763                         ns->head->instance);
3764         } else {
3765                 sprintf(disk->disk_name, "nvme%dn%d", ctrl->instance,
3766                         ns->head->instance);
3767         }
3768
3769         if (nvme_update_ns_info(ns, info))
3770                 goto out_unlink_ns;
3771
3772         down_write(&ctrl->namespaces_rwsem);
3773         /*
3774          * Ensure that no namespaces are added to the ctrl list after the queues
3775          * are frozen, thereby avoiding a deadlock between scan and reset.
3776          */
3777         if (test_bit(NVME_CTRL_FROZEN, &ctrl->flags)) {
3778                 up_write(&ctrl->namespaces_rwsem);
3779                 goto out_unlink_ns;
3780         }
3781         nvme_ns_add_to_ctrl_list(ns);
3782         up_write(&ctrl->namespaces_rwsem);
3783         nvme_get_ctrl(ctrl);
3784
3785         if (device_add_disk(ctrl->device, ns->disk, nvme_ns_attr_groups))
3786                 goto out_cleanup_ns_from_list;
3787
3788         if (!nvme_ns_head_multipath(ns->head))
3789                 nvme_add_ns_cdev(ns);
3790
3791         nvme_mpath_add_disk(ns, info->anagrpid);
3792         nvme_fault_inject_init(&ns->fault_inject, ns->disk->disk_name);
3793
3794         /*
3795          * Set ns->disk->device->driver_data to ns so we can access
3796          * ns->logging_enabled in nvme_passthru_err_log_enabled_store() and
3797          * nvme_passthru_err_log_enabled_show().
3798          */
3799         dev_set_drvdata(disk_to_dev(ns->disk), ns);
3800
3801         return;
3802
3803  out_cleanup_ns_from_list:
3804         nvme_put_ctrl(ctrl);
3805         down_write(&ctrl->namespaces_rwsem);
3806         list_del_init(&ns->list);
3807         up_write(&ctrl->namespaces_rwsem);
3808  out_unlink_ns:
3809         mutex_lock(&ctrl->subsys->lock);
3810         list_del_rcu(&ns->siblings);
3811         if (list_empty(&ns->head->list))
3812                 list_del_init(&ns->head->entry);
3813         mutex_unlock(&ctrl->subsys->lock);
3814         nvme_put_ns_head(ns->head);
3815  out_cleanup_disk:
3816         put_disk(disk);
3817  out_free_ns:
3818         kfree(ns);
3819 }
3820
3821 static void nvme_ns_remove(struct nvme_ns *ns)
3822 {
3823         bool last_path = false;
3824
3825         if (test_and_set_bit(NVME_NS_REMOVING, &ns->flags))
3826                 return;
3827
3828         clear_bit(NVME_NS_READY, &ns->flags);
3829         set_capacity(ns->disk, 0);
3830         nvme_fault_inject_fini(&ns->fault_inject);
3831
3832         /*
3833          * Ensure that !NVME_NS_READY is seen by other threads to prevent
3834          * this ns going back into current_path.
3835          */
3836         synchronize_srcu(&ns->head->srcu);
3837
3838         /* wait for concurrent submissions */
3839         if (nvme_mpath_clear_current_path(ns))
3840                 synchronize_srcu(&ns->head->srcu);
3841
3842         mutex_lock(&ns->ctrl->subsys->lock);
3843         list_del_rcu(&ns->siblings);
3844         if (list_empty(&ns->head->list)) {
3845                 list_del_init(&ns->head->entry);
3846                 last_path = true;
3847         }
3848         mutex_unlock(&ns->ctrl->subsys->lock);
3849
3850         /* guarantee not available in head->list */
3851         synchronize_srcu(&ns->head->srcu);
3852
3853         if (!nvme_ns_head_multipath(ns->head))
3854                 nvme_cdev_del(&ns->cdev, &ns->cdev_device);
3855         del_gendisk(ns->disk);
3856
3857         down_write(&ns->ctrl->namespaces_rwsem);
3858         list_del_init(&ns->list);
3859         up_write(&ns->ctrl->namespaces_rwsem);
3860
3861         if (last_path)
3862                 nvme_mpath_shutdown_disk(ns->head);
3863         nvme_put_ns(ns);
3864 }
3865
3866 static void nvme_ns_remove_by_nsid(struct nvme_ctrl *ctrl, u32 nsid)
3867 {
3868         struct nvme_ns *ns = nvme_find_get_ns(ctrl, nsid);
3869
3870         if (ns) {
3871                 nvme_ns_remove(ns);
3872                 nvme_put_ns(ns);
3873         }
3874 }
3875
3876 static void nvme_validate_ns(struct nvme_ns *ns, struct nvme_ns_info *info)
3877 {
3878         int ret = NVME_SC_INVALID_NS | NVME_SC_DNR;
3879
3880         if (!nvme_ns_ids_equal(&ns->head->ids, &info->ids)) {
3881                 dev_err(ns->ctrl->device,
3882                         "identifiers changed for nsid %d\n", ns->head->ns_id);
3883                 goto out;
3884         }
3885
3886         ret = nvme_update_ns_info(ns, info);
3887 out:
3888         /*
3889          * Only remove the namespace if we got a fatal error back from the
3890          * device, otherwise ignore the error and just move on.
3891          *
3892          * TODO: we should probably schedule a delayed retry here.
3893          */
3894         if (ret > 0 && (ret & NVME_SC_DNR))
3895                 nvme_ns_remove(ns);
3896 }
3897
3898 static void nvme_scan_ns(struct nvme_ctrl *ctrl, unsigned nsid)
3899 {
3900         struct nvme_ns_info info = { .nsid = nsid };
3901         struct nvme_ns *ns;
3902         int ret;
3903
3904         if (nvme_identify_ns_descs(ctrl, &info))
3905                 return;
3906
3907         if (info.ids.csi != NVME_CSI_NVM && !nvme_multi_css(ctrl)) {
3908                 dev_warn(ctrl->device,
3909                         "command set not reported for nsid: %d\n", nsid);
3910                 return;
3911         }
3912
3913         /*
3914          * If available try to use the Command Set Idependent Identify Namespace
3915          * data structure to find all the generic information that is needed to
3916          * set up a namespace.  If not fall back to the legacy version.
3917          */
3918         if ((ctrl->cap & NVME_CAP_CRMS_CRIMS) ||
3919             (info.ids.csi != NVME_CSI_NVM && info.ids.csi != NVME_CSI_ZNS))
3920                 ret = nvme_ns_info_from_id_cs_indep(ctrl, &info);
3921         else
3922                 ret = nvme_ns_info_from_identify(ctrl, &info);
3923
3924         if (info.is_removed)
3925                 nvme_ns_remove_by_nsid(ctrl, nsid);
3926
3927         /*
3928          * Ignore the namespace if it is not ready. We will get an AEN once it
3929          * becomes ready and restart the scan.
3930          */
3931         if (ret || !info.is_ready)
3932                 return;
3933
3934         ns = nvme_find_get_ns(ctrl, nsid);
3935         if (ns) {
3936                 nvme_validate_ns(ns, &info);
3937                 nvme_put_ns(ns);
3938         } else {
3939                 nvme_alloc_ns(ctrl, &info);
3940         }
3941 }
3942
3943 static void nvme_remove_invalid_namespaces(struct nvme_ctrl *ctrl,
3944                                         unsigned nsid)
3945 {
3946         struct nvme_ns *ns, *next;
3947         LIST_HEAD(rm_list);
3948
3949         down_write(&ctrl->namespaces_rwsem);
3950         list_for_each_entry_safe(ns, next, &ctrl->namespaces, list) {
3951                 if (ns->head->ns_id > nsid)
3952                         list_move_tail(&ns->list, &rm_list);
3953         }
3954         up_write(&ctrl->namespaces_rwsem);
3955
3956         list_for_each_entry_safe(ns, next, &rm_list, list)
3957                 nvme_ns_remove(ns);
3958
3959 }
3960
3961 static int nvme_scan_ns_list(struct nvme_ctrl *ctrl)
3962 {
3963         const int nr_entries = NVME_IDENTIFY_DATA_SIZE / sizeof(__le32);
3964         __le32 *ns_list;
3965         u32 prev = 0;
3966         int ret = 0, i;
3967
3968         ns_list = kzalloc(NVME_IDENTIFY_DATA_SIZE, GFP_KERNEL);
3969         if (!ns_list)
3970                 return -ENOMEM;
3971
3972         for (;;) {
3973                 struct nvme_command cmd = {
3974                         .identify.opcode        = nvme_admin_identify,
3975                         .identify.cns           = NVME_ID_CNS_NS_ACTIVE_LIST,
3976                         .identify.nsid          = cpu_to_le32(prev),
3977                 };
3978
3979                 ret = nvme_submit_sync_cmd(ctrl->admin_q, &cmd, ns_list,
3980                                             NVME_IDENTIFY_DATA_SIZE);
3981                 if (ret) {
3982                         dev_warn(ctrl->device,
3983                                 "Identify NS List failed (status=0x%x)\n", ret);
3984                         goto free;
3985                 }
3986
3987                 for (i = 0; i < nr_entries; i++) {
3988                         u32 nsid = le32_to_cpu(ns_list[i]);
3989
3990                         if (!nsid)      /* end of the list? */
3991                                 goto out;
3992                         nvme_scan_ns(ctrl, nsid);
3993                         while (++prev < nsid)
3994                                 nvme_ns_remove_by_nsid(ctrl, prev);
3995                 }
3996         }
3997  out:
3998         nvme_remove_invalid_namespaces(ctrl, prev);
3999  free:
4000         kfree(ns_list);
4001         return ret;
4002 }
4003
4004 static void nvme_scan_ns_sequential(struct nvme_ctrl *ctrl)
4005 {
4006         struct nvme_id_ctrl *id;
4007         u32 nn, i;
4008
4009         if (nvme_identify_ctrl(ctrl, &id))
4010                 return;
4011         nn = le32_to_cpu(id->nn);
4012         kfree(id);
4013
4014         for (i = 1; i <= nn; i++)
4015                 nvme_scan_ns(ctrl, i);
4016
4017         nvme_remove_invalid_namespaces(ctrl, nn);
4018 }
4019
4020 static void nvme_clear_changed_ns_log(struct nvme_ctrl *ctrl)
4021 {
4022         size_t log_size = NVME_MAX_CHANGED_NAMESPACES * sizeof(__le32);
4023         __le32 *log;
4024         int error;
4025
4026         log = kzalloc(log_size, GFP_KERNEL);
4027         if (!log)
4028                 return;
4029
4030         /*
4031          * We need to read the log to clear the AEN, but we don't want to rely
4032          * on it for the changed namespace information as userspace could have
4033          * raced with us in reading the log page, which could cause us to miss
4034          * updates.
4035          */
4036         error = nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_CHANGED_NS, 0,
4037                         NVME_CSI_NVM, log, log_size, 0);
4038         if (error)
4039                 dev_warn(ctrl->device,
4040                         "reading changed ns log failed: %d\n", error);
4041
4042         kfree(log);
4043 }
4044
4045 static void nvme_scan_work(struct work_struct *work)
4046 {
4047         struct nvme_ctrl *ctrl =
4048                 container_of(work, struct nvme_ctrl, scan_work);
4049         int ret;
4050
4051         /* No tagset on a live ctrl means IO queues could not created */
4052         if (nvme_ctrl_state(ctrl) != NVME_CTRL_LIVE || !ctrl->tagset)
4053                 return;
4054
4055         /*
4056          * Identify controller limits can change at controller reset due to
4057          * new firmware download, even though it is not common we cannot ignore
4058          * such scenario. Controller's non-mdts limits are reported in the unit
4059          * of logical blocks that is dependent on the format of attached
4060          * namespace. Hence re-read the limits at the time of ns allocation.
4061          */
4062         ret = nvme_init_non_mdts_limits(ctrl);
4063         if (ret < 0) {
4064                 dev_warn(ctrl->device,
4065                         "reading non-mdts-limits failed: %d\n", ret);
4066                 return;
4067         }
4068
4069         if (test_and_clear_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events)) {
4070                 dev_info(ctrl->device, "rescanning namespaces.\n");
4071                 nvme_clear_changed_ns_log(ctrl);
4072         }
4073
4074         mutex_lock(&ctrl->scan_lock);
4075         if (nvme_ctrl_limited_cns(ctrl)) {
4076                 nvme_scan_ns_sequential(ctrl);
4077         } else {
4078                 /*
4079                  * Fall back to sequential scan if DNR is set to handle broken
4080                  * devices which should support Identify NS List (as per the VS
4081                  * they report) but don't actually support it.
4082                  */
4083                 ret = nvme_scan_ns_list(ctrl);
4084                 if (ret > 0 && ret & NVME_SC_DNR)
4085                         nvme_scan_ns_sequential(ctrl);
4086         }
4087         mutex_unlock(&ctrl->scan_lock);
4088 }
4089
4090 /*
4091  * This function iterates the namespace list unlocked to allow recovery from
4092  * controller failure. It is up to the caller to ensure the namespace list is
4093  * not modified by scan work while this function is executing.
4094  */
4095 void nvme_remove_namespaces(struct nvme_ctrl *ctrl)
4096 {
4097         struct nvme_ns *ns, *next;
4098         LIST_HEAD(ns_list);
4099
4100         /*
4101          * make sure to requeue I/O to all namespaces as these
4102          * might result from the scan itself and must complete
4103          * for the scan_work to make progress
4104          */
4105         nvme_mpath_clear_ctrl_paths(ctrl);
4106
4107         /*
4108          * Unquiesce io queues so any pending IO won't hang, especially
4109          * those submitted from scan work
4110          */
4111         nvme_unquiesce_io_queues(ctrl);
4112
4113         /* prevent racing with ns scanning */
4114         flush_work(&ctrl->scan_work);
4115
4116         /*
4117          * The dead states indicates the controller was not gracefully
4118          * disconnected. In that case, we won't be able to flush any data while
4119          * removing the namespaces' disks; fail all the queues now to avoid
4120          * potentially having to clean up the failed sync later.
4121          */
4122         if (nvme_ctrl_state(ctrl) == NVME_CTRL_DEAD)
4123                 nvme_mark_namespaces_dead(ctrl);
4124
4125         /* this is a no-op when called from the controller reset handler */
4126         nvme_change_ctrl_state(ctrl, NVME_CTRL_DELETING_NOIO);
4127
4128         down_write(&ctrl->namespaces_rwsem);
4129         list_splice_init(&ctrl->namespaces, &ns_list);
4130         up_write(&ctrl->namespaces_rwsem);
4131
4132         list_for_each_entry_safe(ns, next, &ns_list, list)
4133                 nvme_ns_remove(ns);
4134 }
4135 EXPORT_SYMBOL_GPL(nvme_remove_namespaces);
4136
4137 static int nvme_class_uevent(const struct device *dev, struct kobj_uevent_env *env)
4138 {
4139         const struct nvme_ctrl *ctrl =
4140                 container_of(dev, struct nvme_ctrl, ctrl_device);
4141         struct nvmf_ctrl_options *opts = ctrl->opts;
4142         int ret;
4143
4144         ret = add_uevent_var(env, "NVME_TRTYPE=%s", ctrl->ops->name);
4145         if (ret)
4146                 return ret;
4147
4148         if (opts) {
4149                 ret = add_uevent_var(env, "NVME_TRADDR=%s", opts->traddr);
4150                 if (ret)
4151                         return ret;
4152
4153                 ret = add_uevent_var(env, "NVME_TRSVCID=%s",
4154                                 opts->trsvcid ?: "none");
4155                 if (ret)
4156                         return ret;
4157
4158                 ret = add_uevent_var(env, "NVME_HOST_TRADDR=%s",
4159                                 opts->host_traddr ?: "none");
4160                 if (ret)
4161                         return ret;
4162
4163                 ret = add_uevent_var(env, "NVME_HOST_IFACE=%s",
4164                                 opts->host_iface ?: "none");
4165         }
4166         return ret;
4167 }
4168
4169 static void nvme_change_uevent(struct nvme_ctrl *ctrl, char *envdata)
4170 {
4171         char *envp[2] = { envdata, NULL };
4172
4173         kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4174 }
4175
4176 static void nvme_aen_uevent(struct nvme_ctrl *ctrl)
4177 {
4178         char *envp[2] = { NULL, NULL };
4179         u32 aen_result = ctrl->aen_result;
4180
4181         ctrl->aen_result = 0;
4182         if (!aen_result)
4183                 return;
4184
4185         envp[0] = kasprintf(GFP_KERNEL, "NVME_AEN=%#08x", aen_result);
4186         if (!envp[0])
4187                 return;
4188         kobject_uevent_env(&ctrl->device->kobj, KOBJ_CHANGE, envp);
4189         kfree(envp[0]);
4190 }
4191
4192 static void nvme_async_event_work(struct work_struct *work)
4193 {
4194         struct nvme_ctrl *ctrl =
4195                 container_of(work, struct nvme_ctrl, async_event_work);
4196
4197         nvme_aen_uevent(ctrl);
4198
4199         /*
4200          * The transport drivers must guarantee AER submission here is safe by
4201          * flushing ctrl async_event_work after changing the controller state
4202          * from LIVE and before freeing the admin queue.
4203         */
4204         if (nvme_ctrl_state(ctrl) == NVME_CTRL_LIVE)
4205                 ctrl->ops->submit_async_event(ctrl);
4206 }
4207
4208 static bool nvme_ctrl_pp_status(struct nvme_ctrl *ctrl)
4209 {
4210
4211         u32 csts;
4212
4213         if (ctrl->ops->reg_read32(ctrl, NVME_REG_CSTS, &csts))
4214                 return false;
4215
4216         if (csts == ~0)
4217                 return false;
4218
4219         return ((ctrl->ctrl_config & NVME_CC_ENABLE) && (csts & NVME_CSTS_PP));
4220 }
4221
4222 static void nvme_get_fw_slot_info(struct nvme_ctrl *ctrl)
4223 {
4224         struct nvme_fw_slot_info_log *log;
4225
4226         log = kmalloc(sizeof(*log), GFP_KERNEL);
4227         if (!log)
4228                 return;
4229
4230         if (nvme_get_log(ctrl, NVME_NSID_ALL, NVME_LOG_FW_SLOT, 0, NVME_CSI_NVM,
4231                          log, sizeof(*log), 0)) {
4232                 dev_warn(ctrl->device, "Get FW SLOT INFO log error\n");
4233                 goto out_free_log;
4234         }
4235
4236         if (log->afi & 0x70 || !(log->afi & 0x7)) {
4237                 dev_info(ctrl->device,
4238                          "Firmware is activated after next Controller Level Reset\n");
4239                 goto out_free_log;
4240         }
4241
4242         memcpy(ctrl->subsys->firmware_rev, &log->frs[(log->afi & 0x7) - 1],
4243                 sizeof(ctrl->subsys->firmware_rev));
4244
4245 out_free_log:
4246         kfree(log);
4247 }
4248
4249 static void nvme_fw_act_work(struct work_struct *work)
4250 {
4251         struct nvme_ctrl *ctrl = container_of(work,
4252                                 struct nvme_ctrl, fw_act_work);
4253         unsigned long fw_act_timeout;
4254
4255         nvme_auth_stop(ctrl);
4256
4257         if (ctrl->mtfa)
4258                 fw_act_timeout = jiffies +
4259                                 msecs_to_jiffies(ctrl->mtfa * 100);
4260         else
4261                 fw_act_timeout = jiffies +
4262                                 msecs_to_jiffies(admin_timeout * 1000);
4263
4264         nvme_quiesce_io_queues(ctrl);
4265         while (nvme_ctrl_pp_status(ctrl)) {
4266                 if (time_after(jiffies, fw_act_timeout)) {
4267                         dev_warn(ctrl->device,
4268                                 "Fw activation timeout, reset controller\n");
4269                         nvme_try_sched_reset(ctrl);
4270                         return;
4271                 }
4272                 msleep(100);
4273         }
4274
4275         if (!nvme_change_ctrl_state(ctrl, NVME_CTRL_LIVE))
4276                 return;
4277
4278         nvme_unquiesce_io_queues(ctrl);
4279         /* read FW slot information to clear the AER */
4280         nvme_get_fw_slot_info(ctrl);
4281
4282         queue_work(nvme_wq, &ctrl->async_event_work);
4283 }
4284
4285 static u32 nvme_aer_type(u32 result)
4286 {
4287         return result & 0x7;
4288 }
4289
4290 static u32 nvme_aer_subtype(u32 result)
4291 {
4292         return (result & 0xff00) >> 8;
4293 }
4294
4295 static bool nvme_handle_aen_notice(struct nvme_ctrl *ctrl, u32 result)
4296 {
4297         u32 aer_notice_type = nvme_aer_subtype(result);
4298         bool requeue = true;
4299
4300         switch (aer_notice_type) {
4301         case NVME_AER_NOTICE_NS_CHANGED:
4302                 set_bit(NVME_AER_NOTICE_NS_CHANGED, &ctrl->events);
4303                 nvme_queue_scan(ctrl);
4304                 break;
4305         case NVME_AER_NOTICE_FW_ACT_STARTING:
4306                 /*
4307                  * We are (ab)using the RESETTING state to prevent subsequent
4308                  * recovery actions from interfering with the controller's
4309                  * firmware activation.
4310                  */
4311                 if (nvme_change_ctrl_state(ctrl, NVME_CTRL_RESETTING)) {
4312                         requeue = false;
4313                         queue_work(nvme_wq, &ctrl->fw_act_work);
4314                 }
4315                 break;
4316 #ifdef CONFIG_NVME_MULTIPATH
4317         case NVME_AER_NOTICE_ANA:
4318                 if (!ctrl->ana_log_buf)
4319                         break;
4320                 queue_work(nvme_wq, &ctrl->ana_work);
4321                 break;
4322 #endif
4323         case NVME_AER_NOTICE_DISC_CHANGED:
4324                 ctrl->aen_result = result;
4325                 break;
4326         default:
4327                 dev_warn(ctrl->device, "async event result %08x\n", result);
4328         }
4329         return requeue;
4330 }
4331
4332 static void nvme_handle_aer_persistent_error(struct nvme_ctrl *ctrl)
4333 {
4334         dev_warn(ctrl->device, "resetting controller due to AER\n");
4335         nvme_reset_ctrl(ctrl);
4336 }
4337
4338 void nvme_complete_async_event(struct nvme_ctrl *ctrl, __le16 status,
4339                 volatile union nvme_result *res)
4340 {
4341         u32 result = le32_to_cpu(res->u32);
4342         u32 aer_type = nvme_aer_type(result);
4343         u32 aer_subtype = nvme_aer_subtype(result);
4344         bool requeue = true;
4345
4346         if (le16_to_cpu(status) >> 1 != NVME_SC_SUCCESS)
4347                 return;
4348
4349         trace_nvme_async_event(ctrl, result);
4350         switch (aer_type) {
4351         case NVME_AER_NOTICE:
4352                 requeue = nvme_handle_aen_notice(ctrl, result);
4353                 break;
4354         case NVME_AER_ERROR:
4355                 /*
4356                  * For a persistent internal error, don't run async_event_work
4357                  * to submit a new AER. The controller reset will do it.
4358                  */
4359                 if (aer_subtype == NVME_AER_ERROR_PERSIST_INT_ERR) {
4360                         nvme_handle_aer_persistent_error(ctrl);
4361                         return;
4362                 }
4363                 fallthrough;
4364         case NVME_AER_SMART:
4365         case NVME_AER_CSS:
4366         case NVME_AER_VS:
4367                 ctrl->aen_result = result;
4368                 break;
4369         default:
4370                 break;
4371         }
4372
4373         if (requeue)
4374                 queue_work(nvme_wq, &ctrl->async_event_work);
4375 }
4376 EXPORT_SYMBOL_GPL(nvme_complete_async_event);
4377
4378 int nvme_alloc_admin_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4379                 const struct blk_mq_ops *ops, unsigned int cmd_size)
4380 {
4381         struct queue_limits lim = {};
4382         int ret;
4383
4384         memset(set, 0, sizeof(*set));
4385         set->ops = ops;
4386         set->queue_depth = NVME_AQ_MQ_TAG_DEPTH;
4387         if (ctrl->ops->flags & NVME_F_FABRICS)
4388                 /* Reserved for fabric connect and keep alive */
4389                 set->reserved_tags = 2;
4390         set->numa_node = ctrl->numa_node;
4391         set->flags = BLK_MQ_F_NO_SCHED;
4392         if (ctrl->ops->flags & NVME_F_BLOCKING)
4393                 set->flags |= BLK_MQ_F_BLOCKING;
4394         set->cmd_size = cmd_size;
4395         set->driver_data = ctrl;
4396         set->nr_hw_queues = 1;
4397         set->timeout = NVME_ADMIN_TIMEOUT;
4398         ret = blk_mq_alloc_tag_set(set);
4399         if (ret)
4400                 return ret;
4401
4402         ctrl->admin_q = blk_mq_alloc_queue(set, &lim, NULL);
4403         if (IS_ERR(ctrl->admin_q)) {
4404                 ret = PTR_ERR(ctrl->admin_q);
4405                 goto out_free_tagset;
4406         }
4407
4408         if (ctrl->ops->flags & NVME_F_FABRICS) {
4409                 ctrl->fabrics_q = blk_mq_alloc_queue(set, NULL, NULL);
4410                 if (IS_ERR(ctrl->fabrics_q)) {
4411                         ret = PTR_ERR(ctrl->fabrics_q);
4412                         goto out_cleanup_admin_q;
4413                 }
4414         }
4415
4416         ctrl->admin_tagset = set;
4417         return 0;
4418
4419 out_cleanup_admin_q:
4420         blk_mq_destroy_queue(ctrl->admin_q);
4421         blk_put_queue(ctrl->admin_q);
4422 out_free_tagset:
4423         blk_mq_free_tag_set(set);
4424         ctrl->admin_q = NULL;
4425         ctrl->fabrics_q = NULL;
4426         return ret;
4427 }
4428 EXPORT_SYMBOL_GPL(nvme_alloc_admin_tag_set);
4429
4430 void nvme_remove_admin_tag_set(struct nvme_ctrl *ctrl)
4431 {
4432         blk_mq_destroy_queue(ctrl->admin_q);
4433         blk_put_queue(ctrl->admin_q);
4434         if (ctrl->ops->flags & NVME_F_FABRICS) {
4435                 blk_mq_destroy_queue(ctrl->fabrics_q);
4436                 blk_put_queue(ctrl->fabrics_q);
4437         }
4438         blk_mq_free_tag_set(ctrl->admin_tagset);
4439 }
4440 EXPORT_SYMBOL_GPL(nvme_remove_admin_tag_set);
4441
4442 int nvme_alloc_io_tag_set(struct nvme_ctrl *ctrl, struct blk_mq_tag_set *set,
4443                 const struct blk_mq_ops *ops, unsigned int nr_maps,
4444                 unsigned int cmd_size)
4445 {
4446         int ret;
4447
4448         memset(set, 0, sizeof(*set));
4449         set->ops = ops;
4450         set->queue_depth = min_t(unsigned, ctrl->sqsize, BLK_MQ_MAX_DEPTH - 1);
4451         /*
4452          * Some Apple controllers requires tags to be unique across admin and
4453          * the (only) I/O queue, so reserve the first 32 tags of the I/O queue.
4454          */
4455         if (ctrl->quirks & NVME_QUIRK_SHARED_TAGS)
4456                 set->reserved_tags = NVME_AQ_DEPTH;
4457         else if (ctrl->ops->flags & NVME_F_FABRICS)
4458                 /* Reserved for fabric connect */
4459                 set->reserved_tags = 1;
4460         set->numa_node = ctrl->numa_node;
4461         set->flags = BLK_MQ_F_SHOULD_MERGE;
4462         if (ctrl->ops->flags & NVME_F_BLOCKING)
4463                 set->flags |= BLK_MQ_F_BLOCKING;
4464         set->cmd_size = cmd_size,
4465         set->driver_data = ctrl;
4466         set->nr_hw_queues = ctrl->queue_count - 1;
4467         set->timeout = NVME_IO_TIMEOUT;
4468         set->nr_maps = nr_maps;
4469         ret = blk_mq_alloc_tag_set(set);
4470         if (ret)
4471                 return ret;
4472
4473         if (ctrl->ops->flags & NVME_F_FABRICS) {
4474                 ctrl->connect_q = blk_mq_alloc_queue(set, NULL, NULL);
4475                 if (IS_ERR(ctrl->connect_q)) {
4476                         ret = PTR_ERR(ctrl->connect_q);
4477                         goto out_free_tag_set;
4478                 }
4479                 blk_queue_flag_set(QUEUE_FLAG_SKIP_TAGSET_QUIESCE,
4480                                    ctrl->connect_q);
4481         }
4482
4483         ctrl->tagset = set;
4484         return 0;
4485
4486 out_free_tag_set:
4487         blk_mq_free_tag_set(set);
4488         ctrl->connect_q = NULL;
4489         return ret;
4490 }
4491 EXPORT_SYMBOL_GPL(nvme_alloc_io_tag_set);
4492
4493 void nvme_remove_io_tag_set(struct nvme_ctrl *ctrl)
4494 {
4495         if (ctrl->ops->flags & NVME_F_FABRICS) {
4496                 blk_mq_destroy_queue(ctrl->connect_q);
4497                 blk_put_queue(ctrl->connect_q);
4498         }
4499         blk_mq_free_tag_set(ctrl->tagset);
4500 }
4501 EXPORT_SYMBOL_GPL(nvme_remove_io_tag_set);
4502
4503 void nvme_stop_ctrl(struct nvme_ctrl *ctrl)
4504 {
4505         nvme_mpath_stop(ctrl);
4506         nvme_auth_stop(ctrl);
4507         nvme_stop_keep_alive(ctrl);
4508         nvme_stop_failfast_work(ctrl);
4509         flush_work(&ctrl->async_event_work);
4510         cancel_work_sync(&ctrl->fw_act_work);
4511         if (ctrl->ops->stop_ctrl)
4512                 ctrl->ops->stop_ctrl(ctrl);
4513 }
4514 EXPORT_SYMBOL_GPL(nvme_stop_ctrl);
4515
4516 void nvme_start_ctrl(struct nvme_ctrl *ctrl)
4517 {
4518         nvme_enable_aen(ctrl);
4519
4520         /*
4521          * persistent discovery controllers need to send indication to userspace
4522          * to re-read the discovery log page to learn about possible changes
4523          * that were missed. We identify persistent discovery controllers by
4524          * checking that they started once before, hence are reconnecting back.
4525          */
4526         if (test_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags) &&
4527             nvme_discovery_ctrl(ctrl))
4528                 nvme_change_uevent(ctrl, "NVME_EVENT=rediscover");
4529
4530         if (ctrl->queue_count > 1) {
4531                 nvme_queue_scan(ctrl);
4532                 nvme_unquiesce_io_queues(ctrl);
4533                 nvme_mpath_update(ctrl);
4534         }
4535
4536         nvme_change_uevent(ctrl, "NVME_EVENT=connected");
4537         set_bit(NVME_CTRL_STARTED_ONCE, &ctrl->flags);
4538 }
4539 EXPORT_SYMBOL_GPL(nvme_start_ctrl);
4540
4541 void nvme_uninit_ctrl(struct nvme_ctrl *ctrl)
4542 {
4543         nvme_hwmon_exit(ctrl);
4544         nvme_fault_inject_fini(&ctrl->fault_inject);
4545         dev_pm_qos_hide_latency_tolerance(ctrl->device);
4546         cdev_device_del(&ctrl->cdev, ctrl->device);
4547         nvme_put_ctrl(ctrl);
4548 }
4549 EXPORT_SYMBOL_GPL(nvme_uninit_ctrl);
4550
4551 static void nvme_free_cels(struct nvme_ctrl *ctrl)
4552 {
4553         struct nvme_effects_log *cel;
4554         unsigned long i;
4555
4556         xa_for_each(&ctrl->cels, i, cel) {
4557                 xa_erase(&ctrl->cels, i);
4558                 kfree(cel);
4559         }
4560
4561         xa_destroy(&ctrl->cels);
4562 }
4563
4564 static void nvme_free_ctrl(struct device *dev)
4565 {
4566         struct nvme_ctrl *ctrl =
4567                 container_of(dev, struct nvme_ctrl, ctrl_device);
4568         struct nvme_subsystem *subsys = ctrl->subsys;
4569
4570         if (!subsys || ctrl->instance != subsys->instance)
4571                 ida_free(&nvme_instance_ida, ctrl->instance);
4572         key_put(ctrl->tls_key);
4573         nvme_free_cels(ctrl);
4574         nvme_mpath_uninit(ctrl);
4575         nvme_auth_stop(ctrl);
4576         nvme_auth_free(ctrl);
4577         __free_page(ctrl->discard_page);
4578         free_opal_dev(ctrl->opal_dev);
4579
4580         if (subsys) {
4581                 mutex_lock(&nvme_subsystems_lock);
4582                 list_del(&ctrl->subsys_entry);
4583                 sysfs_remove_link(&subsys->dev.kobj, dev_name(ctrl->device));
4584                 mutex_unlock(&nvme_subsystems_lock);
4585         }
4586
4587         ctrl->ops->free_ctrl(ctrl);
4588
4589         if (subsys)
4590                 nvme_put_subsystem(subsys);
4591 }
4592
4593 /*
4594  * Initialize a NVMe controller structures.  This needs to be called during
4595  * earliest initialization so that we have the initialized structured around
4596  * during probing.
4597  */
4598 int nvme_init_ctrl(struct nvme_ctrl *ctrl, struct device *dev,
4599                 const struct nvme_ctrl_ops *ops, unsigned long quirks)
4600 {
4601         int ret;
4602
4603         WRITE_ONCE(ctrl->state, NVME_CTRL_NEW);
4604         ctrl->passthru_err_log_enabled = false;
4605         clear_bit(NVME_CTRL_FAILFAST_EXPIRED, &ctrl->flags);
4606         spin_lock_init(&ctrl->lock);
4607         mutex_init(&ctrl->scan_lock);
4608         INIT_LIST_HEAD(&ctrl->namespaces);
4609         xa_init(&ctrl->cels);
4610         init_rwsem(&ctrl->namespaces_rwsem);
4611         ctrl->dev = dev;
4612         ctrl->ops = ops;
4613         ctrl->quirks = quirks;
4614         ctrl->numa_node = NUMA_NO_NODE;
4615         INIT_WORK(&ctrl->scan_work, nvme_scan_work);
4616         INIT_WORK(&ctrl->async_event_work, nvme_async_event_work);
4617         INIT_WORK(&ctrl->fw_act_work, nvme_fw_act_work);
4618         INIT_WORK(&ctrl->delete_work, nvme_delete_ctrl_work);
4619         init_waitqueue_head(&ctrl->state_wq);
4620
4621         INIT_DELAYED_WORK(&ctrl->ka_work, nvme_keep_alive_work);
4622         INIT_DELAYED_WORK(&ctrl->failfast_work, nvme_failfast_work);
4623         memset(&ctrl->ka_cmd, 0, sizeof(ctrl->ka_cmd));
4624         ctrl->ka_cmd.common.opcode = nvme_admin_keep_alive;
4625         ctrl->ka_last_check_time = jiffies;
4626
4627         BUILD_BUG_ON(NVME_DSM_MAX_RANGES * sizeof(struct nvme_dsm_range) >
4628                         PAGE_SIZE);
4629         ctrl->discard_page = alloc_page(GFP_KERNEL);
4630         if (!ctrl->discard_page) {
4631                 ret = -ENOMEM;
4632                 goto out;
4633         }
4634
4635         ret = ida_alloc(&nvme_instance_ida, GFP_KERNEL);
4636         if (ret < 0)
4637                 goto out;
4638         ctrl->instance = ret;
4639
4640         device_initialize(&ctrl->ctrl_device);
4641         ctrl->device = &ctrl->ctrl_device;
4642         ctrl->device->devt = MKDEV(MAJOR(nvme_ctrl_base_chr_devt),
4643                         ctrl->instance);
4644         ctrl->device->class = &nvme_class;
4645         ctrl->device->parent = ctrl->dev;
4646         if (ops->dev_attr_groups)
4647                 ctrl->device->groups = ops->dev_attr_groups;
4648         else
4649                 ctrl->device->groups = nvme_dev_attr_groups;
4650         ctrl->device->release = nvme_free_ctrl;
4651         dev_set_drvdata(ctrl->device, ctrl);
4652         ret = dev_set_name(ctrl->device, "nvme%d", ctrl->instance);
4653         if (ret)
4654                 goto out_release_instance;
4655
4656         nvme_get_ctrl(ctrl);
4657         cdev_init(&ctrl->cdev, &nvme_dev_fops);
4658         ctrl->cdev.owner = ops->module;
4659         ret = cdev_device_add(&ctrl->cdev, ctrl->device);
4660         if (ret)
4661                 goto out_free_name;
4662
4663         /*
4664          * Initialize latency tolerance controls.  The sysfs files won't
4665          * be visible to userspace unless the device actually supports APST.
4666          */
4667         ctrl->device->power.set_latency_tolerance = nvme_set_latency_tolerance;
4668         dev_pm_qos_update_user_latency_tolerance(ctrl->device,
4669                 min(default_ps_max_latency_us, (unsigned long)S32_MAX));
4670
4671         nvme_fault_inject_init(&ctrl->fault_inject, dev_name(ctrl->device));
4672         nvme_mpath_init_ctrl(ctrl);
4673         ret = nvme_auth_init_ctrl(ctrl);
4674         if (ret)
4675                 goto out_free_cdev;
4676
4677         return 0;
4678 out_free_cdev:
4679         nvme_fault_inject_fini(&ctrl->fault_inject);
4680         dev_pm_qos_hide_latency_tolerance(ctrl->device);
4681         cdev_device_del(&ctrl->cdev, ctrl->device);
4682 out_free_name:
4683         nvme_put_ctrl(ctrl);
4684         kfree_const(ctrl->device->kobj.name);
4685 out_release_instance:
4686         ida_free(&nvme_instance_ida, ctrl->instance);
4687 out:
4688         if (ctrl->discard_page)
4689                 __free_page(ctrl->discard_page);
4690         return ret;
4691 }
4692 EXPORT_SYMBOL_GPL(nvme_init_ctrl);
4693
4694 /* let I/O to all namespaces fail in preparation for surprise removal */
4695 void nvme_mark_namespaces_dead(struct nvme_ctrl *ctrl)
4696 {
4697         struct nvme_ns *ns;
4698
4699         down_read(&ctrl->namespaces_rwsem);
4700         list_for_each_entry(ns, &ctrl->namespaces, list)
4701                 blk_mark_disk_dead(ns->disk);
4702         up_read(&ctrl->namespaces_rwsem);
4703 }
4704 EXPORT_SYMBOL_GPL(nvme_mark_namespaces_dead);
4705
4706 void nvme_unfreeze(struct nvme_ctrl *ctrl)
4707 {
4708         struct nvme_ns *ns;
4709
4710         down_read(&ctrl->namespaces_rwsem);
4711         list_for_each_entry(ns, &ctrl->namespaces, list)
4712                 blk_mq_unfreeze_queue(ns->queue);
4713         up_read(&ctrl->namespaces_rwsem);
4714         clear_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4715 }
4716 EXPORT_SYMBOL_GPL(nvme_unfreeze);
4717
4718 int nvme_wait_freeze_timeout(struct nvme_ctrl *ctrl, long timeout)
4719 {
4720         struct nvme_ns *ns;
4721
4722         down_read(&ctrl->namespaces_rwsem);
4723         list_for_each_entry(ns, &ctrl->namespaces, list) {
4724                 timeout = blk_mq_freeze_queue_wait_timeout(ns->queue, timeout);
4725                 if (timeout <= 0)
4726                         break;
4727         }
4728         up_read(&ctrl->namespaces_rwsem);
4729         return timeout;
4730 }
4731 EXPORT_SYMBOL_GPL(nvme_wait_freeze_timeout);
4732
4733 void nvme_wait_freeze(struct nvme_ctrl *ctrl)
4734 {
4735         struct nvme_ns *ns;
4736
4737         down_read(&ctrl->namespaces_rwsem);
4738         list_for_each_entry(ns, &ctrl->namespaces, list)
4739                 blk_mq_freeze_queue_wait(ns->queue);
4740         up_read(&ctrl->namespaces_rwsem);
4741 }
4742 EXPORT_SYMBOL_GPL(nvme_wait_freeze);
4743
4744 void nvme_start_freeze(struct nvme_ctrl *ctrl)
4745 {
4746         struct nvme_ns *ns;
4747
4748         set_bit(NVME_CTRL_FROZEN, &ctrl->flags);
4749         down_read(&ctrl->namespaces_rwsem);
4750         list_for_each_entry(ns, &ctrl->namespaces, list)
4751                 blk_freeze_queue_start(ns->queue);
4752         up_read(&ctrl->namespaces_rwsem);
4753 }
4754 EXPORT_SYMBOL_GPL(nvme_start_freeze);
4755
4756 void nvme_quiesce_io_queues(struct nvme_ctrl *ctrl)
4757 {
4758         if (!ctrl->tagset)
4759                 return;
4760         if (!test_and_set_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4761                 blk_mq_quiesce_tagset(ctrl->tagset);
4762         else
4763                 blk_mq_wait_quiesce_done(ctrl->tagset);
4764 }
4765 EXPORT_SYMBOL_GPL(nvme_quiesce_io_queues);
4766
4767 void nvme_unquiesce_io_queues(struct nvme_ctrl *ctrl)
4768 {
4769         if (!ctrl->tagset)
4770                 return;
4771         if (test_and_clear_bit(NVME_CTRL_STOPPED, &ctrl->flags))
4772                 blk_mq_unquiesce_tagset(ctrl->tagset);
4773 }
4774 EXPORT_SYMBOL_GPL(nvme_unquiesce_io_queues);
4775
4776 void nvme_quiesce_admin_queue(struct nvme_ctrl *ctrl)
4777 {
4778         if (!test_and_set_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4779                 blk_mq_quiesce_queue(ctrl->admin_q);
4780         else
4781                 blk_mq_wait_quiesce_done(ctrl->admin_q->tag_set);
4782 }
4783 EXPORT_SYMBOL_GPL(nvme_quiesce_admin_queue);
4784
4785 void nvme_unquiesce_admin_queue(struct nvme_ctrl *ctrl)
4786 {
4787         if (test_and_clear_bit(NVME_CTRL_ADMIN_Q_STOPPED, &ctrl->flags))
4788                 blk_mq_unquiesce_queue(ctrl->admin_q);
4789 }
4790 EXPORT_SYMBOL_GPL(nvme_unquiesce_admin_queue);
4791
4792 void nvme_sync_io_queues(struct nvme_ctrl *ctrl)
4793 {
4794         struct nvme_ns *ns;
4795
4796         down_read(&ctrl->namespaces_rwsem);
4797         list_for_each_entry(ns, &ctrl->namespaces, list)
4798                 blk_sync_queue(ns->queue);
4799         up_read(&ctrl->namespaces_rwsem);
4800 }
4801 EXPORT_SYMBOL_GPL(nvme_sync_io_queues);
4802
4803 void nvme_sync_queues(struct nvme_ctrl *ctrl)
4804 {
4805         nvme_sync_io_queues(ctrl);
4806         if (ctrl->admin_q)
4807                 blk_sync_queue(ctrl->admin_q);
4808 }
4809 EXPORT_SYMBOL_GPL(nvme_sync_queues);
4810
4811 struct nvme_ctrl *nvme_ctrl_from_file(struct file *file)
4812 {
4813         if (file->f_op != &nvme_dev_fops)
4814                 return NULL;
4815         return file->private_data;
4816 }
4817 EXPORT_SYMBOL_NS_GPL(nvme_ctrl_from_file, NVME_TARGET_PASSTHRU);
4818
4819 /*
4820  * Check we didn't inadvertently grow the command structure sizes:
4821  */
4822 static inline void _nvme_check_size(void)
4823 {
4824         BUILD_BUG_ON(sizeof(struct nvme_common_command) != 64);
4825         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
4826         BUILD_BUG_ON(sizeof(struct nvme_identify) != 64);
4827         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
4828         BUILD_BUG_ON(sizeof(struct nvme_download_firmware) != 64);
4829         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
4830         BUILD_BUG_ON(sizeof(struct nvme_dsm_cmd) != 64);
4831         BUILD_BUG_ON(sizeof(struct nvme_write_zeroes_cmd) != 64);
4832         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
4833         BUILD_BUG_ON(sizeof(struct nvme_get_log_page_command) != 64);
4834         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
4835         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != NVME_IDENTIFY_DATA_SIZE);
4836         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != NVME_IDENTIFY_DATA_SIZE);
4837         BUILD_BUG_ON(sizeof(struct nvme_id_ns_cs_indep) !=
4838                         NVME_IDENTIFY_DATA_SIZE);
4839         BUILD_BUG_ON(sizeof(struct nvme_id_ns_zns) != NVME_IDENTIFY_DATA_SIZE);
4840         BUILD_BUG_ON(sizeof(struct nvme_id_ns_nvm) != NVME_IDENTIFY_DATA_SIZE);
4841         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_zns) != NVME_IDENTIFY_DATA_SIZE);
4842         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl_nvm) != NVME_IDENTIFY_DATA_SIZE);
4843         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
4844         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
4845         BUILD_BUG_ON(sizeof(struct nvme_dbbuf) != 64);
4846         BUILD_BUG_ON(sizeof(struct nvme_directive_cmd) != 64);
4847         BUILD_BUG_ON(sizeof(struct nvme_feat_host_behavior) != 512);
4848 }
4849
4850
4851 static int __init nvme_core_init(void)
4852 {
4853         int result = -ENOMEM;
4854
4855         _nvme_check_size();
4856
4857         nvme_wq = alloc_workqueue("nvme-wq",
4858                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4859         if (!nvme_wq)
4860                 goto out;
4861
4862         nvme_reset_wq = alloc_workqueue("nvme-reset-wq",
4863                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4864         if (!nvme_reset_wq)
4865                 goto destroy_wq;
4866
4867         nvme_delete_wq = alloc_workqueue("nvme-delete-wq",
4868                         WQ_UNBOUND | WQ_MEM_RECLAIM | WQ_SYSFS, 0);
4869         if (!nvme_delete_wq)
4870                 goto destroy_reset_wq;
4871
4872         result = alloc_chrdev_region(&nvme_ctrl_base_chr_devt, 0,
4873                         NVME_MINORS, "nvme");
4874         if (result < 0)
4875                 goto destroy_delete_wq;
4876
4877         result = class_register(&nvme_class);
4878         if (result)
4879                 goto unregister_chrdev;
4880
4881         result = class_register(&nvme_subsys_class);
4882         if (result)
4883                 goto destroy_class;
4884
4885         result = alloc_chrdev_region(&nvme_ns_chr_devt, 0, NVME_MINORS,
4886                                      "nvme-generic");
4887         if (result < 0)
4888                 goto destroy_subsys_class;
4889
4890         result = class_register(&nvme_ns_chr_class);
4891         if (result)
4892                 goto unregister_generic_ns;
4893
4894         result = nvme_init_auth();
4895         if (result)
4896                 goto destroy_ns_chr;
4897         return 0;
4898
4899 destroy_ns_chr:
4900         class_unregister(&nvme_ns_chr_class);
4901 unregister_generic_ns:
4902         unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4903 destroy_subsys_class:
4904         class_unregister(&nvme_subsys_class);
4905 destroy_class:
4906         class_unregister(&nvme_class);
4907 unregister_chrdev:
4908         unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4909 destroy_delete_wq:
4910         destroy_workqueue(nvme_delete_wq);
4911 destroy_reset_wq:
4912         destroy_workqueue(nvme_reset_wq);
4913 destroy_wq:
4914         destroy_workqueue(nvme_wq);
4915 out:
4916         return result;
4917 }
4918
4919 static void __exit nvme_core_exit(void)
4920 {
4921         nvme_exit_auth();
4922         class_unregister(&nvme_ns_chr_class);
4923         class_unregister(&nvme_subsys_class);
4924         class_unregister(&nvme_class);
4925         unregister_chrdev_region(nvme_ns_chr_devt, NVME_MINORS);
4926         unregister_chrdev_region(nvme_ctrl_base_chr_devt, NVME_MINORS);
4927         destroy_workqueue(nvme_delete_wq);
4928         destroy_workqueue(nvme_reset_wq);
4929         destroy_workqueue(nvme_wq);
4930         ida_destroy(&nvme_ns_chr_minor_ida);
4931         ida_destroy(&nvme_instance_ida);
4932 }
4933
4934 MODULE_LICENSE("GPL");
4935 MODULE_VERSION("1.0");
4936 MODULE_DESCRIPTION("NVMe host core framework");
4937 module_init(nvme_core_init);
4938 module_exit(nvme_core_exit);