1 // SPDX-License-Identifier: GPL-2.0
3 * Texas Instruments N-Port Ethernet Switch Address Lookup Engine
5 * Copyright (C) 2012 Texas Instruments
8 #include <linux/kernel.h>
9 #include <linux/module.h>
10 #include <linux/platform_device.h>
11 #include <linux/seq_file.h>
12 #include <linux/slab.h>
13 #include <linux/err.h>
15 #include <linux/stat.h>
16 #include <linux/sysfs.h>
17 #include <linux/etherdevice.h>
21 #define BITMASK(bits) (BIT(bits) - 1)
23 #define ALE_VERSION_MAJOR(rev, mask) (((rev) >> 8) & (mask))
24 #define ALE_VERSION_MINOR(rev) (rev & 0xff)
25 #define ALE_VERSION_1R3 0x0103
26 #define ALE_VERSION_1R4 0x0104
29 #define ALE_IDVER 0x00
30 #define ALE_STATUS 0x04
31 #define ALE_CONTROL 0x08
32 #define ALE_PRESCALE 0x10
33 #define ALE_UNKNOWNVLAN 0x18
34 #define ALE_TABLE_CONTROL 0x20
35 #define ALE_TABLE 0x34
36 #define ALE_PORTCTL 0x40
38 /* ALE NetCP NU switch specific Registers */
39 #define ALE_UNKNOWNVLAN_MEMBER 0x90
40 #define ALE_UNKNOWNVLAN_UNREG_MCAST_FLOOD 0x94
41 #define ALE_UNKNOWNVLAN_REG_MCAST_FLOOD 0x98
42 #define ALE_UNKNOWNVLAN_FORCE_UNTAG_EGRESS 0x9C
43 #define ALE_VLAN_MASK_MUX(reg) (0xc0 + (0x4 * (reg)))
45 #define ALE_TABLE_WRITE BIT(31)
47 #define ALE_TYPE_FREE 0
48 #define ALE_TYPE_ADDR 1
49 #define ALE_TYPE_VLAN 2
50 #define ALE_TYPE_VLAN_ADDR 3
52 #define ALE_UCAST_PERSISTANT 0
53 #define ALE_UCAST_UNTOUCHED 1
54 #define ALE_UCAST_OUI 2
55 #define ALE_UCAST_TOUCHED 3
57 #define ALE_TABLE_SIZE_MULTIPLIER 1024
58 #define ALE_STATUS_SIZE_MASK 0x1f
59 #define ALE_TABLE_SIZE_DEFAULT 64
61 static inline int cpsw_ale_get_field(u32 *ale_entry, u32 start, u32 bits)
67 idx = 2 - idx; /* flip */
68 return (ale_entry[idx] >> start) & BITMASK(bits);
71 static inline void cpsw_ale_set_field(u32 *ale_entry, u32 start, u32 bits,
76 value &= BITMASK(bits);
79 idx = 2 - idx; /* flip */
80 ale_entry[idx] &= ~(BITMASK(bits) << start);
81 ale_entry[idx] |= (value << start);
84 #define DEFINE_ALE_FIELD(name, start, bits) \
85 static inline int cpsw_ale_get_##name(u32 *ale_entry) \
87 return cpsw_ale_get_field(ale_entry, start, bits); \
89 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value) \
91 cpsw_ale_set_field(ale_entry, start, bits, value); \
94 #define DEFINE_ALE_FIELD1(name, start) \
95 static inline int cpsw_ale_get_##name(u32 *ale_entry, u32 bits) \
97 return cpsw_ale_get_field(ale_entry, start, bits); \
99 static inline void cpsw_ale_set_##name(u32 *ale_entry, u32 value, \
102 cpsw_ale_set_field(ale_entry, start, bits, value); \
105 DEFINE_ALE_FIELD(entry_type, 60, 2)
106 DEFINE_ALE_FIELD(vlan_id, 48, 12)
107 DEFINE_ALE_FIELD(mcast_state, 62, 2)
108 DEFINE_ALE_FIELD1(port_mask, 66)
109 DEFINE_ALE_FIELD(super, 65, 1)
110 DEFINE_ALE_FIELD(ucast_type, 62, 2)
111 DEFINE_ALE_FIELD1(port_num, 66)
112 DEFINE_ALE_FIELD(blocked, 65, 1)
113 DEFINE_ALE_FIELD(secure, 64, 1)
114 DEFINE_ALE_FIELD1(vlan_untag_force, 24)
115 DEFINE_ALE_FIELD1(vlan_reg_mcast, 16)
116 DEFINE_ALE_FIELD1(vlan_unreg_mcast, 8)
117 DEFINE_ALE_FIELD1(vlan_member_list, 0)
118 DEFINE_ALE_FIELD(mcast, 40, 1)
119 /* ALE NetCP nu switch specific */
120 DEFINE_ALE_FIELD(vlan_unreg_mcast_idx, 20, 3)
121 DEFINE_ALE_FIELD(vlan_reg_mcast_idx, 44, 3)
123 /* The MAC address field in the ALE entry cannot be macroized as above */
124 static inline void cpsw_ale_get_addr(u32 *ale_entry, u8 *addr)
128 for (i = 0; i < 6; i++)
129 addr[i] = cpsw_ale_get_field(ale_entry, 40 - 8*i, 8);
132 static inline void cpsw_ale_set_addr(u32 *ale_entry, const u8 *addr)
136 for (i = 0; i < 6; i++)
137 cpsw_ale_set_field(ale_entry, 40 - 8*i, 8, addr[i]);
140 static int cpsw_ale_read(struct cpsw_ale *ale, int idx, u32 *ale_entry)
144 WARN_ON(idx > ale->params.ale_entries);
146 writel_relaxed(idx, ale->params.ale_regs + ALE_TABLE_CONTROL);
148 for (i = 0; i < ALE_ENTRY_WORDS; i++)
149 ale_entry[i] = readl_relaxed(ale->params.ale_regs +
155 static int cpsw_ale_write(struct cpsw_ale *ale, int idx, u32 *ale_entry)
159 WARN_ON(idx > ale->params.ale_entries);
161 for (i = 0; i < ALE_ENTRY_WORDS; i++)
162 writel_relaxed(ale_entry[i], ale->params.ale_regs +
165 writel_relaxed(idx | ALE_TABLE_WRITE, ale->params.ale_regs +
171 static int cpsw_ale_match_addr(struct cpsw_ale *ale, const u8 *addr, u16 vid)
173 u32 ale_entry[ALE_ENTRY_WORDS];
176 for (idx = 0; idx < ale->params.ale_entries; idx++) {
179 cpsw_ale_read(ale, idx, ale_entry);
180 type = cpsw_ale_get_entry_type(ale_entry);
181 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
183 if (cpsw_ale_get_vlan_id(ale_entry) != vid)
185 cpsw_ale_get_addr(ale_entry, entry_addr);
186 if (ether_addr_equal(entry_addr, addr))
192 static int cpsw_ale_match_vlan(struct cpsw_ale *ale, u16 vid)
194 u32 ale_entry[ALE_ENTRY_WORDS];
197 for (idx = 0; idx < ale->params.ale_entries; idx++) {
198 cpsw_ale_read(ale, idx, ale_entry);
199 type = cpsw_ale_get_entry_type(ale_entry);
200 if (type != ALE_TYPE_VLAN)
202 if (cpsw_ale_get_vlan_id(ale_entry) == vid)
208 static int cpsw_ale_match_free(struct cpsw_ale *ale)
210 u32 ale_entry[ALE_ENTRY_WORDS];
213 for (idx = 0; idx < ale->params.ale_entries; idx++) {
214 cpsw_ale_read(ale, idx, ale_entry);
215 type = cpsw_ale_get_entry_type(ale_entry);
216 if (type == ALE_TYPE_FREE)
222 static int cpsw_ale_find_ageable(struct cpsw_ale *ale)
224 u32 ale_entry[ALE_ENTRY_WORDS];
227 for (idx = 0; idx < ale->params.ale_entries; idx++) {
228 cpsw_ale_read(ale, idx, ale_entry);
229 type = cpsw_ale_get_entry_type(ale_entry);
230 if (type != ALE_TYPE_ADDR && type != ALE_TYPE_VLAN_ADDR)
232 if (cpsw_ale_get_mcast(ale_entry))
234 type = cpsw_ale_get_ucast_type(ale_entry);
235 if (type != ALE_UCAST_PERSISTANT &&
236 type != ALE_UCAST_OUI)
242 static void cpsw_ale_flush_mcast(struct cpsw_ale *ale, u32 *ale_entry,
247 mask = cpsw_ale_get_port_mask(ale_entry,
248 ale->port_mask_bits);
249 if ((mask & port_mask) == 0)
250 return; /* ports dont intersect, not interested */
253 /* free if only remaining port is host port */
255 cpsw_ale_set_port_mask(ale_entry, mask,
256 ale->port_mask_bits);
258 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
261 int cpsw_ale_flush_multicast(struct cpsw_ale *ale, int port_mask, int vid)
263 u32 ale_entry[ALE_ENTRY_WORDS];
266 for (idx = 0; idx < ale->params.ale_entries; idx++) {
267 cpsw_ale_read(ale, idx, ale_entry);
268 ret = cpsw_ale_get_entry_type(ale_entry);
269 if (ret != ALE_TYPE_ADDR && ret != ALE_TYPE_VLAN_ADDR)
272 /* if vid passed is -1 then remove all multicast entry from
273 * the table irrespective of vlan id, if a valid vlan id is
274 * passed then remove only multicast added to that vlan id.
275 * if vlan id doesn't match then move on to next entry.
277 if (vid != -1 && cpsw_ale_get_vlan_id(ale_entry) != vid)
280 if (cpsw_ale_get_mcast(ale_entry)) {
283 if (cpsw_ale_get_super(ale_entry))
286 cpsw_ale_get_addr(ale_entry, addr);
287 if (!is_broadcast_ether_addr(addr))
288 cpsw_ale_flush_mcast(ale, ale_entry, port_mask);
291 cpsw_ale_write(ale, idx, ale_entry);
296 static inline void cpsw_ale_set_vlan_entry_type(u32 *ale_entry,
299 if (flags & ALE_VLAN) {
300 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN_ADDR);
301 cpsw_ale_set_vlan_id(ale_entry, vid);
303 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_ADDR);
307 int cpsw_ale_add_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
310 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
313 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
315 cpsw_ale_set_addr(ale_entry, addr);
316 cpsw_ale_set_ucast_type(ale_entry, ALE_UCAST_PERSISTANT);
317 cpsw_ale_set_secure(ale_entry, (flags & ALE_SECURE) ? 1 : 0);
318 cpsw_ale_set_blocked(ale_entry, (flags & ALE_BLOCKED) ? 1 : 0);
319 cpsw_ale_set_port_num(ale_entry, port, ale->port_num_bits);
321 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
323 idx = cpsw_ale_match_free(ale);
325 idx = cpsw_ale_find_ageable(ale);
329 cpsw_ale_write(ale, idx, ale_entry);
333 int cpsw_ale_del_ucast(struct cpsw_ale *ale, const u8 *addr, int port,
336 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
339 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
343 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
344 cpsw_ale_write(ale, idx, ale_entry);
348 int cpsw_ale_add_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,
349 int flags, u16 vid, int mcast_state)
351 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
354 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
356 cpsw_ale_read(ale, idx, ale_entry);
358 cpsw_ale_set_vlan_entry_type(ale_entry, flags, vid);
360 cpsw_ale_set_addr(ale_entry, addr);
361 cpsw_ale_set_super(ale_entry, (flags & ALE_SUPER) ? 1 : 0);
362 cpsw_ale_set_mcast_state(ale_entry, mcast_state);
364 mask = cpsw_ale_get_port_mask(ale_entry,
365 ale->port_mask_bits);
367 cpsw_ale_set_port_mask(ale_entry, port_mask,
368 ale->port_mask_bits);
371 idx = cpsw_ale_match_free(ale);
373 idx = cpsw_ale_find_ageable(ale);
377 cpsw_ale_write(ale, idx, ale_entry);
381 int cpsw_ale_del_mcast(struct cpsw_ale *ale, const u8 *addr, int port_mask,
384 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
387 idx = cpsw_ale_match_addr(ale, addr, (flags & ALE_VLAN) ? vid : 0);
391 cpsw_ale_read(ale, idx, ale_entry);
394 cpsw_ale_set_port_mask(ale_entry, port_mask,
395 ale->port_mask_bits);
397 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
399 cpsw_ale_write(ale, idx, ale_entry);
403 /* ALE NetCP NU switch specific vlan functions */
404 static void cpsw_ale_set_vlan_mcast(struct cpsw_ale *ale, u32 *ale_entry,
405 int reg_mcast, int unreg_mcast)
409 /* Set VLAN registered multicast flood mask */
410 idx = cpsw_ale_get_vlan_reg_mcast_idx(ale_entry);
411 writel(reg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx));
413 /* Set VLAN unregistered multicast flood mask */
414 idx = cpsw_ale_get_vlan_unreg_mcast_idx(ale_entry);
415 writel(unreg_mcast, ale->params.ale_regs + ALE_VLAN_MASK_MUX(idx));
418 int cpsw_ale_add_vlan(struct cpsw_ale *ale, u16 vid, int port, int untag,
419 int reg_mcast, int unreg_mcast)
421 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
424 idx = cpsw_ale_match_vlan(ale, vid);
426 cpsw_ale_read(ale, idx, ale_entry);
428 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_VLAN);
429 cpsw_ale_set_vlan_id(ale_entry, vid);
431 cpsw_ale_set_vlan_untag_force(ale_entry, untag, ale->vlan_field_bits);
432 if (!ale->params.nu_switch_ale) {
433 cpsw_ale_set_vlan_reg_mcast(ale_entry, reg_mcast,
434 ale->vlan_field_bits);
435 cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast,
436 ale->vlan_field_bits);
438 cpsw_ale_set_vlan_mcast(ale, ale_entry, reg_mcast, unreg_mcast);
440 cpsw_ale_set_vlan_member_list(ale_entry, port, ale->vlan_field_bits);
443 idx = cpsw_ale_match_free(ale);
445 idx = cpsw_ale_find_ageable(ale);
449 cpsw_ale_write(ale, idx, ale_entry);
453 int cpsw_ale_del_vlan(struct cpsw_ale *ale, u16 vid, int port_mask)
455 u32 ale_entry[ALE_ENTRY_WORDS] = {0, 0, 0};
458 idx = cpsw_ale_match_vlan(ale, vid);
462 cpsw_ale_read(ale, idx, ale_entry);
465 cpsw_ale_set_vlan_member_list(ale_entry, port_mask,
466 ale->vlan_field_bits);
468 cpsw_ale_set_entry_type(ale_entry, ALE_TYPE_FREE);
470 cpsw_ale_write(ale, idx, ale_entry);
474 void cpsw_ale_set_allmulti(struct cpsw_ale *ale, int allmulti, int port)
476 u32 ale_entry[ALE_ENTRY_WORDS];
480 for (idx = 0; idx < ale->params.ale_entries; idx++) {
483 cpsw_ale_read(ale, idx, ale_entry);
484 type = cpsw_ale_get_entry_type(ale_entry);
485 if (type != ALE_TYPE_VLAN)
488 cpsw_ale_get_vlan_member_list(ale_entry,
489 ale->vlan_field_bits);
491 if (port != -1 && !(vlan_members & BIT(port)))
495 cpsw_ale_get_vlan_unreg_mcast(ale_entry,
496 ale->vlan_field_bits);
498 unreg_mcast |= ALE_PORT_HOST;
500 unreg_mcast &= ~ALE_PORT_HOST;
501 cpsw_ale_set_vlan_unreg_mcast(ale_entry, unreg_mcast,
502 ale->vlan_field_bits);
503 cpsw_ale_write(ale, idx, ale_entry);
507 struct ale_control_info {
509 int offset, port_offset;
510 int shift, port_shift;
514 static struct ale_control_info ale_controls[ALE_NUM_CONTROLS] = {
517 .offset = ALE_CONTROL,
525 .offset = ALE_CONTROL,
533 .offset = ALE_CONTROL,
539 [ALE_P0_UNI_FLOOD] = {
540 .name = "port0_unicast_flood",
541 .offset = ALE_CONTROL,
547 [ALE_VLAN_NOLEARN] = {
548 .name = "vlan_nolearn",
549 .offset = ALE_CONTROL,
555 [ALE_NO_PORT_VLAN] = {
556 .name = "no_port_vlan",
557 .offset = ALE_CONTROL,
565 .offset = ALE_CONTROL,
573 .offset = ALE_CONTROL,
579 [ALE_RATE_LIMIT_TX] = {
580 .name = "rate_limit_tx",
581 .offset = ALE_CONTROL,
588 .name = "vlan_aware",
589 .offset = ALE_CONTROL,
595 [ALE_AUTH_ENABLE] = {
596 .name = "auth_enable",
597 .offset = ALE_CONTROL,
604 .name = "rate_limit",
605 .offset = ALE_CONTROL,
612 .name = "port_state",
613 .offset = ALE_PORTCTL,
619 [ALE_PORT_DROP_UNTAGGED] = {
620 .name = "drop_untagged",
621 .offset = ALE_PORTCTL,
627 [ALE_PORT_DROP_UNKNOWN_VLAN] = {
628 .name = "drop_unknown",
629 .offset = ALE_PORTCTL,
635 [ALE_PORT_NOLEARN] = {
637 .offset = ALE_PORTCTL,
643 [ALE_PORT_NO_SA_UPDATE] = {
644 .name = "no_source_update",
645 .offset = ALE_PORTCTL,
651 [ALE_PORT_MCAST_LIMIT] = {
652 .name = "mcast_limit",
653 .offset = ALE_PORTCTL,
659 [ALE_PORT_BCAST_LIMIT] = {
660 .name = "bcast_limit",
661 .offset = ALE_PORTCTL,
667 [ALE_PORT_UNKNOWN_VLAN_MEMBER] = {
668 .name = "unknown_vlan_member",
669 .offset = ALE_UNKNOWNVLAN,
675 [ALE_PORT_UNKNOWN_MCAST_FLOOD] = {
676 .name = "unknown_mcast_flood",
677 .offset = ALE_UNKNOWNVLAN,
683 [ALE_PORT_UNKNOWN_REG_MCAST_FLOOD] = {
684 .name = "unknown_reg_flood",
685 .offset = ALE_UNKNOWNVLAN,
691 [ALE_PORT_UNTAGGED_EGRESS] = {
692 .name = "untagged_egress",
693 .offset = ALE_UNKNOWNVLAN,
701 int cpsw_ale_control_set(struct cpsw_ale *ale, int port, int control,
704 const struct ale_control_info *info;
708 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
711 info = &ale_controls[control];
712 if (info->port_offset == 0 && info->port_shift == 0)
713 port = 0; /* global, port is a dont care */
715 if (port < 0 || port >= ale->params.ale_ports)
718 mask = BITMASK(info->bits);
722 offset = info->offset + (port * info->port_offset);
723 shift = info->shift + (port * info->port_shift);
725 tmp = readl_relaxed(ale->params.ale_regs + offset);
726 tmp = (tmp & ~(mask << shift)) | (value << shift);
727 writel_relaxed(tmp, ale->params.ale_regs + offset);
732 int cpsw_ale_control_get(struct cpsw_ale *ale, int port, int control)
734 const struct ale_control_info *info;
738 if (control < 0 || control >= ARRAY_SIZE(ale_controls))
741 info = &ale_controls[control];
742 if (info->port_offset == 0 && info->port_shift == 0)
743 port = 0; /* global, port is a dont care */
745 if (port < 0 || port >= ale->params.ale_ports)
748 offset = info->offset + (port * info->port_offset);
749 shift = info->shift + (port * info->port_shift);
751 tmp = readl_relaxed(ale->params.ale_regs + offset) >> shift;
752 return tmp & BITMASK(info->bits);
755 static void cpsw_ale_timer(struct timer_list *t)
757 struct cpsw_ale *ale = from_timer(ale, t, timer);
759 cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
762 ale->timer.expires = jiffies + ale->ageout;
763 add_timer(&ale->timer);
767 void cpsw_ale_start(struct cpsw_ale *ale)
769 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 1);
770 cpsw_ale_control_set(ale, 0, ALE_CLEAR, 1);
772 timer_setup(&ale->timer, cpsw_ale_timer, 0);
774 ale->timer.expires = jiffies + ale->ageout;
775 add_timer(&ale->timer);
779 void cpsw_ale_stop(struct cpsw_ale *ale)
781 del_timer_sync(&ale->timer);
782 cpsw_ale_control_set(ale, 0, ALE_ENABLE, 0);
785 struct cpsw_ale *cpsw_ale_create(struct cpsw_ale_params *params)
787 struct cpsw_ale *ale;
788 u32 rev, ale_entries;
790 ale = devm_kzalloc(params->dev, sizeof(*ale), GFP_KERNEL);
794 ale->params = *params;
795 ale->ageout = ale->params.ale_ageout * HZ;
797 rev = readl_relaxed(ale->params.ale_regs + ALE_IDVER);
798 if (!ale->params.major_ver_mask)
799 ale->params.major_ver_mask = 0xff;
801 (ALE_VERSION_MAJOR(rev, ale->params.major_ver_mask) << 8) |
802 ALE_VERSION_MINOR(rev);
803 dev_info(ale->params.dev, "initialized cpsw ale version %d.%d\n",
804 ALE_VERSION_MAJOR(rev, ale->params.major_ver_mask),
805 ALE_VERSION_MINOR(rev));
807 if (!ale->params.ale_entries) {
809 readl_relaxed(ale->params.ale_regs + ALE_STATUS) &
810 ALE_STATUS_SIZE_MASK;
811 /* ALE available on newer NetCP switches has introduced
812 * a register, ALE_STATUS, to indicate the size of ALE
813 * table which shows the size as a multiple of 1024 entries.
814 * For these, params.ale_entries will be set to zero. So
815 * read the register and update the value of ale_entries.
816 * ALE table on NetCP lite, is much smaller and is indicated
817 * by a value of zero in ALE_STATUS. So use a default value
818 * of ALE_TABLE_SIZE_DEFAULT for this. Caller is expected
819 * to set the value of ale_entries for all other versions
823 ale_entries = ALE_TABLE_SIZE_DEFAULT;
825 ale_entries *= ALE_TABLE_SIZE_MULTIPLIER;
826 ale->params.ale_entries = ale_entries;
828 dev_info(ale->params.dev,
829 "ALE Table size %ld\n", ale->params.ale_entries);
831 /* set default bits for existing h/w */
832 ale->port_mask_bits = ale->params.ale_ports;
833 ale->port_num_bits = order_base_2(ale->params.ale_ports);
834 ale->vlan_field_bits = ale->params.ale_ports;
836 /* Set defaults override for ALE on NetCP NU switch and for version
839 if (ale->params.nu_switch_ale) {
840 /* Separate registers for unknown vlan configuration.
841 * Also there are N bits, where N is number of ale
842 * ports and shift value should be 0
844 ale_controls[ALE_PORT_UNKNOWN_VLAN_MEMBER].bits =
845 ale->params.ale_ports;
846 ale_controls[ALE_PORT_UNKNOWN_VLAN_MEMBER].offset =
847 ALE_UNKNOWNVLAN_MEMBER;
848 ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].bits =
849 ale->params.ale_ports;
850 ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].shift = 0;
851 ale_controls[ALE_PORT_UNKNOWN_MCAST_FLOOD].offset =
852 ALE_UNKNOWNVLAN_UNREG_MCAST_FLOOD;
853 ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].bits =
854 ale->params.ale_ports;
855 ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].shift = 0;
856 ale_controls[ALE_PORT_UNKNOWN_REG_MCAST_FLOOD].offset =
857 ALE_UNKNOWNVLAN_REG_MCAST_FLOOD;
858 ale_controls[ALE_PORT_UNTAGGED_EGRESS].bits =
859 ale->params.ale_ports;
860 ale_controls[ALE_PORT_UNTAGGED_EGRESS].shift = 0;
861 ale_controls[ALE_PORT_UNTAGGED_EGRESS].offset =
862 ALE_UNKNOWNVLAN_FORCE_UNTAG_EGRESS;
868 void cpsw_ale_dump(struct cpsw_ale *ale, u32 *data)
872 for (i = 0; i < ale->params.ale_entries; i++) {
873 cpsw_ale_read(ale, i, data);
874 data += ALE_ENTRY_WORDS;