2 * QLogic qlcnic NIC Driver
3 * Copyright (c) 2009-2010 QLogic Corporation
5 * See LICENSE.qlcnic for copyright and licensing details.
11 #include <linux/module.h>
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/ioport.h>
15 #include <linux/pci.h>
16 #include <linux/netdevice.h>
17 #include <linux/etherdevice.h>
20 #include <linux/tcp.h>
21 #include <linux/skbuff.h>
22 #include <linux/firmware.h>
24 #include <linux/ethtool.h>
25 #include <linux/mii.h>
26 #include <linux/timer.h>
28 #include <linux/vmalloc.h>
31 #include <asm/byteorder.h>
32 #include <linux/bitops.h>
33 #include <linux/if_vlan.h>
35 #include "qlcnic_hdr.h"
36 #include "qlcnic_hw.h"
37 #include "qlcnic_83xx_hw.h"
39 #define _QLCNIC_LINUX_MAJOR 5
40 #define _QLCNIC_LINUX_MINOR 0
41 #define _QLCNIC_LINUX_SUBVERSION 30
42 #define QLCNIC_LINUX_VERSIONID "5.0.30"
43 #define QLCNIC_DRV_IDC_VER 0x01
44 #define QLCNIC_DRIVER_VERSION ((_QLCNIC_LINUX_MAJOR << 16) |\
45 (_QLCNIC_LINUX_MINOR << 8) | (_QLCNIC_LINUX_SUBVERSION))
47 #define QLCNIC_VERSION_CODE(a, b, c) (((a) << 24) + ((b) << 16) + (c))
48 #define _major(v) (((v) >> 24) & 0xff)
49 #define _minor(v) (((v) >> 16) & 0xff)
50 #define _build(v) ((v) & 0xffff)
52 /* version in image has weird encoding:
55 * 31:16 - build (little endian)
57 #define QLCNIC_DECODE_VERSION(v) \
58 QLCNIC_VERSION_CODE(((v) & 0xff), (((v) >> 8) & 0xff), ((v) >> 16))
60 #define QLCNIC_MIN_FW_VERSION QLCNIC_VERSION_CODE(4, 4, 2)
61 #define QLCNIC_NUM_FLASH_SECTORS (64)
62 #define QLCNIC_FLASH_SECTOR_SIZE (64 * 1024)
63 #define QLCNIC_FLASH_TOTAL_SIZE (QLCNIC_NUM_FLASH_SECTORS \
64 * QLCNIC_FLASH_SECTOR_SIZE)
66 #define RCV_DESC_RINGSIZE(rds_ring) \
67 (sizeof(struct rcv_desc) * (rds_ring)->num_desc)
68 #define RCV_BUFF_RINGSIZE(rds_ring) \
69 (sizeof(struct qlcnic_rx_buffer) * rds_ring->num_desc)
70 #define STATUS_DESC_RINGSIZE(sds_ring) \
71 (sizeof(struct status_desc) * (sds_ring)->num_desc)
72 #define TX_BUFF_RINGSIZE(tx_ring) \
73 (sizeof(struct qlcnic_cmd_buffer) * tx_ring->num_desc)
74 #define TX_DESC_RINGSIZE(tx_ring) \
75 (sizeof(struct cmd_desc_type0) * tx_ring->num_desc)
77 #define QLCNIC_P3P_A0 0x50
78 #define QLCNIC_P3P_C0 0x58
80 #define QLCNIC_IS_REVISION_P3P(REVISION) (REVISION >= QLCNIC_P3P_A0)
82 #define FIRST_PAGE_GROUP_START 0
83 #define FIRST_PAGE_GROUP_END 0x100000
85 #define P3P_MAX_MTU (9600)
86 #define P3P_MIN_MTU (68)
87 #define QLCNIC_MAX_ETHERHDR 32 /* This contains some padding */
89 #define QLCNIC_P3P_RX_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + ETH_DATA_LEN)
90 #define QLCNIC_P3P_RX_JUMBO_BUF_MAX_LEN (QLCNIC_MAX_ETHERHDR + P3P_MAX_MTU)
91 #define QLCNIC_CT_DEFAULT_RX_BUF_LEN 2048
92 #define QLCNIC_LRO_BUFFER_EXTRA 2048
95 #define QLCNIC_MAX_FRAGS_PER_TX 14
96 #define MAX_TSO_HEADER_DESC 2
97 #define MGMT_CMD_DESC_RESV 4
98 #define TX_STOP_THRESH ((MAX_SKB_FRAGS >> 2) + MAX_TSO_HEADER_DESC \
100 #define QLCNIC_MAX_TX_TIMEOUTS 2
102 * Following are the states of the Phantom. Phantom will set them and
103 * Host will read to check if the fields are correct.
105 #define PHAN_INITIALIZE_FAILED 0xffff
106 #define PHAN_INITIALIZE_COMPLETE 0xff01
108 /* Host writes the following to notify that it has done the init-handshake */
109 #define PHAN_INITIALIZE_ACK 0xf00f
110 #define PHAN_PEG_RCV_INITIALIZED 0xff01
112 #define NUM_RCV_DESC_RINGS 3
114 #define RCV_RING_NORMAL 0
115 #define RCV_RING_JUMBO 1
117 #define MIN_CMD_DESCRIPTORS 64
118 #define MIN_RCV_DESCRIPTORS 64
119 #define MIN_JUMBO_DESCRIPTORS 32
121 #define MAX_CMD_DESCRIPTORS 1024
122 #define MAX_RCV_DESCRIPTORS_1G 4096
123 #define MAX_RCV_DESCRIPTORS_10G 8192
124 #define MAX_RCV_DESCRIPTORS_VF 2048
125 #define MAX_JUMBO_RCV_DESCRIPTORS_1G 512
126 #define MAX_JUMBO_RCV_DESCRIPTORS_10G 1024
128 #define DEFAULT_RCV_DESCRIPTORS_1G 2048
129 #define DEFAULT_RCV_DESCRIPTORS_10G 4096
130 #define DEFAULT_RCV_DESCRIPTORS_VF 1024
131 #define MAX_RDS_RINGS 2
133 #define get_next_index(index, length) \
134 (((index) + 1) & ((length) - 1))
137 * Following data structures describe the descriptors that will be used.
138 * Added fileds of tcpHdrSize and ipHdrSize, The driver needs to do it only when
139 * we are doing LSO (above the 1500 size packet) only.
141 struct cmd_desc_type0 {
142 u8 tcp_hdr_offset; /* For LSO only */
143 u8 ip_hdr_offset; /* For LSO only */
144 __le16 flags_opcode; /* 15:13 unused, 12:7 opcode, 6:0 flags */
145 __le32 nfrags__length; /* 31:8 total len, 7:0 frag count */
149 __le16 reference_handle;
151 u8 port_ctxid; /* 7:4 ctxid 3:0 port */
152 u8 total_hdr_length; /* LSO only : MAC+IP+TCP Hdr size */
153 __le16 conn_id; /* IPSec offoad only */
158 __le16 buffer_length[4];
162 u8 eth_addr[ETH_ALEN];
165 } __attribute__ ((aligned(64)));
167 /* Note: sizeof(rcv_desc) should always be a mutliple of 2 */
169 __le16 reference_handle;
171 __le32 buffer_length; /* allocated buffer length (usually 2K) */
176 __le64 status_desc_data[2];
177 } __attribute__ ((aligned(16)));
179 /* UNIFIED ROMIMAGE */
180 #define QLCNIC_UNI_FW_MIN_SIZE 0xc8000
181 #define QLCNIC_UNI_DIR_SECT_PRODUCT_TBL 0x0
182 #define QLCNIC_UNI_DIR_SECT_BOOTLD 0x6
183 #define QLCNIC_UNI_DIR_SECT_FW 0x7
186 #define QLCNIC_UNI_CHIP_REV_OFF 10
187 #define QLCNIC_UNI_FLAGS_OFF 11
188 #define QLCNIC_UNI_BIOS_VERSION_OFF 12
189 #define QLCNIC_UNI_BOOTLD_IDX_OFF 27
190 #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29
192 struct uni_table_desc{
199 struct uni_data_desc{
205 /* Flash Defines and Structures */
206 #define QLCNIC_FLT_LOCATION 0x3F1000
207 #define QLCNIC_B0_FW_IMAGE_REGION 0x74
208 #define QLCNIC_C0_FW_IMAGE_REGION 0x97
209 #define QLCNIC_BOOTLD_REGION 0X72
210 struct qlcnic_flt_header {
217 struct qlcnic_flt_entry {
227 /* Magic number to let user know flash is programmed */
228 #define QLCNIC_BDINFO_MAGIC 0x12345678
230 #define QLCNIC_BRDTYPE_P3P_REF_QG 0x0021
231 #define QLCNIC_BRDTYPE_P3P_HMEZ 0x0022
232 #define QLCNIC_BRDTYPE_P3P_10G_CX4_LP 0x0023
233 #define QLCNIC_BRDTYPE_P3P_4_GB 0x0024
234 #define QLCNIC_BRDTYPE_P3P_IMEZ 0x0025
235 #define QLCNIC_BRDTYPE_P3P_10G_SFP_PLUS 0x0026
236 #define QLCNIC_BRDTYPE_P3P_10000_BASE_T 0x0027
237 #define QLCNIC_BRDTYPE_P3P_XG_LOM 0x0028
238 #define QLCNIC_BRDTYPE_P3P_4_GB_MM 0x0029
239 #define QLCNIC_BRDTYPE_P3P_10G_SFP_CT 0x002a
240 #define QLCNIC_BRDTYPE_P3P_10G_SFP_QT 0x002b
241 #define QLCNIC_BRDTYPE_P3P_10G_CX4 0x0031
242 #define QLCNIC_BRDTYPE_P3P_10G_XFP 0x0032
243 #define QLCNIC_BRDTYPE_P3P_10G_TP 0x0080
245 #define QLCNIC_MSIX_TABLE_OFFSET 0x44
247 /* Flash memory map */
248 #define QLCNIC_BRDCFG_START 0x4000 /* board config */
249 #define QLCNIC_BOOTLD_START 0x10000 /* bootld */
250 #define QLCNIC_IMAGE_START 0x43000 /* compressed image */
251 #define QLCNIC_USER_START 0x3E8000 /* Firmare info */
253 #define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
254 #define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
255 #define QLCNIC_FW_SERIAL_NUM_OFFSET (QLCNIC_USER_START+0x81c)
256 #define QLCNIC_BIOS_VERSION_OFFSET (QLCNIC_USER_START+0x83c)
258 #define QLCNIC_BRDTYPE_OFFSET (QLCNIC_BRDCFG_START+0x8)
259 #define QLCNIC_FW_MAGIC_OFFSET (QLCNIC_BRDCFG_START+0x128)
261 #define QLCNIC_FW_MIN_SIZE (0x3fffff)
262 #define QLCNIC_UNIFIED_ROMIMAGE 0
263 #define QLCNIC_FLASH_ROMIMAGE 1
264 #define QLCNIC_UNKNOWN_ROMIMAGE 0xff
266 #define QLCNIC_UNIFIED_ROMIMAGE_NAME "phanfw.bin"
267 #define QLCNIC_FLASH_ROMIMAGE_NAME "flash"
269 extern char qlcnic_driver_name[];
271 /* Number of status descriptors to handle per interrupt */
272 #define MAX_STATUS_HANDLE (64)
275 * qlcnic_skb_frag{} is to contain mapping info for each SG list. This
276 * has to be freed when DMA is complete. This is part of qlcnic_tx_buffer{}.
278 struct qlcnic_skb_frag {
283 /* Following defines are for the state of the buffers */
284 #define QLCNIC_BUFFER_FREE 0
285 #define QLCNIC_BUFFER_BUSY 1
288 * There will be one qlcnic_buffer per skb packet. These will be
289 * used to save the dma info for pci_unmap_page()
291 struct qlcnic_cmd_buffer {
293 struct qlcnic_skb_frag frag_array[MAX_SKB_FRAGS + 1];
297 /* In rx_buffer, we do not need multiple fragments as is a single buffer */
298 struct qlcnic_rx_buffer {
301 struct list_head list;
306 #define QLCNIC_GBE 0x01
307 #define QLCNIC_XGBE 0x02
310 * Interrupt coalescing defaults. The defaults are for 1500 MTU. It is
311 * adjusted based on configured MTU.
313 #define QLCNIC_DEFAULT_INTR_COALESCE_RX_TIME_US 3
314 #define QLCNIC_DEFAULT_INTR_COALESCE_RX_PACKETS 256
316 #define QLCNIC_INTR_DEFAULT 0x04
317 #define QLCNIC_CONFIG_INTR_COALESCE 3
319 struct qlcnic_nic_intr_coalesce {
328 struct qlcnic_dump_template_hdr {
344 struct qlcnic_fw_dump {
345 u8 clr; /* flag to indicate if dump is cleared */
346 u8 enable; /* enable/disable dump */
347 u32 size; /* total size of the dump */
348 void *data; /* dump data area */
349 struct qlcnic_dump_template_hdr *tmpl_hdr;
353 * One hardware_context{} per adapter
354 * contains interrupt info as well shared hardware info.
356 struct qlcnic_hardware_context {
357 void __iomem *pci_base0;
358 void __iomem *ocm_win_crb;
360 unsigned long pci_len0;
363 struct mutex mem_lock;
404 struct qlcnic_hardware_ops *hw_ops;
405 struct qlcnic_nic_intr_coalesce coal;
406 struct qlcnic_fw_dump fw_dump;
407 struct qlcnic_intrpt_config *intr_tbl;
410 u32 mbox_aen[QLC_83XX_MBX_AEN_CNT];
415 struct qlcnic_adapter_stats {
429 u64 skb_alloc_failure;
431 u64 rx_dma_map_error;
432 u64 tx_dma_map_error;
434 u64 mac_filter_limit_overrun;
438 * Rcv Descriptor Context. One such per Rcv Descriptor. There may
439 * be one Rcv Descriptor for normal packets, one for jumbo and may be others.
441 struct qlcnic_host_rds_ring {
442 void __iomem *crb_rcv_producer;
443 struct rcv_desc *desc_head;
444 struct qlcnic_rx_buffer *rx_buf_arr;
450 struct list_head free_list;
452 dma_addr_t phys_addr;
453 } ____cacheline_internodealigned_in_smp;
455 struct qlcnic_host_sds_ring {
458 void __iomem *crb_sts_consumer;
460 struct status_desc *desc_head;
461 struct qlcnic_adapter *adapter;
462 struct napi_struct napi;
463 struct list_head free_list[NUM_RCV_DESC_RINGS];
465 void __iomem *crb_intr_mask;
468 dma_addr_t phys_addr;
469 char name[IFNAMSIZ+4];
470 } ____cacheline_internodealigned_in_smp;
472 struct qlcnic_host_tx_ring {
474 void __iomem *crb_intr_mask;
475 char name[IFNAMSIZ+4];
480 void __iomem *crb_cmd_producer;
481 struct cmd_desc_type0 *desc_head;
482 struct qlcnic_adapter *adapter;
483 struct napi_struct napi;
484 struct qlcnic_cmd_buffer *cmd_buf_arr;
487 dma_addr_t phys_addr;
488 dma_addr_t hw_cons_phys_addr;
489 struct netdev_queue *txq;
490 } ____cacheline_internodealigned_in_smp;
493 * Receive context. There is one such structure per instance of the
494 * receive processing. Any state information that is relevant to
495 * the receive, and is must be in this structure. The global data may be
498 struct qlcnic_recv_context {
499 struct qlcnic_host_rds_ring *rds_rings;
500 struct qlcnic_host_sds_ring *sds_rings;
507 /* HW context creation */
509 #define QLCNIC_OS_CRB_RETRY_COUNT 4000
511 #define QLCNIC_CDRP_CMD_BIT 0x80000000
514 * All responses must have the QLCNIC_CDRP_CMD_BIT cleared
515 * in the crb QLCNIC_CDRP_CRB_OFFSET.
517 #define QLCNIC_CDRP_FORM_RSP(rsp) (rsp)
518 #define QLCNIC_CDRP_IS_RSP(rsp) (((rsp) & QLCNIC_CDRP_CMD_BIT) == 0)
520 #define QLCNIC_CDRP_RSP_OK 0x00000001
521 #define QLCNIC_CDRP_RSP_FAIL 0x00000002
522 #define QLCNIC_CDRP_RSP_TIMEOUT 0x00000003
525 * All commands must have the QLCNIC_CDRP_CMD_BIT set in
526 * the crb QLCNIC_CDRP_CRB_OFFSET.
528 #define QLCNIC_CDRP_FORM_CMD(cmd) (QLCNIC_CDRP_CMD_BIT | (cmd))
529 #define QLCNIC_CDRP_IS_CMD(cmd) (((cmd) & QLCNIC_CDRP_CMD_BIT) != 0)
531 #define QLCNIC_CDRP_CMD_SUBMIT_CAPABILITIES 0x00000001
532 #define QLCNIC_CDRP_CMD_READ_MAX_RDS_PER_CTX 0x00000002
533 #define QLCNIC_CDRP_CMD_READ_MAX_SDS_PER_CTX 0x00000003
534 #define QLCNIC_CDRP_CMD_READ_MAX_RULES_PER_CTX 0x00000004
535 #define QLCNIC_CDRP_CMD_READ_MAX_RX_CTX 0x00000005
536 #define QLCNIC_CDRP_CMD_READ_MAX_TX_CTX 0x00000006
537 #define QLCNIC_CDRP_CMD_CREATE_RX_CTX 0x00000007
538 #define QLCNIC_CDRP_CMD_DESTROY_RX_CTX 0x00000008
539 #define QLCNIC_CDRP_CMD_CREATE_TX_CTX 0x00000009
540 #define QLCNIC_CDRP_CMD_DESTROY_TX_CTX 0x0000000a
541 #define QLCNIC_CDRP_CMD_INTRPT_TEST 0x00000011
542 #define QLCNIC_CDRP_CMD_SET_MTU 0x00000012
543 #define QLCNIC_CDRP_CMD_READ_PHY 0x00000013
544 #define QLCNIC_CDRP_CMD_WRITE_PHY 0x00000014
545 #define QLCNIC_CDRP_CMD_READ_HW_REG 0x00000015
546 #define QLCNIC_CDRP_CMD_GET_FLOW_CTL 0x00000016
547 #define QLCNIC_CDRP_CMD_SET_FLOW_CTL 0x00000017
548 #define QLCNIC_CDRP_CMD_READ_MAX_MTU 0x00000018
549 #define QLCNIC_CDRP_CMD_READ_MAX_LRO 0x00000019
550 #define QLCNIC_CDRP_CMD_MAC_ADDRESS 0x0000001f
552 #define QLCNIC_CDRP_CMD_GET_PCI_INFO 0x00000020
553 #define QLCNIC_CDRP_CMD_GET_NIC_INFO 0x00000021
554 #define QLCNIC_CDRP_CMD_SET_NIC_INFO 0x00000022
555 #define QLCNIC_CDRP_CMD_GET_ESWITCH_CAPABILITY 0x00000024
556 #define QLCNIC_CDRP_CMD_TOGGLE_ESWITCH 0x00000025
557 #define QLCNIC_CDRP_CMD_GET_ESWITCH_STATUS 0x00000026
558 #define QLCNIC_CDRP_CMD_SET_PORTMIRRORING 0x00000027
559 #define QLCNIC_CDRP_CMD_CONFIGURE_ESWITCH 0x00000028
560 #define QLCNIC_CDRP_CMD_GET_ESWITCH_PORT_CONFIG 0x00000029
561 #define QLCNIC_CDRP_CMD_GET_ESWITCH_STATS 0x0000002a
562 #define QLCNIC_CDRP_CMD_CONFIG_PORT 0x0000002E
563 #define QLCNIC_CDRP_CMD_TEMP_SIZE 0x0000002f
564 #define QLCNIC_CDRP_CMD_GET_TEMP_HDR 0x00000030
565 #define QLCNIC_CDRP_CMD_GET_MAC_STATS 0x00000037
567 #define QLCNIC_RCODE_SUCCESS 0
568 #define QLCNIC_RCODE_INVALID_ARGS 6
569 #define QLCNIC_RCODE_NOT_SUPPORTED 9
570 #define QLCNIC_RCODE_NOT_PERMITTED 10
571 #define QLCNIC_RCODE_NOT_IMPL 15
572 #define QLCNIC_RCODE_INVALID 16
573 #define QLCNIC_RCODE_TIMEOUT 17
574 #define QLCNIC_DESTROY_CTX_RESET 0
577 * Capabilities Announced
579 #define QLCNIC_CAP0_LEGACY_CONTEXT (1)
580 #define QLCNIC_CAP0_LEGACY_MN (1 << 2)
581 #define QLCNIC_CAP0_LSO (1 << 6)
582 #define QLCNIC_CAP0_JUMBO_CONTIGUOUS (1 << 7)
583 #define QLCNIC_CAP0_LRO_CONTIGUOUS (1 << 8)
584 #define QLCNIC_CAP0_VALIDOFF (1 << 11)
585 #define QLCNIC_CAP0_LRO_MSS (1 << 21)
590 #define QLCNIC_HOST_CTX_STATE_FREED 0
591 #define QLCNIC_HOST_CTX_STATE_ACTIVE 2
597 struct qlcnic_hostrq_sds_ring {
598 __le64 host_phys_addr; /* Ring base addr */
599 __le32 ring_size; /* Ring entries */
601 __le16 rsvd; /* Padding */
604 struct qlcnic_hostrq_rds_ring {
605 __le64 host_phys_addr; /* Ring base addr */
606 __le64 buff_size; /* Packet buffer size */
607 __le32 ring_size; /* Ring entries */
608 __le32 ring_kind; /* Class of ring */
611 struct qlcnic_hostrq_rx_ctx {
612 __le64 host_rsp_dma_addr; /* Response dma'd here */
613 __le32 capabilities[4]; /* Flag bit vector */
614 __le32 host_int_crb_mode; /* Interrupt crb usage */
615 __le32 host_rds_crb_mode; /* RDS crb usage */
616 /* These ring offsets are relative to data[0] below */
617 __le32 rds_ring_offset; /* Offset to RDS config */
618 __le32 sds_ring_offset; /* Offset to SDS config */
619 __le16 num_rds_rings; /* Count of RDS rings */
620 __le16 num_sds_rings; /* Count of SDS rings */
621 __le16 valid_field_offset;
624 u8 reserved[128]; /* reserve space for future expansion*/
625 /* MUST BE 64-bit aligned.
626 The following is packed:
628 - N hostrq_sds_rings */
632 struct qlcnic_cardrsp_rds_ring{
633 __le32 host_producer_crb; /* Crb to use */
634 __le32 rsvd1; /* Padding */
637 struct qlcnic_cardrsp_sds_ring {
638 __le32 host_consumer_crb; /* Crb to use */
639 __le32 interrupt_crb; /* Crb to use */
642 struct qlcnic_cardrsp_rx_ctx {
643 /* These ring offsets are relative to data[0] below */
644 __le32 rds_ring_offset; /* Offset to RDS config */
645 __le32 sds_ring_offset; /* Offset to SDS config */
646 __le32 host_ctx_state; /* Starting State */
647 __le32 num_fn_per_port; /* How many PCI fn share the port */
648 __le16 num_rds_rings; /* Count of RDS rings */
649 __le16 num_sds_rings; /* Count of SDS rings */
650 __le16 context_id; /* Handle for context */
651 u8 phys_port; /* Physical id of port */
652 u8 virt_port; /* Virtual/Logical id of port */
653 u8 reserved[128]; /* save space for future expansion */
654 /* MUST BE 64-bit aligned.
655 The following is packed:
656 - N cardrsp_rds_rings
657 - N cardrs_sds_rings */
661 #define SIZEOF_HOSTRQ_RX(HOSTRQ_RX, rds_rings, sds_rings) \
662 (sizeof(HOSTRQ_RX) + \
663 (rds_rings)*(sizeof(struct qlcnic_hostrq_rds_ring)) + \
664 (sds_rings)*(sizeof(struct qlcnic_hostrq_sds_ring)))
666 #define SIZEOF_CARDRSP_RX(CARDRSP_RX, rds_rings, sds_rings) \
667 (sizeof(CARDRSP_RX) + \
668 (rds_rings)*(sizeof(struct qlcnic_cardrsp_rds_ring)) + \
669 (sds_rings)*(sizeof(struct qlcnic_cardrsp_sds_ring)))
675 struct qlcnic_hostrq_cds_ring {
676 __le64 host_phys_addr; /* Ring base addr */
677 __le32 ring_size; /* Ring entries */
678 __le32 rsvd; /* Padding */
681 struct qlcnic_hostrq_tx_ctx {
682 __le64 host_rsp_dma_addr; /* Response dma'd here */
683 __le64 cmd_cons_dma_addr; /* */
684 __le64 dummy_dma_addr; /* */
685 __le32 capabilities[4]; /* Flag bit vector */
686 __le32 host_int_crb_mode; /* Interrupt crb usage */
687 __le32 rsvd1; /* Padding */
688 __le16 rsvd2; /* Padding */
689 __le16 interrupt_ctl;
691 __le16 rsvd3; /* Padding */
692 struct qlcnic_hostrq_cds_ring cds_ring; /* Desc of cds ring */
693 u8 reserved[128]; /* future expansion */
696 struct qlcnic_cardrsp_cds_ring {
697 __le32 host_producer_crb; /* Crb to use */
698 __le32 interrupt_crb; /* Crb to use */
701 struct qlcnic_cardrsp_tx_ctx {
702 __le32 host_ctx_state; /* Starting state */
703 __le16 context_id; /* Handle for context */
704 u8 phys_port; /* Physical id of port */
705 u8 virt_port; /* Virtual/Logical id of port */
706 struct qlcnic_cardrsp_cds_ring cds_ring; /* Card cds settings */
707 u8 reserved[128]; /* future expansion */
710 #define SIZEOF_HOSTRQ_TX(HOSTRQ_TX) (sizeof(HOSTRQ_TX))
711 #define SIZEOF_CARDRSP_TX(CARDRSP_TX) (sizeof(CARDRSP_TX))
715 #define QLCNIC_HOST_RDS_CRB_MODE_UNIQUE 0
716 #define QLCNIC_HOST_RDS_CRB_MODE_SHARED 1
717 #define QLCNIC_HOST_RDS_CRB_MODE_CUSTOM 2
718 #define QLCNIC_HOST_RDS_CRB_MODE_MAX 3
720 #define QLCNIC_HOST_INT_CRB_MODE_UNIQUE 0
721 #define QLCNIC_HOST_INT_CRB_MODE_SHARED 1
722 #define QLCNIC_HOST_INT_CRB_MODE_NORX 2
723 #define QLCNIC_HOST_INT_CRB_MODE_NOTX 3
724 #define QLCNIC_HOST_INT_CRB_MODE_NORXTX 4
729 #define MC_COUNT_P3P 38
731 #define QLCNIC_MAC_NOOP 0
732 #define QLCNIC_MAC_ADD 1
733 #define QLCNIC_MAC_DEL 2
734 #define QLCNIC_MAC_VLAN_ADD 3
735 #define QLCNIC_MAC_VLAN_DEL 4
737 struct qlcnic_mac_list_s {
738 struct list_head list;
739 uint8_t mac_addr[ETH_ALEN+2];
742 #define QLCNIC_HOST_REQUEST 0x13
743 #define QLCNIC_REQUEST 0x14
745 #define QLCNIC_MAC_EVENT 0x1
747 #define QLCNIC_IP_UP 2
748 #define QLCNIC_IP_DOWN 3
750 #define QLCNIC_ILB_MODE 0x1
751 #define QLCNIC_ELB_MODE 0x2
753 #define QLCNIC_LINKEVENT 0x1
754 #define QLCNIC_LB_RESPONSE 0x2
755 #define QLCNIC_IS_LB_CONFIGURED(VAL) \
756 (VAL == (QLCNIC_LINKEVENT | QLCNIC_LB_RESPONSE))
759 * Driver --> Firmware
761 #define QLCNIC_H2C_OPCODE_CONFIG_RSS 0x1
762 #define QLCNIC_H2C_OPCODE_CONFIG_INTR_COALESCE 0x3
763 #define QLCNIC_H2C_OPCODE_CONFIG_LED 0x4
764 #define QLCNIC_H2C_OPCODE_LRO_REQUEST 0x7
765 #define QLCNIC_H2C_OPCODE_SET_MAC_RECEIVE_MODE 0xc
766 #define QLCNIC_H2C_OPCODE_CONFIG_IPADDR 0x12
768 #define QLCNIC_H2C_OPCODE_GET_LINKEVENT 0x15
769 #define QLCNIC_H2C_OPCODE_CONFIG_BRIDGING 0x17
770 #define QLCNIC_H2C_OPCODE_CONFIG_HW_LRO 0x18
771 #define QLCNIC_H2C_OPCODE_CONFIG_LOOPBACK 0x13
774 * Firmware --> Driver
777 #define QLCNIC_C2H_OPCODE_CONFIG_LOOPBACK 0x8f
778 #define QLCNIC_C2H_OPCODE_GET_LINKEVENT_RESPONSE 0x8D
780 #define VPORT_MISS_MODE_DROP 0 /* drop all unmatched */
781 #define VPORT_MISS_MODE_ACCEPT_ALL 1 /* accept all packets */
782 #define VPORT_MISS_MODE_ACCEPT_MULTI 2 /* accept unmatched multicast */
784 #define QLCNIC_LRO_REQUEST_CLEANUP 4
786 /* Capabilites received */
787 #define QLCNIC_FW_CAPABILITY_TSO BIT_1
788 #define QLCNIC_FW_CAPABILITY_BDG BIT_8
789 #define QLCNIC_FW_CAPABILITY_FVLANTX BIT_9
790 #define QLCNIC_FW_CAPABILITY_HW_LRO BIT_10
791 #define QLCNIC_FW_CAPABILITY_MULTI_LOOPBACK BIT_27
792 #define QLCNIC_FW_CAPABILITY_MORE_CAPS BIT_31
794 #define QLCNIC_FW_CAPABILITY_2_LRO_MAX_TCP_SEG BIT_2
797 #define LINKEVENT_MODULE_NOT_PRESENT 1
798 #define LINKEVENT_MODULE_OPTICAL_UNKNOWN 2
799 #define LINKEVENT_MODULE_OPTICAL_SRLR 3
800 #define LINKEVENT_MODULE_OPTICAL_LRM 4
801 #define LINKEVENT_MODULE_OPTICAL_SFP_1G 5
802 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLE 6
803 #define LINKEVENT_MODULE_TWINAX_UNSUPPORTED_CABLELEN 7
804 #define LINKEVENT_MODULE_TWINAX 8
806 #define LINKSPEED_10GBPS 10000
807 #define LINKSPEED_1GBPS 1000
808 #define LINKSPEED_100MBPS 100
809 #define LINKSPEED_10MBPS 10
811 #define LINKSPEED_ENCODED_10MBPS 0
812 #define LINKSPEED_ENCODED_100MBPS 1
813 #define LINKSPEED_ENCODED_1GBPS 2
815 #define LINKEVENT_AUTONEG_DISABLED 0
816 #define LINKEVENT_AUTONEG_ENABLED 1
818 #define LINKEVENT_HALF_DUPLEX 0
819 #define LINKEVENT_FULL_DUPLEX 1
821 #define LINKEVENT_LINKSPEED_MBPS 0
822 #define LINKEVENT_LINKSPEED_ENCODED 1
824 /* firmware response header:
825 * 63:58 - message type
829 * 47:40 - completion id
834 #define qlcnic_get_nic_msg_opcode(msg_hdr) \
835 ((msg_hdr >> 32) & 0xFF)
837 struct qlcnic_fw_msg {
847 struct qlcnic_nic_req {
853 struct qlcnic_mac_req {
859 struct qlcnic_vlan_req {
864 struct qlcnic_ipaddr {
869 #define QLCNIC_MSI_ENABLED 0x02
870 #define QLCNIC_MSIX_ENABLED 0x04
871 #define QLCNIC_LRO_ENABLED 0x01
872 #define QLCNIC_LRO_DISABLED 0x00
873 #define QLCNIC_BRIDGE_ENABLED 0X10
874 #define QLCNIC_DIAG_ENABLED 0x20
875 #define QLCNIC_ESWITCH_ENABLED 0x40
876 #define QLCNIC_ADAPTER_INITIALIZED 0x80
877 #define QLCNIC_TAGGING_ENABLED 0x100
878 #define QLCNIC_MACSPOOF 0x200
879 #define QLCNIC_MAC_OVERRIDE_DISABLED 0x400
880 #define QLCNIC_PROMISC_DISABLED 0x800
881 #define QLCNIC_NEED_FLR 0x1000
882 #define QLCNIC_FW_RESET_OWNER 0x2000
883 #define QLCNIC_FW_HANG 0x4000
884 #define QLCNIC_FW_LRO_MSS_CAP 0x8000
885 #define QLCNIC_IS_MSI_FAMILY(adapter) \
886 ((adapter)->flags & (QLCNIC_MSI_ENABLED | QLCNIC_MSIX_ENABLED))
888 #define QLCNIC_DEF_NUM_STS_DESC_RINGS 4
889 #define QLCNIC_MSIX_TBL_SPACE 8192
890 #define QLCNIC_PCI_REG_MSIX_TBL 0x44
891 #define QLCNIC_MSIX_TBL_PGSIZE 4096
893 #define QLCNIC_NETDEV_WEIGHT 128
894 #define QLCNIC_ADAPTER_UP_MAGIC 777
896 #define __QLCNIC_FW_ATTACHED 0
897 #define __QLCNIC_DEV_UP 1
898 #define __QLCNIC_RESETTING 2
899 #define __QLCNIC_START_FW 4
900 #define __QLCNIC_AER 5
901 #define __QLCNIC_DIAG_RES_ALLOC 6
902 #define __QLCNIC_LED_ENABLE 7
904 #define QLCNIC_INTERRUPT_TEST 1
905 #define QLCNIC_LOOPBACK_TEST 2
906 #define QLCNIC_LED_TEST 3
908 #define QLCNIC_FILTER_AGE 80
909 #define QLCNIC_READD_AGE 20
910 #define QLCNIC_LB_MAX_FILTERS 64
911 #define QLCNIC_LB_BUCKET_SIZE 32
913 /* QLCNIC Driver Error Code */
914 #define QLCNIC_FW_NOT_RESPOND 51
915 #define QLCNIC_TEST_IN_PROGRESS 52
916 #define QLCNIC_UNDEFINED_ERROR 53
917 #define QLCNIC_LB_CABLE_NOT_CONN 54
919 struct qlcnic_filter {
920 struct hlist_node fnode;
926 struct qlcnic_filter_hash {
927 struct hlist_head *fhead;
933 struct qlcnic_adapter {
934 struct qlcnic_hardware_context *ahw;
935 struct qlcnic_recv_context *recv_ctx;
936 struct qlcnic_host_tx_ring *tx_ring;
937 struct net_device *netdev;
938 struct pci_dev *pdev;
943 int max_drv_tx_rings;
970 u8 mac_addr[ETH_ALEN];
974 unsigned long vlans[BITS_TO_LONGS(VLAN_N_VID)];
975 struct qlcnic_npar_info *npars;
976 struct qlcnic_eswitch *eswitch;
977 struct qlcnic_nic_template *nic_ops;
979 struct qlcnic_adapter_stats stats;
980 struct list_head mac_list;
982 void __iomem *tgt_mask_reg;
983 void __iomem *tgt_status_reg;
984 void __iomem *crb_int_state_reg;
985 void __iomem *isr_int_vec;
987 struct msix_entry *msix_entries;
988 struct workqueue_struct *qlcnic_wq;
989 struct delayed_work fw_work;
990 struct delayed_work idc_aen_work;
992 struct qlcnic_filter_hash fhash;
994 spinlock_t tx_clean_lock;
995 spinlock_t mac_learn_lock;
996 u32 file_prd_off; /*File fw product offset*/
998 const struct firmware *fw;
1001 struct qlcnic_info_le {
1003 __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */
1005 __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */
1007 __le32 capabilities;
1017 __le16 max_bw_reg_offset;
1018 __le16 max_linkspeed_reg_offset;
1022 __le16 max_tx_mac_filters;
1023 __le16 max_rx_mcast_mac_filters;
1024 __le16 max_rx_ucast_mac_filters;
1025 __le16 max_rx_ip_addr;
1026 __le16 max_rx_lro_flow;
1027 __le16 max_rx_status_rings;
1028 __le16 max_rx_buf_rings;
1029 __le16 max_tx_vlan_keys;
1031 u8 total_rss_engines;
1036 struct qlcnic_info {
1050 u16 max_bw_reg_offset;
1051 u16 max_linkspeed_reg_offset;
1055 u16 max_tx_mac_filters;
1056 u16 max_rx_mcast_mac_filters;
1057 u16 max_rx_ucast_mac_filters;
1059 u16 max_rx_lro_flow;
1060 u16 max_rx_status_rings;
1061 u16 max_rx_buf_rings;
1062 u16 max_tx_vlan_keys;
1064 u8 total_rss_engines;
1068 struct qlcnic_pci_info_le {
1069 __le16 id; /* pci function id */
1070 __le16 active; /* 1 = Enabled */
1071 __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */
1072 __le16 default_port; /* default port number */
1074 __le16 tx_min_bw; /* Multiple of 100mbpc */
1076 __le16 reserved1[2];
1084 struct qlcnic_pci_info {
1095 struct qlcnic_npar_info {
1112 struct qlcnic_eswitch {
1116 u8 active_ucast_filters;
1117 u8 max_ucast_filters;
1118 u8 max_active_vlans;
1121 #define QLCNIC_SWITCH_ENABLE BIT_1
1122 #define QLCNIC_SWITCH_VLAN_FILTERING BIT_2
1123 #define QLCNIC_SWITCH_PROMISC_MODE BIT_3
1124 #define QLCNIC_SWITCH_PORT_MIRRORING BIT_4
1128 /* Return codes for Error handling */
1129 #define QL_STATUS_INVALID_PARAM -1
1131 #define MAX_BW 100 /* % of link speed */
1132 #define MAX_VLAN_ID 4095
1133 #define MIN_VLAN_ID 2
1134 #define DEFAULT_MAC_LEARN 1
1136 #define IS_VALID_VLAN(vlan) (vlan >= MIN_VLAN_ID && vlan < MAX_VLAN_ID)
1137 #define IS_VALID_BW(bw) (bw <= MAX_BW)
1139 struct qlcnic_pci_func_cfg {
1149 struct qlcnic_npar_func_cfg {
1160 struct qlcnic_pm_func_cfg {
1167 struct qlcnic_esw_func_cfg {
1181 #define QLCNIC_STATS_VERSION 1
1182 #define QLCNIC_STATS_PORT 1
1183 #define QLCNIC_STATS_ESWITCH 2
1184 #define QLCNIC_QUERY_RX_COUNTER 0
1185 #define QLCNIC_QUERY_TX_COUNTER 1
1186 #define QLCNIC_STATS_NOT_AVAIL 0xffffffffffffffffULL
1187 #define QLCNIC_FILL_STATS(VAL1) \
1188 (((VAL1) == QLCNIC_STATS_NOT_AVAIL) ? 0 : VAL1)
1189 #define QLCNIC_MAC_STATS 1
1190 #define QLCNIC_ESW_STATS 2
1192 #define QLCNIC_ADD_ESW_STATS(VAL1, VAL2)\
1194 if (((VAL1) == QLCNIC_STATS_NOT_AVAIL) && \
1195 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1197 else if (((VAL1) != QLCNIC_STATS_NOT_AVAIL) && \
1198 ((VAL2) != QLCNIC_STATS_NOT_AVAIL)) \
1202 struct qlcnic_mac_statistics_le {
1203 __le64 mac_tx_frames;
1204 __le64 mac_tx_bytes;
1205 __le64 mac_tx_mcast_pkts;
1206 __le64 mac_tx_bcast_pkts;
1207 __le64 mac_tx_pause_cnt;
1208 __le64 mac_tx_ctrl_pkt;
1209 __le64 mac_tx_lt_64b_pkts;
1210 __le64 mac_tx_lt_127b_pkts;
1211 __le64 mac_tx_lt_255b_pkts;
1212 __le64 mac_tx_lt_511b_pkts;
1213 __le64 mac_tx_lt_1023b_pkts;
1214 __le64 mac_tx_lt_1518b_pkts;
1215 __le64 mac_tx_gt_1518b_pkts;
1218 __le64 mac_rx_frames;
1219 __le64 mac_rx_bytes;
1220 __le64 mac_rx_mcast_pkts;
1221 __le64 mac_rx_bcast_pkts;
1222 __le64 mac_rx_pause_cnt;
1223 __le64 mac_rx_ctrl_pkt;
1224 __le64 mac_rx_lt_64b_pkts;
1225 __le64 mac_rx_lt_127b_pkts;
1226 __le64 mac_rx_lt_255b_pkts;
1227 __le64 mac_rx_lt_511b_pkts;
1228 __le64 mac_rx_lt_1023b_pkts;
1229 __le64 mac_rx_lt_1518b_pkts;
1230 __le64 mac_rx_gt_1518b_pkts;
1233 __le64 mac_rx_length_error;
1234 __le64 mac_rx_length_small;
1235 __le64 mac_rx_length_large;
1236 __le64 mac_rx_jabber;
1237 __le64 mac_rx_dropped;
1238 __le64 mac_rx_crc_error;
1239 __le64 mac_align_error;
1242 struct qlcnic_mac_statistics {
1245 u64 mac_tx_mcast_pkts;
1246 u64 mac_tx_bcast_pkts;
1247 u64 mac_tx_pause_cnt;
1248 u64 mac_tx_ctrl_pkt;
1249 u64 mac_tx_lt_64b_pkts;
1250 u64 mac_tx_lt_127b_pkts;
1251 u64 mac_tx_lt_255b_pkts;
1252 u64 mac_tx_lt_511b_pkts;
1253 u64 mac_tx_lt_1023b_pkts;
1254 u64 mac_tx_lt_1518b_pkts;
1255 u64 mac_tx_gt_1518b_pkts;
1259 u64 mac_rx_mcast_pkts;
1260 u64 mac_rx_bcast_pkts;
1261 u64 mac_rx_pause_cnt;
1262 u64 mac_rx_ctrl_pkt;
1263 u64 mac_rx_lt_64b_pkts;
1264 u64 mac_rx_lt_127b_pkts;
1265 u64 mac_rx_lt_255b_pkts;
1266 u64 mac_rx_lt_511b_pkts;
1267 u64 mac_rx_lt_1023b_pkts;
1268 u64 mac_rx_lt_1518b_pkts;
1269 u64 mac_rx_gt_1518b_pkts;
1271 u64 mac_rx_length_error;
1272 u64 mac_rx_length_small;
1273 u64 mac_rx_length_large;
1276 u64 mac_rx_crc_error;
1277 u64 mac_align_error;
1280 struct qlcnic_esw_stats_le {
1285 __le64 unicast_frames;
1286 __le64 multicast_frames;
1287 __le64 broadcast_frames;
1288 __le64 dropped_frames;
1290 __le64 local_frames;
1295 struct __qlcnic_esw_statistics {
1301 u64 multicast_frames;
1302 u64 broadcast_frames;
1310 struct qlcnic_esw_statistics {
1311 struct __qlcnic_esw_statistics rx;
1312 struct __qlcnic_esw_statistics tx;
1315 #define QLCNIC_DUMP_MASK_DEF 0x1f
1316 #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed
1317 #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed
1318 #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed
1319 #define QLCNIC_FORCE_FW_RESET 0xdeaddead
1320 #define QLCNIC_SET_QUIESCENT 0xadd00010
1321 #define QLCNIC_RESET_QUIESCENT 0xadd00020
1328 struct qlcnic_cmd_args {
1329 struct _cdrp_cmd req;
1330 struct _cdrp_cmd rsp;
1333 int qlcnic_fw_cmd_get_minidump_temp(struct qlcnic_adapter *adapter);
1334 int qlcnic_fw_cmd_set_port(struct qlcnic_adapter *adapter, u32 config);
1335 int qlcnic_pci_mem_write_2M(struct qlcnic_adapter *, u64 off, u64 data);
1336 int qlcnic_pci_mem_read_2M(struct qlcnic_adapter *, u64 off, u64 *data);
1337 void qlcnic_pci_camqm_read_2M(struct qlcnic_adapter *, u64, u64 *);
1338 void qlcnic_pci_camqm_write_2M(struct qlcnic_adapter *, u64, u64);
1340 #define ADDR_IN_RANGE(addr, low, high) \
1341 (((addr) < (high)) && ((addr) >= (low)))
1343 #define QLCRD32(adapter, off) \
1344 (adapter->ahw->hw_ops->read_reg)(adapter, off)
1346 #define QLCWR32(adapter, off, val) \
1347 adapter->ahw->hw_ops->write_reg(adapter, off, val)
1349 int qlcnic_pcie_sem_lock(struct qlcnic_adapter *, int, u32);
1350 void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int);
1352 #define qlcnic_rom_lock(a) \
1353 qlcnic_pcie_sem_lock((a), 2, QLCNIC_ROM_LOCK_ID)
1354 #define qlcnic_rom_unlock(a) \
1355 qlcnic_pcie_sem_unlock((a), 2)
1356 #define qlcnic_phy_lock(a) \
1357 qlcnic_pcie_sem_lock((a), 3, QLCNIC_PHY_LOCK_ID)
1358 #define qlcnic_phy_unlock(a) \
1359 qlcnic_pcie_sem_unlock((a), 3)
1360 #define qlcnic_sw_lock(a) \
1361 qlcnic_pcie_sem_lock((a), 6, 0)
1362 #define qlcnic_sw_unlock(a) \
1363 qlcnic_pcie_sem_unlock((a), 6)
1364 #define crb_win_lock(a) \
1365 qlcnic_pcie_sem_lock((a), 7, QLCNIC_CRB_WIN_LOCK_ID)
1366 #define crb_win_unlock(a) \
1367 qlcnic_pcie_sem_unlock((a), 7)
1369 #define __QLCNIC_MAX_LED_RATE 0xf
1370 #define __QLCNIC_MAX_LED_STATE 0x2
1372 #define MAX_CTL_CHECK 1000
1374 int qlcnic_wol_supported(struct qlcnic_adapter *adapter);
1375 void qlcnic_prune_lb_filters(struct qlcnic_adapter *adapter);
1376 void qlcnic_delete_lb_filters(struct qlcnic_adapter *adapter);
1377 int qlcnic_dump_fw(struct qlcnic_adapter *);
1379 /* Functions from qlcnic_init.c */
1380 int qlcnic_load_firmware(struct qlcnic_adapter *adapter);
1381 int qlcnic_need_fw_reset(struct qlcnic_adapter *adapter);
1382 void qlcnic_request_firmware(struct qlcnic_adapter *adapter);
1383 void qlcnic_release_firmware(struct qlcnic_adapter *adapter);
1384 int qlcnic_pinit_from_rom(struct qlcnic_adapter *adapter);
1385 int qlcnic_setup_idc_param(struct qlcnic_adapter *adapter);
1386 int qlcnic_check_flash_fw_ver(struct qlcnic_adapter *adapter);
1388 int qlcnic_rom_fast_read(struct qlcnic_adapter *adapter, u32 addr, u32 *valp);
1389 int qlcnic_rom_fast_read_words(struct qlcnic_adapter *adapter, int addr,
1390 u8 *bytes, size_t size);
1391 int qlcnic_alloc_sw_resources(struct qlcnic_adapter *adapter);
1392 void qlcnic_free_sw_resources(struct qlcnic_adapter *adapter);
1394 void __iomem *qlcnic_get_ioaddr(struct qlcnic_hardware_context *, u32);
1396 int qlcnic_alloc_hw_resources(struct qlcnic_adapter *adapter);
1397 void qlcnic_free_hw_resources(struct qlcnic_adapter *adapter);
1399 int qlcnic_fw_create_ctx(struct qlcnic_adapter *adapter);
1400 void qlcnic_fw_destroy_ctx(struct qlcnic_adapter *adapter);
1402 void qlcnic_reset_rx_buffers_list(struct qlcnic_adapter *adapter);
1403 void qlcnic_release_rx_buffers(struct qlcnic_adapter *adapter);
1404 void qlcnic_release_tx_buffers(struct qlcnic_adapter *adapter);
1406 int qlcnic_check_fw_status(struct qlcnic_adapter *adapter);
1407 void qlcnic_watchdog_task(struct work_struct *work);
1408 void qlcnic_post_rx_buffers(struct qlcnic_adapter *adapter,
1409 struct qlcnic_host_rds_ring *rds_ring, u8 ring_id);
1410 int qlcnic_process_rcv_ring(struct qlcnic_host_sds_ring *sds_ring, int max);
1411 void qlcnic_set_multi(struct net_device *netdev);
1412 void qlcnic_free_mac_list(struct qlcnic_adapter *adapter);
1414 int qlcnic_fw_cmd_set_mtu(struct qlcnic_adapter *adapter, int mtu);
1415 int qlcnic_change_mtu(struct net_device *netdev, int new_mtu);
1416 netdev_features_t qlcnic_fix_features(struct net_device *netdev,
1417 netdev_features_t features);
1418 int qlcnic_set_features(struct net_device *netdev, netdev_features_t features);
1419 int qlcnic_config_bridged_mode(struct qlcnic_adapter *adapter, u32 enable);
1420 int qlcnic_send_lro_cleanup(struct qlcnic_adapter *adapter);
1421 void qlcnic_update_cmd_producer(struct qlcnic_host_tx_ring *);
1423 /* Functions from qlcnic_ethtool.c */
1424 int qlcnic_check_loopback_buff(unsigned char *data, u8 mac[]);
1426 /* Functions from qlcnic_main.c */
1427 int qlcnic_reset_context(struct qlcnic_adapter *);
1428 void qlcnic_diag_free_res(struct net_device *netdev, int max_sds_rings);
1429 int qlcnic_diag_alloc_res(struct net_device *netdev, int test);
1430 netdev_tx_t qlcnic_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
1431 int qlcnic_set_max_rss(struct qlcnic_adapter *adapter, u8 data);
1432 int qlcnic_validate_max_rss(struct net_device *netdev, u8, u8);
1433 void qlcnic_alloc_lb_filters_mem(struct qlcnic_adapter *adapter);
1434 int qlcnic_enable_msix(struct qlcnic_adapter *, u32);
1436 /* eSwitch management functions */
1437 int qlcnic_config_switch_port(struct qlcnic_adapter *,
1438 struct qlcnic_esw_func_cfg *);
1439 int qlcnic_get_eswitch_port_config(struct qlcnic_adapter *,
1440 struct qlcnic_esw_func_cfg *);
1441 int qlcnic_config_port_mirroring(struct qlcnic_adapter *, u8, u8, u8);
1442 int qlcnic_get_port_stats(struct qlcnic_adapter *, const u8, const u8,
1443 struct __qlcnic_esw_statistics *);
1444 int qlcnic_get_eswitch_stats(struct qlcnic_adapter *, const u8, u8,
1445 struct __qlcnic_esw_statistics *);
1446 int qlcnic_clear_esw_stats(struct qlcnic_adapter *adapter, u8, u8, u8);
1447 int qlcnic_get_mac_stats(struct qlcnic_adapter *, struct qlcnic_mac_statistics *);
1449 void qlcnic_free_mbx_args(struct qlcnic_cmd_args *cmd);
1451 int qlcnic_alloc_sds_rings(struct qlcnic_recv_context *, int);
1452 void qlcnic_free_sds_rings(struct qlcnic_recv_context *);
1453 void qlcnic_advert_link_change(struct qlcnic_adapter *, int);
1454 void qlcnic_free_tx_rings(struct qlcnic_adapter *);
1455 int qlcnic_alloc_tx_rings(struct qlcnic_adapter *, struct net_device *);
1457 void qlcnic_create_sysfs_entries(struct qlcnic_adapter *adapter);
1458 void qlcnic_remove_sysfs_entries(struct qlcnic_adapter *adapter);
1459 void qlcnic_create_diag_entries(struct qlcnic_adapter *adapter);
1460 void qlcnic_remove_diag_entries(struct qlcnic_adapter *adapter);
1461 void qlcnic_82xx_add_sysfs(struct qlcnic_adapter *adapter);
1462 void qlcnic_82xx_remove_sysfs(struct qlcnic_adapter *adapter);
1464 int qlcnicvf_config_bridged_mode(struct qlcnic_adapter *, u32);
1465 int qlcnicvf_config_led(struct qlcnic_adapter *, u32, u32);
1466 void qlcnic_set_vlan_config(struct qlcnic_adapter *,
1467 struct qlcnic_esw_func_cfg *);
1468 void qlcnic_set_eswitch_port_features(struct qlcnic_adapter *,
1469 struct qlcnic_esw_func_cfg *);
1472 * QLOGIC Board information
1475 #define QLCNIC_MAX_BOARD_NAME_LEN 100
1476 struct qlcnic_board_info {
1477 unsigned short vendor;
1478 unsigned short device;
1479 unsigned short sub_vendor;
1480 unsigned short sub_device;
1481 char short_name[QLCNIC_MAX_BOARD_NAME_LEN];
1484 static inline u32 qlcnic_tx_avail(struct qlcnic_host_tx_ring *tx_ring)
1486 if (likely(tx_ring->producer < tx_ring->sw_consumer))
1487 return tx_ring->sw_consumer - tx_ring->producer;
1489 return tx_ring->sw_consumer + tx_ring->num_desc -
1493 struct qlcnic_nic_template {
1494 int (*config_bridged_mode) (struct qlcnic_adapter *, u32);
1495 int (*config_led) (struct qlcnic_adapter *, u32, u32);
1496 int (*start_firmware) (struct qlcnic_adapter *);
1497 int (*init_driver) (struct qlcnic_adapter *);
1498 void (*request_reset) (struct qlcnic_adapter *, u32);
1499 void (*cancel_idc_work) (struct qlcnic_adapter *);
1500 int (*napi_add)(struct qlcnic_adapter *, struct net_device *);
1501 void (*napi_del)(struct qlcnic_adapter *);
1502 void (*config_ipaddr)(struct qlcnic_adapter *, __be32, int);
1503 irqreturn_t (*clear_legacy_intr)(struct qlcnic_adapter *);
1506 /* Adapter hardware abstraction */
1507 struct qlcnic_hardware_ops {
1508 void (*read_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1509 void (*write_crb) (struct qlcnic_adapter *, char *, loff_t, size_t);
1510 int (*read_reg) (struct qlcnic_adapter *, ulong);
1511 int (*write_reg) (struct qlcnic_adapter *, ulong, u32);
1512 void (*get_ocm_win) (struct qlcnic_hardware_context *);
1513 int (*get_mac_address) (struct qlcnic_adapter *, u8 *);
1514 int (*setup_intr) (struct qlcnic_adapter *, u8);
1515 int (*alloc_mbx_args)(struct qlcnic_cmd_args *,
1516 struct qlcnic_adapter *, u32);
1517 int (*mbx_cmd) (struct qlcnic_adapter *, struct qlcnic_cmd_args *);
1518 void (*get_func_no) (struct qlcnic_adapter *);
1519 int (*api_lock) (struct qlcnic_adapter *);
1520 void (*api_unlock) (struct qlcnic_adapter *);
1521 void (*add_sysfs) (struct qlcnic_adapter *);
1522 void (*remove_sysfs) (struct qlcnic_adapter *);
1523 void (*process_lb_rcv_ring_diag) (struct qlcnic_host_sds_ring *);
1524 int (*create_rx_ctx) (struct qlcnic_adapter *);
1525 int (*create_tx_ctx) (struct qlcnic_adapter *,
1526 struct qlcnic_host_tx_ring *, int);
1527 int (*setup_link_event) (struct qlcnic_adapter *, int);
1528 int (*get_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *, u8);
1529 int (*get_pci_info) (struct qlcnic_adapter *, struct qlcnic_pci_info *);
1530 int (*set_nic_info) (struct qlcnic_adapter *, struct qlcnic_info *);
1531 int (*change_macvlan) (struct qlcnic_adapter *, u8*, __le16, u8);
1532 void (*napi_enable) (struct qlcnic_adapter *);
1533 void (*napi_disable) (struct qlcnic_adapter *);
1534 void (*config_intr_coal) (struct qlcnic_adapter *);
1535 int (*config_rss) (struct qlcnic_adapter *, int);
1536 int (*config_hw_lro) (struct qlcnic_adapter *, int);
1537 int (*config_loopback) (struct qlcnic_adapter *, u8);
1538 int (*clear_loopback) (struct qlcnic_adapter *, u8);
1539 int (*config_promisc_mode) (struct qlcnic_adapter *, u32);
1540 void (*change_l2_filter) (struct qlcnic_adapter *, u64 *, __le16);
1541 int (*get_board_info) (struct qlcnic_adapter *);
1544 extern struct qlcnic_nic_template qlcnic_vf_ops;
1546 static inline int qlcnic_start_firmware(struct qlcnic_adapter *adapter)
1548 return adapter->nic_ops->start_firmware(adapter);
1551 static inline void qlcnic_read_crb(struct qlcnic_adapter *adapter, char *buf,
1552 loff_t offset, size_t size)
1554 adapter->ahw->hw_ops->read_crb(adapter, buf, offset, size);
1557 static inline void qlcnic_write_crb(struct qlcnic_adapter *adapter, char *buf,
1558 loff_t offset, size_t size)
1560 adapter->ahw->hw_ops->write_crb(adapter, buf, offset, size);
1563 static inline int qlcnic_hw_read_wx_2M(struct qlcnic_adapter *adapter,
1566 return adapter->ahw->hw_ops->read_reg(adapter, off);
1569 static inline int qlcnic_hw_write_wx_2M(struct qlcnic_adapter *adapter,
1570 ulong off, u32 data)
1572 return adapter->ahw->hw_ops->write_reg(adapter, off, data);
1575 static inline int qlcnic_get_mac_address(struct qlcnic_adapter *adapter,
1578 return adapter->ahw->hw_ops->get_mac_address(adapter, mac);
1581 static inline int qlcnic_setup_intr(struct qlcnic_adapter *adapter, u8 num_intr)
1583 return adapter->ahw->hw_ops->setup_intr(adapter, num_intr);
1586 static inline int qlcnic_alloc_mbx_args(struct qlcnic_cmd_args *mbx,
1587 struct qlcnic_adapter *adapter, u32 arg)
1589 return adapter->ahw->hw_ops->alloc_mbx_args(mbx, adapter, arg);
1592 static inline int qlcnic_issue_cmd(struct qlcnic_adapter *adapter,
1593 struct qlcnic_cmd_args *cmd)
1595 return adapter->ahw->hw_ops->mbx_cmd(adapter, cmd);
1598 static inline void qlcnic_get_func_no(struct qlcnic_adapter *adapter)
1600 adapter->ahw->hw_ops->get_func_no(adapter);
1603 static inline int qlcnic_api_lock(struct qlcnic_adapter *adapter)
1605 return adapter->ahw->hw_ops->api_lock(adapter);
1608 static inline void qlcnic_api_unlock(struct qlcnic_adapter *adapter)
1610 adapter->ahw->hw_ops->api_unlock(adapter);
1613 static inline void qlcnic_add_sysfs(struct qlcnic_adapter *adapter)
1615 adapter->ahw->hw_ops->add_sysfs(adapter);
1618 static inline void qlcnic_remove_sysfs(struct qlcnic_adapter *adapter)
1620 adapter->ahw->hw_ops->remove_sysfs(adapter);
1624 qlcnic_process_rcv_ring_diag(struct qlcnic_host_sds_ring *sds_ring)
1626 sds_ring->adapter->ahw->hw_ops->process_lb_rcv_ring_diag(sds_ring);
1629 static inline int qlcnic_fw_cmd_create_rx_ctx(struct qlcnic_adapter *adapter)
1631 return adapter->ahw->hw_ops->create_rx_ctx(adapter);
1634 static inline int qlcnic_fw_cmd_create_tx_ctx(struct qlcnic_adapter *adapter,
1635 struct qlcnic_host_tx_ring *ptr,
1638 return adapter->ahw->hw_ops->create_tx_ctx(adapter, ptr, ring);
1641 static inline int qlcnic_linkevent_request(struct qlcnic_adapter *adapter,
1644 return adapter->ahw->hw_ops->setup_link_event(adapter, enable);
1647 static inline int qlcnic_get_nic_info(struct qlcnic_adapter *adapter,
1648 struct qlcnic_info *info, u8 id)
1650 return adapter->ahw->hw_ops->get_nic_info(adapter, info, id);
1653 static inline int qlcnic_get_pci_info(struct qlcnic_adapter *adapter,
1654 struct qlcnic_pci_info *info)
1656 return adapter->ahw->hw_ops->get_pci_info(adapter, info);
1659 static inline int qlcnic_set_nic_info(struct qlcnic_adapter *adapter,
1660 struct qlcnic_info *info)
1662 return adapter->ahw->hw_ops->set_nic_info(adapter, info);
1665 static inline int qlcnic_sre_macaddr_change(struct qlcnic_adapter *adapter,
1666 u8 *addr, __le16 id, u8 cmd)
1668 return adapter->ahw->hw_ops->change_macvlan(adapter, addr, id, cmd);
1671 static inline int qlcnic_napi_add(struct qlcnic_adapter *adapter,
1672 struct net_device *netdev)
1674 return adapter->nic_ops->napi_add(adapter, netdev);
1677 static inline void qlcnic_napi_del(struct qlcnic_adapter *adapter)
1679 adapter->nic_ops->napi_del(adapter);
1682 static inline void qlcnic_napi_enable(struct qlcnic_adapter *adapter)
1684 adapter->ahw->hw_ops->napi_enable(adapter);
1687 static inline void qlcnic_napi_disable(struct qlcnic_adapter *adapter)
1689 adapter->ahw->hw_ops->napi_disable(adapter);
1692 static inline void qlcnic_config_intr_coalesce(struct qlcnic_adapter *adapter)
1694 adapter->ahw->hw_ops->config_intr_coal(adapter);
1697 static inline int qlcnic_config_rss(struct qlcnic_adapter *adapter, int enable)
1699 return adapter->ahw->hw_ops->config_rss(adapter, enable);
1702 static inline int qlcnic_config_hw_lro(struct qlcnic_adapter *adapter,
1705 return adapter->ahw->hw_ops->config_hw_lro(adapter, enable);
1708 static inline int qlcnic_set_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1710 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1713 static inline int qlcnic_clear_lb_mode(struct qlcnic_adapter *adapter, u8 mode)
1715 return adapter->ahw->hw_ops->config_loopback(adapter, mode);
1718 static inline int qlcnic_nic_set_promisc(struct qlcnic_adapter *adapter,
1721 return adapter->ahw->hw_ops->config_promisc_mode(adapter, mode);
1724 static inline void qlcnic_change_filter(struct qlcnic_adapter *adapter,
1725 u64 *addr, __le16 id)
1727 adapter->ahw->hw_ops->change_l2_filter(adapter, addr, id);
1730 static inline int qlcnic_get_board_info(struct qlcnic_adapter *adapter)
1732 return adapter->ahw->hw_ops->get_board_info(adapter);
1735 static inline void qlcnic_dev_request_reset(struct qlcnic_adapter *adapter,
1738 adapter->nic_ops->request_reset(adapter, key);
1741 static inline void qlcnic_cancel_idc_work(struct qlcnic_adapter *adapter)
1743 adapter->nic_ops->cancel_idc_work(adapter);
1746 static inline irqreturn_t
1747 qlcnic_clear_legacy_intr(struct qlcnic_adapter *adapter)
1749 return adapter->nic_ops->clear_legacy_intr(adapter);
1752 static inline int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state,
1755 return adapter->nic_ops->config_led(adapter, state, rate);
1758 static inline void qlcnic_config_ipaddr(struct qlcnic_adapter *adapter,
1761 adapter->nic_ops->config_ipaddr(adapter, ip, cmd);
1764 static inline void qlcnic_disable_int(struct qlcnic_host_sds_ring *sds_ring)
1766 writel(0, sds_ring->crb_intr_mask);
1769 static inline void qlcnic_enable_int(struct qlcnic_host_sds_ring *sds_ring)
1771 struct qlcnic_adapter *adapter = sds_ring->adapter;
1773 writel(0x1, sds_ring->crb_intr_mask);
1775 if (!QLCNIC_IS_MSI_FAMILY(adapter))
1776 writel(0xfbff, adapter->tgt_mask_reg);
1779 extern const struct ethtool_ops qlcnic_ethtool_ops;
1780 extern const struct ethtool_ops qlcnic_ethtool_failed_ops;
1782 #define QLCDB(adapter, lvl, _fmt, _args...) do { \
1783 if (NETIF_MSG_##lvl & adapter->ahw->msg_enable) \
1784 printk(KERN_INFO "%s: %s: " _fmt, \
1785 dev_name(&adapter->pdev->dev), \
1786 __func__, ##_args); \
1789 #define PCI_DEVICE_ID_QLOGIC_QLE834X 0x8030
1790 #define PCI_DEVICE_ID_QLOGIC_QLE824X 0x8020
1791 static inline bool qlcnic_82xx_check(struct qlcnic_adapter *adapter)
1793 unsigned short device = adapter->pdev->device;
1794 return (device == PCI_DEVICE_ID_QLOGIC_QLE824X) ? true : false;
1797 static inline bool qlcnic_83xx_check(struct qlcnic_adapter *adapter)
1799 unsigned short device = adapter->pdev->device;
1800 return (device == PCI_DEVICE_ID_QLOGIC_QLE834X) ? true : false;
1804 #endif /* __QLCNIC_H_ */