1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2017 - 2019 Pensando Systems, Inc */
4 #include <linux/printk.h>
5 #include <linux/dynamic_debug.h>
6 #include <linux/module.h>
7 #include <linux/netdevice.h>
8 #include <linux/utsname.h>
11 #include "ionic_bus.h"
12 #include "ionic_lif.h"
13 #include "ionic_debugfs.h"
15 MODULE_DESCRIPTION(IONIC_DRV_DESCRIPTION);
16 MODULE_AUTHOR("Pensando Systems, Inc");
17 MODULE_LICENSE("GPL");
18 MODULE_VERSION(IONIC_DRV_VERSION);
20 static const char *ionic_error_to_str(enum ionic_status_code code)
23 case IONIC_RC_SUCCESS:
24 return "IONIC_RC_SUCCESS";
25 case IONIC_RC_EVERSION:
26 return "IONIC_RC_EVERSION";
27 case IONIC_RC_EOPCODE:
28 return "IONIC_RC_EOPCODE";
30 return "IONIC_RC_EIO";
32 return "IONIC_RC_EPERM";
34 return "IONIC_RC_EQID";
36 return "IONIC_RC_EQTYPE";
38 return "IONIC_RC_ENOENT";
40 return "IONIC_RC_EINTR";
42 return "IONIC_RC_EAGAIN";
44 return "IONIC_RC_ENOMEM";
46 return "IONIC_RC_EFAULT";
48 return "IONIC_RC_EBUSY";
50 return "IONIC_RC_EEXIST";
52 return "IONIC_RC_EINVAL";
54 return "IONIC_RC_ENOSPC";
56 return "IONIC_RC_ERANGE";
57 case IONIC_RC_BAD_ADDR:
58 return "IONIC_RC_BAD_ADDR";
59 case IONIC_RC_DEV_CMD:
60 return "IONIC_RC_DEV_CMD";
62 return "IONIC_RC_ERROR";
64 return "IONIC_RC_ERDMA";
66 return "IONIC_RC_UNKNOWN";
70 static int ionic_error_to_errno(enum ionic_status_code code)
73 case IONIC_RC_SUCCESS:
75 case IONIC_RC_EVERSION:
98 case IONIC_RC_BAD_ADDR:
100 case IONIC_RC_EOPCODE:
102 case IONIC_RC_DEV_CMD:
111 static const char *ionic_opcode_to_str(enum ionic_cmd_opcode opcode)
115 return "IONIC_CMD_NOP";
117 return "IONIC_CMD_INIT";
118 case IONIC_CMD_RESET:
119 return "IONIC_CMD_RESET";
120 case IONIC_CMD_IDENTIFY:
121 return "IONIC_CMD_IDENTIFY";
122 case IONIC_CMD_GETATTR:
123 return "IONIC_CMD_GETATTR";
124 case IONIC_CMD_SETATTR:
125 return "IONIC_CMD_SETATTR";
126 case IONIC_CMD_PORT_IDENTIFY:
127 return "IONIC_CMD_PORT_IDENTIFY";
128 case IONIC_CMD_PORT_INIT:
129 return "IONIC_CMD_PORT_INIT";
130 case IONIC_CMD_PORT_RESET:
131 return "IONIC_CMD_PORT_RESET";
132 case IONIC_CMD_PORT_GETATTR:
133 return "IONIC_CMD_PORT_GETATTR";
134 case IONIC_CMD_PORT_SETATTR:
135 return "IONIC_CMD_PORT_SETATTR";
136 case IONIC_CMD_LIF_INIT:
137 return "IONIC_CMD_LIF_INIT";
138 case IONIC_CMD_LIF_RESET:
139 return "IONIC_CMD_LIF_RESET";
140 case IONIC_CMD_LIF_IDENTIFY:
141 return "IONIC_CMD_LIF_IDENTIFY";
142 case IONIC_CMD_LIF_SETATTR:
143 return "IONIC_CMD_LIF_SETATTR";
144 case IONIC_CMD_LIF_GETATTR:
145 return "IONIC_CMD_LIF_GETATTR";
146 case IONIC_CMD_RX_MODE_SET:
147 return "IONIC_CMD_RX_MODE_SET";
148 case IONIC_CMD_RX_FILTER_ADD:
149 return "IONIC_CMD_RX_FILTER_ADD";
150 case IONIC_CMD_RX_FILTER_DEL:
151 return "IONIC_CMD_RX_FILTER_DEL";
152 case IONIC_CMD_Q_INIT:
153 return "IONIC_CMD_Q_INIT";
154 case IONIC_CMD_Q_CONTROL:
155 return "IONIC_CMD_Q_CONTROL";
156 case IONIC_CMD_RDMA_RESET_LIF:
157 return "IONIC_CMD_RDMA_RESET_LIF";
158 case IONIC_CMD_RDMA_CREATE_EQ:
159 return "IONIC_CMD_RDMA_CREATE_EQ";
160 case IONIC_CMD_RDMA_CREATE_CQ:
161 return "IONIC_CMD_RDMA_CREATE_CQ";
162 case IONIC_CMD_RDMA_CREATE_ADMINQ:
163 return "IONIC_CMD_RDMA_CREATE_ADMINQ";
164 case IONIC_CMD_FW_DOWNLOAD:
165 return "IONIC_CMD_FW_DOWNLOAD";
166 case IONIC_CMD_FW_CONTROL:
167 return "IONIC_CMD_FW_CONTROL";
169 return "DEVCMD_UNKNOWN";
173 static void ionic_adminq_flush(struct ionic_lif *lif)
175 struct ionic_queue *adminq = &lif->adminqcq->q;
177 spin_lock(&lif->adminq_lock);
179 while (adminq->tail != adminq->head) {
180 memset(adminq->tail->desc, 0, sizeof(union ionic_adminq_cmd));
181 adminq->tail->cb = NULL;
182 adminq->tail->cb_arg = NULL;
183 adminq->tail = adminq->tail->next;
185 spin_unlock(&lif->adminq_lock);
188 static int ionic_adminq_check_err(struct ionic_lif *lif,
189 struct ionic_admin_ctx *ctx,
192 struct net_device *netdev = lif->netdev;
193 const char *opcode_str;
194 const char *status_str;
197 if (ctx->comp.comp.status || timeout) {
198 opcode_str = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
199 status_str = ionic_error_to_str(ctx->comp.comp.status);
200 err = timeout ? -ETIMEDOUT :
201 ionic_error_to_errno(ctx->comp.comp.status);
203 netdev_err(netdev, "%s (%d) failed: %s (%d)\n",
204 opcode_str, ctx->cmd.cmd.opcode,
205 timeout ? "TIMEOUT" : status_str, err);
208 ionic_adminq_flush(lif);
214 static void ionic_adminq_cb(struct ionic_queue *q,
215 struct ionic_desc_info *desc_info,
216 struct ionic_cq_info *cq_info, void *cb_arg)
218 struct ionic_admin_ctx *ctx = cb_arg;
219 struct ionic_admin_comp *comp;
225 comp = cq_info->cq_desc;
226 dev = &q->lif->netdev->dev;
228 memcpy(&ctx->comp, comp, sizeof(*comp));
230 dev_dbg(dev, "comp admin queue command:\n");
231 dynamic_hex_dump("comp ", DUMP_PREFIX_OFFSET, 16, 1,
232 &ctx->comp, sizeof(ctx->comp), true);
234 complete_all(&ctx->work);
237 static int ionic_adminq_post(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
239 struct ionic_queue *adminq = &lif->adminqcq->q;
242 WARN_ON(in_interrupt());
244 spin_lock(&lif->adminq_lock);
245 if (!ionic_q_has_space(adminq, 1)) {
250 err = ionic_heartbeat_check(lif->ionic);
254 memcpy(adminq->head->desc, &ctx->cmd, sizeof(ctx->cmd));
256 dev_dbg(&lif->netdev->dev, "post admin queue command:\n");
257 dynamic_hex_dump("cmd ", DUMP_PREFIX_OFFSET, 16, 1,
258 &ctx->cmd, sizeof(ctx->cmd), true);
260 ionic_q_post(adminq, true, ionic_adminq_cb, ctx);
263 spin_unlock(&lif->adminq_lock);
268 int ionic_adminq_post_wait(struct ionic_lif *lif, struct ionic_admin_ctx *ctx)
270 struct net_device *netdev = lif->netdev;
271 unsigned long remaining;
275 err = ionic_adminq_post(lif, ctx);
277 name = ionic_opcode_to_str(ctx->cmd.cmd.opcode);
278 netdev_err(netdev, "Posting of %s (%d) failed: %d\n",
279 name, ctx->cmd.cmd.opcode, err);
283 remaining = wait_for_completion_timeout(&ctx->work,
284 HZ * (ulong)DEVCMD_TIMEOUT);
285 return ionic_adminq_check_err(lif, ctx, (remaining == 0));
288 int ionic_napi(struct napi_struct *napi, int budget, ionic_cq_cb cb,
289 ionic_cq_done_cb done_cb, void *done_arg)
291 struct ionic_qcq *qcq = napi_to_qcq(napi);
292 struct ionic_cq *cq = &qcq->cq;
293 u32 work_done, flags = 0;
295 work_done = ionic_cq_service(cq, budget, cb, done_cb, done_arg);
297 if (work_done < budget && napi_complete_done(napi, work_done)) {
298 flags |= IONIC_INTR_CRED_UNMASK;
299 DEBUG_STATS_INTR_REARM(cq->bound_intr);
302 if (work_done || flags) {
303 flags |= IONIC_INTR_CRED_RESET_COALESCE;
304 ionic_intr_credits(cq->lif->ionic->idev.intr_ctrl,
305 cq->bound_intr->index,
309 DEBUG_STATS_NAPI_POLL(qcq, work_done);
314 static void ionic_dev_cmd_clean(struct ionic *ionic)
316 union ionic_dev_cmd_regs *regs = ionic->idev.dev_cmd_regs;
318 iowrite32(0, ®s->doorbell);
319 memset_io(®s->cmd, 0, sizeof(regs->cmd));
322 int ionic_dev_cmd_wait(struct ionic *ionic, unsigned long max_seconds)
324 struct ionic_dev *idev = &ionic->idev;
325 unsigned long start_time;
326 unsigned long max_wait;
327 unsigned long duration;
333 WARN_ON(in_interrupt());
335 /* Wait for dev cmd to complete, retrying if we get EAGAIN,
336 * but don't wait any longer than max_seconds.
338 max_wait = jiffies + (max_seconds * HZ);
340 start_time = jiffies;
342 done = ionic_dev_cmd_done(idev);
346 hb = ionic_heartbeat_check(ionic);
347 } while (!done && !hb && time_before(jiffies, max_wait));
348 duration = jiffies - start_time;
350 opcode = idev->dev_cmd_regs->cmd.cmd.opcode;
351 dev_dbg(ionic->dev, "DEVCMD %s (%d) done=%d took %ld secs (%ld jiffies)\n",
352 ionic_opcode_to_str(opcode), opcode,
353 done, duration / HZ, duration);
356 ionic_dev_cmd_clean(ionic);
357 dev_warn(ionic->dev, "DEVCMD %s (%d) failed - FW halted\n",
358 ionic_opcode_to_str(opcode), opcode);
362 if (!done && !time_before(jiffies, max_wait)) {
363 ionic_dev_cmd_clean(ionic);
364 dev_warn(ionic->dev, "DEVCMD %s (%d) timeout after %ld secs\n",
365 ionic_opcode_to_str(opcode), opcode, max_seconds);
369 err = ionic_dev_cmd_status(&ionic->idev);
371 if (err == IONIC_RC_EAGAIN && !time_after(jiffies, max_wait)) {
372 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) retrying...\n",
373 ionic_opcode_to_str(opcode), opcode,
374 ionic_error_to_str(err), err);
377 iowrite32(0, &idev->dev_cmd_regs->done);
378 iowrite32(1, &idev->dev_cmd_regs->doorbell);
382 dev_err(ionic->dev, "DEV_CMD %s (%d) error, %s (%d) failed\n",
383 ionic_opcode_to_str(opcode), opcode,
384 ionic_error_to_str(err), err);
386 return ionic_error_to_errno(err);
392 int ionic_setup(struct ionic *ionic)
396 err = ionic_dev_setup(ionic);
403 int ionic_identify(struct ionic *ionic)
405 struct ionic_identity *ident = &ionic->ident;
406 struct ionic_dev *idev = &ionic->idev;
410 memset(ident, 0, sizeof(*ident));
412 ident->drv.os_type = cpu_to_le32(IONIC_OS_TYPE_LINUX);
413 strncpy(ident->drv.driver_ver_str, IONIC_DRV_VERSION,
414 sizeof(ident->drv.driver_ver_str) - 1);
416 mutex_lock(&ionic->dev_cmd_lock);
418 sz = min(sizeof(ident->drv), sizeof(idev->dev_cmd_regs->data));
419 memcpy_toio(&idev->dev_cmd_regs->data, &ident->drv, sz);
421 ionic_dev_cmd_identify(idev, IONIC_IDENTITY_VERSION_1);
422 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
424 sz = min(sizeof(ident->dev), sizeof(idev->dev_cmd_regs->data));
425 memcpy_fromio(&ident->dev, &idev->dev_cmd_regs->data, sz);
428 mutex_unlock(&ionic->dev_cmd_lock);
433 ionic_debugfs_add_ident(ionic);
441 int ionic_init(struct ionic *ionic)
443 struct ionic_dev *idev = &ionic->idev;
446 mutex_lock(&ionic->dev_cmd_lock);
447 ionic_dev_cmd_init(idev);
448 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
449 mutex_unlock(&ionic->dev_cmd_lock);
454 int ionic_reset(struct ionic *ionic)
456 struct ionic_dev *idev = &ionic->idev;
459 mutex_lock(&ionic->dev_cmd_lock);
460 ionic_dev_cmd_reset(idev);
461 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
462 mutex_unlock(&ionic->dev_cmd_lock);
467 int ionic_port_identify(struct ionic *ionic)
469 struct ionic_identity *ident = &ionic->ident;
470 struct ionic_dev *idev = &ionic->idev;
474 mutex_lock(&ionic->dev_cmd_lock);
476 ionic_dev_cmd_port_identify(idev);
477 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
479 sz = min(sizeof(ident->port), sizeof(idev->dev_cmd_regs->data));
480 memcpy_fromio(&ident->port, &idev->dev_cmd_regs->data, sz);
483 mutex_unlock(&ionic->dev_cmd_lock);
488 int ionic_port_init(struct ionic *ionic)
490 struct ionic_identity *ident = &ionic->ident;
491 struct ionic_dev *idev = &ionic->idev;
498 idev->port_info_sz = ALIGN(sizeof(*idev->port_info), PAGE_SIZE);
499 idev->port_info = dma_alloc_coherent(ionic->dev, idev->port_info_sz,
502 if (!idev->port_info) {
503 dev_err(ionic->dev, "Failed to allocate port info, aborting\n");
507 sz = min(sizeof(ident->port.config), sizeof(idev->dev_cmd_regs->data));
509 mutex_lock(&ionic->dev_cmd_lock);
511 memcpy_toio(&idev->dev_cmd_regs->data, &ident->port.config, sz);
512 ionic_dev_cmd_port_init(idev);
513 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
515 ionic_dev_cmd_port_state(&ionic->idev, IONIC_PORT_ADMIN_STATE_UP);
516 (void)ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
518 mutex_unlock(&ionic->dev_cmd_lock);
520 dev_err(ionic->dev, "Failed to init port\n");
521 dma_free_coherent(ionic->dev, idev->port_info_sz,
522 idev->port_info, idev->port_info_pa);
523 idev->port_info = NULL;
524 idev->port_info_pa = 0;
530 int ionic_port_reset(struct ionic *ionic)
532 struct ionic_dev *idev = &ionic->idev;
535 if (!idev->port_info)
538 mutex_lock(&ionic->dev_cmd_lock);
539 ionic_dev_cmd_port_reset(idev);
540 err = ionic_dev_cmd_wait(ionic, DEVCMD_TIMEOUT);
541 mutex_unlock(&ionic->dev_cmd_lock);
543 dma_free_coherent(ionic->dev, idev->port_info_sz,
544 idev->port_info, idev->port_info_pa);
546 idev->port_info = NULL;
547 idev->port_info_pa = 0;
550 dev_err(ionic->dev, "Failed to reset port\n");
555 static int __init ionic_init_module(void)
557 pr_info("%s %s, ver %s\n",
558 IONIC_DRV_NAME, IONIC_DRV_DESCRIPTION, IONIC_DRV_VERSION);
559 ionic_debugfs_create();
560 return ionic_bus_register_driver();
563 static void __exit ionic_cleanup_module(void)
565 ionic_bus_unregister_driver();
566 ionic_debugfs_destroy();
568 pr_info("%s removed\n", IONIC_DRV_NAME);
571 module_init(ionic_init_module);
572 module_exit(ionic_cleanup_module);