drivers/mmc/host/sdhci-pci-core.c

   1 /*  linux/drivers/mmc/host/sdhci-pci.c - SDHCI on PCI bus interface
   2  *
   3  *  Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify
   6  * it under the terms of the GNU General Public License as published by
   7  * the Free Software Foundation; either version 2 of the License, or (at
   8  * your option) any later version.
   9  *
  10  * Thanks to the following companies for their support:
  11  *
  12  *     - JMicron (hardware and technical support)
  13  */
  14
  15 #include <linux/delay.h>
  16 #include <linux/highmem.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/dma-mapping.h>
  20 #include <linux/slab.h>
  21 #include <linux/device.h>
  22 #include <linux/mmc/host.h>
  23 #include <linux/mmc/mmc.h>
  24 #include <linux/scatterlist.h>
  25 #include <linux/io.h>
  26 #include <linux/gpio.h>
  27 #include <linux/pm_runtime.h>
  28 #include <linux/mmc/slot-gpio.h>
  29 #include <linux/mmc/sdhci-pci-data.h>
  30
  31 #include "sdhci.h"
  32 #include "sdhci-pci.h"
  33 #include "sdhci-pci-o2micro.h"
  34
  35 /*****************************************************************************\
  36  *                                                                           *
  37  * Hardware specific quirk handling                                          *
  38  *                                                                           *
  39 \*****************************************************************************/
  40
  41 static int ricoh_probe(struct sdhci_pci_chip *chip)
  42 {
  43         if (chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG ||
  44             chip->pdev->subsystem_vendor == PCI_VENDOR_ID_SONY)
  45                 chip->quirks |= SDHCI_QUIRK_NO_CARD_NO_RESET;
  46         return 0;
  47 }
  48
  49 static int ricoh_mmc_probe_slot(struct sdhci_pci_slot *slot)
  50 {
  51         slot->host->caps =
  52                 ((0x21 << SDHCI_TIMEOUT_CLK_SHIFT)
  53                         & SDHCI_TIMEOUT_CLK_MASK) |
  54
  55                 ((0x21 << SDHCI_CLOCK_BASE_SHIFT)
  56                         & SDHCI_CLOCK_BASE_MASK) |
  57
  58                 SDHCI_TIMEOUT_CLK_UNIT |
  59                 SDHCI_CAN_VDD_330 |
  60                 SDHCI_CAN_DO_HISPD |
  61                 SDHCI_CAN_DO_SDMA;
  62         return 0;
  63 }
  64
  65 static int ricoh_mmc_resume(struct sdhci_pci_chip *chip)
  66 {
  67         /* Apply a delay to allow controller to settle */
  68         /* Otherwise it becomes confused if card state changed
  69                 during suspend */
  70         msleep(500);
  71         return 0;
  72 }
  73
  74 static const struct sdhci_pci_fixes sdhci_ricoh = {
  75         .probe          = ricoh_probe,
  76         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  77                           SDHCI_QUIRK_FORCE_DMA |
  78                           SDHCI_QUIRK_CLOCK_BEFORE_RESET,
  79 };
  80
  81 static const struct sdhci_pci_fixes sdhci_ricoh_mmc = {
  82         .probe_slot     = ricoh_mmc_probe_slot,
  83         .resume         = ricoh_mmc_resume,
  84         .quirks         = SDHCI_QUIRK_32BIT_DMA_ADDR |
  85                           SDHCI_QUIRK_CLOCK_BEFORE_RESET |
  86                           SDHCI_QUIRK_NO_CARD_NO_RESET |
  87                           SDHCI_QUIRK_MISSING_CAPS
  88 };
  89
  90 static const struct sdhci_pci_fixes sdhci_ene_712 = {
  91         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  92                           SDHCI_QUIRK_BROKEN_DMA,
  93 };
  94
  95 static const struct sdhci_pci_fixes sdhci_ene_714 = {
  96         .quirks         = SDHCI_QUIRK_SINGLE_POWER_WRITE |
  97                           SDHCI_QUIRK_RESET_CMD_DATA_ON_IOS |
  98                           SDHCI_QUIRK_BROKEN_DMA,
  99 };
 100
 101 static const struct sdhci_pci_fixes sdhci_cafe = {
 102         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER |
 103                           SDHCI_QUIRK_NO_BUSY_IRQ |
 104                           SDHCI_QUIRK_BROKEN_CARD_DETECTION |
 105                           SDHCI_QUIRK_BROKEN_TIMEOUT_VAL,
 106 };
 107
 108 static const struct sdhci_pci_fixes sdhci_intel_qrk = {
 109         .quirks         = SDHCI_QUIRK_NO_HISPD_BIT,
 110 };
 111
 112 static int mrst_hc_probe_slot(struct sdhci_pci_slot *slot)
 113 {
 114         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 115         return 0;
 116 }
 117
 118 /*
 119  * ADMA operation is disabled for Moorestown platform due to
 120  * hardware bugs.
 121  */
 122 static int mrst_hc_probe(struct sdhci_pci_chip *chip)
 123 {
 124         /*
 125          * slots number is fixed here for MRST as SDIO3/5 are never used and
 126          * have hardware bugs.
 127          */
 128         chip->num_slots = 1;
 129         return 0;
 130 }
 131
 132 static int pch_hc_probe_slot(struct sdhci_pci_slot *slot)
 133 {
 134         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA;
 135         return 0;
 136 }
 137
 138 #ifdef CONFIG_PM
 139
 140 static irqreturn_t sdhci_pci_sd_cd(int irq, void *dev_id)
 141 {
 142         struct sdhci_pci_slot *slot = dev_id;
 143         struct sdhci_host *host = slot->host;
 144
 145         mmc_detect_change(host->mmc, msecs_to_jiffies(200));
 146         return IRQ_HANDLED;
 147 }
 148
 149 static void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 150 {
 151         int err, irq, gpio = slot->cd_gpio;
 152
 153         slot->cd_gpio = -EINVAL;
 154         slot->cd_irq = -EINVAL;
 155
 156         if (!gpio_is_valid(gpio))
 157                 return;
 158
 159         err = devm_gpio_request(&slot->chip->pdev->dev, gpio, "sd_cd");
 160         if (err < 0)
 161                 goto out;
 162
 163         err = gpio_direction_input(gpio);
 164         if (err < 0)
 165                 goto out_free;
 166
 167         irq = gpio_to_irq(gpio);
 168         if (irq < 0)
 169                 goto out_free;
 170
 171         err = request_irq(irq, sdhci_pci_sd_cd, IRQF_TRIGGER_RISING |
 172                           IRQF_TRIGGER_FALLING, "sd_cd", slot);
 173         if (err)
 174                 goto out_free;
 175
 176         slot->cd_gpio = gpio;
 177         slot->cd_irq = irq;
 178
 179         return;
 180
 181 out_free:
 182         devm_gpio_free(&slot->chip->pdev->dev, gpio);
 183 out:
 184         dev_warn(&slot->chip->pdev->dev, "failed to setup card detect wake up\n");
 185 }
 186
 187 static void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 188 {
 189         if (slot->cd_irq >= 0)
 190                 free_irq(slot->cd_irq, slot);
 191 }
 192
 193 #else
 194
 195 static inline void sdhci_pci_add_own_cd(struct sdhci_pci_slot *slot)
 196 {
 197 }
 198
 199 static inline void sdhci_pci_remove_own_cd(struct sdhci_pci_slot *slot)
 200 {
 201 }
 202
 203 #endif
 204
 205 static int mfd_emmc_probe_slot(struct sdhci_pci_slot *slot)
 206 {
 207         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE;
 208         slot->host->mmc->caps2 |= MMC_CAP2_BOOTPART_NOACC |
 209                                   MMC_CAP2_HC_ERASE_SZ;
 210         return 0;
 211 }
 212
 213 static int mfd_sdio_probe_slot(struct sdhci_pci_slot *slot)
 214 {
 215         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE;
 216         return 0;
 217 }
 218
 219 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc0 = {
 220         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 221         .probe_slot     = mrst_hc_probe_slot,
 222 };
 223
 224 static const struct sdhci_pci_fixes sdhci_intel_mrst_hc1_hc2 = {
 225         .quirks         = SDHCI_QUIRK_BROKEN_ADMA | SDHCI_QUIRK_NO_HISPD_BIT,
 226         .probe          = mrst_hc_probe,
 227 };
 228
 229 static const struct sdhci_pci_fixes sdhci_intel_mfd_sd = {
 230         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 231         .allow_runtime_pm = true,
 232         .own_cd_for_runtime_pm = true,
 233 };
 234
 235 static const struct sdhci_pci_fixes sdhci_intel_mfd_sdio = {
 236         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 237         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON,
 238         .allow_runtime_pm = true,
 239         .probe_slot     = mfd_sdio_probe_slot,
 240 };
 241
 242 static const struct sdhci_pci_fixes sdhci_intel_mfd_emmc = {
 243         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 244         .allow_runtime_pm = true,
 245         .probe_slot     = mfd_emmc_probe_slot,
 246 };
 247
 248 static const struct sdhci_pci_fixes sdhci_intel_pch_sdio = {
 249         .quirks         = SDHCI_QUIRK_BROKEN_ADMA,
 250         .probe_slot     = pch_hc_probe_slot,
 251 };
 252
 253 static void sdhci_pci_int_hw_reset(struct sdhci_host *host)
 254 {
 255         u8 reg;
 256
 257         reg = sdhci_readb(host, SDHCI_POWER_CONTROL);
 258         reg |= 0x10;
 259         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 260         /* For eMMC, minimum is 1us but give it 9us for good measure */
 261         udelay(9);
 262         reg &= ~0x10;
 263         sdhci_writeb(host, reg, SDHCI_POWER_CONTROL);
 264         /* For eMMC, minimum is 200us but give it 300us for good measure */
 265         usleep_range(300, 1000);
 266 }
 267
 268 static int spt_select_drive_strength(struct sdhci_host *host,
 269                                      struct mmc_card *card,
 270                                      unsigned int max_dtr,
 271                                      int host_drv, int card_drv, int *drv_type)
 272 {
 273         int drive_strength;
 274
 275         if (sdhci_pci_spt_drive_strength > 0)
 276                 drive_strength = sdhci_pci_spt_drive_strength & 0xf;
 277         else
 278                 drive_strength = 0; /* Default 50-ohm */
 279
 280         if ((mmc_driver_type_mask(drive_strength) & card_drv) == 0)
 281                 drive_strength = 0; /* Default 50-ohm */
 282
 283         return drive_strength;
 284 }
 285
 286 /* Try to read the drive strength from the card */
 287 static void spt_read_drive_strength(struct sdhci_host *host)
 288 {
 289         u32 val, i, t;
 290         u16 m;
 291
 292         if (sdhci_pci_spt_drive_strength)
 293                 return;
 294
 295         sdhci_pci_spt_drive_strength = -1;
 296
 297         m = sdhci_readw(host, SDHCI_HOST_CONTROL2) & 0x7;
 298         if (m != 3 && m != 5)
 299                 return;
 300         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 301         if (val & 0x3)
 302                 return;
 303         sdhci_writel(host, 0x007f0023, SDHCI_INT_ENABLE);
 304         sdhci_writel(host, 0, SDHCI_SIGNAL_ENABLE);
 305         sdhci_writew(host, 0x10, SDHCI_TRANSFER_MODE);
 306         sdhci_writeb(host, 0xe, SDHCI_TIMEOUT_CONTROL);
 307         sdhci_writew(host, 512, SDHCI_BLOCK_SIZE);
 308         sdhci_writew(host, 1, SDHCI_BLOCK_COUNT);
 309         sdhci_writel(host, 0, SDHCI_ARGUMENT);
 310         sdhci_writew(host, 0x83b, SDHCI_COMMAND);
 311         for (i = 0; i < 1000; i++) {
 312                 val = sdhci_readl(host, SDHCI_INT_STATUS);
 313                 if (val & 0xffff8000)
 314                         return;
 315                 if (val & 0x20)
 316                         break;
 317                 udelay(1);
 318         }
 319         val = sdhci_readl(host, SDHCI_PRESENT_STATE);
 320         if (!(val & 0x800))
 321                 return;
 322         for (i = 0; i < 47; i++)
 323                 val = sdhci_readl(host, SDHCI_BUFFER);
 324         t = val & 0xf00;
 325         if (t != 0x200 && t != 0x300)
 326                 return;
 327
 328         sdhci_pci_spt_drive_strength = 0x10 | ((val >> 12) & 0xf);
 329 }
 330
 331 static int bxt_get_cd(struct mmc_host *mmc)
 332 {
 333         int gpio_cd = mmc_gpio_get_cd(mmc);
 334         struct sdhci_host *host = mmc_priv(mmc);
 335         unsigned long flags;
 336         int ret = 0;
 337
 338         if (!gpio_cd)
 339                 return 0;
 340
 341         spin_lock_irqsave(&host->lock, flags);
 342
 343         if (host->flags & SDHCI_DEVICE_DEAD)
 344                 goto out;
 345
 346         ret = !!(sdhci_readl(host, SDHCI_PRESENT_STATE) & SDHCI_CARD_PRESENT);
 347 out:
 348         spin_unlock_irqrestore(&host->lock, flags);
 349
 350         return ret;
 351 }
 352
 353 static int byt_emmc_probe_slot(struct sdhci_pci_slot *slot)
 354 {
 355         slot->host->mmc->caps |= MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE |
 356                                  MMC_CAP_HW_RESET | MMC_CAP_1_8V_DDR |
 357                                  MMC_CAP_WAIT_WHILE_BUSY;
 358         slot->host->mmc->caps2 |= MMC_CAP2_HC_ERASE_SZ;
 359         slot->hw_reset = sdhci_pci_int_hw_reset;
 360         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BSW_EMMC)
 361                 slot->host->timeout_clk = 1000; /* 1000 kHz i.e. 1 MHz */
 362         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_SPT_EMMC) {
 363                 spt_read_drive_strength(slot->host);
 364                 slot->select_drive_strength = spt_select_drive_strength;
 365         }
 366         return 0;
 367 }
 368
 369 static int byt_sdio_probe_slot(struct sdhci_pci_slot *slot)
 370 {
 371         slot->host->mmc->caps |= MMC_CAP_POWER_OFF_CARD | MMC_CAP_NONREMOVABLE |
 372                                  MMC_CAP_WAIT_WHILE_BUSY;
 373         return 0;
 374 }
 375
 376 static int byt_sd_probe_slot(struct sdhci_pci_slot *slot)
 377 {
 378         slot->host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY;
 379         slot->cd_con_id = NULL;
 380         slot->cd_idx = 0;
 381         slot->cd_override_level = true;
 382         if (slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXT_SD ||
 383             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_BXTM_SD ||
 384             slot->chip->pdev->device == PCI_DEVICE_ID_INTEL_APL_SD) {
 385                 slot->host->mmc_host_ops.get_cd = bxt_get_cd;
 386                 slot->host->mmc->caps |= MMC_CAP_AGGRESSIVE_PM;
 387         }
 388
 389         return 0;
 390 }
 391
 392 static const struct sdhci_pci_fixes sdhci_intel_byt_emmc = {
 393         .allow_runtime_pm = true,
 394         .probe_slot     = byt_emmc_probe_slot,
 395         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 396         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 397                           SDHCI_QUIRK2_CAPS_BIT63_FOR_HS400 |
 398                           SDHCI_QUIRK2_STOP_WITH_TC,
 399 };
 400
 401 static const struct sdhci_pci_fixes sdhci_intel_byt_sdio = {
 402         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 403         .quirks2        = SDHCI_QUIRK2_HOST_OFF_CARD_ON |
 404                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 405         .allow_runtime_pm = true,
 406         .probe_slot     = byt_sdio_probe_slot,
 407 };
 408
 409 static const struct sdhci_pci_fixes sdhci_intel_byt_sd = {
 410         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 411         .quirks2        = SDHCI_QUIRK2_CARD_ON_NEEDS_BUS_ON |
 412                           SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 413                           SDHCI_QUIRK2_STOP_WITH_TC,
 414         .allow_runtime_pm = true,
 415         .own_cd_for_runtime_pm = true,
 416         .probe_slot     = byt_sd_probe_slot,
 417 };
 418
 419 /* Define Host controllers for Intel Merrifield platform */
 420 #define INTEL_MRFLD_EMMC_0      0
 421 #define INTEL_MRFLD_EMMC_1      1
 422 #define INTEL_MRFLD_SDIO        3
 423
 424 static int intel_mrfld_mmc_probe_slot(struct sdhci_pci_slot *slot)
 425 {
 426         unsigned int func = PCI_FUNC(slot->chip->pdev->devfn);
 427
 428         switch (func) {
 429         case INTEL_MRFLD_EMMC_0:
 430         case INTEL_MRFLD_EMMC_1:
 431                 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
 432                                          MMC_CAP_8_BIT_DATA |
 433                                          MMC_CAP_1_8V_DDR;
 434                 break;
 435         case INTEL_MRFLD_SDIO:
 436                 slot->host->mmc->caps |= MMC_CAP_NONREMOVABLE |
 437                                          MMC_CAP_POWER_OFF_CARD;
 438                 break;
 439         default:
 440                 /* SD support is not ready yet */
 441                 return -ENODEV;
 442         }
 443         return 0;
 444 }
 445
 446 static const struct sdhci_pci_fixes sdhci_intel_mrfld_mmc = {
 447         .quirks         = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 448         .quirks2        = SDHCI_QUIRK2_BROKEN_HS200 |
 449                         SDHCI_QUIRK2_PRESET_VALUE_BROKEN,
 450         .allow_runtime_pm = true,
 451         .probe_slot     = intel_mrfld_mmc_probe_slot,
 452 };
 453
 454 /* O2Micro extra registers */
 455 #define O2_SD_LOCK_WP           0xD3
 456 #define O2_SD_MULTI_VCC3V       0xEE
 457 #define O2_SD_CLKREQ            0xEC
 458 #define O2_SD_CAPS              0xE0
 459 #define O2_SD_ADMA1             0xE2
 460 #define O2_SD_ADMA2             0xE7
 461 #define O2_SD_INF_MOD           0xF1
 462
 463 static int jmicron_pmos(struct sdhci_pci_chip *chip, int on)
 464 {
 465         u8 scratch;
 466         int ret;
 467
 468         ret = pci_read_config_byte(chip->pdev, 0xAE, &scratch);
 469         if (ret)
 470                 return ret;
 471
 472         /*
 473          * Turn PMOS on [bit 0], set over current detection to 2.4 V
 474          * [bit 1:2] and enable over current debouncing [bit 6].
 475          */
 476         if (on)
 477                 scratch |= 0x47;
 478         else
 479                 scratch &= ~0x47;
 480
 481         return pci_write_config_byte(chip->pdev, 0xAE, scratch);
 482 }
 483
 484 static int jmicron_probe(struct sdhci_pci_chip *chip)
 485 {
 486         int ret;
 487         u16 mmcdev = 0;
 488
 489         if (chip->pdev->revision == 0) {
 490                 chip->quirks |= SDHCI_QUIRK_32BIT_DMA_ADDR |
 491                           SDHCI_QUIRK_32BIT_DMA_SIZE |
 492                           SDHCI_QUIRK_32BIT_ADMA_SIZE |
 493                           SDHCI_QUIRK_RESET_AFTER_REQUEST |
 494                           SDHCI_QUIRK_BROKEN_SMALL_PIO;
 495         }
 496
 497         /*
 498          * JMicron chips can have two interfaces to the same hardware
 499          * in order to work around limitations in Microsoft's driver.
 500          * We need to make sure we only bind to one of them.
 501          *
 502          * This code assumes two things:
 503          *
 504          * 1. The PCI code adds subfunctions in order.
 505          *
 506          * 2. The MMC interface has a lower subfunction number
 507          *    than the SD interface.
 508          */
 509         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_SD)
 510                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB38X_MMC;
 511         else if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD)
 512                 mmcdev = PCI_DEVICE_ID_JMICRON_JMB388_ESD;
 513
 514         if (mmcdev) {
 515                 struct pci_dev *sd_dev;
 516
 517                 sd_dev = NULL;
 518                 while ((sd_dev = pci_get_device(PCI_VENDOR_ID_JMICRON,
 519                                                 mmcdev, sd_dev)) != NULL) {
 520                         if ((PCI_SLOT(chip->pdev->devfn) ==
 521                                 PCI_SLOT(sd_dev->devfn)) &&
 522                                 (chip->pdev->bus == sd_dev->bus))
 523                                 break;
 524                 }
 525
 526                 if (sd_dev) {
 527                         pci_dev_put(sd_dev);
 528                         dev_info(&chip->pdev->dev, "Refusing to bind to "
 529                                 "secondary interface.\n");
 530                         return -ENODEV;
 531                 }
 532         }
 533
 534         /*
 535          * JMicron chips need a bit of a nudge to enable the power
 536          * output pins.
 537          */
 538         ret = jmicron_pmos(chip, 1);
 539         if (ret) {
 540                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 541                 return ret;
 542         }
 543
 544         /* quirk for unsable RO-detection on JM388 chips */
 545         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_SD ||
 546             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 547                 chip->quirks |= SDHCI_QUIRK_UNSTABLE_RO_DETECT;
 548
 549         return 0;
 550 }
 551
 552 static void jmicron_enable_mmc(struct sdhci_host *host, int on)
 553 {
 554         u8 scratch;
 555
 556         scratch = readb(host->ioaddr + 0xC0);
 557
 558         if (on)
 559                 scratch |= 0x01;
 560         else
 561                 scratch &= ~0x01;
 562
 563         writeb(scratch, host->ioaddr + 0xC0);
 564 }
 565
 566 static int jmicron_probe_slot(struct sdhci_pci_slot *slot)
 567 {
 568         if (slot->chip->pdev->revision == 0) {
 569                 u16 version;
 570
 571                 version = readl(slot->host->ioaddr + SDHCI_HOST_VERSION);
 572                 version = (version & SDHCI_VENDOR_VER_MASK) >>
 573                         SDHCI_VENDOR_VER_SHIFT;
 574
 575                 /*
 576                  * Older versions of the chip have lots of nasty glitches
 577                  * in the ADMA engine. It's best just to avoid it
 578                  * completely.
 579                  */
 580                 if (version < 0xAC)
 581                         slot->host->quirks |= SDHCI_QUIRK_BROKEN_ADMA;
 582         }
 583
 584         /* JM388 MMC doesn't support 1.8V while SD supports it */
 585         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 586                 slot->host->ocr_avail_sd = MMC_VDD_32_33 | MMC_VDD_33_34 |
 587                         MMC_VDD_29_30 | MMC_VDD_30_31 |
 588                         MMC_VDD_165_195; /* allow 1.8V */
 589                 slot->host->ocr_avail_mmc = MMC_VDD_32_33 | MMC_VDD_33_34 |
 590                         MMC_VDD_29_30 | MMC_VDD_30_31; /* no 1.8V for MMC */
 591         }
 592
 593         /*
 594          * The secondary interface requires a bit set to get the
 595          * interrupts.
 596          */
 597         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 598             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 599                 jmicron_enable_mmc(slot->host, 1);
 600
 601         slot->host->mmc->caps |= MMC_CAP_BUS_WIDTH_TEST;
 602
 603         return 0;
 604 }
 605
 606 static void jmicron_remove_slot(struct sdhci_pci_slot *slot, int dead)
 607 {
 608         if (dead)
 609                 return;
 610
 611         if (slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 612             slot->chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD)
 613                 jmicron_enable_mmc(slot->host, 0);
 614 }
 615
 616 static int jmicron_suspend(struct sdhci_pci_chip *chip)
 617 {
 618         int i;
 619
 620         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 621             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 622                 for (i = 0; i < chip->num_slots; i++)
 623                         jmicron_enable_mmc(chip->slots[i]->host, 0);
 624         }
 625
 626         return 0;
 627 }
 628
 629 static int jmicron_resume(struct sdhci_pci_chip *chip)
 630 {
 631         int ret, i;
 632
 633         if (chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB38X_MMC ||
 634             chip->pdev->device == PCI_DEVICE_ID_JMICRON_JMB388_ESD) {
 635                 for (i = 0; i < chip->num_slots; i++)
 636                         jmicron_enable_mmc(chip->slots[i]->host, 1);
 637         }
 638
 639         ret = jmicron_pmos(chip, 1);
 640         if (ret) {
 641                 dev_err(&chip->pdev->dev, "Failure enabling card power\n");
 642                 return ret;
 643         }
 644
 645         return 0;
 646 }
 647
 648 static const struct sdhci_pci_fixes sdhci_o2 = {
 649         .probe = sdhci_pci_o2_probe,
 650         .quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC,
 651         .quirks2 = SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD,
 652         .probe_slot = sdhci_pci_o2_probe_slot,
 653         .resume = sdhci_pci_o2_resume,
 654 };
 655
 656 static const struct sdhci_pci_fixes sdhci_jmicron = {
 657         .probe          = jmicron_probe,
 658
 659         .probe_slot     = jmicron_probe_slot,
 660         .remove_slot    = jmicron_remove_slot,
 661
 662         .suspend        = jmicron_suspend,
 663         .resume         = jmicron_resume,
 664 };
 665
 666 /* SysKonnect CardBus2SDIO extra registers */
 667 #define SYSKT_CTRL              0x200
 668 #define SYSKT_RDFIFO_STAT       0x204
 669 #define SYSKT_WRFIFO_STAT       0x208
 670 #define SYSKT_POWER_DATA        0x20c
 671 #define   SYSKT_POWER_330       0xef
 672 #define   SYSKT_POWER_300       0xf8
 673 #define   SYSKT_POWER_184       0xcc
 674 #define SYSKT_POWER_CMD         0x20d
 675 #define   SYSKT_POWER_START     (1 << 7)
 676 #define SYSKT_POWER_STATUS      0x20e
 677 #define   SYSKT_POWER_STATUS_OK (1 << 0)
 678 #define SYSKT_BOARD_REV         0x210
 679 #define SYSKT_CHIP_REV          0x211
 680 #define SYSKT_CONF_DATA         0x212
 681 #define   SYSKT_CONF_DATA_1V8   (1 << 2)
 682 #define   SYSKT_CONF_DATA_2V5   (1 << 1)
 683 #define   SYSKT_CONF_DATA_3V3   (1 << 0)
 684
 685 static int syskt_probe(struct sdhci_pci_chip *chip)
 686 {
 687         if ((chip->pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
 688                 chip->pdev->class &= ~0x0000FF;
 689                 chip->pdev->class |= PCI_SDHCI_IFDMA;
 690         }
 691         return 0;
 692 }
 693
 694 static int syskt_probe_slot(struct sdhci_pci_slot *slot)
 695 {
 696         int tm, ps;
 697
 698         u8 board_rev = readb(slot->host->ioaddr + SYSKT_BOARD_REV);
 699         u8  chip_rev = readb(slot->host->ioaddr + SYSKT_CHIP_REV);
 700         dev_info(&slot->chip->pdev->dev, "SysKonnect CardBus2SDIO, "
 701                                          "board rev %d.%d, chip rev %d.%d\n",
 702                                          board_rev >> 4, board_rev & 0xf,
 703                                          chip_rev >> 4,  chip_rev & 0xf);
 704         if (chip_rev >= 0x20)
 705                 slot->host->quirks |= SDHCI_QUIRK_FORCE_DMA;
 706
 707         writeb(SYSKT_POWER_330, slot->host->ioaddr + SYSKT_POWER_DATA);
 708         writeb(SYSKT_POWER_START, slot->host->ioaddr + SYSKT_POWER_CMD);
 709         udelay(50);
 710         tm = 10;  /* Wait max 1 ms */
 711         do {
 712                 ps = readw(slot->host->ioaddr + SYSKT_POWER_STATUS);
 713                 if (ps & SYSKT_POWER_STATUS_OK)
 714                         break;
 715                 udelay(100);
 716         } while (--tm);
 717         if (!tm) {
 718                 dev_err(&slot->chip->pdev->dev,
 719                         "power regulator never stabilized");
 720                 writeb(0, slot->host->ioaddr + SYSKT_POWER_CMD);
 721                 return -ENODEV;
 722         }
 723
 724         return 0;
 725 }
 726
 727 static const struct sdhci_pci_fixes sdhci_syskt = {
 728         .quirks         = SDHCI_QUIRK_NO_SIMULT_VDD_AND_POWER,
 729         .probe          = syskt_probe,
 730         .probe_slot     = syskt_probe_slot,
 731 };
 732
 733 static int via_probe(struct sdhci_pci_chip *chip)
 734 {
 735         if (chip->pdev->revision == 0x10)
 736                 chip->quirks |= SDHCI_QUIRK_DELAY_AFTER_POWER;
 737
 738         return 0;
 739 }
 740
 741 static const struct sdhci_pci_fixes sdhci_via = {
 742         .probe          = via_probe,
 743 };
 744
 745 static int rtsx_probe_slot(struct sdhci_pci_slot *slot)
 746 {
 747         slot->host->mmc->caps2 |= MMC_CAP2_HS200;
 748         return 0;
 749 }
 750
 751 static const struct sdhci_pci_fixes sdhci_rtsx = {
 752         .quirks2        = SDHCI_QUIRK2_PRESET_VALUE_BROKEN |
 753                         SDHCI_QUIRK2_BROKEN_64_BIT_DMA |
 754                         SDHCI_QUIRK2_BROKEN_DDR50,
 755         .probe_slot     = rtsx_probe_slot,
 756 };
 757
 758 /*AMD chipset generation*/
 759 enum amd_chipset_gen {
 760         AMD_CHIPSET_BEFORE_ML,
 761         AMD_CHIPSET_CZ,
 762         AMD_CHIPSET_NL,
 763         AMD_CHIPSET_UNKNOWN,
 764 };
 765
 766 static int amd_probe(struct sdhci_pci_chip *chip)
 767 {
 768         struct pci_dev  *smbus_dev;
 769         enum amd_chipset_gen gen;
 770
 771         smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 772                         PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, NULL);
 773         if (smbus_dev) {
 774                 gen = AMD_CHIPSET_BEFORE_ML;
 775         } else {
 776                 smbus_dev = pci_get_device(PCI_VENDOR_ID_AMD,
 777                                 PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, NULL);
 778                 if (smbus_dev) {
 779                         if (smbus_dev->revision < 0x51)
 780                                 gen = AMD_CHIPSET_CZ;
 781                         else
 782                                 gen = AMD_CHIPSET_NL;
 783                 } else {
 784                         gen = AMD_CHIPSET_UNKNOWN;
 785                 }
 786         }
 787
 788         if ((gen == AMD_CHIPSET_BEFORE_ML) || (gen == AMD_CHIPSET_CZ)) {
 789                 chip->quirks2 |= SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD;
 790                 chip->quirks2 |= SDHCI_QUIRK2_BROKEN_HS200;
 791         }
 792
 793         return 0;
 794 }
 795
 796 static const struct sdhci_pci_fixes sdhci_amd = {
 797         .probe          = amd_probe,
 798 };
 799
 800 static const struct pci_device_id pci_ids[] = {
 801         {
 802                 .vendor         = PCI_VENDOR_ID_RICOH,
 803                 .device         = PCI_DEVICE_ID_RICOH_R5C822,
 804                 .subvendor      = PCI_ANY_ID,
 805                 .subdevice      = PCI_ANY_ID,
 806                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh,
 807         },
 808
 809         {
 810                 .vendor         = PCI_VENDOR_ID_RICOH,
 811                 .device         = 0x843,
 812                 .subvendor      = PCI_ANY_ID,
 813                 .subdevice      = PCI_ANY_ID,
 814                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 815         },
 816
 817         {
 818                 .vendor         = PCI_VENDOR_ID_RICOH,
 819                 .device         = 0xe822,
 820                 .subvendor      = PCI_ANY_ID,
 821                 .subdevice      = PCI_ANY_ID,
 822                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 823         },
 824
 825         {
 826                 .vendor         = PCI_VENDOR_ID_RICOH,
 827                 .device         = 0xe823,
 828                 .subvendor      = PCI_ANY_ID,
 829                 .subdevice      = PCI_ANY_ID,
 830                 .driver_data    = (kernel_ulong_t)&sdhci_ricoh_mmc,
 831         },
 832
 833         {
 834                 .vendor         = PCI_VENDOR_ID_ENE,
 835                 .device         = PCI_DEVICE_ID_ENE_CB712_SD,
 836                 .subvendor      = PCI_ANY_ID,
 837                 .subdevice      = PCI_ANY_ID,
 838                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 839         },
 840
 841         {
 842                 .vendor         = PCI_VENDOR_ID_ENE,
 843                 .device         = PCI_DEVICE_ID_ENE_CB712_SD_2,
 844                 .subvendor      = PCI_ANY_ID,
 845                 .subdevice      = PCI_ANY_ID,
 846                 .driver_data    = (kernel_ulong_t)&sdhci_ene_712,
 847         },
 848
 849         {
 850                 .vendor         = PCI_VENDOR_ID_ENE,
 851                 .device         = PCI_DEVICE_ID_ENE_CB714_SD,
 852                 .subvendor      = PCI_ANY_ID,
 853                 .subdevice      = PCI_ANY_ID,
 854                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 855         },
 856
 857         {
 858                 .vendor         = PCI_VENDOR_ID_ENE,
 859                 .device         = PCI_DEVICE_ID_ENE_CB714_SD_2,
 860                 .subvendor      = PCI_ANY_ID,
 861                 .subdevice      = PCI_ANY_ID,
 862                 .driver_data    = (kernel_ulong_t)&sdhci_ene_714,
 863         },
 864
 865         {
 866                 .vendor         = PCI_VENDOR_ID_MARVELL,
 867                 .device         = PCI_DEVICE_ID_MARVELL_88ALP01_SD,
 868                 .subvendor      = PCI_ANY_ID,
 869                 .subdevice      = PCI_ANY_ID,
 870                 .driver_data    = (kernel_ulong_t)&sdhci_cafe,
 871         },
 872
 873         {
 874                 .vendor         = PCI_VENDOR_ID_JMICRON,
 875                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_SD,
 876                 .subvendor      = PCI_ANY_ID,
 877                 .subdevice      = PCI_ANY_ID,
 878                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 879         },
 880
 881         {
 882                 .vendor         = PCI_VENDOR_ID_JMICRON,
 883                 .device         = PCI_DEVICE_ID_JMICRON_JMB38X_MMC,
 884                 .subvendor      = PCI_ANY_ID,
 885                 .subdevice      = PCI_ANY_ID,
 886                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 887         },
 888
 889         {
 890                 .vendor         = PCI_VENDOR_ID_JMICRON,
 891                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_SD,
 892                 .subvendor      = PCI_ANY_ID,
 893                 .subdevice      = PCI_ANY_ID,
 894                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 895         },
 896
 897         {
 898                 .vendor         = PCI_VENDOR_ID_JMICRON,
 899                 .device         = PCI_DEVICE_ID_JMICRON_JMB388_ESD,
 900                 .subvendor      = PCI_ANY_ID,
 901                 .subdevice      = PCI_ANY_ID,
 902                 .driver_data    = (kernel_ulong_t)&sdhci_jmicron,
 903         },
 904
 905         {
 906                 .vendor         = PCI_VENDOR_ID_SYSKONNECT,
 907                 .device         = 0x8000,
 908                 .subvendor      = PCI_ANY_ID,
 909                 .subdevice      = PCI_ANY_ID,
 910                 .driver_data    = (kernel_ulong_t)&sdhci_syskt,
 911         },
 912
 913         {
 914                 .vendor         = PCI_VENDOR_ID_VIA,
 915                 .device         = 0x95d0,
 916                 .subvendor      = PCI_ANY_ID,
 917                 .subdevice      = PCI_ANY_ID,
 918                 .driver_data    = (kernel_ulong_t)&sdhci_via,
 919         },
 920
 921         {
 922                 .vendor         = PCI_VENDOR_ID_REALTEK,
 923                 .device         = 0x5250,
 924                 .subvendor      = PCI_ANY_ID,
 925                 .subdevice      = PCI_ANY_ID,
 926                 .driver_data    = (kernel_ulong_t)&sdhci_rtsx,
 927         },
 928
 929         {
 930                 .vendor         = PCI_VENDOR_ID_INTEL,
 931                 .device         = PCI_DEVICE_ID_INTEL_QRK_SD,
 932                 .subvendor      = PCI_ANY_ID,
 933                 .subdevice      = PCI_ANY_ID,
 934                 .driver_data    = (kernel_ulong_t)&sdhci_intel_qrk,
 935         },
 936
 937         {
 938                 .vendor         = PCI_VENDOR_ID_INTEL,
 939                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD0,
 940                 .subvendor      = PCI_ANY_ID,
 941                 .subdevice      = PCI_ANY_ID,
 942                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc0,
 943         },
 944
 945         {
 946                 .vendor         = PCI_VENDOR_ID_INTEL,
 947                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD1,
 948                 .subvendor      = PCI_ANY_ID,
 949                 .subdevice      = PCI_ANY_ID,
 950                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
 951         },
 952
 953         {
 954                 .vendor         = PCI_VENDOR_ID_INTEL,
 955                 .device         = PCI_DEVICE_ID_INTEL_MRST_SD2,
 956                 .subvendor      = PCI_ANY_ID,
 957                 .subdevice      = PCI_ANY_ID,
 958                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrst_hc1_hc2,
 959         },
 960
 961         {
 962                 .vendor         = PCI_VENDOR_ID_INTEL,
 963                 .device         = PCI_DEVICE_ID_INTEL_MFD_SD,
 964                 .subvendor      = PCI_ANY_ID,
 965                 .subdevice      = PCI_ANY_ID,
 966                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
 967         },
 968
 969         {
 970                 .vendor         = PCI_VENDOR_ID_INTEL,
 971                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO1,
 972                 .subvendor      = PCI_ANY_ID,
 973                 .subdevice      = PCI_ANY_ID,
 974                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
 975         },
 976
 977         {
 978                 .vendor         = PCI_VENDOR_ID_INTEL,
 979                 .device         = PCI_DEVICE_ID_INTEL_MFD_SDIO2,
 980                 .subvendor      = PCI_ANY_ID,
 981                 .subdevice      = PCI_ANY_ID,
 982                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
 983         },
 984
 985         {
 986                 .vendor         = PCI_VENDOR_ID_INTEL,
 987                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC0,
 988                 .subvendor      = PCI_ANY_ID,
 989                 .subdevice      = PCI_ANY_ID,
 990                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
 991         },
 992
 993         {
 994                 .vendor         = PCI_VENDOR_ID_INTEL,
 995                 .device         = PCI_DEVICE_ID_INTEL_MFD_EMMC1,
 996                 .subvendor      = PCI_ANY_ID,
 997                 .subdevice      = PCI_ANY_ID,
 998                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
 999         },
1000
1001         {
1002                 .vendor         = PCI_VENDOR_ID_INTEL,
1003                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO0,
1004                 .subvendor      = PCI_ANY_ID,
1005                 .subdevice      = PCI_ANY_ID,
1006                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1007         },
1008
1009         {
1010                 .vendor         = PCI_VENDOR_ID_INTEL,
1011                 .device         = PCI_DEVICE_ID_INTEL_PCH_SDIO1,
1012                 .subvendor      = PCI_ANY_ID,
1013                 .subdevice      = PCI_ANY_ID,
1014                 .driver_data    = (kernel_ulong_t)&sdhci_intel_pch_sdio,
1015         },
1016
1017         {
1018                 .vendor         = PCI_VENDOR_ID_INTEL,
1019                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC,
1020                 .subvendor      = PCI_ANY_ID,
1021                 .subdevice      = PCI_ANY_ID,
1022                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1023         },
1024
1025         {
1026                 .vendor         = PCI_VENDOR_ID_INTEL,
1027                 .device         = PCI_DEVICE_ID_INTEL_BYT_SDIO,
1028                 .subvendor      = PCI_ANY_ID,
1029                 .subdevice      = PCI_ANY_ID,
1030                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1031         },
1032
1033         {
1034                 .vendor         = PCI_VENDOR_ID_INTEL,
1035                 .device         = PCI_DEVICE_ID_INTEL_BYT_SD,
1036                 .subvendor      = PCI_ANY_ID,
1037                 .subdevice      = PCI_ANY_ID,
1038                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1039         },
1040
1041         {
1042                 .vendor         = PCI_VENDOR_ID_INTEL,
1043                 .device         = PCI_DEVICE_ID_INTEL_BYT_EMMC2,
1044                 .subvendor      = PCI_ANY_ID,
1045                 .subdevice      = PCI_ANY_ID,
1046                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1047         },
1048
1049         {
1050                 .vendor         = PCI_VENDOR_ID_INTEL,
1051                 .device         = PCI_DEVICE_ID_INTEL_BSW_EMMC,
1052                 .subvendor      = PCI_ANY_ID,
1053                 .subdevice      = PCI_ANY_ID,
1054                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1055         },
1056
1057         {
1058                 .vendor         = PCI_VENDOR_ID_INTEL,
1059                 .device         = PCI_DEVICE_ID_INTEL_BSW_SDIO,
1060                 .subvendor      = PCI_ANY_ID,
1061                 .subdevice      = PCI_ANY_ID,
1062                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1063         },
1064
1065         {
1066                 .vendor         = PCI_VENDOR_ID_INTEL,
1067                 .device         = PCI_DEVICE_ID_INTEL_BSW_SD,
1068                 .subvendor      = PCI_ANY_ID,
1069                 .subdevice      = PCI_ANY_ID,
1070                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1071         },
1072
1073         {
1074                 .vendor         = PCI_VENDOR_ID_INTEL,
1075                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO0,
1076                 .subvendor      = PCI_ANY_ID,
1077                 .subdevice      = PCI_ANY_ID,
1078                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sd,
1079         },
1080
1081         {
1082                 .vendor         = PCI_VENDOR_ID_INTEL,
1083                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO1,
1084                 .subvendor      = PCI_ANY_ID,
1085                 .subdevice      = PCI_ANY_ID,
1086                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1087         },
1088
1089         {
1090                 .vendor         = PCI_VENDOR_ID_INTEL,
1091                 .device         = PCI_DEVICE_ID_INTEL_CLV_SDIO2,
1092                 .subvendor      = PCI_ANY_ID,
1093                 .subdevice      = PCI_ANY_ID,
1094                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_sdio,
1095         },
1096
1097         {
1098                 .vendor         = PCI_VENDOR_ID_INTEL,
1099                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC0,
1100                 .subvendor      = PCI_ANY_ID,
1101                 .subdevice      = PCI_ANY_ID,
1102                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1103         },
1104
1105         {
1106                 .vendor         = PCI_VENDOR_ID_INTEL,
1107                 .device         = PCI_DEVICE_ID_INTEL_CLV_EMMC1,
1108                 .subvendor      = PCI_ANY_ID,
1109                 .subdevice      = PCI_ANY_ID,
1110                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mfd_emmc,
1111         },
1112
1113         {
1114                 .vendor         = PCI_VENDOR_ID_INTEL,
1115                 .device         = PCI_DEVICE_ID_INTEL_MRFLD_MMC,
1116                 .subvendor      = PCI_ANY_ID,
1117                 .subdevice      = PCI_ANY_ID,
1118                 .driver_data    = (kernel_ulong_t)&sdhci_intel_mrfld_mmc,
1119         },
1120
1121         {
1122                 .vendor         = PCI_VENDOR_ID_INTEL,
1123                 .device         = PCI_DEVICE_ID_INTEL_SPT_EMMC,
1124                 .subvendor      = PCI_ANY_ID,
1125                 .subdevice      = PCI_ANY_ID,
1126                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1127         },
1128
1129         {
1130                 .vendor         = PCI_VENDOR_ID_INTEL,
1131                 .device         = PCI_DEVICE_ID_INTEL_SPT_SDIO,
1132                 .subvendor      = PCI_ANY_ID,
1133                 .subdevice      = PCI_ANY_ID,
1134                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1135         },
1136
1137         {
1138                 .vendor         = PCI_VENDOR_ID_INTEL,
1139                 .device         = PCI_DEVICE_ID_INTEL_SPT_SD,
1140                 .subvendor      = PCI_ANY_ID,
1141                 .subdevice      = PCI_ANY_ID,
1142                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1143         },
1144
1145         {
1146                 .vendor         = PCI_VENDOR_ID_INTEL,
1147                 .device         = PCI_DEVICE_ID_INTEL_DNV_EMMC,
1148                 .subvendor      = PCI_ANY_ID,
1149                 .subdevice      = PCI_ANY_ID,
1150                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1151         },
1152
1153         {
1154                 .vendor         = PCI_VENDOR_ID_INTEL,
1155                 .device         = PCI_DEVICE_ID_INTEL_BXT_EMMC,
1156                 .subvendor      = PCI_ANY_ID,
1157                 .subdevice      = PCI_ANY_ID,
1158                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1159         },
1160
1161         {
1162                 .vendor         = PCI_VENDOR_ID_INTEL,
1163                 .device         = PCI_DEVICE_ID_INTEL_BXT_SDIO,
1164                 .subvendor      = PCI_ANY_ID,
1165                 .subdevice      = PCI_ANY_ID,
1166                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1167         },
1168
1169         {
1170                 .vendor         = PCI_VENDOR_ID_INTEL,
1171                 .device         = PCI_DEVICE_ID_INTEL_BXT_SD,
1172                 .subvendor      = PCI_ANY_ID,
1173                 .subdevice      = PCI_ANY_ID,
1174                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1175         },
1176
1177         {
1178                 .vendor         = PCI_VENDOR_ID_INTEL,
1179                 .device         = PCI_DEVICE_ID_INTEL_BXTM_EMMC,
1180                 .subvendor      = PCI_ANY_ID,
1181                 .subdevice      = PCI_ANY_ID,
1182                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1183         },
1184
1185         {
1186                 .vendor         = PCI_VENDOR_ID_INTEL,
1187                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SDIO,
1188                 .subvendor      = PCI_ANY_ID,
1189                 .subdevice      = PCI_ANY_ID,
1190                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1191         },
1192
1193         {
1194                 .vendor         = PCI_VENDOR_ID_INTEL,
1195                 .device         = PCI_DEVICE_ID_INTEL_BXTM_SD,
1196                 .subvendor      = PCI_ANY_ID,
1197                 .subdevice      = PCI_ANY_ID,
1198                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1199         },
1200
1201         {
1202                 .vendor         = PCI_VENDOR_ID_INTEL,
1203                 .device         = PCI_DEVICE_ID_INTEL_APL_EMMC,
1204                 .subvendor      = PCI_ANY_ID,
1205                 .subdevice      = PCI_ANY_ID,
1206                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_emmc,
1207         },
1208
1209         {
1210                 .vendor         = PCI_VENDOR_ID_INTEL,
1211                 .device         = PCI_DEVICE_ID_INTEL_APL_SDIO,
1212                 .subvendor      = PCI_ANY_ID,
1213                 .subdevice      = PCI_ANY_ID,
1214                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sdio,
1215         },
1216
1217         {
1218                 .vendor         = PCI_VENDOR_ID_INTEL,
1219                 .device         = PCI_DEVICE_ID_INTEL_APL_SD,
1220                 .subvendor      = PCI_ANY_ID,
1221                 .subdevice      = PCI_ANY_ID,
1222                 .driver_data    = (kernel_ulong_t)&sdhci_intel_byt_sd,
1223         },
1224
1225         {
1226                 .vendor         = PCI_VENDOR_ID_O2,
1227                 .device         = PCI_DEVICE_ID_O2_8120,
1228                 .subvendor      = PCI_ANY_ID,
1229                 .subdevice      = PCI_ANY_ID,
1230                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1231         },
1232
1233         {
1234                 .vendor         = PCI_VENDOR_ID_O2,
1235                 .device         = PCI_DEVICE_ID_O2_8220,
1236                 .subvendor      = PCI_ANY_ID,
1237                 .subdevice      = PCI_ANY_ID,
1238                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1239         },
1240
1241         {
1242                 .vendor         = PCI_VENDOR_ID_O2,
1243                 .device         = PCI_DEVICE_ID_O2_8221,
1244                 .subvendor      = PCI_ANY_ID,
1245                 .subdevice      = PCI_ANY_ID,
1246                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1247         },
1248
1249         {
1250                 .vendor         = PCI_VENDOR_ID_O2,
1251                 .device         = PCI_DEVICE_ID_O2_8320,
1252                 .subvendor      = PCI_ANY_ID,
1253                 .subdevice      = PCI_ANY_ID,
1254                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1255         },
1256
1257         {
1258                 .vendor         = PCI_VENDOR_ID_O2,
1259                 .device         = PCI_DEVICE_ID_O2_8321,
1260                 .subvendor      = PCI_ANY_ID,
1261                 .subdevice      = PCI_ANY_ID,
1262                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1263         },
1264
1265         {
1266                 .vendor         = PCI_VENDOR_ID_O2,
1267                 .device         = PCI_DEVICE_ID_O2_FUJIN2,
1268                 .subvendor      = PCI_ANY_ID,
1269                 .subdevice      = PCI_ANY_ID,
1270                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1271         },
1272
1273         {
1274                 .vendor         = PCI_VENDOR_ID_O2,
1275                 .device         = PCI_DEVICE_ID_O2_SDS0,
1276                 .subvendor      = PCI_ANY_ID,
1277                 .subdevice      = PCI_ANY_ID,
1278                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1279         },
1280
1281         {
1282                 .vendor         = PCI_VENDOR_ID_O2,
1283                 .device         = PCI_DEVICE_ID_O2_SDS1,
1284                 .subvendor      = PCI_ANY_ID,
1285                 .subdevice      = PCI_ANY_ID,
1286                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1287         },
1288
1289         {
1290                 .vendor         = PCI_VENDOR_ID_O2,
1291                 .device         = PCI_DEVICE_ID_O2_SEABIRD0,
1292                 .subvendor      = PCI_ANY_ID,
1293                 .subdevice      = PCI_ANY_ID,
1294                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1295         },
1296
1297         {
1298                 .vendor         = PCI_VENDOR_ID_O2,
1299                 .device         = PCI_DEVICE_ID_O2_SEABIRD1,
1300                 .subvendor      = PCI_ANY_ID,
1301                 .subdevice      = PCI_ANY_ID,
1302                 .driver_data    = (kernel_ulong_t)&sdhci_o2,
1303         },
1304         {
1305                 .vendor         = PCI_VENDOR_ID_AMD,
1306                 .device         = PCI_ANY_ID,
1307                 .class          = PCI_CLASS_SYSTEM_SDHCI << 8,
1308                 .class_mask     = 0xFFFF00,
1309                 .subvendor      = PCI_ANY_ID,
1310                 .subdevice      = PCI_ANY_ID,
1311                 .driver_data    = (kernel_ulong_t)&sdhci_amd,
1312         },
1313         {       /* Generic SD host controller */
1314                 PCI_DEVICE_CLASS((PCI_CLASS_SYSTEM_SDHCI << 8), 0xFFFF00)
1315         },
1316
1317         { /* end: all zeroes */ },
1318 };
1319
1320 MODULE_DEVICE_TABLE(pci, pci_ids);
1321
1322 /*****************************************************************************\
1323  *                                                                           *
1324  * SDHCI core callbacks                                                      *
1325  *                                                                           *
1326 \*****************************************************************************/
1327
1328 static int sdhci_pci_enable_dma(struct sdhci_host *host)
1329 {
1330         struct sdhci_pci_slot *slot;
1331         struct pci_dev *pdev;
1332
1333         slot = sdhci_priv(host);
1334         pdev = slot->chip->pdev;
1335
1336         if (((pdev->class & 0xFFFF00) == (PCI_CLASS_SYSTEM_SDHCI << 8)) &&
1337                 ((pdev->class & 0x0000FF) != PCI_SDHCI_IFDMA) &&
1338                 (host->flags & SDHCI_USE_SDMA)) {
1339                 dev_warn(&pdev->dev, "Will use DMA mode even though HW "
1340                         "doesn't fully claim to support it.\n");
1341         }
1342
1343         pci_set_master(pdev);
1344
1345         return 0;
1346 }
1347
1348 static void sdhci_pci_set_bus_width(struct sdhci_host *host, int width)
1349 {
1350         u8 ctrl;
1351
1352         ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
1353
1354         switch (width) {
1355         case MMC_BUS_WIDTH_8:
1356                 ctrl |= SDHCI_CTRL_8BITBUS;
1357                 ctrl &= ~SDHCI_CTRL_4BITBUS;
1358                 break;
1359         case MMC_BUS_WIDTH_4:
1360                 ctrl |= SDHCI_CTRL_4BITBUS;
1361                 ctrl &= ~SDHCI_CTRL_8BITBUS;
1362                 break;
1363         default:
1364                 ctrl &= ~(SDHCI_CTRL_8BITBUS | SDHCI_CTRL_4BITBUS);
1365                 break;
1366         }
1367
1368         sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
1369 }
1370
1371 static void sdhci_pci_gpio_hw_reset(struct sdhci_host *host)
1372 {
1373         struct sdhci_pci_slot *slot = sdhci_priv(host);
1374         int rst_n_gpio = slot->rst_n_gpio;
1375
1376         if (!gpio_is_valid(rst_n_gpio))
1377                 return;
1378         gpio_set_value_cansleep(rst_n_gpio, 0);
1379         /* For eMMC, minimum is 1us but give it 10us for good measure */
1380         udelay(10);
1381         gpio_set_value_cansleep(rst_n_gpio, 1);
1382         /* For eMMC, minimum is 200us but give it 300us for good measure */
1383         usleep_range(300, 1000);
1384 }
1385
1386 static void sdhci_pci_hw_reset(struct sdhci_host *host)
1387 {
1388         struct sdhci_pci_slot *slot = sdhci_priv(host);
1389
1390         if (slot->hw_reset)
1391                 slot->hw_reset(host);
1392 }
1393
1394 static int sdhci_pci_select_drive_strength(struct sdhci_host *host,
1395                                            struct mmc_card *card,
1396                                            unsigned int max_dtr, int host_drv,
1397                                            int card_drv, int *drv_type)
1398 {
1399         struct sdhci_pci_slot *slot = sdhci_priv(host);
1400
1401         if (!slot->select_drive_strength)
1402                 return 0;
1403
1404         return slot->select_drive_strength(host, card, max_dtr, host_drv,
1405                                            card_drv, drv_type);
1406 }
1407
1408 static const struct sdhci_ops sdhci_pci_ops = {
1409         .set_clock      = sdhci_set_clock,
1410         .enable_dma     = sdhci_pci_enable_dma,
1411         .set_bus_width  = sdhci_pci_set_bus_width,
1412         .reset          = sdhci_reset,
1413         .set_uhs_signaling = sdhci_set_uhs_signaling,
1414         .hw_reset               = sdhci_pci_hw_reset,
1415         .select_drive_strength  = sdhci_pci_select_drive_strength,
1416 };
1417
1418 /*****************************************************************************\
1419  *                                                                           *
1420  * Suspend/resume                                                            *
1421  *                                                                           *
1422 \*****************************************************************************/
1423
1424 #ifdef CONFIG_PM_SLEEP
1425 static int sdhci_pci_suspend(struct device *dev)
1426 {
1427         struct pci_dev *pdev = to_pci_dev(dev);
1428         struct sdhci_pci_chip *chip;
1429         struct sdhci_pci_slot *slot;
1430         mmc_pm_flag_t slot_pm_flags;
1431         mmc_pm_flag_t pm_flags = 0;
1432         int i, ret;
1433
1434         chip = pci_get_drvdata(pdev);
1435         if (!chip)
1436                 return 0;
1437
1438         for (i = 0; i < chip->num_slots; i++) {
1439                 slot = chip->slots[i];
1440                 if (!slot)
1441                         continue;
1442
1443                 ret = sdhci_suspend_host(slot->host);
1444
1445                 if (ret)
1446                         goto err_pci_suspend;
1447
1448                 slot_pm_flags = slot->host->mmc->pm_flags;
1449                 if (slot_pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1450                         sdhci_enable_irq_wakeups(slot->host);
1451
1452                 pm_flags |= slot_pm_flags;
1453         }
1454
1455         if (chip->fixes && chip->fixes->suspend) {
1456                 ret = chip->fixes->suspend(chip);
1457                 if (ret)
1458                         goto err_pci_suspend;
1459         }
1460
1461         if (pm_flags & MMC_PM_KEEP_POWER) {
1462                 if (pm_flags & MMC_PM_WAKE_SDIO_IRQ)
1463                         device_init_wakeup(dev, true);
1464                 else
1465                         device_init_wakeup(dev, false);
1466         } else
1467                 device_init_wakeup(dev, false);
1468
1469         return 0;
1470
1471 err_pci_suspend:
1472         while (--i >= 0)
1473                 sdhci_resume_host(chip->slots[i]->host);
1474         return ret;
1475 }
1476
1477 static int sdhci_pci_resume(struct device *dev)
1478 {
1479         struct pci_dev *pdev = to_pci_dev(dev);
1480         struct sdhci_pci_chip *chip;
1481         struct sdhci_pci_slot *slot;
1482         int i, ret;
1483
1484         chip = pci_get_drvdata(pdev);
1485         if (!chip)
1486                 return 0;
1487
1488         if (chip->fixes && chip->fixes->resume) {
1489                 ret = chip->fixes->resume(chip);
1490                 if (ret)
1491                         return ret;
1492         }
1493
1494         for (i = 0; i < chip->num_slots; i++) {
1495                 slot = chip->slots[i];
1496                 if (!slot)
1497                         continue;
1498
1499                 ret = sdhci_resume_host(slot->host);
1500                 if (ret)
1501                         return ret;
1502         }
1503
1504         return 0;
1505 }
1506 #endif
1507
1508 #ifdef CONFIG_PM
1509 static int sdhci_pci_runtime_suspend(struct device *dev)
1510 {
1511         struct pci_dev *pdev = to_pci_dev(dev);
1512         struct sdhci_pci_chip *chip;
1513         struct sdhci_pci_slot *slot;
1514         int i, ret;
1515
1516         chip = pci_get_drvdata(pdev);
1517         if (!chip)
1518                 return 0;
1519
1520         for (i = 0; i < chip->num_slots; i++) {
1521                 slot = chip->slots[i];
1522                 if (!slot)
1523                         continue;
1524
1525                 ret = sdhci_runtime_suspend_host(slot->host);
1526
1527                 if (ret)
1528                         goto err_pci_runtime_suspend;
1529         }
1530
1531         if (chip->fixes && chip->fixes->suspend) {
1532                 ret = chip->fixes->suspend(chip);
1533                 if (ret)
1534                         goto err_pci_runtime_suspend;
1535         }
1536
1537         return 0;
1538
1539 err_pci_runtime_suspend:
1540         while (--i >= 0)
1541                 sdhci_runtime_resume_host(chip->slots[i]->host);
1542         return ret;
1543 }
1544
1545 static int sdhci_pci_runtime_resume(struct device *dev)
1546 {
1547         struct pci_dev *pdev = to_pci_dev(dev);
1548         struct sdhci_pci_chip *chip;
1549         struct sdhci_pci_slot *slot;
1550         int i, ret;
1551
1552         chip = pci_get_drvdata(pdev);
1553         if (!chip)
1554                 return 0;
1555
1556         if (chip->fixes && chip->fixes->resume) {
1557                 ret = chip->fixes->resume(chip);
1558                 if (ret)
1559                         return ret;
1560         }
1561
1562         for (i = 0; i < chip->num_slots; i++) {
1563                 slot = chip->slots[i];
1564                 if (!slot)
1565                         continue;
1566
1567                 ret = sdhci_runtime_resume_host(slot->host);
1568                 if (ret)
1569                         return ret;
1570         }
1571
1572         return 0;
1573 }
1574 #endif
1575
1576 static const struct dev_pm_ops sdhci_pci_pm_ops = {
1577         SET_SYSTEM_SLEEP_PM_OPS(sdhci_pci_suspend, sdhci_pci_resume)
1578         SET_RUNTIME_PM_OPS(sdhci_pci_runtime_suspend,
1579                         sdhci_pci_runtime_resume, NULL)
1580 };
1581
1582 /*****************************************************************************\
1583  *                                                                           *
1584  * Device probing/removal                                                    *
1585  *                                                                           *
1586 \*****************************************************************************/
1587
1588 static struct sdhci_pci_slot *sdhci_pci_probe_slot(
1589         struct pci_dev *pdev, struct sdhci_pci_chip *chip, int first_bar,
1590         int slotno)
1591 {
1592         struct sdhci_pci_slot *slot;
1593         struct sdhci_host *host;
1594         int ret, bar = first_bar + slotno;
1595
1596         if (!(pci_resource_flags(pdev, bar) & IORESOURCE_MEM)) {
1597                 dev_err(&pdev->dev, "BAR %d is not iomem. Aborting.\n", bar);
1598                 return ERR_PTR(-ENODEV);
1599         }
1600
1601         if (pci_resource_len(pdev, bar) < 0x100) {
1602                 dev_err(&pdev->dev, "Invalid iomem size. You may "
1603                         "experience problems.\n");
1604         }
1605
1606         if ((pdev->class & 0x0000FF) == PCI_SDHCI_IFVENDOR) {
1607                 dev_err(&pdev->dev, "Vendor specific interface. Aborting.\n");
1608                 return ERR_PTR(-ENODEV);
1609         }
1610
1611         if ((pdev->class & 0x0000FF) > PCI_SDHCI_IFVENDOR) {
1612                 dev_err(&pdev->dev, "Unknown interface. Aborting.\n");
1613                 return ERR_PTR(-ENODEV);
1614         }
1615
1616         host = sdhci_alloc_host(&pdev->dev, sizeof(struct sdhci_pci_slot));
1617         if (IS_ERR(host)) {
1618                 dev_err(&pdev->dev, "cannot allocate host\n");
1619                 return ERR_CAST(host);
1620         }
1621
1622         slot = sdhci_priv(host);
1623
1624         slot->chip = chip;
1625         slot->host = host;
1626         slot->rst_n_gpio = -EINVAL;
1627         slot->cd_gpio = -EINVAL;
1628         slot->cd_idx = -1;
1629
1630         /* Retrieve platform data if there is any */
1631         if (*sdhci_pci_get_data)
1632                 slot->data = sdhci_pci_get_data(pdev, slotno);
1633
1634         if (slot->data) {
1635                 if (slot->data->setup) {
1636                         ret = slot->data->setup(slot->data);
1637                         if (ret) {
1638                                 dev_err(&pdev->dev, "platform setup failed\n");
1639                                 goto free;
1640                         }
1641                 }
1642                 slot->rst_n_gpio = slot->data->rst_n_gpio;
1643                 slot->cd_gpio = slot->data->cd_gpio;
1644         }
1645
1646         host->hw_name = "PCI";
1647         host->ops = &sdhci_pci_ops;
1648         host->quirks = chip->quirks;
1649         host->quirks2 = chip->quirks2;
1650
1651         host->irq = pdev->irq;
1652
1653         ret = pcim_iomap_regions(pdev, BIT(bar), mmc_hostname(host->mmc));
1654         if (ret) {
1655                 dev_err(&pdev->dev, "cannot request region\n");
1656                 goto cleanup;
1657         }
1658
1659         host->ioaddr = pcim_iomap_table(pdev)[bar];
1660
1661         if (chip->fixes && chip->fixes->probe_slot) {
1662                 ret = chip->fixes->probe_slot(slot);
1663                 if (ret)
1664                         goto cleanup;
1665         }
1666
1667         if (gpio_is_valid(slot->rst_n_gpio)) {
1668                 if (!devm_gpio_request(&pdev->dev, slot->rst_n_gpio, "eMMC_reset")) {
1669                         gpio_direction_output(slot->rst_n_gpio, 1);
1670                         slot->host->mmc->caps |= MMC_CAP_HW_RESET;
1671                         slot->hw_reset = sdhci_pci_gpio_hw_reset;
1672                 } else {
1673                         dev_warn(&pdev->dev, "failed to request rst_n_gpio\n");
1674                         slot->rst_n_gpio = -EINVAL;
1675                 }
1676         }
1677
1678         host->mmc->pm_caps = MMC_PM_KEEP_POWER | MMC_PM_WAKE_SDIO_IRQ;
1679         host->mmc->slotno = slotno;
1680         host->mmc->caps2 |= MMC_CAP2_NO_PRESCAN_POWERUP;
1681
1682         if (slot->cd_idx >= 0 &&
1683             mmc_gpiod_request_cd(host->mmc, slot->cd_con_id, slot->cd_idx,
1684                                  slot->cd_override_level, 0, NULL)) {
1685                 dev_warn(&pdev->dev, "failed to setup card detect gpio\n");
1686                 slot->cd_idx = -1;
1687         }
1688
1689         ret = sdhci_add_host(host);
1690         if (ret)
1691                 goto remove;
1692
1693         sdhci_pci_add_own_cd(slot);
1694
1695         /*
1696          * Check if the chip needs a separate GPIO for card detect to wake up
1697          * from runtime suspend.  If it is not there, don't allow runtime PM.
1698          * Note sdhci_pci_add_own_cd() sets slot->cd_gpio to -EINVAL on failure.
1699          */
1700         if (chip->fixes && chip->fixes->own_cd_for_runtime_pm &&
1701             !gpio_is_valid(slot->cd_gpio) && slot->cd_idx < 0)
1702                 chip->allow_runtime_pm = false;
1703
1704         return slot;
1705
1706 remove:
1707         if (chip->fixes && chip->fixes->remove_slot)
1708                 chip->fixes->remove_slot(slot, 0);
1709
1710 cleanup:
1711         if (slot->data && slot->data->cleanup)
1712                 slot->data->cleanup(slot->data);
1713
1714 free:
1715         sdhci_free_host(host);
1716
1717         return ERR_PTR(ret);
1718 }
1719
1720 static void sdhci_pci_remove_slot(struct sdhci_pci_slot *slot)
1721 {
1722         int dead;
1723         u32 scratch;
1724
1725         sdhci_pci_remove_own_cd(slot);
1726
1727         dead = 0;
1728         scratch = readl(slot->host->ioaddr + SDHCI_INT_STATUS);
1729         if (scratch == (u32)-1)
1730                 dead = 1;
1731
1732         sdhci_remove_host(slot->host, dead);
1733
1734         if (slot->chip->fixes && slot->chip->fixes->remove_slot)
1735                 slot->chip->fixes->remove_slot(slot, dead);
1736
1737         if (slot->data && slot->data->cleanup)
1738                 slot->data->cleanup(slot->data);
1739
1740         sdhci_free_host(slot->host);
1741 }
1742
1743 static void sdhci_pci_runtime_pm_allow(struct device *dev)
1744 {
1745         pm_suspend_ignore_children(dev, 1);
1746         pm_runtime_set_autosuspend_delay(dev, 50);
1747         pm_runtime_use_autosuspend(dev);
1748         pm_runtime_allow(dev);
1749         /* Stay active until mmc core scans for a card */
1750         pm_runtime_put_noidle(dev);
1751 }
1752
1753 static void sdhci_pci_runtime_pm_forbid(struct device *dev)
1754 {
1755         pm_runtime_forbid(dev);
1756         pm_runtime_get_noresume(dev);
1757 }
1758
1759 static int sdhci_pci_probe(struct pci_dev *pdev,
1760                                      const struct pci_device_id *ent)
1761 {
1762         struct sdhci_pci_chip *chip;
1763         struct sdhci_pci_slot *slot;
1764
1765         u8 slots, first_bar;
1766         int ret, i;
1767
1768         BUG_ON(pdev == NULL);
1769         BUG_ON(ent == NULL);
1770
1771         dev_info(&pdev->dev, "SDHCI controller found [%04x:%04x] (rev %x)\n",
1772                  (int)pdev->vendor, (int)pdev->device, (int)pdev->revision);
1773
1774         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &slots);
1775         if (ret)
1776                 return ret;
1777
1778         slots = PCI_SLOT_INFO_SLOTS(slots) + 1;
1779         dev_dbg(&pdev->dev, "found %d slot(s)\n", slots);
1780         if (slots == 0)
1781                 return -ENODEV;
1782
1783         BUG_ON(slots > MAX_SLOTS);
1784
1785         ret = pci_read_config_byte(pdev, PCI_SLOT_INFO, &first_bar);
1786         if (ret)
1787                 return ret;
1788
1789         first_bar &= PCI_SLOT_INFO_FIRST_BAR_MASK;
1790
1791         if (first_bar > 5) {
1792                 dev_err(&pdev->dev, "Invalid first BAR. Aborting.\n");
1793                 return -ENODEV;
1794         }
1795
1796         ret = pcim_enable_device(pdev);
1797         if (ret)
1798                 return ret;
1799
1800         chip = devm_kzalloc(&pdev->dev, sizeof(*chip), GFP_KERNEL);
1801         if (!chip)
1802                 return -ENOMEM;
1803
1804         chip->pdev = pdev;
1805         chip->fixes = (const struct sdhci_pci_fixes *)ent->driver_data;
1806         if (chip->fixes) {
1807                 chip->quirks = chip->fixes->quirks;
1808                 chip->quirks2 = chip->fixes->quirks2;
1809                 chip->allow_runtime_pm = chip->fixes->allow_runtime_pm;
1810         }
1811         chip->num_slots = slots;
1812
1813         pci_set_drvdata(pdev, chip);
1814
1815         if (chip->fixes && chip->fixes->probe) {
1816                 ret = chip->fixes->probe(chip);
1817                 if (ret)
1818                         return ret;
1819         }
1820
1821         slots = chip->num_slots;        /* Quirk may have changed this */
1822
1823         for (i = 0; i < slots; i++) {
1824                 slot = sdhci_pci_probe_slot(pdev, chip, first_bar, i);
1825                 if (IS_ERR(slot)) {
1826                         for (i--; i >= 0; i--)
1827                                 sdhci_pci_remove_slot(chip->slots[i]);
1828                         return PTR_ERR(slot);
1829                 }
1830
1831                 chip->slots[i] = slot;
1832         }
1833
1834         if (chip->allow_runtime_pm)
1835                 sdhci_pci_runtime_pm_allow(&pdev->dev);
1836
1837         return 0;
1838 }
1839
1840 static void sdhci_pci_remove(struct pci_dev *pdev)
1841 {
1842         int i;
1843         struct sdhci_pci_chip *chip = pci_get_drvdata(pdev);
1844
1845         if (chip->allow_runtime_pm)
1846                 sdhci_pci_runtime_pm_forbid(&pdev->dev);
1847
1848         for (i = 0; i < chip->num_slots; i++)
1849                 sdhci_pci_remove_slot(chip->slots[i]);
1850 }
1851
1852 static struct pci_driver sdhci_driver = {
1853         .name =         "sdhci-pci",
1854         .id_table =     pci_ids,
1855         .probe =        sdhci_pci_probe,
1856         .remove =       sdhci_pci_remove,
1857         .driver =       {
1858                 .pm =   &sdhci_pci_pm_ops
1859         },
1860 };
1861
1862 module_pci_driver(sdhci_driver);
1863
1864 MODULE_AUTHOR("Pierre Ossman <pierre@ossman.eu>");
1865 MODULE_DESCRIPTION("Secure Digital Host Controller Interface PCI driver");
1866 MODULE_LICENSE("GPL");