Merge branch 'i2c/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
[linux-2.6-block.git] / drivers / media / i2c / adv748x / adv748x-core.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Driver for Analog Devices ADV748X HDMI receiver with AFE
4  *
5  * Copyright (C) 2017 Renesas Electronics Corp.
6  *
7  * Authors:
8  *      Koji Matsuoka <koji.matsuoka.xm@renesas.com>
9  *      Niklas Söderlund <niklas.soderlund@ragnatech.se>
10  *      Kieran Bingham <kieran.bingham@ideasonboard.com>
11  */
12
13 #include <linux/delay.h>
14 #include <linux/errno.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/mutex.h>
18 #include <linux/of_graph.h>
19 #include <linux/regmap.h>
20 #include <linux/slab.h>
21 #include <linux/v4l2-dv-timings.h>
22
23 #include <media/v4l2-ctrls.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-dv-timings.h>
26 #include <media/v4l2-fwnode.h>
27 #include <media/v4l2-ioctl.h>
28
29 #include "adv748x.h"
30
31 /* -----------------------------------------------------------------------------
32  * Register manipulation
33  */
34
35 #define ADV748X_REGMAP_CONF(n) \
36 { \
37         .name = n, \
38         .reg_bits = 8, \
39         .val_bits = 8, \
40         .max_register = 0xff, \
41         .cache_type = REGCACHE_NONE, \
42 }
43
44 static const struct regmap_config adv748x_regmap_cnf[] = {
45         ADV748X_REGMAP_CONF("io"),
46         ADV748X_REGMAP_CONF("dpll"),
47         ADV748X_REGMAP_CONF("cp"),
48         ADV748X_REGMAP_CONF("hdmi"),
49         ADV748X_REGMAP_CONF("edid"),
50         ADV748X_REGMAP_CONF("repeater"),
51         ADV748X_REGMAP_CONF("infoframe"),
52         ADV748X_REGMAP_CONF("cbus"),
53         ADV748X_REGMAP_CONF("cec"),
54         ADV748X_REGMAP_CONF("sdp"),
55         ADV748X_REGMAP_CONF("txa"),
56         ADV748X_REGMAP_CONF("txb"),
57 };
58
59 static int adv748x_configure_regmap(struct adv748x_state *state, int region)
60 {
61         int err;
62
63         if (!state->i2c_clients[region])
64                 return -ENODEV;
65
66         state->regmap[region] =
67                 devm_regmap_init_i2c(state->i2c_clients[region],
68                                      &adv748x_regmap_cnf[region]);
69
70         if (IS_ERR(state->regmap[region])) {
71                 err = PTR_ERR(state->regmap[region]);
72                 adv_err(state,
73                         "Error initializing regmap %d with error %d\n",
74                         region, err);
75                 return -EINVAL;
76         }
77
78         return 0;
79 }
80 struct adv748x_register_map {
81         const char *name;
82         u8 default_addr;
83 };
84
85 static const struct adv748x_register_map adv748x_default_addresses[] = {
86         [ADV748X_PAGE_IO] = { "main", 0x70 },
87         [ADV748X_PAGE_DPLL] = { "dpll", 0x26 },
88         [ADV748X_PAGE_CP] = { "cp", 0x22 },
89         [ADV748X_PAGE_HDMI] = { "hdmi", 0x34 },
90         [ADV748X_PAGE_EDID] = { "edid", 0x36 },
91         [ADV748X_PAGE_REPEATER] = { "repeater", 0x32 },
92         [ADV748X_PAGE_INFOFRAME] = { "infoframe", 0x31 },
93         [ADV748X_PAGE_CBUS] = { "cbus", 0x30 },
94         [ADV748X_PAGE_CEC] = { "cec", 0x41 },
95         [ADV748X_PAGE_SDP] = { "sdp", 0x79 },
96         [ADV748X_PAGE_TXB] = { "txb", 0x48 },
97         [ADV748X_PAGE_TXA] = { "txa", 0x4a },
98 };
99
100 static int adv748x_read_check(struct adv748x_state *state,
101                               int client_page, u8 reg)
102 {
103         struct i2c_client *client = state->i2c_clients[client_page];
104         int err;
105         unsigned int val;
106
107         err = regmap_read(state->regmap[client_page], reg, &val);
108
109         if (err) {
110                 adv_err(state, "error reading %02x, %02x\n",
111                                 client->addr, reg);
112                 return err;
113         }
114
115         return val;
116 }
117
118 int adv748x_read(struct adv748x_state *state, u8 page, u8 reg)
119 {
120         return adv748x_read_check(state, page, reg);
121 }
122
123 int adv748x_write(struct adv748x_state *state, u8 page, u8 reg, u8 value)
124 {
125         return regmap_write(state->regmap[page], reg, value);
126 }
127
128 static int adv748x_write_check(struct adv748x_state *state, u8 page, u8 reg,
129                                u8 value, int *error)
130 {
131         if (*error)
132                 return *error;
133
134         *error = adv748x_write(state, page, reg, value);
135         return *error;
136 }
137
138 /* adv748x_write_block(): Write raw data with a maximum of I2C_SMBUS_BLOCK_MAX
139  * size to one or more registers.
140  *
141  * A value of zero will be returned on success, a negative errno will
142  * be returned in error cases.
143  */
144 int adv748x_write_block(struct adv748x_state *state, int client_page,
145                         unsigned int init_reg, const void *val,
146                         size_t val_len)
147 {
148         struct regmap *regmap = state->regmap[client_page];
149
150         if (val_len > I2C_SMBUS_BLOCK_MAX)
151                 val_len = I2C_SMBUS_BLOCK_MAX;
152
153         return regmap_raw_write(regmap, init_reg, val, val_len);
154 }
155
156 static int adv748x_set_slave_addresses(struct adv748x_state *state)
157 {
158         struct i2c_client *client;
159         unsigned int i;
160         u8 io_reg;
161
162         for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
163                 io_reg = ADV748X_IO_SLAVE_ADDR_BASE + i;
164                 client = state->i2c_clients[i];
165
166                 io_write(state, io_reg, client->addr << 1);
167         }
168
169         return 0;
170 }
171
172 static void adv748x_unregister_clients(struct adv748x_state *state)
173 {
174         unsigned int i;
175
176         for (i = 1; i < ARRAY_SIZE(state->i2c_clients); ++i)
177                 i2c_unregister_device(state->i2c_clients[i]);
178 }
179
180 static int adv748x_initialise_clients(struct adv748x_state *state)
181 {
182         unsigned int i;
183         int ret;
184
185         for (i = ADV748X_PAGE_DPLL; i < ADV748X_PAGE_MAX; ++i) {
186                 state->i2c_clients[i] = i2c_new_ancillary_device(
187                                 state->client,
188                                 adv748x_default_addresses[i].name,
189                                 adv748x_default_addresses[i].default_addr);
190
191                 if (IS_ERR(state->i2c_clients[i])) {
192                         adv_err(state, "failed to create i2c client %u\n", i);
193                         return PTR_ERR(state->i2c_clients[i]);
194                 }
195
196                 ret = adv748x_configure_regmap(state, i);
197                 if (ret)
198                         return ret;
199         }
200
201         return adv748x_set_slave_addresses(state);
202 }
203
204 /**
205  * struct adv748x_reg_value - Register write instruction
206  * @page:               Regmap page identifier
207  * @reg:                I2C register
208  * @value:              value to write to @page at @reg
209  */
210 struct adv748x_reg_value {
211         u8 page;
212         u8 reg;
213         u8 value;
214 };
215
216 static int adv748x_write_regs(struct adv748x_state *state,
217                               const struct adv748x_reg_value *regs)
218 {
219         int ret;
220
221         for (; regs->page != ADV748X_PAGE_EOR; regs++) {
222                 ret = adv748x_write(state, regs->page, regs->reg, regs->value);
223                 if (ret < 0) {
224                         adv_err(state, "Error regs page: 0x%02x reg: 0x%02x\n",
225                                 regs->page, regs->reg);
226                         return ret;
227                 }
228         }
229
230         return 0;
231 }
232
233 /* -----------------------------------------------------------------------------
234  * TXA and TXB
235  */
236
237 static int adv748x_power_up_tx(struct adv748x_csi2 *tx)
238 {
239         struct adv748x_state *state = tx->state;
240         u8 page = is_txa(tx) ? ADV748X_PAGE_TXA : ADV748X_PAGE_TXB;
241         int ret = 0;
242
243         /* Enable n-lane MIPI */
244         adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret);
245
246         /* Set Auto DPHY Timing */
247         adv748x_write_check(state, page, 0x00, 0xa0 | tx->num_lanes, &ret);
248
249         /* ADI Required Write */
250         if (tx->src == &state->hdmi.sd) {
251                 adv748x_write_check(state, page, 0xdb, 0x10, &ret);
252                 adv748x_write_check(state, page, 0xd6, 0x07, &ret);
253         } else {
254                 adv748x_write_check(state, page, 0xd2, 0x40, &ret);
255         }
256
257         adv748x_write_check(state, page, 0xc4, 0x0a, &ret);
258         adv748x_write_check(state, page, 0x71, 0x33, &ret);
259         adv748x_write_check(state, page, 0x72, 0x11, &ret);
260
261         /* i2c_dphy_pwdn - 1'b0 */
262         adv748x_write_check(state, page, 0xf0, 0x00, &ret);
263
264         /* ADI Required Writes*/
265         adv748x_write_check(state, page, 0x31, 0x82, &ret);
266         adv748x_write_check(state, page, 0x1e, 0x40, &ret);
267
268         /* i2c_mipi_pll_en - 1'b1 */
269         adv748x_write_check(state, page, 0xda, 0x01, &ret);
270         usleep_range(2000, 2500);
271
272         /* Power-up CSI-TX */
273         adv748x_write_check(state, page, 0x00, 0x20 | tx->num_lanes, &ret);
274         usleep_range(1000, 1500);
275
276         /* ADI Required Writes */
277         adv748x_write_check(state, page, 0xc1, 0x2b, &ret);
278         usleep_range(1000, 1500);
279         adv748x_write_check(state, page, 0x31, 0x80, &ret);
280
281         return ret;
282 }
283
284 static int adv748x_power_down_tx(struct adv748x_csi2 *tx)
285 {
286         struct adv748x_state *state = tx->state;
287         u8 page = is_txa(tx) ? ADV748X_PAGE_TXA : ADV748X_PAGE_TXB;
288         int ret = 0;
289
290         /* ADI Required Writes */
291         adv748x_write_check(state, page, 0x31, 0x82, &ret);
292         adv748x_write_check(state, page, 0x1e, 0x00, &ret);
293
294         /* Enable n-lane MIPI */
295         adv748x_write_check(state, page, 0x00, 0x80 | tx->num_lanes, &ret);
296
297         /* i2c_mipi_pll_en - 1'b1 */
298         adv748x_write_check(state, page, 0xda, 0x01, &ret);
299
300         /* ADI Required Write */
301         adv748x_write_check(state, page, 0xc1, 0x3b, &ret);
302
303         return ret;
304 }
305
306 int adv748x_tx_power(struct adv748x_csi2 *tx, bool on)
307 {
308         int val;
309
310         if (!is_tx_enabled(tx))
311                 return 0;
312
313         val = tx_read(tx, ADV748X_CSI_FS_AS_LS);
314         if (val < 0)
315                 return val;
316
317         /*
318          * This test against BIT(6) is not documented by the datasheet, but was
319          * specified in the downstream driver.
320          * Track with a WARN_ONCE to determine if it is ever set by HW.
321          */
322         WARN_ONCE((on && val & ADV748X_CSI_FS_AS_LS_UNKNOWN),
323                         "Enabling with unknown bit set");
324
325         return on ? adv748x_power_up_tx(tx) : adv748x_power_down_tx(tx);
326 }
327
328 /* -----------------------------------------------------------------------------
329  * Media Operations
330  */
331 static int adv748x_link_setup(struct media_entity *entity,
332                               const struct media_pad *local,
333                               const struct media_pad *remote, u32 flags)
334 {
335         struct v4l2_subdev *rsd = media_entity_to_v4l2_subdev(remote->entity);
336         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
337         struct adv748x_state *state = v4l2_get_subdevdata(sd);
338         struct adv748x_csi2 *tx = adv748x_sd_to_csi2(sd);
339         bool enable = flags & MEDIA_LNK_FL_ENABLED;
340         u8 io10_mask = ADV748X_IO_10_CSI1_EN |
341                        ADV748X_IO_10_CSI4_EN |
342                        ADV748X_IO_10_CSI4_IN_SEL_AFE;
343         u8 io10 = 0;
344
345         /* Refuse to enable multiple links to the same TX at the same time. */
346         if (enable && tx->src)
347                 return -EINVAL;
348
349         /* Set or clear the source (HDMI or AFE) and the current TX. */
350         if (rsd == &state->afe.sd)
351                 state->afe.tx = enable ? tx : NULL;
352         else
353                 state->hdmi.tx = enable ? tx : NULL;
354
355         tx->src = enable ? rsd : NULL;
356
357         if (state->afe.tx) {
358                 /* AFE Requires TXA enabled, even when output to TXB */
359                 io10 |= ADV748X_IO_10_CSI4_EN;
360                 if (is_txa(tx))
361                         io10 |= ADV748X_IO_10_CSI4_IN_SEL_AFE;
362                 else
363                         io10 |= ADV748X_IO_10_CSI1_EN;
364         }
365
366         if (state->hdmi.tx)
367                 io10 |= ADV748X_IO_10_CSI4_EN;
368
369         return io_clrset(state, ADV748X_IO_10, io10_mask, io10);
370 }
371
372 static const struct media_entity_operations adv748x_tx_media_ops = {
373         .link_setup     = adv748x_link_setup,
374         .link_validate  = v4l2_subdev_link_validate,
375 };
376
377 static const struct media_entity_operations adv748x_media_ops = {
378         .link_validate = v4l2_subdev_link_validate,
379 };
380
381 /* -----------------------------------------------------------------------------
382  * HW setup
383  */
384
385 /* Initialize CP Core with RGB888 format. */
386 static const struct adv748x_reg_value adv748x_init_hdmi[] = {
387         /* Disable chip powerdown & Enable HDMI Rx block */
388         {ADV748X_PAGE_IO, 0x00, 0x40},
389
390         {ADV748X_PAGE_REPEATER, 0x40, 0x83}, /* Enable HDCP 1.1 */
391
392         {ADV748X_PAGE_HDMI, 0x00, 0x08},/* Foreground Channel = A */
393         {ADV748X_PAGE_HDMI, 0x98, 0xff},/* ADI Required Write */
394         {ADV748X_PAGE_HDMI, 0x99, 0xa3},/* ADI Required Write */
395         {ADV748X_PAGE_HDMI, 0x9a, 0x00},/* ADI Required Write */
396         {ADV748X_PAGE_HDMI, 0x9b, 0x0a},/* ADI Required Write */
397         {ADV748X_PAGE_HDMI, 0x9d, 0x40},/* ADI Required Write */
398         {ADV748X_PAGE_HDMI, 0xcb, 0x09},/* ADI Required Write */
399         {ADV748X_PAGE_HDMI, 0x3d, 0x10},/* ADI Required Write */
400         {ADV748X_PAGE_HDMI, 0x3e, 0x7b},/* ADI Required Write */
401         {ADV748X_PAGE_HDMI, 0x3f, 0x5e},/* ADI Required Write */
402         {ADV748X_PAGE_HDMI, 0x4e, 0xfe},/* ADI Required Write */
403         {ADV748X_PAGE_HDMI, 0x4f, 0x18},/* ADI Required Write */
404         {ADV748X_PAGE_HDMI, 0x57, 0xa3},/* ADI Required Write */
405         {ADV748X_PAGE_HDMI, 0x58, 0x04},/* ADI Required Write */
406         {ADV748X_PAGE_HDMI, 0x85, 0x10},/* ADI Required Write */
407
408         {ADV748X_PAGE_HDMI, 0x83, 0x00},/* Enable All Terminations */
409         {ADV748X_PAGE_HDMI, 0xa3, 0x01},/* ADI Required Write */
410         {ADV748X_PAGE_HDMI, 0xbe, 0x00},/* ADI Required Write */
411
412         {ADV748X_PAGE_HDMI, 0x6c, 0x01},/* HPA Manual Enable */
413         {ADV748X_PAGE_HDMI, 0xf8, 0x01},/* HPA Asserted */
414         {ADV748X_PAGE_HDMI, 0x0f, 0x00},/* Audio Mute Speed Set to Fastest */
415         /* (Smallest Step Size) */
416
417         {ADV748X_PAGE_IO, 0x04, 0x02},  /* RGB Out of CP */
418         {ADV748X_PAGE_IO, 0x12, 0xf0},  /* CSC Depends on ip Packets, SDR 444 */
419         {ADV748X_PAGE_IO, 0x17, 0x80},  /* Luma & Chroma can reach 254d */
420         {ADV748X_PAGE_IO, 0x03, 0x86},  /* CP-Insert_AV_Code */
421
422         {ADV748X_PAGE_CP, 0x7c, 0x00},  /* ADI Required Write */
423
424         {ADV748X_PAGE_IO, 0x0c, 0xe0},  /* Enable LLC_DLL & Double LLC Timing */
425         {ADV748X_PAGE_IO, 0x0e, 0xdd},  /* LLC/PIX/SPI PINS TRISTATED AUD */
426
427         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
428 };
429
430 /* Initialize AFE core with YUV8 format. */
431 static const struct adv748x_reg_value adv748x_init_afe[] = {
432         {ADV748X_PAGE_IO, 0x00, 0x30},  /* Disable chip powerdown Rx */
433         {ADV748X_PAGE_IO, 0xf2, 0x01},  /* Enable I2C Read Auto-Increment */
434
435         {ADV748X_PAGE_IO, 0x0e, 0xff},  /* LLC/PIX/AUD/SPI PINS TRISTATED */
436
437         {ADV748X_PAGE_SDP, 0x0f, 0x00}, /* Exit Power Down Mode */
438         {ADV748X_PAGE_SDP, 0x52, 0xcd}, /* ADI Required Write */
439
440         {ADV748X_PAGE_SDP, 0x0e, 0x80}, /* ADI Required Write */
441         {ADV748X_PAGE_SDP, 0x9c, 0x00}, /* ADI Required Write */
442         {ADV748X_PAGE_SDP, 0x9c, 0xff}, /* ADI Required Write */
443         {ADV748X_PAGE_SDP, 0x0e, 0x00}, /* ADI Required Write */
444
445         /* ADI recommended writes for improved video quality */
446         {ADV748X_PAGE_SDP, 0x80, 0x51}, /* ADI Required Write */
447         {ADV748X_PAGE_SDP, 0x81, 0x51}, /* ADI Required Write */
448         {ADV748X_PAGE_SDP, 0x82, 0x68}, /* ADI Required Write */
449
450         {ADV748X_PAGE_SDP, 0x03, 0x42}, /* Tri-S Output , PwrDwn 656 pads */
451         {ADV748X_PAGE_SDP, 0x04, 0xb5}, /* ITU-R BT.656-4 compatible */
452         {ADV748X_PAGE_SDP, 0x13, 0x00}, /* ADI Required Write */
453
454         {ADV748X_PAGE_SDP, 0x17, 0x41}, /* Select SH1 */
455         {ADV748X_PAGE_SDP, 0x31, 0x12}, /* ADI Required Write */
456         {ADV748X_PAGE_SDP, 0xe6, 0x4f},  /* V bit end pos manually in NTSC */
457
458         {ADV748X_PAGE_EOR, 0xff, 0xff}  /* End of register table */
459 };
460
461 static int adv748x_sw_reset(struct adv748x_state *state)
462 {
463         int ret;
464
465         ret = io_write(state, ADV748X_IO_REG_FF, ADV748X_IO_REG_FF_MAIN_RESET);
466         if (ret)
467                 return ret;
468
469         usleep_range(5000, 6000);
470
471         /* Disable CEC Wakeup from power-down mode */
472         ret = io_clrset(state, ADV748X_IO_REG_01, ADV748X_IO_REG_01_PWRDN_MASK,
473                         ADV748X_IO_REG_01_PWRDNB);
474         if (ret)
475                 return ret;
476
477         /* Enable I2C Read Auto-Increment for consecutive reads */
478         return io_write(state, ADV748X_IO_REG_F2,
479                         ADV748X_IO_REG_F2_READ_AUTO_INC);
480 }
481
482 static int adv748x_reset(struct adv748x_state *state)
483 {
484         int ret;
485         u8 regval = 0;
486
487         ret = adv748x_sw_reset(state);
488         if (ret < 0)
489                 return ret;
490
491         ret = adv748x_set_slave_addresses(state);
492         if (ret < 0)
493                 return ret;
494
495         /* Initialize CP and AFE cores. */
496         ret = adv748x_write_regs(state, adv748x_init_hdmi);
497         if (ret)
498                 return ret;
499
500         ret = adv748x_write_regs(state, adv748x_init_afe);
501         if (ret)
502                 return ret;
503
504         /* Reset TXA and TXB */
505         adv748x_tx_power(&state->txa, 1);
506         adv748x_tx_power(&state->txa, 0);
507         adv748x_tx_power(&state->txb, 1);
508         adv748x_tx_power(&state->txb, 0);
509
510         /* Disable chip powerdown & Enable HDMI Rx block */
511         io_write(state, ADV748X_IO_PD, ADV748X_IO_PD_RX_EN);
512
513         /* Conditionally enable TXa and TXb. */
514         if (is_tx_enabled(&state->txa))
515                 regval |= ADV748X_IO_10_CSI4_EN;
516         if (is_tx_enabled(&state->txb))
517                 regval |= ADV748X_IO_10_CSI1_EN;
518         io_write(state, ADV748X_IO_10, regval);
519
520         /* Use vid_std and v_freq as freerun resolution for CP */
521         cp_clrset(state, ADV748X_CP_CLMP_POS, ADV748X_CP_CLMP_POS_DIS_AUTO,
522                                               ADV748X_CP_CLMP_POS_DIS_AUTO);
523
524         return 0;
525 }
526
527 static int adv748x_identify_chip(struct adv748x_state *state)
528 {
529         int msb, lsb;
530
531         lsb = io_read(state, ADV748X_IO_CHIP_REV_ID_1);
532         msb = io_read(state, ADV748X_IO_CHIP_REV_ID_2);
533
534         if (lsb < 0 || msb < 0) {
535                 adv_err(state, "Failed to read chip revision\n");
536                 return -EIO;
537         }
538
539         adv_info(state, "chip found @ 0x%02x revision %02x%02x\n",
540                  state->client->addr << 1, lsb, msb);
541
542         return 0;
543 }
544
545 /* -----------------------------------------------------------------------------
546  * i2c driver
547  */
548
549 void adv748x_subdev_init(struct v4l2_subdev *sd, struct adv748x_state *state,
550                          const struct v4l2_subdev_ops *ops, u32 function,
551                          const char *ident)
552 {
553         v4l2_subdev_init(sd, ops);
554         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
555
556         /* the owner is the same as the i2c_client's driver owner */
557         sd->owner = state->dev->driver->owner;
558         sd->dev = state->dev;
559
560         v4l2_set_subdevdata(sd, state);
561
562         /* initialize name */
563         snprintf(sd->name, sizeof(sd->name), "%s %d-%04x %s",
564                 state->dev->driver->name,
565                 i2c_adapter_id(state->client->adapter),
566                 state->client->addr, ident);
567
568         sd->entity.function = function;
569         sd->entity.ops = is_tx(adv748x_sd_to_csi2(sd)) ?
570                          &adv748x_tx_media_ops : &adv748x_media_ops;
571 }
572
573 static int adv748x_parse_csi2_lanes(struct adv748x_state *state,
574                                     unsigned int port,
575                                     struct device_node *ep)
576 {
577         struct v4l2_fwnode_endpoint vep;
578         unsigned int num_lanes;
579         int ret;
580
581         if (port != ADV748X_PORT_TXA && port != ADV748X_PORT_TXB)
582                 return 0;
583
584         vep.bus_type = V4L2_MBUS_CSI2_DPHY;
585         ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &vep);
586         if (ret)
587                 return ret;
588
589         num_lanes = vep.bus.mipi_csi2.num_data_lanes;
590
591         if (vep.base.port == ADV748X_PORT_TXA) {
592                 if (num_lanes != 1 && num_lanes != 2 && num_lanes != 4) {
593                         adv_err(state, "TXA: Invalid number (%u) of lanes\n",
594                                 num_lanes);
595                         return -EINVAL;
596                 }
597
598                 state->txa.num_lanes = num_lanes;
599                 adv_dbg(state, "TXA: using %u lanes\n", state->txa.num_lanes);
600         }
601
602         if (vep.base.port == ADV748X_PORT_TXB) {
603                 if (num_lanes != 1) {
604                         adv_err(state, "TXB: Invalid number (%u) of lanes\n",
605                                 num_lanes);
606                         return -EINVAL;
607                 }
608
609                 state->txb.num_lanes = num_lanes;
610                 adv_dbg(state, "TXB: using %u lanes\n", state->txb.num_lanes);
611         }
612
613         return 0;
614 }
615
616 static int adv748x_parse_dt(struct adv748x_state *state)
617 {
618         struct device_node *ep_np = NULL;
619         struct of_endpoint ep;
620         bool out_found = false;
621         bool in_found = false;
622         int ret;
623
624         for_each_endpoint_of_node(state->dev->of_node, ep_np) {
625                 of_graph_parse_endpoint(ep_np, &ep);
626                 adv_info(state, "Endpoint %pOF on port %d", ep.local_node,
627                          ep.port);
628
629                 if (ep.port >= ADV748X_PORT_MAX) {
630                         adv_err(state, "Invalid endpoint %pOF on port %d",
631                                 ep.local_node, ep.port);
632
633                         continue;
634                 }
635
636                 if (state->endpoints[ep.port]) {
637                         adv_err(state,
638                                 "Multiple port endpoints are not supported");
639                         continue;
640                 }
641
642                 of_node_get(ep_np);
643                 state->endpoints[ep.port] = ep_np;
644
645                 /*
646                  * At least one input endpoint and one output endpoint shall
647                  * be defined.
648                  */
649                 if (ep.port < ADV748X_PORT_TXA)
650                         in_found = true;
651                 else
652                         out_found = true;
653
654                 /* Store number of CSI-2 lanes used for TXA and TXB. */
655                 ret = adv748x_parse_csi2_lanes(state, ep.port, ep_np);
656                 if (ret)
657                         return ret;
658         }
659
660         return in_found && out_found ? 0 : -ENODEV;
661 }
662
663 static void adv748x_dt_cleanup(struct adv748x_state *state)
664 {
665         unsigned int i;
666
667         for (i = 0; i < ADV748X_PORT_MAX; i++)
668                 of_node_put(state->endpoints[i]);
669 }
670
671 static int adv748x_probe(struct i2c_client *client)
672 {
673         struct adv748x_state *state;
674         int ret;
675
676         /* Check if the adapter supports the needed features */
677         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
678                 return -EIO;
679
680         state = devm_kzalloc(&client->dev, sizeof(*state), GFP_KERNEL);
681         if (!state)
682                 return -ENOMEM;
683
684         mutex_init(&state->mutex);
685
686         state->dev = &client->dev;
687         state->client = client;
688         state->i2c_clients[ADV748X_PAGE_IO] = client;
689         i2c_set_clientdata(client, state);
690
691         /*
692          * We can not use container_of to get back to the state with two TXs;
693          * Initialize the TXs's fields unconditionally on the endpoint
694          * presence to access them later.
695          */
696         state->txa.state = state->txb.state = state;
697         state->txa.page = ADV748X_PAGE_TXA;
698         state->txb.page = ADV748X_PAGE_TXB;
699         state->txa.port = ADV748X_PORT_TXA;
700         state->txb.port = ADV748X_PORT_TXB;
701
702         /* Discover and process ports declared by the Device tree endpoints */
703         ret = adv748x_parse_dt(state);
704         if (ret) {
705                 adv_err(state, "Failed to parse device tree");
706                 goto err_free_mutex;
707         }
708
709         /* Configure IO Regmap region */
710         ret = adv748x_configure_regmap(state, ADV748X_PAGE_IO);
711         if (ret) {
712                 adv_err(state, "Error configuring IO regmap region");
713                 goto err_cleanup_dt;
714         }
715
716         ret = adv748x_identify_chip(state);
717         if (ret) {
718                 adv_err(state, "Failed to identify chip");
719                 goto err_cleanup_dt;
720         }
721
722         /* Configure remaining pages as I2C clients with regmap access */
723         ret = adv748x_initialise_clients(state);
724         if (ret) {
725                 adv_err(state, "Failed to setup client regmap pages");
726                 goto err_cleanup_clients;
727         }
728
729         /* SW reset ADV748X to its default values */
730         ret = adv748x_reset(state);
731         if (ret) {
732                 adv_err(state, "Failed to reset hardware");
733                 goto err_cleanup_clients;
734         }
735
736         /* Initialise HDMI */
737         ret = adv748x_hdmi_init(&state->hdmi);
738         if (ret) {
739                 adv_err(state, "Failed to probe HDMI");
740                 goto err_cleanup_clients;
741         }
742
743         /* Initialise AFE */
744         ret = adv748x_afe_init(&state->afe);
745         if (ret) {
746                 adv_err(state, "Failed to probe AFE");
747                 goto err_cleanup_hdmi;
748         }
749
750         /* Initialise TXA */
751         ret = adv748x_csi2_init(state, &state->txa);
752         if (ret) {
753                 adv_err(state, "Failed to probe TXA");
754                 goto err_cleanup_afe;
755         }
756
757         /* Initialise TXB */
758         ret = adv748x_csi2_init(state, &state->txb);
759         if (ret) {
760                 adv_err(state, "Failed to probe TXB");
761                 goto err_cleanup_txa;
762         }
763
764         return 0;
765
766 err_cleanup_txa:
767         adv748x_csi2_cleanup(&state->txa);
768 err_cleanup_afe:
769         adv748x_afe_cleanup(&state->afe);
770 err_cleanup_hdmi:
771         adv748x_hdmi_cleanup(&state->hdmi);
772 err_cleanup_clients:
773         adv748x_unregister_clients(state);
774 err_cleanup_dt:
775         adv748x_dt_cleanup(state);
776 err_free_mutex:
777         mutex_destroy(&state->mutex);
778
779         return ret;
780 }
781
782 static int adv748x_remove(struct i2c_client *client)
783 {
784         struct adv748x_state *state = i2c_get_clientdata(client);
785
786         adv748x_afe_cleanup(&state->afe);
787         adv748x_hdmi_cleanup(&state->hdmi);
788
789         adv748x_csi2_cleanup(&state->txa);
790         adv748x_csi2_cleanup(&state->txb);
791
792         adv748x_unregister_clients(state);
793         adv748x_dt_cleanup(state);
794         mutex_destroy(&state->mutex);
795
796         return 0;
797 }
798
799 static const struct of_device_id adv748x_of_table[] = {
800         { .compatible = "adi,adv7481", },
801         { .compatible = "adi,adv7482", },
802         { }
803 };
804 MODULE_DEVICE_TABLE(of, adv748x_of_table);
805
806 static struct i2c_driver adv748x_driver = {
807         .driver = {
808                 .name = "adv748x",
809                 .of_match_table = adv748x_of_table,
810         },
811         .probe_new = adv748x_probe,
812         .remove = adv748x_remove,
813 };
814
815 module_i2c_driver(adv748x_driver);
816
817 MODULE_AUTHOR("Kieran Bingham <kieran.bingham@ideasonboard.com>");
818 MODULE_DESCRIPTION("ADV748X video decoder");
819 MODULE_LICENSE("GPL");