2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
26 * Eric Anholt <eric@anholt.net>
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include <linux/export.h>
33 #include <drm/drm_atomic_helper.h>
34 #include <drm/drm_crtc.h>
35 #include <drm/drm_edid.h>
36 #include "intel_drv.h"
37 #include <drm/i915_drm.h>
39 #include "intel_sdvo_regs.h"
41 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
46 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
49 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53 #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
56 static const char * const tv_format_names[] = {
57 "NTSC_M" , "NTSC_J" , "NTSC_443",
58 "PAL_B" , "PAL_D" , "PAL_G" ,
59 "PAL_H" , "PAL_I" , "PAL_M" ,
60 "PAL_N" , "PAL_NC" , "PAL_60" ,
61 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
62 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 #define TV_FORMAT_NUM ARRAY_SIZE(tv_format_names)
69 struct intel_encoder base;
71 struct i2c_adapter *i2c;
74 struct i2c_adapter ddc;
76 /* Register for the SDVO device: SDVOB or SDVOC */
79 /* Active outputs controlled by this SDVO output */
80 uint16_t controlled_output;
83 * Capabilities of the SDVO device returned by
84 * intel_sdvo_get_capabilities()
86 struct intel_sdvo_caps caps;
88 /* Pixel clock limitations reported by the SDVO device, in kHz */
89 int pixel_clock_min, pixel_clock_max;
92 * For multiple function SDVO device,
93 * this is for current attached outputs.
95 uint16_t attached_output;
98 * Hotplug activation bits for this device
100 uint16_t hotplug_active;
103 * This is set if we're going to treat the device as TV-out.
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
114 * This is set if we treat the device as HDMI, instead of DVI.
117 bool has_hdmi_monitor;
119 bool rgb_quant_range_selectable;
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
128 * This is sdvo fixed pannel mode pointer
130 struct drm_display_mode *sdvo_lvds_fixed_mode;
132 /* DDC bus used by this SDVO encoder */
136 * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
138 uint8_t dtd_sdvo_flags;
141 struct intel_sdvo_connector {
142 struct intel_connector base;
144 /* Mark the type of connector */
145 uint16_t output_flag;
147 /* This contains all current supported TV format */
148 u8 tv_format_supported[TV_FORMAT_NUM];
149 int format_supported_num;
150 struct drm_property *tv_format;
152 /* add the property for the SDVO-TV */
153 struct drm_property *left;
154 struct drm_property *right;
155 struct drm_property *top;
156 struct drm_property *bottom;
157 struct drm_property *hpos;
158 struct drm_property *vpos;
159 struct drm_property *contrast;
160 struct drm_property *saturation;
161 struct drm_property *hue;
162 struct drm_property *sharpness;
163 struct drm_property *flicker_filter;
164 struct drm_property *flicker_filter_adaptive;
165 struct drm_property *flicker_filter_2d;
166 struct drm_property *tv_chroma_filter;
167 struct drm_property *tv_luma_filter;
168 struct drm_property *dot_crawl;
170 /* add the property for the SDVO-TV/LVDS */
171 struct drm_property *brightness;
173 /* this is to get the range of margin.*/
174 u32 max_hscan, max_vscan;
177 struct intel_sdvo_connector_state {
178 /* base.base: tv.saturation/contrast/hue/brightness */
179 struct intel_digital_connector_state base;
182 unsigned overscan_h, overscan_v, hpos, vpos, sharpness;
183 unsigned flicker_filter, flicker_filter_2d, flicker_filter_adaptive;
184 unsigned chroma_filter, luma_filter, dot_crawl;
188 static struct intel_sdvo *to_sdvo(struct intel_encoder *encoder)
190 return container_of(encoder, struct intel_sdvo, base);
193 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
195 return to_sdvo(intel_attached_encoder(connector));
198 static struct intel_sdvo_connector *
199 to_intel_sdvo_connector(struct drm_connector *connector)
201 return container_of(connector, struct intel_sdvo_connector, base.base);
204 static struct intel_sdvo_connector_state *
205 to_intel_sdvo_connector_state(struct drm_connector_state *conn_state)
207 return container_of(conn_state, struct intel_sdvo_connector_state, base.base);
211 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
213 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
214 struct intel_sdvo_connector *intel_sdvo_connector,
217 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector);
221 * Writes the SDVOB or SDVOC with the given value, but always writes both
222 * SDVOB and SDVOC to work around apparent hardware issues (according to
223 * comments in the BIOS).
225 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
227 struct drm_device *dev = intel_sdvo->base.base.dev;
228 struct drm_i915_private *dev_priv = to_i915(dev);
229 u32 bval = val, cval = val;
232 if (HAS_PCH_SPLIT(dev_priv)) {
233 I915_WRITE(intel_sdvo->sdvo_reg, val);
234 POSTING_READ(intel_sdvo->sdvo_reg);
236 * HW workaround, need to write this twice for issue
237 * that may result in first write getting masked.
239 if (HAS_PCH_IBX(dev_priv)) {
240 I915_WRITE(intel_sdvo->sdvo_reg, val);
241 POSTING_READ(intel_sdvo->sdvo_reg);
246 if (intel_sdvo->port == PORT_B)
247 cval = I915_READ(GEN3_SDVOC);
249 bval = I915_READ(GEN3_SDVOB);
252 * Write the registers twice for luck. Sometimes,
253 * writing them only once doesn't appear to 'stick'.
254 * The BIOS does this too. Yay, magic
256 for (i = 0; i < 2; i++)
258 I915_WRITE(GEN3_SDVOB, bval);
259 POSTING_READ(GEN3_SDVOB);
260 I915_WRITE(GEN3_SDVOC, cval);
261 POSTING_READ(GEN3_SDVOC);
265 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
267 struct i2c_msg msgs[] = {
269 .addr = intel_sdvo->slave_addr,
275 .addr = intel_sdvo->slave_addr,
283 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
286 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
290 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
291 /** Mapping of command numbers to names, for debug output */
292 static const struct _sdvo_cmd_name {
295 } __attribute__ ((packed)) sdvo_cmd_names[] = {
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
340 /* Add the op code for SDVO enhancements */
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
400 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
401 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
402 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
403 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
404 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
405 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
406 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
409 #define SDVO_NAME(svdo) ((svdo)->port == PORT_B ? "SDVOB" : "SDVOC")
411 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
412 const void *args, int args_len)
416 char buffer[BUF_LEN];
418 #define BUF_PRINT(args...) \
419 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
422 for (i = 0; i < args_len; i++) {
423 BUF_PRINT("%02X ", ((u8 *)args)[i]);
428 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
429 if (cmd == sdvo_cmd_names[i].cmd) {
430 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
434 if (i == ARRAY_SIZE(sdvo_cmd_names)) {
435 BUF_PRINT("(%02X)", cmd);
437 BUG_ON(pos >= BUF_LEN - 1);
441 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(intel_sdvo), cmd, buffer);
444 static const char * const cmd_status_names[] = {
450 "Target not specified",
451 "Scaling not supported"
454 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
455 const void *args, int args_len)
458 struct i2c_msg *msgs;
461 /* Would be simpler to allocate both in one go ? */
462 buf = kzalloc(args_len * 2 + 2, GFP_KERNEL);
466 msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
472 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
474 for (i = 0; i < args_len; i++) {
475 msgs[i].addr = intel_sdvo->slave_addr;
478 msgs[i].buf = buf + 2 *i;
479 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
480 buf[2*i + 1] = ((u8*)args)[i];
482 msgs[i].addr = intel_sdvo->slave_addr;
485 msgs[i].buf = buf + 2*i;
486 buf[2*i + 0] = SDVO_I2C_OPCODE;
489 /* the following two are to read the response */
490 status = SDVO_I2C_CMD_STATUS;
491 msgs[i+1].addr = intel_sdvo->slave_addr;
494 msgs[i+1].buf = &status;
496 msgs[i+2].addr = intel_sdvo->slave_addr;
497 msgs[i+2].flags = I2C_M_RD;
499 msgs[i+2].buf = &status;
501 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
503 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
508 /* failure in I2C transfer */
509 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
519 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
520 void *response, int response_len)
522 u8 retry = 15; /* 5 quick checks, followed by 10 long checks */
526 char buffer[BUF_LEN];
530 * The documentation states that all commands will be
531 * processed within 15µs, and that we need only poll
532 * the status byte a maximum of 3 times in order for the
533 * command to be complete.
535 * Check 5 times in case the hardware failed to read the docs.
537 * Also beware that the first response by many devices is to
538 * reply PENDING and stall for time. TVs are notorious for
539 * requiring longer than specified to complete their replies.
540 * Originally (in the DDX long ago), the delay was only ever 15ms
541 * with an additional delay of 30ms applied for TVs added later after
542 * many experiments. To accommodate both sets of delays, we do a
543 * sequence of slow checks if the device is falling behind and fails
544 * to reply within 5*15µs.
546 if (!intel_sdvo_read_byte(intel_sdvo,
551 while ((status == SDVO_CMD_STATUS_PENDING ||
552 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && --retry) {
558 if (!intel_sdvo_read_byte(intel_sdvo,
564 #define BUF_PRINT(args...) \
565 pos += snprintf(buffer + pos, max_t(int, BUF_LEN - pos, 0), args)
567 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
568 BUF_PRINT("(%s)", cmd_status_names[status]);
570 BUF_PRINT("(??? %d)", status);
572 if (status != SDVO_CMD_STATUS_SUCCESS)
575 /* Read the command response */
576 for (i = 0; i < response_len; i++) {
577 if (!intel_sdvo_read_byte(intel_sdvo,
578 SDVO_I2C_RETURN_0 + i,
579 &((u8 *)response)[i]))
581 BUF_PRINT(" %02X", ((u8 *)response)[i]);
583 BUG_ON(pos >= BUF_LEN - 1);
587 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(intel_sdvo), buffer);
591 DRM_DEBUG_KMS("%s: R: ... failed\n", SDVO_NAME(intel_sdvo));
595 static int intel_sdvo_get_pixel_multiplier(const struct drm_display_mode *adjusted_mode)
597 if (adjusted_mode->crtc_clock >= 100000)
599 else if (adjusted_mode->crtc_clock >= 50000)
605 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
608 /* This must be the immediately preceding write before the i2c xfer */
609 return intel_sdvo_write_cmd(intel_sdvo,
610 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
614 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
616 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
619 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
623 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
625 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
628 return intel_sdvo_read_response(intel_sdvo, value, len);
631 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
633 struct intel_sdvo_set_target_input_args targets = {0};
634 return intel_sdvo_set_value(intel_sdvo,
635 SDVO_CMD_SET_TARGET_INPUT,
636 &targets, sizeof(targets));
640 * Return whether each input is trained.
642 * This function is making an assumption about the layout of the response,
643 * which should be checked against the docs.
645 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
647 struct intel_sdvo_get_trained_inputs_response response;
649 BUILD_BUG_ON(sizeof(response) != 1);
650 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
651 &response, sizeof(response)))
654 *input_1 = response.input0_trained;
655 *input_2 = response.input1_trained;
659 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
662 return intel_sdvo_set_value(intel_sdvo,
663 SDVO_CMD_SET_ACTIVE_OUTPUTS,
664 &outputs, sizeof(outputs));
667 static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
670 return intel_sdvo_get_value(intel_sdvo,
671 SDVO_CMD_GET_ACTIVE_OUTPUTS,
672 outputs, sizeof(*outputs));
675 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
678 u8 state = SDVO_ENCODER_STATE_ON;
681 case DRM_MODE_DPMS_ON:
682 state = SDVO_ENCODER_STATE_ON;
684 case DRM_MODE_DPMS_STANDBY:
685 state = SDVO_ENCODER_STATE_STANDBY;
687 case DRM_MODE_DPMS_SUSPEND:
688 state = SDVO_ENCODER_STATE_SUSPEND;
690 case DRM_MODE_DPMS_OFF:
691 state = SDVO_ENCODER_STATE_OFF;
695 return intel_sdvo_set_value(intel_sdvo,
696 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
699 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
703 struct intel_sdvo_pixel_clock_range clocks;
705 BUILD_BUG_ON(sizeof(clocks) != 4);
706 if (!intel_sdvo_get_value(intel_sdvo,
707 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
708 &clocks, sizeof(clocks)))
711 /* Convert the values from units of 10 kHz to kHz. */
712 *clock_min = clocks.min * 10;
713 *clock_max = clocks.max * 10;
717 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
720 return intel_sdvo_set_value(intel_sdvo,
721 SDVO_CMD_SET_TARGET_OUTPUT,
722 &outputs, sizeof(outputs));
725 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
726 struct intel_sdvo_dtd *dtd)
728 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
729 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
732 static bool intel_sdvo_get_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
733 struct intel_sdvo_dtd *dtd)
735 return intel_sdvo_get_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
736 intel_sdvo_get_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
739 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
740 struct intel_sdvo_dtd *dtd)
742 return intel_sdvo_set_timing(intel_sdvo,
743 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
746 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
747 struct intel_sdvo_dtd *dtd)
749 return intel_sdvo_set_timing(intel_sdvo,
750 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
753 static bool intel_sdvo_get_input_timing(struct intel_sdvo *intel_sdvo,
754 struct intel_sdvo_dtd *dtd)
756 return intel_sdvo_get_timing(intel_sdvo,
757 SDVO_CMD_GET_INPUT_TIMINGS_PART1, dtd);
761 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
766 struct intel_sdvo_preferred_input_timing_args args;
768 memset(&args, 0, sizeof(args));
771 args.height = height;
774 if (intel_sdvo->is_lvds &&
775 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
776 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
779 return intel_sdvo_set_value(intel_sdvo,
780 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
781 &args, sizeof(args));
784 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
785 struct intel_sdvo_dtd *dtd)
787 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
788 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
789 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
790 &dtd->part1, sizeof(dtd->part1)) &&
791 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
792 &dtd->part2, sizeof(dtd->part2));
795 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
797 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
800 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
801 const struct drm_display_mode *mode)
803 uint16_t width, height;
804 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
805 uint16_t h_sync_offset, v_sync_offset;
808 memset(dtd, 0, sizeof(*dtd));
810 width = mode->hdisplay;
811 height = mode->vdisplay;
813 /* do some mode translations */
814 h_blank_len = mode->htotal - mode->hdisplay;
815 h_sync_len = mode->hsync_end - mode->hsync_start;
817 v_blank_len = mode->vtotal - mode->vdisplay;
818 v_sync_len = mode->vsync_end - mode->vsync_start;
820 h_sync_offset = mode->hsync_start - mode->hdisplay;
821 v_sync_offset = mode->vsync_start - mode->vdisplay;
823 mode_clock = mode->clock;
825 dtd->part1.clock = mode_clock;
827 dtd->part1.h_active = width & 0xff;
828 dtd->part1.h_blank = h_blank_len & 0xff;
829 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
830 ((h_blank_len >> 8) & 0xf);
831 dtd->part1.v_active = height & 0xff;
832 dtd->part1.v_blank = v_blank_len & 0xff;
833 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
834 ((v_blank_len >> 8) & 0xf);
836 dtd->part2.h_sync_off = h_sync_offset & 0xff;
837 dtd->part2.h_sync_width = h_sync_len & 0xff;
838 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
840 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
841 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
842 ((v_sync_len & 0x30) >> 4);
844 dtd->part2.dtd_flags = 0x18;
845 if (mode->flags & DRM_MODE_FLAG_INTERLACE)
846 dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
847 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
848 dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
849 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
850 dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
852 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
855 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode *pmode,
856 const struct intel_sdvo_dtd *dtd)
858 struct drm_display_mode mode = {};
860 mode.hdisplay = dtd->part1.h_active;
861 mode.hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
862 mode.hsync_start = mode.hdisplay + dtd->part2.h_sync_off;
863 mode.hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
864 mode.hsync_end = mode.hsync_start + dtd->part2.h_sync_width;
865 mode.hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
866 mode.htotal = mode.hdisplay + dtd->part1.h_blank;
867 mode.htotal += (dtd->part1.h_high & 0xf) << 8;
869 mode.vdisplay = dtd->part1.v_active;
870 mode.vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
871 mode.vsync_start = mode.vdisplay;
872 mode.vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
873 mode.vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
874 mode.vsync_start += dtd->part2.v_sync_off_high & 0xc0;
875 mode.vsync_end = mode.vsync_start +
876 (dtd->part2.v_sync_off_width & 0xf);
877 mode.vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
878 mode.vtotal = mode.vdisplay + dtd->part1.v_blank;
879 mode.vtotal += (dtd->part1.v_high & 0xf) << 8;
881 mode.clock = dtd->part1.clock * 10;
883 if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
884 mode.flags |= DRM_MODE_FLAG_INTERLACE;
885 if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
886 mode.flags |= DRM_MODE_FLAG_PHSYNC;
888 mode.flags |= DRM_MODE_FLAG_NHSYNC;
889 if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
890 mode.flags |= DRM_MODE_FLAG_PVSYNC;
892 mode.flags |= DRM_MODE_FLAG_NVSYNC;
894 drm_mode_set_crtcinfo(&mode, 0);
896 drm_mode_copy(pmode, &mode);
899 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
901 struct intel_sdvo_encode encode;
903 BUILD_BUG_ON(sizeof(encode) != 2);
904 return intel_sdvo_get_value(intel_sdvo,
905 SDVO_CMD_GET_SUPP_ENCODE,
906 &encode, sizeof(encode));
909 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
912 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
915 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
918 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
922 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
925 uint8_t set_buf_index[2];
931 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
933 for (i = 0; i <= av_split; i++) {
934 set_buf_index[0] = i; set_buf_index[1] = 0;
935 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
937 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
938 intel_sdvo_read_response(encoder, &buf_size, 1);
941 for (j = 0; j <= buf_size; j += 8) {
942 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
944 intel_sdvo_read_response(encoder, pos, 8);
951 static bool intel_sdvo_write_infoframe(struct intel_sdvo *intel_sdvo,
952 unsigned if_index, uint8_t tx_rate,
953 const uint8_t *data, unsigned length)
955 uint8_t set_buf_index[2] = { if_index, 0 };
956 uint8_t hbuf_size, tmp[8];
959 if (!intel_sdvo_set_value(intel_sdvo,
960 SDVO_CMD_SET_HBUF_INDEX,
964 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HBUF_INFO,
968 /* Buffer size is 0 based, hooray! */
971 DRM_DEBUG_KMS("writing sdvo hbuf: %i, hbuf_size %i, hbuf_size: %i\n",
972 if_index, length, hbuf_size);
974 for (i = 0; i < hbuf_size; i += 8) {
977 memcpy(tmp, data + i, min_t(unsigned, 8, length - i));
979 if (!intel_sdvo_set_value(intel_sdvo,
980 SDVO_CMD_SET_HBUF_DATA,
985 return intel_sdvo_set_value(intel_sdvo,
986 SDVO_CMD_SET_HBUF_TXRATE,
990 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo,
991 struct intel_crtc_state *pipe_config)
993 uint8_t sdvo_data[HDMI_INFOFRAME_SIZE(AVI)];
994 union hdmi_infoframe frame;
998 ret = drm_hdmi_avi_infoframe_from_display_mode(&frame.avi,
999 &pipe_config->base.adjusted_mode,
1002 DRM_ERROR("couldn't fill AVI infoframe\n");
1006 if (intel_sdvo->rgb_quant_range_selectable) {
1007 if (pipe_config->limited_color_range)
1008 frame.avi.quantization_range =
1009 HDMI_QUANTIZATION_RANGE_LIMITED;
1011 frame.avi.quantization_range =
1012 HDMI_QUANTIZATION_RANGE_FULL;
1015 len = hdmi_infoframe_pack(&frame, sdvo_data, sizeof(sdvo_data));
1019 return intel_sdvo_write_infoframe(intel_sdvo, SDVO_HBUF_INDEX_AVI_IF,
1021 sdvo_data, sizeof(sdvo_data));
1024 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo,
1025 struct drm_connector_state *conn_state)
1027 struct intel_sdvo_tv_format format;
1028 uint32_t format_map;
1030 format_map = 1 << conn_state->tv.mode;
1031 memset(&format, 0, sizeof(format));
1032 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
1034 BUILD_BUG_ON(sizeof(format) != 6);
1035 return intel_sdvo_set_value(intel_sdvo,
1036 SDVO_CMD_SET_TV_FORMAT,
1037 &format, sizeof(format));
1041 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
1042 const struct drm_display_mode *mode)
1044 struct intel_sdvo_dtd output_dtd;
1046 if (!intel_sdvo_set_target_output(intel_sdvo,
1047 intel_sdvo->attached_output))
1050 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1051 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1057 /* Asks the sdvo controller for the preferred input mode given the output mode.
1058 * Unfortunately we have to set up the full output mode to do that. */
1060 intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
1061 const struct drm_display_mode *mode,
1062 struct drm_display_mode *adjusted_mode)
1064 struct intel_sdvo_dtd input_dtd;
1066 /* Reset the input timing to the screen. Assume always input 0. */
1067 if (!intel_sdvo_set_target_input(intel_sdvo))
1070 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
1076 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
1080 intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
1081 intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
1086 static void i9xx_adjust_sdvo_tv_clock(struct intel_crtc_state *pipe_config)
1088 unsigned dotclock = pipe_config->port_clock;
1089 struct dpll *clock = &pipe_config->dpll;
1091 /* SDVO TV has fixed PLL values depend on its clock range,
1092 this mirrors vbios setting. */
1093 if (dotclock >= 100000 && dotclock < 140500) {
1099 } else if (dotclock >= 140500 && dotclock <= 200000) {
1106 WARN(1, "SDVO TV clock out of range: %i\n", dotclock);
1109 pipe_config->clock_set = true;
1112 static bool intel_sdvo_compute_config(struct intel_encoder *encoder,
1113 struct intel_crtc_state *pipe_config,
1114 struct drm_connector_state *conn_state)
1116 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1117 struct intel_sdvo_connector_state *intel_sdvo_state =
1118 to_intel_sdvo_connector_state(conn_state);
1119 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
1120 struct drm_display_mode *mode = &pipe_config->base.mode;
1122 DRM_DEBUG_KMS("forcing bpc to 8 for SDVO\n");
1123 pipe_config->pipe_bpp = 8*3;
1125 if (HAS_PCH_SPLIT(to_i915(encoder->base.dev)))
1126 pipe_config->has_pch_encoder = true;
1128 /* We need to construct preferred input timings based on our
1129 * output timings. To do that, we have to set the output
1130 * timings, even though this isn't really the right place in
1131 * the sequence to do it. Oh well.
1133 if (intel_sdvo->is_tv) {
1134 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
1137 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1140 pipe_config->sdvo_tv_clock = true;
1141 } else if (intel_sdvo->is_lvds) {
1142 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
1143 intel_sdvo->sdvo_lvds_fixed_mode))
1146 (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
1151 /* Make the CRTC code factor in the SDVO pixel multiplier. The
1152 * SDVO device will factor out the multiplier during mode_set.
1154 pipe_config->pixel_multiplier =
1155 intel_sdvo_get_pixel_multiplier(adjusted_mode);
1157 if (intel_sdvo_state->base.force_audio != HDMI_AUDIO_OFF_DVI)
1158 pipe_config->has_hdmi_sink = intel_sdvo->has_hdmi_monitor;
1160 if (intel_sdvo_state->base.force_audio == HDMI_AUDIO_ON ||
1161 (intel_sdvo_state->base.force_audio == HDMI_AUDIO_AUTO && intel_sdvo->has_hdmi_audio))
1162 pipe_config->has_audio = true;
1164 if (intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_AUTO) {
1165 /* See CEA-861-E - 5.1 Default Encoding Parameters */
1166 /* FIXME: This bit is only valid when using TMDS encoding and 8
1167 * bit per color mode. */
1168 if (pipe_config->has_hdmi_sink &&
1169 drm_match_cea_mode(adjusted_mode) > 1)
1170 pipe_config->limited_color_range = true;
1172 if (pipe_config->has_hdmi_sink &&
1173 intel_sdvo_state->base.broadcast_rgb == INTEL_BROADCAST_RGB_LIMITED)
1174 pipe_config->limited_color_range = true;
1177 /* Clock computation needs to happen after pixel multiplier. */
1178 if (intel_sdvo->is_tv)
1179 i9xx_adjust_sdvo_tv_clock(pipe_config);
1181 /* Set user selected PAR to incoming mode's member */
1182 if (intel_sdvo->is_hdmi)
1183 adjusted_mode->picture_aspect_ratio = conn_state->picture_aspect_ratio;
1188 #define UPDATE_PROPERTY(input, NAME) \
1191 intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_##NAME, &val, sizeof(val)); \
1194 static void intel_sdvo_update_props(struct intel_sdvo *intel_sdvo,
1195 struct intel_sdvo_connector_state *sdvo_state)
1197 struct drm_connector_state *conn_state = &sdvo_state->base.base;
1198 struct intel_sdvo_connector *intel_sdvo_conn =
1199 to_intel_sdvo_connector(conn_state->connector);
1202 if (intel_sdvo_conn->left)
1203 UPDATE_PROPERTY(sdvo_state->tv.overscan_h, OVERSCAN_H);
1205 if (intel_sdvo_conn->top)
1206 UPDATE_PROPERTY(sdvo_state->tv.overscan_v, OVERSCAN_V);
1208 if (intel_sdvo_conn->hpos)
1209 UPDATE_PROPERTY(sdvo_state->tv.hpos, HPOS);
1211 if (intel_sdvo_conn->vpos)
1212 UPDATE_PROPERTY(sdvo_state->tv.vpos, VPOS);
1214 if (intel_sdvo_conn->saturation)
1215 UPDATE_PROPERTY(conn_state->tv.saturation, SATURATION);
1217 if (intel_sdvo_conn->contrast)
1218 UPDATE_PROPERTY(conn_state->tv.contrast, CONTRAST);
1220 if (intel_sdvo_conn->hue)
1221 UPDATE_PROPERTY(conn_state->tv.hue, HUE);
1223 if (intel_sdvo_conn->brightness)
1224 UPDATE_PROPERTY(conn_state->tv.brightness, BRIGHTNESS);
1226 if (intel_sdvo_conn->sharpness)
1227 UPDATE_PROPERTY(sdvo_state->tv.sharpness, SHARPNESS);
1229 if (intel_sdvo_conn->flicker_filter)
1230 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter, FLICKER_FILTER);
1232 if (intel_sdvo_conn->flicker_filter_2d)
1233 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_2d, FLICKER_FILTER_2D);
1235 if (intel_sdvo_conn->flicker_filter_adaptive)
1236 UPDATE_PROPERTY(sdvo_state->tv.flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
1238 if (intel_sdvo_conn->tv_chroma_filter)
1239 UPDATE_PROPERTY(sdvo_state->tv.chroma_filter, TV_CHROMA_FILTER);
1241 if (intel_sdvo_conn->tv_luma_filter)
1242 UPDATE_PROPERTY(sdvo_state->tv.luma_filter, TV_LUMA_FILTER);
1244 if (intel_sdvo_conn->dot_crawl)
1245 UPDATE_PROPERTY(sdvo_state->tv.dot_crawl, DOT_CRAWL);
1247 #undef UPDATE_PROPERTY
1250 static void intel_sdvo_pre_enable(struct intel_encoder *intel_encoder,
1251 struct intel_crtc_state *crtc_state,
1252 struct drm_connector_state *conn_state)
1254 struct drm_i915_private *dev_priv = to_i915(intel_encoder->base.dev);
1255 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc);
1256 const struct drm_display_mode *adjusted_mode = &crtc_state->base.adjusted_mode;
1257 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(conn_state);
1258 struct drm_display_mode *mode = &crtc_state->base.mode;
1259 struct intel_sdvo *intel_sdvo = to_sdvo(intel_encoder);
1261 struct intel_sdvo_in_out_map in_out;
1262 struct intel_sdvo_dtd input_dtd, output_dtd;
1265 intel_sdvo_update_props(intel_sdvo, sdvo_state);
1267 /* First, set the input mapping for the first input to our controlled
1268 * output. This is only correct if we're a single-input device, in
1269 * which case the first input is the output from the appropriate SDVO
1270 * channel on the motherboard. In a two-input device, the first input
1271 * will be SDVOB and the second SDVOC.
1273 in_out.in0 = intel_sdvo->attached_output;
1276 intel_sdvo_set_value(intel_sdvo,
1277 SDVO_CMD_SET_IN_OUT_MAP,
1278 &in_out, sizeof(in_out));
1280 /* Set the output timings to the screen */
1281 if (!intel_sdvo_set_target_output(intel_sdvo,
1282 intel_sdvo->attached_output))
1285 /* lvds has a special fixed output timing. */
1286 if (intel_sdvo->is_lvds)
1287 intel_sdvo_get_dtd_from_mode(&output_dtd,
1288 intel_sdvo->sdvo_lvds_fixed_mode);
1290 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
1291 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
1292 DRM_INFO("Setting output timings on %s failed\n",
1293 SDVO_NAME(intel_sdvo));
1295 /* Set the input timing to the screen. Assume always input 0. */
1296 if (!intel_sdvo_set_target_input(intel_sdvo))
1299 if (crtc_state->has_hdmi_sink) {
1300 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1301 intel_sdvo_set_colorimetry(intel_sdvo,
1302 SDVO_COLORIMETRY_RGB256);
1303 intel_sdvo_set_avi_infoframe(intel_sdvo, crtc_state);
1305 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1307 if (intel_sdvo->is_tv &&
1308 !intel_sdvo_set_tv_format(intel_sdvo, conn_state))
1311 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1313 if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
1314 input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
1315 if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
1316 DRM_INFO("Setting input timings on %s failed\n",
1317 SDVO_NAME(intel_sdvo));
1319 switch (crtc_state->pixel_multiplier) {
1321 WARN(1, "unknown pixel multiplier specified\n");
1322 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1323 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1324 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1326 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1329 /* Set the SDVO control regs. */
1330 if (INTEL_GEN(dev_priv) >= 4) {
1331 /* The real mode polarity is set by the SDVO commands, using
1332 * struct intel_sdvo_dtd. */
1333 sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
1334 if (!HAS_PCH_SPLIT(dev_priv) && crtc_state->limited_color_range)
1335 sdvox |= HDMI_COLOR_RANGE_16_235;
1336 if (INTEL_GEN(dev_priv) < 5)
1337 sdvox |= SDVO_BORDER_ENABLE;
1339 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1340 if (intel_sdvo->port == PORT_B)
1341 sdvox &= SDVOB_PRESERVE_MASK;
1343 sdvox &= SDVOC_PRESERVE_MASK;
1344 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1347 if (HAS_PCH_CPT(dev_priv))
1348 sdvox |= SDVO_PIPE_SEL_CPT(crtc->pipe);
1350 sdvox |= SDVO_PIPE_SEL(crtc->pipe);
1352 if (crtc_state->has_audio)
1353 sdvox |= SDVO_AUDIO_ENABLE;
1355 if (INTEL_GEN(dev_priv) >= 4) {
1356 /* done in crtc_mode_set as the dpll_md reg must be written early */
1357 } else if (IS_I945G(dev_priv) || IS_I945GM(dev_priv) ||
1358 IS_G33(dev_priv) || IS_PINEVIEW(dev_priv)) {
1359 /* done in crtc_mode_set as it lives inside the dpll register */
1361 sdvox |= (crtc_state->pixel_multiplier - 1)
1362 << SDVO_PORT_MULTIPLY_SHIFT;
1365 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1366 INTEL_GEN(dev_priv) < 5)
1367 sdvox |= SDVO_STALL_SELECT;
1368 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1371 static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
1373 struct intel_sdvo_connector *intel_sdvo_connector =
1374 to_intel_sdvo_connector(&connector->base);
1375 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
1376 u16 active_outputs = 0;
1378 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1380 if (active_outputs & intel_sdvo_connector->output_flag)
1386 static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
1389 struct drm_device *dev = encoder->base.dev;
1390 struct drm_i915_private *dev_priv = to_i915(dev);
1391 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1392 u16 active_outputs = 0;
1395 tmp = I915_READ(intel_sdvo->sdvo_reg);
1396 intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
1398 if (!(tmp & SDVO_ENABLE) && (active_outputs == 0))
1401 if (HAS_PCH_CPT(dev_priv))
1402 *pipe = PORT_TO_PIPE_CPT(tmp);
1404 *pipe = PORT_TO_PIPE(tmp);
1409 static void intel_sdvo_get_config(struct intel_encoder *encoder,
1410 struct intel_crtc_state *pipe_config)
1412 struct drm_device *dev = encoder->base.dev;
1413 struct drm_i915_private *dev_priv = to_i915(dev);
1414 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1415 struct intel_sdvo_dtd dtd;
1416 int encoder_pixel_multiplier = 0;
1418 u32 flags = 0, sdvox;
1422 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1424 ret = intel_sdvo_get_input_timing(intel_sdvo, &dtd);
1426 /* Some sdvo encoders are not spec compliant and don't
1427 * implement the mandatory get_timings function. */
1428 DRM_DEBUG_DRIVER("failed to retrieve SDVO DTD\n");
1429 pipe_config->quirks |= PIPE_CONFIG_QUIRK_MODE_SYNC_FLAGS;
1431 if (dtd.part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
1432 flags |= DRM_MODE_FLAG_PHSYNC;
1434 flags |= DRM_MODE_FLAG_NHSYNC;
1436 if (dtd.part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
1437 flags |= DRM_MODE_FLAG_PVSYNC;
1439 flags |= DRM_MODE_FLAG_NVSYNC;
1442 pipe_config->base.adjusted_mode.flags |= flags;
1445 * pixel multiplier readout is tricky: Only on i915g/gm it is stored in
1446 * the sdvo port register, on all other platforms it is part of the dpll
1447 * state. Since the general pipe state readout happens before the
1448 * encoder->get_config we so already have a valid pixel multplier on all
1451 if (IS_I915G(dev_priv) || IS_I915GM(dev_priv)) {
1452 pipe_config->pixel_multiplier =
1453 ((sdvox & SDVO_PORT_MULTIPLY_MASK)
1454 >> SDVO_PORT_MULTIPLY_SHIFT) + 1;
1457 dotclock = pipe_config->port_clock;
1459 if (pipe_config->pixel_multiplier)
1460 dotclock /= pipe_config->pixel_multiplier;
1462 pipe_config->base.adjusted_mode.crtc_clock = dotclock;
1464 /* Cross check the port pixel multiplier with the sdvo encoder state. */
1465 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_CLOCK_RATE_MULT,
1468 case SDVO_CLOCK_RATE_MULT_1X:
1469 encoder_pixel_multiplier = 1;
1471 case SDVO_CLOCK_RATE_MULT_2X:
1472 encoder_pixel_multiplier = 2;
1474 case SDVO_CLOCK_RATE_MULT_4X:
1475 encoder_pixel_multiplier = 4;
1480 if (sdvox & HDMI_COLOR_RANGE_16_235)
1481 pipe_config->limited_color_range = true;
1483 if (intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_ENCODE,
1485 if (val == SDVO_ENCODE_HDMI)
1486 pipe_config->has_hdmi_sink = true;
1489 WARN(encoder_pixel_multiplier != pipe_config->pixel_multiplier,
1490 "SDVO pixel multiplier mismatch, port: %i, encoder: %i\n",
1491 pipe_config->pixel_multiplier, encoder_pixel_multiplier);
1494 static void intel_disable_sdvo(struct intel_encoder *encoder,
1495 struct intel_crtc_state *old_crtc_state,
1496 struct drm_connector_state *conn_state)
1498 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
1499 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1500 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc);
1503 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1505 intel_sdvo_set_encoder_power_state(intel_sdvo,
1508 temp = I915_READ(intel_sdvo->sdvo_reg);
1510 temp &= ~SDVO_ENABLE;
1511 intel_sdvo_write_sdvox(intel_sdvo, temp);
1514 * HW workaround for IBX, we need to move the port
1515 * to transcoder A after disabling it to allow the
1516 * matching DP port to be enabled on transcoder A.
1518 if (HAS_PCH_IBX(dev_priv) && crtc->pipe == PIPE_B) {
1520 * We get CPU/PCH FIFO underruns on the other pipe when
1521 * doing the workaround. Sweep them under the rug.
1523 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1524 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, false);
1526 temp &= ~SDVO_PIPE_B_SELECT;
1527 temp |= SDVO_ENABLE;
1528 intel_sdvo_write_sdvox(intel_sdvo, temp);
1530 temp &= ~SDVO_ENABLE;
1531 intel_sdvo_write_sdvox(intel_sdvo, temp);
1533 intel_wait_for_vblank_if_active(dev_priv, PIPE_A);
1534 intel_set_cpu_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1535 intel_set_pch_fifo_underrun_reporting(dev_priv, PIPE_A, true);
1539 static void pch_disable_sdvo(struct intel_encoder *encoder,
1540 struct intel_crtc_state *old_crtc_state,
1541 struct drm_connector_state *old_conn_state)
1545 static void pch_post_disable_sdvo(struct intel_encoder *encoder,
1546 struct intel_crtc_state *old_crtc_state,
1547 struct drm_connector_state *old_conn_state)
1549 intel_disable_sdvo(encoder, old_crtc_state, old_conn_state);
1552 static void intel_enable_sdvo(struct intel_encoder *encoder,
1553 struct intel_crtc_state *pipe_config,
1554 struct drm_connector_state *conn_state)
1556 struct drm_device *dev = encoder->base.dev;
1557 struct drm_i915_private *dev_priv = to_i915(dev);
1558 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1559 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
1561 bool input1, input2;
1565 temp = I915_READ(intel_sdvo->sdvo_reg);
1566 temp |= SDVO_ENABLE;
1567 intel_sdvo_write_sdvox(intel_sdvo, temp);
1569 for (i = 0; i < 2; i++)
1570 intel_wait_for_vblank(dev_priv, intel_crtc->pipe);
1572 success = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1573 /* Warn if the device reported failure to sync.
1574 * A lot of SDVO devices fail to notify of sync, but it's
1575 * a given it the status is a success, we succeeded.
1577 if (success && !input1) {
1578 DRM_DEBUG_KMS("First %s output reported failure to "
1579 "sync\n", SDVO_NAME(intel_sdvo));
1583 intel_sdvo_set_encoder_power_state(intel_sdvo,
1585 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1588 static enum drm_mode_status
1589 intel_sdvo_mode_valid(struct drm_connector *connector,
1590 struct drm_display_mode *mode)
1592 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1593 int max_dotclk = to_i915(connector->dev)->max_dotclk_freq;
1595 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1596 return MODE_NO_DBLESCAN;
1598 if (intel_sdvo->pixel_clock_min > mode->clock)
1599 return MODE_CLOCK_LOW;
1601 if (intel_sdvo->pixel_clock_max < mode->clock)
1602 return MODE_CLOCK_HIGH;
1604 if (mode->clock > max_dotclk)
1605 return MODE_CLOCK_HIGH;
1607 if (intel_sdvo->is_lvds) {
1608 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1611 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1618 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1620 BUILD_BUG_ON(sizeof(*caps) != 8);
1621 if (!intel_sdvo_get_value(intel_sdvo,
1622 SDVO_CMD_GET_DEVICE_CAPS,
1623 caps, sizeof(*caps)))
1626 DRM_DEBUG_KMS("SDVO capabilities:\n"
1629 " device_rev_id: %d\n"
1630 " sdvo_version_major: %d\n"
1631 " sdvo_version_minor: %d\n"
1632 " sdvo_inputs_mask: %d\n"
1633 " smooth_scaling: %d\n"
1634 " sharp_scaling: %d\n"
1636 " down_scaling: %d\n"
1637 " stall_support: %d\n"
1638 " output_flags: %d\n",
1641 caps->device_rev_id,
1642 caps->sdvo_version_major,
1643 caps->sdvo_version_minor,
1644 caps->sdvo_inputs_mask,
1645 caps->smooth_scaling,
1646 caps->sharp_scaling,
1649 caps->stall_support,
1650 caps->output_flags);
1655 static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
1657 struct drm_i915_private *dev_priv = to_i915(intel_sdvo->base.base.dev);
1660 if (!I915_HAS_HOTPLUG(dev_priv))
1663 /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
1665 if (IS_I945G(dev_priv) || IS_I945GM(dev_priv))
1668 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1669 &hotplug, sizeof(hotplug)))
1675 static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
1677 struct intel_sdvo *intel_sdvo = to_sdvo(encoder);
1679 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
1680 &intel_sdvo->hotplug_active, 2);
1684 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1686 /* Is there more than one type of output? */
1687 return hweight16(intel_sdvo->caps.output_flags) > 1;
1690 static struct edid *
1691 intel_sdvo_get_edid(struct drm_connector *connector)
1693 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1694 return drm_get_edid(connector, &sdvo->ddc);
1697 /* Mac mini hack -- use the same DDC as the analog connector */
1698 static struct edid *
1699 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1701 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1703 return drm_get_edid(connector,
1704 intel_gmbus_get_adapter(dev_priv,
1705 dev_priv->vbt.crt_ddc_pin));
1708 static enum drm_connector_status
1709 intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
1711 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1712 enum drm_connector_status status;
1715 edid = intel_sdvo_get_edid(connector);
1717 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1718 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1721 * Don't use the 1 as the argument of DDC bus switch to get
1722 * the EDID. It is used for SDVO SPD ROM.
1724 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1725 intel_sdvo->ddc_bus = ddc;
1726 edid = intel_sdvo_get_edid(connector);
1731 * If we found the EDID on the other bus,
1732 * assume that is the correct DDC bus.
1735 intel_sdvo->ddc_bus = saved_ddc;
1739 * When there is no edid and no monitor is connected with VGA
1740 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1743 edid = intel_sdvo_get_analog_edid(connector);
1745 status = connector_status_unknown;
1747 /* DDC bus is shared, match EDID to connector type */
1748 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1749 status = connector_status_connected;
1750 if (intel_sdvo->is_hdmi) {
1751 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1752 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1753 intel_sdvo->rgb_quant_range_selectable =
1754 drm_rgb_quant_range_selectable(edid);
1757 status = connector_status_disconnected;
1765 intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
1768 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1769 bool connector_is_digital = !!IS_DIGITAL(sdvo);
1771 DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
1772 connector_is_digital, monitor_is_digital);
1773 return connector_is_digital == monitor_is_digital;
1776 static enum drm_connector_status
1777 intel_sdvo_detect(struct drm_connector *connector, bool force)
1780 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1781 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1782 enum drm_connector_status ret;
1784 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1785 connector->base.id, connector->name);
1787 if (!intel_sdvo_get_value(intel_sdvo,
1788 SDVO_CMD_GET_ATTACHED_DISPLAYS,
1790 return connector_status_unknown;
1792 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1793 response & 0xff, response >> 8,
1794 intel_sdvo_connector->output_flag);
1797 return connector_status_disconnected;
1799 intel_sdvo->attached_output = response;
1801 intel_sdvo->has_hdmi_monitor = false;
1802 intel_sdvo->has_hdmi_audio = false;
1803 intel_sdvo->rgb_quant_range_selectable = false;
1805 if ((intel_sdvo_connector->output_flag & response) == 0)
1806 ret = connector_status_disconnected;
1807 else if (IS_TMDS(intel_sdvo_connector))
1808 ret = intel_sdvo_tmds_sink_detect(connector);
1812 /* if we have an edid check it matches the connection */
1813 edid = intel_sdvo_get_edid(connector);
1815 edid = intel_sdvo_get_analog_edid(connector);
1817 if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
1819 ret = connector_status_connected;
1821 ret = connector_status_disconnected;
1825 ret = connector_status_connected;
1828 /* May update encoder flag for like clock for SDVO TV, etc.*/
1829 if (ret == connector_status_connected) {
1830 intel_sdvo->is_tv = false;
1831 intel_sdvo->is_lvds = false;
1833 if (response & SDVO_TV_MASK)
1834 intel_sdvo->is_tv = true;
1835 if (response & SDVO_LVDS_MASK)
1836 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1842 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1846 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1847 connector->base.id, connector->name);
1849 /* set the bus switch and get the modes */
1850 edid = intel_sdvo_get_edid(connector);
1853 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1854 * link between analog and digital outputs. So, if the regular SDVO
1855 * DDC fails, check to see if the analog output is disconnected, in
1856 * which case we'll look there for the digital DDC data.
1859 edid = intel_sdvo_get_analog_edid(connector);
1862 if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
1864 drm_mode_connector_update_edid_property(connector, edid);
1865 drm_add_edid_modes(connector, edid);
1873 * Set of SDVO TV modes.
1874 * Note! This is in reply order (see loop in get_tv_modes).
1875 * XXX: all 60Hz refresh?
1877 static const struct drm_display_mode sdvo_tv_modes[] = {
1878 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1879 416, 0, 200, 201, 232, 233, 0,
1880 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1881 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1882 416, 0, 240, 241, 272, 273, 0,
1883 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1884 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1885 496, 0, 300, 301, 332, 333, 0,
1886 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1887 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1888 736, 0, 350, 351, 382, 383, 0,
1889 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1890 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1891 736, 0, 400, 401, 432, 433, 0,
1892 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1893 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1894 736, 0, 480, 481, 512, 513, 0,
1895 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1896 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1897 800, 0, 480, 481, 512, 513, 0,
1898 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1899 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1900 800, 0, 576, 577, 608, 609, 0,
1901 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1902 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1903 816, 0, 350, 351, 382, 383, 0,
1904 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1905 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1906 816, 0, 400, 401, 432, 433, 0,
1907 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1908 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1909 816, 0, 480, 481, 512, 513, 0,
1910 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1911 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1912 816, 0, 540, 541, 572, 573, 0,
1913 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1914 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1915 816, 0, 576, 577, 608, 609, 0,
1916 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1917 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1918 864, 0, 576, 577, 608, 609, 0,
1919 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1920 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1921 896, 0, 600, 601, 632, 633, 0,
1922 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1923 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1924 928, 0, 624, 625, 656, 657, 0,
1925 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1926 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1927 1016, 0, 766, 767, 798, 799, 0,
1928 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1929 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1930 1120, 0, 768, 769, 800, 801, 0,
1931 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1932 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1933 1376, 0, 1024, 1025, 1056, 1057, 0,
1934 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1937 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1939 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1940 const struct drm_connector_state *conn_state = connector->state;
1941 struct intel_sdvo_sdtv_resolution_request tv_res;
1942 uint32_t reply = 0, format_map = 0;
1945 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1946 connector->base.id, connector->name);
1948 /* Read the list of supported input resolutions for the selected TV
1951 format_map = 1 << conn_state->tv.mode;
1952 memcpy(&tv_res, &format_map,
1953 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1955 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1958 BUILD_BUG_ON(sizeof(tv_res) != 3);
1959 if (!intel_sdvo_write_cmd(intel_sdvo,
1960 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1961 &tv_res, sizeof(tv_res)))
1963 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1966 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1967 if (reply & (1 << i)) {
1968 struct drm_display_mode *nmode;
1969 nmode = drm_mode_duplicate(connector->dev,
1972 drm_mode_probed_add(connector, nmode);
1976 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1978 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1979 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1980 struct drm_display_mode *newmode;
1982 DRM_DEBUG_KMS("[CONNECTOR:%d:%s]\n",
1983 connector->base.id, connector->name);
1986 * Fetch modes from VBT. For SDVO prefer the VBT mode since some
1987 * SDVO->LVDS transcoders can't cope with the EDID mode.
1989 if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
1990 newmode = drm_mode_duplicate(connector->dev,
1991 dev_priv->vbt.sdvo_lvds_vbt_mode);
1992 if (newmode != NULL) {
1993 /* Guarantee the mode is preferred */
1994 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1995 DRM_MODE_TYPE_DRIVER);
1996 drm_mode_probed_add(connector, newmode);
2001 * Attempt to get the mode list from DDC.
2002 * Assume that the preferred modes are
2003 * arranged in priority order.
2005 intel_ddc_get_modes(connector, &intel_sdvo->ddc);
2007 list_for_each_entry(newmode, &connector->probed_modes, head) {
2008 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
2009 intel_sdvo->sdvo_lvds_fixed_mode =
2010 drm_mode_duplicate(connector->dev, newmode);
2012 intel_sdvo->is_lvds = true;
2018 static int intel_sdvo_get_modes(struct drm_connector *connector)
2020 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2022 if (IS_TV(intel_sdvo_connector))
2023 intel_sdvo_get_tv_modes(connector);
2024 else if (IS_LVDS(intel_sdvo_connector))
2025 intel_sdvo_get_lvds_modes(connector);
2027 intel_sdvo_get_ddc_modes(connector);
2029 return !list_empty(&connector->probed_modes);
2032 static void intel_sdvo_destroy(struct drm_connector *connector)
2034 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2036 drm_connector_cleanup(connector);
2037 kfree(intel_sdvo_connector);
2041 intel_sdvo_connector_atomic_get_property(struct drm_connector *connector,
2042 const struct drm_connector_state *state,
2043 struct drm_property *property,
2046 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2047 const struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state((void *)state);
2049 if (property == intel_sdvo_connector->tv_format) {
2052 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2053 if (state->tv.mode == intel_sdvo_connector->tv_format_supported[i]) {
2061 } else if (property == intel_sdvo_connector->top ||
2062 property == intel_sdvo_connector->bottom)
2063 *val = intel_sdvo_connector->max_vscan - sdvo_state->tv.overscan_v;
2064 else if (property == intel_sdvo_connector->left ||
2065 property == intel_sdvo_connector->right)
2066 *val = intel_sdvo_connector->max_hscan - sdvo_state->tv.overscan_h;
2067 else if (property == intel_sdvo_connector->hpos)
2068 *val = sdvo_state->tv.hpos;
2069 else if (property == intel_sdvo_connector->vpos)
2070 *val = sdvo_state->tv.vpos;
2071 else if (property == intel_sdvo_connector->saturation)
2072 *val = state->tv.saturation;
2073 else if (property == intel_sdvo_connector->contrast)
2074 *val = state->tv.contrast;
2075 else if (property == intel_sdvo_connector->hue)
2076 *val = state->tv.hue;
2077 else if (property == intel_sdvo_connector->brightness)
2078 *val = state->tv.brightness;
2079 else if (property == intel_sdvo_connector->sharpness)
2080 *val = sdvo_state->tv.sharpness;
2081 else if (property == intel_sdvo_connector->flicker_filter)
2082 *val = sdvo_state->tv.flicker_filter;
2083 else if (property == intel_sdvo_connector->flicker_filter_2d)
2084 *val = sdvo_state->tv.flicker_filter_2d;
2085 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2086 *val = sdvo_state->tv.flicker_filter_adaptive;
2087 else if (property == intel_sdvo_connector->tv_chroma_filter)
2088 *val = sdvo_state->tv.chroma_filter;
2089 else if (property == intel_sdvo_connector->tv_luma_filter)
2090 *val = sdvo_state->tv.luma_filter;
2091 else if (property == intel_sdvo_connector->dot_crawl)
2092 *val = sdvo_state->tv.dot_crawl;
2094 return intel_digital_connector_atomic_get_property(connector, state, property, val);
2100 intel_sdvo_connector_atomic_set_property(struct drm_connector *connector,
2101 struct drm_connector_state *state,
2102 struct drm_property *property,
2105 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
2106 struct intel_sdvo_connector_state *sdvo_state = to_intel_sdvo_connector_state(state);
2108 if (property == intel_sdvo_connector->tv_format) {
2109 state->tv.mode = intel_sdvo_connector->tv_format_supported[val];
2112 struct drm_crtc_state *crtc_state =
2113 drm_atomic_get_new_crtc_state(state->state, state->crtc);
2115 crtc_state->connectors_changed = true;
2117 } else if (property == intel_sdvo_connector->top ||
2118 property == intel_sdvo_connector->bottom)
2119 /* Cannot set these independent from each other */
2120 sdvo_state->tv.overscan_v = intel_sdvo_connector->max_vscan - val;
2121 else if (property == intel_sdvo_connector->left ||
2122 property == intel_sdvo_connector->right)
2123 /* Cannot set these independent from each other */
2124 sdvo_state->tv.overscan_h = intel_sdvo_connector->max_hscan - val;
2125 else if (property == intel_sdvo_connector->hpos)
2126 sdvo_state->tv.hpos = val;
2127 else if (property == intel_sdvo_connector->vpos)
2128 sdvo_state->tv.vpos = val;
2129 else if (property == intel_sdvo_connector->saturation)
2130 state->tv.saturation = val;
2131 else if (property == intel_sdvo_connector->contrast)
2132 state->tv.contrast = val;
2133 else if (property == intel_sdvo_connector->hue)
2134 state->tv.hue = val;
2135 else if (property == intel_sdvo_connector->brightness)
2136 state->tv.brightness = val;
2137 else if (property == intel_sdvo_connector->sharpness)
2138 sdvo_state->tv.sharpness = val;
2139 else if (property == intel_sdvo_connector->flicker_filter)
2140 sdvo_state->tv.flicker_filter = val;
2141 else if (property == intel_sdvo_connector->flicker_filter_2d)
2142 sdvo_state->tv.flicker_filter_2d = val;
2143 else if (property == intel_sdvo_connector->flicker_filter_adaptive)
2144 sdvo_state->tv.flicker_filter_adaptive = val;
2145 else if (property == intel_sdvo_connector->tv_chroma_filter)
2146 sdvo_state->tv.chroma_filter = val;
2147 else if (property == intel_sdvo_connector->tv_luma_filter)
2148 sdvo_state->tv.luma_filter = val;
2149 else if (property == intel_sdvo_connector->dot_crawl)
2150 sdvo_state->tv.dot_crawl = val;
2152 return intel_digital_connector_atomic_set_property(connector, state, property, val);
2158 intel_sdvo_connector_register(struct drm_connector *connector)
2160 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2163 ret = intel_connector_register(connector);
2167 return sysfs_create_link(&connector->kdev->kobj,
2168 &sdvo->ddc.dev.kobj,
2169 sdvo->ddc.dev.kobj.name);
2173 intel_sdvo_connector_unregister(struct drm_connector *connector)
2175 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
2177 sysfs_remove_link(&connector->kdev->kobj,
2178 sdvo->ddc.dev.kobj.name);
2179 intel_connector_unregister(connector);
2182 static struct drm_connector_state *
2183 intel_sdvo_connector_duplicate_state(struct drm_connector *connector)
2185 struct intel_sdvo_connector_state *state;
2187 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
2191 __drm_atomic_helper_connector_duplicate_state(connector, &state->base.base);
2192 return &state->base.base;
2195 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
2196 .dpms = drm_atomic_helper_connector_dpms,
2197 .detect = intel_sdvo_detect,
2198 .fill_modes = drm_helper_probe_single_connector_modes,
2199 .set_property = drm_atomic_helper_connector_set_property,
2200 .atomic_get_property = intel_sdvo_connector_atomic_get_property,
2201 .atomic_set_property = intel_sdvo_connector_atomic_set_property,
2202 .late_register = intel_sdvo_connector_register,
2203 .early_unregister = intel_sdvo_connector_unregister,
2204 .destroy = intel_sdvo_destroy,
2205 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
2206 .atomic_duplicate_state = intel_sdvo_connector_duplicate_state,
2209 static int intel_sdvo_atomic_check(struct drm_connector *conn,
2210 struct drm_connector_state *new_conn_state)
2212 struct drm_atomic_state *state = new_conn_state->state;
2213 struct drm_connector_state *old_conn_state =
2214 drm_atomic_get_old_connector_state(state, conn);
2215 struct intel_sdvo_connector_state *old_state =
2216 to_intel_sdvo_connector_state(old_conn_state);
2217 struct intel_sdvo_connector_state *new_state =
2218 to_intel_sdvo_connector_state(new_conn_state);
2220 if (new_conn_state->crtc &&
2221 (memcmp(&old_state->tv, &new_state->tv, sizeof(old_state->tv)) ||
2222 memcmp(&old_conn_state->tv, &new_conn_state->tv, sizeof(old_conn_state->tv)))) {
2223 struct drm_crtc_state *crtc_state =
2224 drm_atomic_get_new_crtc_state(new_conn_state->state,
2225 new_conn_state->crtc);
2227 crtc_state->connectors_changed = true;
2230 return intel_digital_connector_atomic_check(conn, new_conn_state);
2233 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
2234 .get_modes = intel_sdvo_get_modes,
2235 .mode_valid = intel_sdvo_mode_valid,
2236 .atomic_check = intel_sdvo_atomic_check,
2239 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
2241 struct intel_sdvo *intel_sdvo = to_sdvo(to_intel_encoder(encoder));
2243 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
2244 drm_mode_destroy(encoder->dev,
2245 intel_sdvo->sdvo_lvds_fixed_mode);
2247 i2c_del_adapter(&intel_sdvo->ddc);
2248 intel_encoder_destroy(encoder);
2251 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
2252 .destroy = intel_sdvo_enc_destroy,
2256 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
2259 unsigned int num_bits;
2261 /* Make a mask of outputs less than or equal to our own priority in the
2264 switch (sdvo->controlled_output) {
2265 case SDVO_OUTPUT_LVDS1:
2266 mask |= SDVO_OUTPUT_LVDS1;
2267 case SDVO_OUTPUT_LVDS0:
2268 mask |= SDVO_OUTPUT_LVDS0;
2269 case SDVO_OUTPUT_TMDS1:
2270 mask |= SDVO_OUTPUT_TMDS1;
2271 case SDVO_OUTPUT_TMDS0:
2272 mask |= SDVO_OUTPUT_TMDS0;
2273 case SDVO_OUTPUT_RGB1:
2274 mask |= SDVO_OUTPUT_RGB1;
2275 case SDVO_OUTPUT_RGB0:
2276 mask |= SDVO_OUTPUT_RGB0;
2280 /* Count bits to find what number we are in the priority list. */
2281 mask &= sdvo->caps.output_flags;
2282 num_bits = hweight16(mask);
2283 /* If more than 3 outputs, default to DDC bus 3 for now. */
2287 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
2288 sdvo->ddc_bus = 1 << num_bits;
2292 * Choose the appropriate DDC bus for control bus switch command for this
2293 * SDVO output based on the controlled output.
2295 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
2296 * outputs, then LVDS outputs.
2299 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
2300 struct intel_sdvo *sdvo)
2302 struct sdvo_device_mapping *mapping;
2304 if (sdvo->port == PORT_B)
2305 mapping = &dev_priv->vbt.sdvo_mappings[0];
2307 mapping = &dev_priv->vbt.sdvo_mappings[1];
2309 if (mapping->initialized)
2310 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
2312 intel_sdvo_guess_ddc_bus(sdvo);
2316 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
2317 struct intel_sdvo *sdvo)
2319 struct sdvo_device_mapping *mapping;
2322 if (sdvo->port == PORT_B)
2323 mapping = &dev_priv->vbt.sdvo_mappings[0];
2325 mapping = &dev_priv->vbt.sdvo_mappings[1];
2327 if (mapping->initialized &&
2328 intel_gmbus_is_valid_pin(dev_priv, mapping->i2c_pin))
2329 pin = mapping->i2c_pin;
2331 pin = GMBUS_PIN_DPB;
2333 sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
2335 /* With gmbus we should be able to drive sdvo i2c at 2MHz, but somehow
2336 * our code totally fails once we start using gmbus. Hence fall back to
2337 * bit banging for now. */
2338 intel_gmbus_force_bit(sdvo->i2c, true);
2341 /* undo any changes intel_sdvo_select_i2c_bus() did to sdvo->i2c */
2343 intel_sdvo_unselect_i2c_bus(struct intel_sdvo *sdvo)
2345 intel_gmbus_force_bit(sdvo->i2c, false);
2349 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
2351 return intel_sdvo_check_supp_encode(intel_sdvo);
2355 intel_sdvo_get_slave_addr(struct drm_i915_private *dev_priv,
2356 struct intel_sdvo *sdvo)
2358 struct sdvo_device_mapping *my_mapping, *other_mapping;
2360 if (sdvo->port == PORT_B) {
2361 my_mapping = &dev_priv->vbt.sdvo_mappings[0];
2362 other_mapping = &dev_priv->vbt.sdvo_mappings[1];
2364 my_mapping = &dev_priv->vbt.sdvo_mappings[1];
2365 other_mapping = &dev_priv->vbt.sdvo_mappings[0];
2368 /* If the BIOS described our SDVO device, take advantage of it. */
2369 if (my_mapping->slave_addr)
2370 return my_mapping->slave_addr;
2372 /* If the BIOS only described a different SDVO device, use the
2373 * address that it isn't using.
2375 if (other_mapping->slave_addr) {
2376 if (other_mapping->slave_addr == 0x70)
2382 /* No SDVO device info is found for another DVO port,
2383 * so use mapping assumption we had before BIOS parsing.
2385 if (sdvo->port == PORT_B)
2392 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2393 struct intel_sdvo *encoder)
2395 struct drm_connector *drm_connector;
2398 drm_connector = &connector->base.base;
2399 ret = drm_connector_init(encoder->base.base.dev,
2401 &intel_sdvo_connector_funcs,
2402 connector->base.base.connector_type);
2406 drm_connector_helper_add(drm_connector,
2407 &intel_sdvo_connector_helper_funcs);
2409 connector->base.base.interlace_allowed = 1;
2410 connector->base.base.doublescan_allowed = 0;
2411 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2412 connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
2414 intel_connector_attach_encoder(&connector->base, &encoder->base);
2420 intel_sdvo_add_hdmi_properties(struct intel_sdvo *intel_sdvo,
2421 struct intel_sdvo_connector *connector)
2423 struct drm_i915_private *dev_priv = to_i915(connector->base.base.dev);
2425 intel_attach_force_audio_property(&connector->base.base);
2426 if (INTEL_GEN(dev_priv) >= 4 && IS_MOBILE(dev_priv)) {
2427 intel_attach_broadcast_rgb_property(&connector->base.base);
2429 intel_attach_aspect_ratio_property(&connector->base.base);
2430 connector->base.base.state->picture_aspect_ratio = HDMI_PICTURE_ASPECT_NONE;
2433 static struct intel_sdvo_connector *intel_sdvo_connector_alloc(void)
2435 struct intel_sdvo_connector *sdvo_connector;
2436 struct intel_sdvo_connector_state *conn_state;
2438 sdvo_connector = kzalloc(sizeof(*sdvo_connector), GFP_KERNEL);
2439 if (!sdvo_connector)
2442 conn_state = kzalloc(sizeof(*conn_state), GFP_KERNEL);
2444 kfree(sdvo_connector);
2448 __drm_atomic_helper_connector_reset(&sdvo_connector->base.base,
2449 &conn_state->base.base);
2451 return sdvo_connector;
2455 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2457 struct drm_encoder *encoder = &intel_sdvo->base.base;
2458 struct drm_connector *connector;
2459 struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
2460 struct intel_connector *intel_connector;
2461 struct intel_sdvo_connector *intel_sdvo_connector;
2463 DRM_DEBUG_KMS("initialising DVI device %d\n", device);
2465 intel_sdvo_connector = intel_sdvo_connector_alloc();
2466 if (!intel_sdvo_connector)
2470 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2471 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2472 } else if (device == 1) {
2473 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2474 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2477 intel_connector = &intel_sdvo_connector->base;
2478 connector = &intel_connector->base;
2479 if (intel_sdvo_get_hotplug_support(intel_sdvo) &
2480 intel_sdvo_connector->output_flag) {
2481 intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
2482 /* Some SDVO devices have one-shot hotplug interrupts.
2483 * Ensure that they get re-enabled when an interrupt happens.
2485 intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
2486 intel_sdvo_enable_hotplug(intel_encoder);
2488 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2490 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2491 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2493 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2494 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2495 intel_sdvo->is_hdmi = true;
2498 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2499 kfree(intel_sdvo_connector);
2503 if (intel_sdvo->is_hdmi)
2504 intel_sdvo_add_hdmi_properties(intel_sdvo, intel_sdvo_connector);
2510 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2512 struct drm_encoder *encoder = &intel_sdvo->base.base;
2513 struct drm_connector *connector;
2514 struct intel_connector *intel_connector;
2515 struct intel_sdvo_connector *intel_sdvo_connector;
2517 DRM_DEBUG_KMS("initialising TV type %d\n", type);
2519 intel_sdvo_connector = intel_sdvo_connector_alloc();
2520 if (!intel_sdvo_connector)
2523 intel_connector = &intel_sdvo_connector->base;
2524 connector = &intel_connector->base;
2525 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2526 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2528 intel_sdvo->controlled_output |= type;
2529 intel_sdvo_connector->output_flag = type;
2531 intel_sdvo->is_tv = true;
2533 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2534 kfree(intel_sdvo_connector);
2538 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2541 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2547 intel_sdvo_destroy(connector);
2552 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2554 struct drm_encoder *encoder = &intel_sdvo->base.base;
2555 struct drm_connector *connector;
2556 struct intel_connector *intel_connector;
2557 struct intel_sdvo_connector *intel_sdvo_connector;
2559 DRM_DEBUG_KMS("initialising analog device %d\n", device);
2561 intel_sdvo_connector = intel_sdvo_connector_alloc();
2562 if (!intel_sdvo_connector)
2565 intel_connector = &intel_sdvo_connector->base;
2566 connector = &intel_connector->base;
2567 intel_connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2568 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2569 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2572 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2573 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2574 } else if (device == 1) {
2575 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2576 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2579 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2580 kfree(intel_sdvo_connector);
2588 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2590 struct drm_encoder *encoder = &intel_sdvo->base.base;
2591 struct drm_connector *connector;
2592 struct intel_connector *intel_connector;
2593 struct intel_sdvo_connector *intel_sdvo_connector;
2595 DRM_DEBUG_KMS("initialising LVDS device %d\n", device);
2597 intel_sdvo_connector = intel_sdvo_connector_alloc();
2598 if (!intel_sdvo_connector)
2601 intel_connector = &intel_sdvo_connector->base;
2602 connector = &intel_connector->base;
2603 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2604 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2607 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2608 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2609 } else if (device == 1) {
2610 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2611 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2614 if (intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo) < 0) {
2615 kfree(intel_sdvo_connector);
2619 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2625 intel_sdvo_destroy(connector);
2630 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2632 intel_sdvo->is_tv = false;
2633 intel_sdvo->is_lvds = false;
2635 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2637 if (flags & SDVO_OUTPUT_TMDS0)
2638 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2641 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2642 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2645 /* TV has no XXX1 function block */
2646 if (flags & SDVO_OUTPUT_SVID0)
2647 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2650 if (flags & SDVO_OUTPUT_CVBS0)
2651 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2654 if (flags & SDVO_OUTPUT_YPRPB0)
2655 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
2658 if (flags & SDVO_OUTPUT_RGB0)
2659 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2662 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2663 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2666 if (flags & SDVO_OUTPUT_LVDS0)
2667 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2670 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2671 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2674 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2675 unsigned char bytes[2];
2677 intel_sdvo->controlled_output = 0;
2678 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2679 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2680 SDVO_NAME(intel_sdvo),
2681 bytes[0], bytes[1]);
2684 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
2689 static void intel_sdvo_output_cleanup(struct intel_sdvo *intel_sdvo)
2691 struct drm_device *dev = intel_sdvo->base.base.dev;
2692 struct drm_connector *connector, *tmp;
2694 list_for_each_entry_safe(connector, tmp,
2695 &dev->mode_config.connector_list, head) {
2696 if (intel_attached_encoder(connector) == &intel_sdvo->base) {
2697 drm_connector_unregister(connector);
2698 intel_sdvo_destroy(connector);
2703 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2704 struct intel_sdvo_connector *intel_sdvo_connector,
2707 struct drm_device *dev = intel_sdvo->base.base.dev;
2708 struct intel_sdvo_tv_format format;
2709 uint32_t format_map, i;
2711 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2714 BUILD_BUG_ON(sizeof(format) != 6);
2715 if (!intel_sdvo_get_value(intel_sdvo,
2716 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2717 &format, sizeof(format)))
2720 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2722 if (format_map == 0)
2725 intel_sdvo_connector->format_supported_num = 0;
2726 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2727 if (format_map & (1 << i))
2728 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2731 intel_sdvo_connector->tv_format =
2732 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2733 "mode", intel_sdvo_connector->format_supported_num);
2734 if (!intel_sdvo_connector->tv_format)
2737 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2738 drm_property_add_enum(
2739 intel_sdvo_connector->tv_format, i,
2740 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2742 intel_sdvo_connector->base.base.state->tv.mode = intel_sdvo_connector->tv_format_supported[0];
2743 drm_object_attach_property(&intel_sdvo_connector->base.base.base,
2744 intel_sdvo_connector->tv_format, 0);
2749 #define _ENHANCEMENT(state_assignment, name, NAME) do { \
2750 if (enhancements.name) { \
2751 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2752 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2754 intel_sdvo_connector->name = \
2755 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2756 if (!intel_sdvo_connector->name) return false; \
2757 state_assignment = response; \
2758 drm_object_attach_property(&connector->base, \
2759 intel_sdvo_connector->name, 0); \
2760 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2761 data_value[0], data_value[1], response); \
2765 #define ENHANCEMENT(state, name, NAME) _ENHANCEMENT((state)->name, name, NAME)
2768 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2769 struct intel_sdvo_connector *intel_sdvo_connector,
2770 struct intel_sdvo_enhancements_reply enhancements)
2772 struct drm_device *dev = intel_sdvo->base.base.dev;
2773 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2774 struct drm_connector_state *conn_state = connector->state;
2775 struct intel_sdvo_connector_state *sdvo_state =
2776 to_intel_sdvo_connector_state(conn_state);
2777 uint16_t response, data_value[2];
2779 /* when horizontal overscan is supported, Add the left/right property */
2780 if (enhancements.overscan_h) {
2781 if (!intel_sdvo_get_value(intel_sdvo,
2782 SDVO_CMD_GET_MAX_OVERSCAN_H,
2786 if (!intel_sdvo_get_value(intel_sdvo,
2787 SDVO_CMD_GET_OVERSCAN_H,
2791 sdvo_state->tv.overscan_h = response;
2793 intel_sdvo_connector->max_hscan = data_value[0];
2794 intel_sdvo_connector->left =
2795 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2796 if (!intel_sdvo_connector->left)
2799 drm_object_attach_property(&connector->base,
2800 intel_sdvo_connector->left, 0);
2802 intel_sdvo_connector->right =
2803 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2804 if (!intel_sdvo_connector->right)
2807 drm_object_attach_property(&connector->base,
2808 intel_sdvo_connector->right, 0);
2809 DRM_DEBUG_KMS("h_overscan: max %d, "
2810 "default %d, current %d\n",
2811 data_value[0], data_value[1], response);
2814 if (enhancements.overscan_v) {
2815 if (!intel_sdvo_get_value(intel_sdvo,
2816 SDVO_CMD_GET_MAX_OVERSCAN_V,
2820 if (!intel_sdvo_get_value(intel_sdvo,
2821 SDVO_CMD_GET_OVERSCAN_V,
2825 sdvo_state->tv.overscan_v = response;
2827 intel_sdvo_connector->max_vscan = data_value[0];
2828 intel_sdvo_connector->top =
2829 drm_property_create_range(dev, 0,
2830 "top_margin", 0, data_value[0]);
2831 if (!intel_sdvo_connector->top)
2834 drm_object_attach_property(&connector->base,
2835 intel_sdvo_connector->top, 0);
2837 intel_sdvo_connector->bottom =
2838 drm_property_create_range(dev, 0,
2839 "bottom_margin", 0, data_value[0]);
2840 if (!intel_sdvo_connector->bottom)
2843 drm_object_attach_property(&connector->base,
2844 intel_sdvo_connector->bottom, 0);
2845 DRM_DEBUG_KMS("v_overscan: max %d, "
2846 "default %d, current %d\n",
2847 data_value[0], data_value[1], response);
2850 ENHANCEMENT(&sdvo_state->tv, hpos, HPOS);
2851 ENHANCEMENT(&sdvo_state->tv, vpos, VPOS);
2852 ENHANCEMENT(&conn_state->tv, saturation, SATURATION);
2853 ENHANCEMENT(&conn_state->tv, contrast, CONTRAST);
2854 ENHANCEMENT(&conn_state->tv, hue, HUE);
2855 ENHANCEMENT(&conn_state->tv, brightness, BRIGHTNESS);
2856 ENHANCEMENT(&sdvo_state->tv, sharpness, SHARPNESS);
2857 ENHANCEMENT(&sdvo_state->tv, flicker_filter, FLICKER_FILTER);
2858 ENHANCEMENT(&sdvo_state->tv, flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2859 ENHANCEMENT(&sdvo_state->tv, flicker_filter_2d, FLICKER_FILTER_2D);
2860 _ENHANCEMENT(sdvo_state->tv.chroma_filter, tv_chroma_filter, TV_CHROMA_FILTER);
2861 _ENHANCEMENT(sdvo_state->tv.luma_filter, tv_luma_filter, TV_LUMA_FILTER);
2863 if (enhancements.dot_crawl) {
2864 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2867 sdvo_state->tv.dot_crawl = response & 0x1;
2868 intel_sdvo_connector->dot_crawl =
2869 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2870 if (!intel_sdvo_connector->dot_crawl)
2873 drm_object_attach_property(&connector->base,
2874 intel_sdvo_connector->dot_crawl, 0);
2875 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2882 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2883 struct intel_sdvo_connector *intel_sdvo_connector,
2884 struct intel_sdvo_enhancements_reply enhancements)
2886 struct drm_device *dev = intel_sdvo->base.base.dev;
2887 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2888 uint16_t response, data_value[2];
2890 ENHANCEMENT(&connector->state->tv, brightness, BRIGHTNESS);
2897 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2898 struct intel_sdvo_connector *intel_sdvo_connector)
2901 struct intel_sdvo_enhancements_reply reply;
2905 BUILD_BUG_ON(sizeof(enhancements) != 2);
2907 if (!intel_sdvo_get_value(intel_sdvo,
2908 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2909 &enhancements, sizeof(enhancements)) ||
2910 enhancements.response == 0) {
2911 DRM_DEBUG_KMS("No enhancement is supported\n");
2915 if (IS_TV(intel_sdvo_connector))
2916 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2917 else if (IS_LVDS(intel_sdvo_connector))
2918 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2923 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2924 struct i2c_msg *msgs,
2927 struct intel_sdvo *sdvo = adapter->algo_data;
2929 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2932 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2935 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2937 struct intel_sdvo *sdvo = adapter->algo_data;
2938 return sdvo->i2c->algo->functionality(sdvo->i2c);
2941 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2942 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2943 .functionality = intel_sdvo_ddc_proxy_func
2947 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2948 struct drm_i915_private *dev_priv)
2950 struct pci_dev *pdev = dev_priv->drm.pdev;
2952 sdvo->ddc.owner = THIS_MODULE;
2953 sdvo->ddc.class = I2C_CLASS_DDC;
2954 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2955 sdvo->ddc.dev.parent = &pdev->dev;
2956 sdvo->ddc.algo_data = sdvo;
2957 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2959 return i2c_add_adapter(&sdvo->ddc) == 0;
2962 static void assert_sdvo_port_valid(const struct drm_i915_private *dev_priv,
2965 if (HAS_PCH_SPLIT(dev_priv))
2966 WARN_ON(port != PORT_B);
2968 WARN_ON(port != PORT_B && port != PORT_C);
2971 bool intel_sdvo_init(struct drm_i915_private *dev_priv,
2972 i915_reg_t sdvo_reg, enum port port)
2974 struct intel_encoder *intel_encoder;
2975 struct intel_sdvo *intel_sdvo;
2978 assert_sdvo_port_valid(dev_priv, port);
2980 intel_sdvo = kzalloc(sizeof(*intel_sdvo), GFP_KERNEL);
2984 intel_sdvo->sdvo_reg = sdvo_reg;
2985 intel_sdvo->port = port;
2986 intel_sdvo->slave_addr =
2987 intel_sdvo_get_slave_addr(dev_priv, intel_sdvo) >> 1;
2988 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo);
2989 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev_priv))
2992 /* encoder type will be decided later */
2993 intel_encoder = &intel_sdvo->base;
2994 intel_encoder->type = INTEL_OUTPUT_SDVO;
2995 intel_encoder->power_domain = POWER_DOMAIN_PORT_OTHER;
2996 intel_encoder->port = port;
2997 drm_encoder_init(&dev_priv->drm, &intel_encoder->base,
2998 &intel_sdvo_enc_funcs, 0,
2999 "SDVO %c", port_name(port));
3001 /* Read the regs to test if we can talk to the device */
3002 for (i = 0; i < 0x40; i++) {
3005 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
3006 DRM_DEBUG_KMS("No SDVO device found on %s\n",
3007 SDVO_NAME(intel_sdvo));
3012 intel_encoder->compute_config = intel_sdvo_compute_config;
3013 if (HAS_PCH_SPLIT(dev_priv)) {
3014 intel_encoder->disable = pch_disable_sdvo;
3015 intel_encoder->post_disable = pch_post_disable_sdvo;
3017 intel_encoder->disable = intel_disable_sdvo;
3019 intel_encoder->pre_enable = intel_sdvo_pre_enable;
3020 intel_encoder->enable = intel_enable_sdvo;
3021 intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
3022 intel_encoder->get_config = intel_sdvo_get_config;
3024 /* In default case sdvo lvds is false */
3025 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
3028 if (intel_sdvo_output_setup(intel_sdvo,
3029 intel_sdvo->caps.output_flags) != true) {
3030 DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
3031 SDVO_NAME(intel_sdvo));
3032 /* Output_setup can leave behind connectors! */
3036 /* Only enable the hotplug irq if we need it, to work around noisy
3039 if (intel_sdvo->hotplug_active) {
3040 if (intel_sdvo->port == PORT_B)
3041 intel_encoder->hpd_pin = HPD_SDVO_B;
3043 intel_encoder->hpd_pin = HPD_SDVO_C;
3047 * Cloning SDVO with anything is often impossible, since the SDVO
3048 * encoder can request a special input timing mode. And even if that's
3049 * not the case we have evidence that cloning a plain unscaled mode with
3050 * VGA doesn't really work. Furthermore the cloning flags are way too
3051 * simplistic anyway to express such constraints, so just give up on
3052 * cloning for SDVO encoders.
3054 intel_sdvo->base.cloneable = 0;
3056 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo);
3058 /* Set the input timing to the screen. Assume always input 0. */
3059 if (!intel_sdvo_set_target_input(intel_sdvo))
3062 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
3063 &intel_sdvo->pixel_clock_min,
3064 &intel_sdvo->pixel_clock_max))
3067 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
3068 "clock range %dMHz - %dMHz, "
3069 "input 1: %c, input 2: %c, "
3070 "output 1: %c, output 2: %c\n",
3071 SDVO_NAME(intel_sdvo),
3072 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
3073 intel_sdvo->caps.device_rev_id,
3074 intel_sdvo->pixel_clock_min / 1000,
3075 intel_sdvo->pixel_clock_max / 1000,
3076 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
3077 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
3078 /* check currently supported outputs */
3079 intel_sdvo->caps.output_flags &
3080 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
3081 intel_sdvo->caps.output_flags &
3082 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
3086 intel_sdvo_output_cleanup(intel_sdvo);
3089 drm_encoder_cleanup(&intel_encoder->base);
3090 i2c_del_adapter(&intel_sdvo->ddc);
3092 intel_sdvo_unselect_i2c_bus(intel_sdvo);