2 * Copyright 2009 Jerome Glisse.
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
14 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
15 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
16 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
17 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
18 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
19 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 * The above copyright notice and this permission notice (including the
22 * next paragraph) shall be included in all copies or substantial portions
28 * Jerome Glisse <glisse@freedesktop.org>
29 * Thomas Hellstrom <thomas-at-tungstengraphics-dot-com>
32 #include <linux/list.h>
33 #include <linux/slab.h>
35 #include <drm/amdgpu_drm.h>
36 #include <drm/drm_cache.h>
38 #include "amdgpu_trace.h"
39 #include "amdgpu_amdkfd.h"
44 * This defines the interfaces to operate on an &amdgpu_bo buffer object which
45 * represents memory used by driver (VRAM, system memory, etc.). The driver
46 * provides DRM/GEM APIs to userspace. DRM/GEM APIs then use these interfaces
47 * to create/destroy/set buffer object which are then managed by the kernel TTM
49 * The interfaces are also used internally by kernel clients, including gfx,
50 * uvd, etc. for kernel managed allocations used by the GPU.
55 * amdgpu_bo_subtract_pin_size - Remove BO from pin_size accounting
57 * @bo: &amdgpu_bo buffer object
59 * This function is called when a BO stops being pinned, and updates the
60 * &amdgpu_device pin_size values accordingly.
62 static void amdgpu_bo_subtract_pin_size(struct amdgpu_bo *bo)
64 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
66 if (bo->tbo.mem.mem_type == TTM_PL_VRAM) {
67 atomic64_sub(amdgpu_bo_size(bo), &adev->vram_pin_size);
68 atomic64_sub(amdgpu_vram_mgr_bo_visible_size(bo),
69 &adev->visible_pin_size);
70 } else if (bo->tbo.mem.mem_type == TTM_PL_TT) {
71 atomic64_sub(amdgpu_bo_size(bo), &adev->gart_pin_size);
75 static void amdgpu_bo_destroy(struct ttm_buffer_object *tbo)
77 struct amdgpu_device *adev = amdgpu_ttm_adev(tbo->bdev);
78 struct amdgpu_bo *bo = ttm_to_amdgpu_bo(tbo);
80 if (bo->pin_count > 0)
81 amdgpu_bo_subtract_pin_size(bo);
84 amdgpu_amdkfd_unreserve_memory_limit(bo);
88 if (bo->gem_base.import_attach)
89 drm_prime_gem_destroy(&bo->gem_base, bo->tbo.sg);
90 drm_gem_object_release(&bo->gem_base);
91 /* in case amdgpu_device_recover_vram got NULL of bo->parent */
92 if (!list_empty(&bo->shadow_list)) {
93 mutex_lock(&adev->shadow_list_lock);
94 list_del_init(&bo->shadow_list);
95 mutex_unlock(&adev->shadow_list_lock);
97 amdgpu_bo_unref(&bo->parent);
104 * amdgpu_bo_is_amdgpu_bo - check if the buffer object is an &amdgpu_bo
105 * @bo: buffer object to be checked
107 * Uses destroy function associated with the object to determine if this is
111 * true if the object belongs to &amdgpu_bo, false if not.
113 bool amdgpu_bo_is_amdgpu_bo(struct ttm_buffer_object *bo)
115 if (bo->destroy == &amdgpu_bo_destroy)
121 * amdgpu_bo_placement_from_domain - set buffer's placement
122 * @abo: &amdgpu_bo buffer object whose placement is to be set
123 * @domain: requested domain
125 * Sets buffer's placement according to requested domain and the buffer's
128 void amdgpu_bo_placement_from_domain(struct amdgpu_bo *abo, u32 domain)
130 struct amdgpu_device *adev = amdgpu_ttm_adev(abo->tbo.bdev);
131 struct ttm_placement *placement = &abo->placement;
132 struct ttm_place *places = abo->placements;
133 u64 flags = abo->flags;
136 if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
137 unsigned visible_pfn = adev->gmc.visible_vram_size >> PAGE_SHIFT;
141 places[c].flags = TTM_PL_FLAG_WC | TTM_PL_FLAG_UNCACHED |
144 if (flags & AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED)
145 places[c].lpfn = visible_pfn;
147 places[c].flags |= TTM_PL_FLAG_TOPDOWN;
149 if (flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS)
150 places[c].flags |= TTM_PL_FLAG_CONTIGUOUS;
154 if (domain & AMDGPU_GEM_DOMAIN_GTT) {
157 places[c].flags = TTM_PL_FLAG_TT;
158 if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
159 places[c].flags |= TTM_PL_FLAG_WC |
160 TTM_PL_FLAG_UNCACHED;
162 places[c].flags |= TTM_PL_FLAG_CACHED;
166 if (domain & AMDGPU_GEM_DOMAIN_CPU) {
169 places[c].flags = TTM_PL_FLAG_SYSTEM;
170 if (flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
171 places[c].flags |= TTM_PL_FLAG_WC |
172 TTM_PL_FLAG_UNCACHED;
174 places[c].flags |= TTM_PL_FLAG_CACHED;
178 if (domain & AMDGPU_GEM_DOMAIN_GDS) {
181 places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_GDS;
185 if (domain & AMDGPU_GEM_DOMAIN_GWS) {
188 places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_GWS;
192 if (domain & AMDGPU_GEM_DOMAIN_OA) {
195 places[c].flags = TTM_PL_FLAG_UNCACHED | AMDGPU_PL_FLAG_OA;
202 places[c].flags = TTM_PL_MASK_CACHING | TTM_PL_FLAG_SYSTEM;
206 BUG_ON(c >= AMDGPU_BO_MAX_PLACEMENTS);
208 placement->num_placement = c;
209 placement->placement = places;
211 placement->num_busy_placement = c;
212 placement->busy_placement = places;
216 * amdgpu_bo_create_reserved - create reserved BO for kernel use
218 * @adev: amdgpu device object
219 * @size: size for the new BO
220 * @align: alignment for the new BO
221 * @domain: where to place it
222 * @bo_ptr: used to initialize BOs in structures
223 * @gpu_addr: GPU addr of the pinned BO
224 * @cpu_addr: optional CPU address mapping
226 * Allocates and pins a BO for kernel internal use, and returns it still
229 * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
232 * 0 on success, negative error code otherwise.
234 int amdgpu_bo_create_reserved(struct amdgpu_device *adev,
235 unsigned long size, int align,
236 u32 domain, struct amdgpu_bo **bo_ptr,
237 u64 *gpu_addr, void **cpu_addr)
239 struct amdgpu_bo_param bp;
244 amdgpu_bo_unref(bo_ptr);
248 memset(&bp, 0, sizeof(bp));
250 bp.byte_align = align;
252 bp.flags = AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED |
253 AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
254 bp.type = ttm_bo_type_kernel;
258 r = amdgpu_bo_create(adev, &bp, bo_ptr);
260 dev_err(adev->dev, "(%d) failed to allocate kernel bo\n",
267 r = amdgpu_bo_reserve(*bo_ptr, false);
269 dev_err(adev->dev, "(%d) failed to reserve kernel bo\n", r);
273 r = amdgpu_bo_pin(*bo_ptr, domain);
275 dev_err(adev->dev, "(%d) kernel bo pin failed\n", r);
276 goto error_unreserve;
279 r = amdgpu_ttm_alloc_gart(&(*bo_ptr)->tbo);
281 dev_err(adev->dev, "%p bind failed\n", *bo_ptr);
286 *gpu_addr = amdgpu_bo_gpu_offset(*bo_ptr);
289 r = amdgpu_bo_kmap(*bo_ptr, cpu_addr);
291 dev_err(adev->dev, "(%d) kernel bo map failed\n", r);
299 amdgpu_bo_unpin(*bo_ptr);
301 amdgpu_bo_unreserve(*bo_ptr);
305 amdgpu_bo_unref(bo_ptr);
311 * amdgpu_bo_create_kernel - create BO for kernel use
313 * @adev: amdgpu device object
314 * @size: size for the new BO
315 * @align: alignment for the new BO
316 * @domain: where to place it
317 * @bo_ptr: used to initialize BOs in structures
318 * @gpu_addr: GPU addr of the pinned BO
319 * @cpu_addr: optional CPU address mapping
321 * Allocates and pins a BO for kernel internal use.
323 * Note: For bo_ptr new BO is only created if bo_ptr points to NULL.
326 * 0 on success, negative error code otherwise.
328 int amdgpu_bo_create_kernel(struct amdgpu_device *adev,
329 unsigned long size, int align,
330 u32 domain, struct amdgpu_bo **bo_ptr,
331 u64 *gpu_addr, void **cpu_addr)
335 r = amdgpu_bo_create_reserved(adev, size, align, domain, bo_ptr,
342 amdgpu_bo_unreserve(*bo_ptr);
348 * amdgpu_bo_free_kernel - free BO for kernel use
350 * @bo: amdgpu BO to free
351 * @gpu_addr: pointer to where the BO's GPU memory space address was stored
352 * @cpu_addr: pointer to where the BO's CPU memory space address was stored
354 * unmaps and unpin a BO for kernel internal use.
356 void amdgpu_bo_free_kernel(struct amdgpu_bo **bo, u64 *gpu_addr,
362 if (likely(amdgpu_bo_reserve(*bo, true) == 0)) {
364 amdgpu_bo_kunmap(*bo);
366 amdgpu_bo_unpin(*bo);
367 amdgpu_bo_unreserve(*bo);
378 /* Validate bo size is bit bigger then the request domain */
379 static bool amdgpu_bo_validate_size(struct amdgpu_device *adev,
380 unsigned long size, u32 domain)
382 struct ttm_mem_type_manager *man = NULL;
385 * If GTT is part of requested domains the check must succeed to
386 * allow fall back to GTT
388 if (domain & AMDGPU_GEM_DOMAIN_GTT) {
389 man = &adev->mman.bdev.man[TTM_PL_TT];
391 if (size < (man->size << PAGE_SHIFT))
397 if (domain & AMDGPU_GEM_DOMAIN_VRAM) {
398 man = &adev->mman.bdev.man[TTM_PL_VRAM];
400 if (size < (man->size << PAGE_SHIFT))
407 /* TODO add more domains checks, such as AMDGPU_GEM_DOMAIN_CPU */
411 DRM_DEBUG("BO size %lu > total memory in domain: %llu\n", size,
412 man->size << PAGE_SHIFT);
416 bool amdgpu_bo_support_uswc(u64 bo_flags)
420 /* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
421 * See https://bugs.freedesktop.org/show_bug.cgi?id=84627
424 #elif defined(CONFIG_X86) && !defined(CONFIG_X86_PAT)
425 /* Don't try to enable write-combining when it can't work, or things
427 * See https://bugs.freedesktop.org/show_bug.cgi?id=88758
430 #ifndef CONFIG_COMPILE_TEST
431 #warning Please enable CONFIG_MTRR and CONFIG_X86_PAT for better performance \
432 thanks to write-combining
435 if (bo_flags & AMDGPU_GEM_CREATE_CPU_GTT_USWC)
436 DRM_INFO_ONCE("Please enable CONFIG_MTRR and CONFIG_X86_PAT for "
437 "better performance thanks to write-combining\n");
440 /* For architectures that don't support WC memory,
441 * mask out the WC flag from the BO
443 if (!drm_arch_can_wc_memory())
450 static int amdgpu_bo_do_create(struct amdgpu_device *adev,
451 struct amdgpu_bo_param *bp,
452 struct amdgpu_bo **bo_ptr)
454 struct ttm_operation_ctx ctx = {
455 .interruptible = (bp->type != ttm_bo_type_kernel),
456 .no_wait_gpu = false,
458 .flags = TTM_OPT_FLAG_ALLOW_RES_EVICT
460 struct amdgpu_bo *bo;
461 unsigned long page_align, size = bp->size;
465 /* Note that GDS/GWS/OA allocates 1 page per byte/resource. */
466 if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA)) {
467 /* GWS and OA don't need any alignment. */
468 page_align = bp->byte_align;
470 } else if (bp->domain & AMDGPU_GEM_DOMAIN_GDS) {
471 /* Both size and alignment must be a multiple of 4. */
472 page_align = ALIGN(bp->byte_align, 4);
473 size = ALIGN(size, 4) << PAGE_SHIFT;
475 /* Memory should be aligned at least to a page size. */
476 page_align = ALIGN(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
477 size = ALIGN(size, PAGE_SIZE);
480 if (!amdgpu_bo_validate_size(adev, size, bp->domain))
485 acc_size = ttm_bo_dma_acc_size(&adev->mman.bdev, size,
486 sizeof(struct amdgpu_bo));
488 bo = kzalloc(sizeof(struct amdgpu_bo), GFP_KERNEL);
491 drm_gem_private_object_init(adev->ddev, &bo->gem_base, size);
492 INIT_LIST_HEAD(&bo->shadow_list);
494 bo->preferred_domains = bp->preferred_domain ? bp->preferred_domain :
496 bo->allowed_domains = bo->preferred_domains;
497 if (bp->type != ttm_bo_type_kernel &&
498 bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
499 bo->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
501 bo->flags = bp->flags;
503 if (!amdgpu_bo_support_uswc(bo->flags))
504 bo->flags &= ~AMDGPU_GEM_CREATE_CPU_GTT_USWC;
506 bo->tbo.bdev = &adev->mman.bdev;
507 if (bp->domain & (AMDGPU_GEM_DOMAIN_GWS | AMDGPU_GEM_DOMAIN_OA |
508 AMDGPU_GEM_DOMAIN_GDS))
509 amdgpu_bo_placement_from_domain(bo, AMDGPU_GEM_DOMAIN_CPU);
511 amdgpu_bo_placement_from_domain(bo, bp->domain);
512 if (bp->type == ttm_bo_type_kernel)
513 bo->tbo.priority = 1;
515 r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,
516 &bo->placement, page_align, &ctx, acc_size,
517 NULL, bp->resv, &amdgpu_bo_destroy);
518 if (unlikely(r != 0))
521 if (!amdgpu_gmc_vram_full_visible(&adev->gmc) &&
522 bo->tbo.mem.mem_type == TTM_PL_VRAM &&
523 bo->tbo.mem.start < adev->gmc.visible_vram_size >> PAGE_SHIFT)
524 amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved,
527 amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0);
529 if (bp->flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
530 bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
531 struct dma_fence *fence;
533 r = amdgpu_fill_buffer(bo, 0, bo->tbo.resv, &fence);
537 amdgpu_bo_fence(bo, fence, false);
538 dma_fence_put(bo->tbo.moving);
539 bo->tbo.moving = dma_fence_get(fence);
540 dma_fence_put(fence);
543 amdgpu_bo_unreserve(bo);
546 trace_amdgpu_bo_create(bo);
548 /* Treat CPU_ACCESS_REQUIRED only as a hint if given by UMD */
549 if (bp->type == ttm_bo_type_device)
550 bo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
556 ww_mutex_unlock(&bo->tbo.resv->lock);
557 amdgpu_bo_unref(&bo);
561 static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
563 struct amdgpu_bo *bo)
565 struct amdgpu_bo_param bp;
571 memset(&bp, 0, sizeof(bp));
573 bp.domain = AMDGPU_GEM_DOMAIN_GTT;
574 bp.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC |
575 AMDGPU_GEM_CREATE_SHADOW;
576 bp.type = ttm_bo_type_kernel;
577 bp.resv = bo->tbo.resv;
579 r = amdgpu_bo_do_create(adev, &bp, &bo->shadow);
581 bo->shadow->parent = amdgpu_bo_ref(bo);
582 mutex_lock(&adev->shadow_list_lock);
583 list_add_tail(&bo->shadow->shadow_list, &adev->shadow_list);
584 mutex_unlock(&adev->shadow_list_lock);
591 * amdgpu_bo_create - create an &amdgpu_bo buffer object
592 * @adev: amdgpu device object
593 * @bp: parameters to be used for the buffer object
594 * @bo_ptr: pointer to the buffer object pointer
596 * Creates an &amdgpu_bo buffer object; and if requested, also creates a
598 * Shadow object is used to backup the original buffer object, and is always
602 * 0 for success or a negative error code on failure.
604 int amdgpu_bo_create(struct amdgpu_device *adev,
605 struct amdgpu_bo_param *bp,
606 struct amdgpu_bo **bo_ptr)
608 u64 flags = bp->flags;
611 bp->flags = bp->flags & ~AMDGPU_GEM_CREATE_SHADOW;
612 r = amdgpu_bo_do_create(adev, bp, bo_ptr);
616 if ((flags & AMDGPU_GEM_CREATE_SHADOW) && !(adev->flags & AMD_IS_APU)) {
618 WARN_ON(reservation_object_lock((*bo_ptr)->tbo.resv,
621 r = amdgpu_bo_create_shadow(adev, bp->size, *bo_ptr);
624 reservation_object_unlock((*bo_ptr)->tbo.resv);
627 amdgpu_bo_unref(bo_ptr);
634 * amdgpu_bo_validate - validate an &amdgpu_bo buffer object
635 * @bo: pointer to the buffer object
637 * Sets placement according to domain; and changes placement and caching
638 * policy of the buffer object according to the placement.
639 * This is used for validating shadow bos. It calls ttm_bo_validate() to
640 * make sure the buffer is resident where it needs to be.
643 * 0 for success or a negative error code on failure.
645 int amdgpu_bo_validate(struct amdgpu_bo *bo)
647 struct ttm_operation_ctx ctx = { false, false };
654 domain = bo->preferred_domains;
657 amdgpu_bo_placement_from_domain(bo, domain);
658 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
659 if (unlikely(r == -ENOMEM) && domain != bo->allowed_domains) {
660 domain = bo->allowed_domains;
668 * amdgpu_bo_restore_shadow - restore an &amdgpu_bo shadow
670 * @shadow: &amdgpu_bo shadow to be restored
671 * @fence: dma_fence associated with the operation
673 * Copies a buffer object's shadow content back to the object.
674 * This is used for recovering a buffer from its shadow in case of a gpu
675 * reset where vram context may be lost.
678 * 0 for success or a negative error code on failure.
680 int amdgpu_bo_restore_shadow(struct amdgpu_bo *shadow, struct dma_fence **fence)
683 struct amdgpu_device *adev = amdgpu_ttm_adev(shadow->tbo.bdev);
684 struct amdgpu_ring *ring = adev->mman.buffer_funcs_ring;
685 uint64_t shadow_addr, parent_addr;
687 shadow_addr = amdgpu_bo_gpu_offset(shadow);
688 parent_addr = amdgpu_bo_gpu_offset(shadow->parent);
690 return amdgpu_copy_buffer(ring, shadow_addr, parent_addr,
691 amdgpu_bo_size(shadow), NULL, fence,
696 * amdgpu_bo_kmap - map an &amdgpu_bo buffer object
697 * @bo: &amdgpu_bo buffer object to be mapped
698 * @ptr: kernel virtual address to be returned
700 * Calls ttm_bo_kmap() to set up the kernel virtual mapping; calls
701 * amdgpu_bo_kptr() to get the kernel virtual address.
704 * 0 for success or a negative error code on failure.
706 int amdgpu_bo_kmap(struct amdgpu_bo *bo, void **ptr)
711 if (bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS)
714 kptr = amdgpu_bo_kptr(bo);
721 r = reservation_object_wait_timeout_rcu(bo->tbo.resv, false, false,
722 MAX_SCHEDULE_TIMEOUT);
726 r = ttm_bo_kmap(&bo->tbo, 0, bo->tbo.num_pages, &bo->kmap);
731 *ptr = amdgpu_bo_kptr(bo);
737 * amdgpu_bo_kptr - returns a kernel virtual address of the buffer object
738 * @bo: &amdgpu_bo buffer object
740 * Calls ttm_kmap_obj_virtual() to get the kernel virtual address
743 * the virtual address of a buffer object area.
745 void *amdgpu_bo_kptr(struct amdgpu_bo *bo)
749 return ttm_kmap_obj_virtual(&bo->kmap, &is_iomem);
753 * amdgpu_bo_kunmap - unmap an &amdgpu_bo buffer object
754 * @bo: &amdgpu_bo buffer object to be unmapped
756 * Unmaps a kernel map set up by amdgpu_bo_kmap().
758 void amdgpu_bo_kunmap(struct amdgpu_bo *bo)
761 ttm_bo_kunmap(&bo->kmap);
765 * amdgpu_bo_ref - reference an &amdgpu_bo buffer object
766 * @bo: &amdgpu_bo buffer object
768 * References the contained &ttm_buffer_object.
771 * a refcounted pointer to the &amdgpu_bo buffer object.
773 struct amdgpu_bo *amdgpu_bo_ref(struct amdgpu_bo *bo)
778 ttm_bo_get(&bo->tbo);
783 * amdgpu_bo_unref - unreference an &amdgpu_bo buffer object
784 * @bo: &amdgpu_bo buffer object
786 * Unreferences the contained &ttm_buffer_object and clear the pointer
788 void amdgpu_bo_unref(struct amdgpu_bo **bo)
790 struct ttm_buffer_object *tbo;
801 * amdgpu_bo_pin_restricted - pin an &amdgpu_bo buffer object
802 * @bo: &amdgpu_bo buffer object to be pinned
803 * @domain: domain to be pinned to
804 * @min_offset: the start of requested address range
805 * @max_offset: the end of requested address range
807 * Pins the buffer object according to requested domain and address range. If
808 * the memory is unbound gart memory, binds the pages into gart table. Adjusts
809 * pin_count and pin_size accordingly.
811 * Pinning means to lock pages in memory along with keeping them at a fixed
812 * offset. It is required when a buffer can not be moved, for example, when
813 * a display buffer is being scanned out.
815 * Compared with amdgpu_bo_pin(), this function gives more flexibility on
816 * where to pin a buffer if there are specific restrictions on where a buffer
820 * 0 for success or a negative error code on failure.
822 int amdgpu_bo_pin_restricted(struct amdgpu_bo *bo, u32 domain,
823 u64 min_offset, u64 max_offset)
825 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
826 struct ttm_operation_ctx ctx = { false, false };
829 if (amdgpu_ttm_tt_get_usermm(bo->tbo.ttm))
832 if (WARN_ON_ONCE(min_offset > max_offset))
835 /* A shared bo cannot be migrated to VRAM */
836 if (bo->prime_shared_count) {
837 if (domain & AMDGPU_GEM_DOMAIN_GTT)
838 domain = AMDGPU_GEM_DOMAIN_GTT;
843 /* This assumes only APU display buffers are pinned with (VRAM|GTT).
844 * See function amdgpu_display_supported_domains()
846 domain = amdgpu_bo_get_preferred_pin_domain(adev, domain);
849 uint32_t mem_type = bo->tbo.mem.mem_type;
851 if (!(domain & amdgpu_mem_type_to_domain(mem_type)))
856 if (max_offset != 0) {
857 u64 domain_start = bo->tbo.bdev->man[mem_type].gpu_offset;
858 WARN_ON_ONCE(max_offset <
859 (amdgpu_bo_gpu_offset(bo) - domain_start));
865 bo->flags |= AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS;
866 /* force to pin into visible video ram */
867 if (!(bo->flags & AMDGPU_GEM_CREATE_NO_CPU_ACCESS))
868 bo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
869 amdgpu_bo_placement_from_domain(bo, domain);
870 for (i = 0; i < bo->placement.num_placement; i++) {
873 fpfn = min_offset >> PAGE_SHIFT;
874 lpfn = max_offset >> PAGE_SHIFT;
876 if (fpfn > bo->placements[i].fpfn)
877 bo->placements[i].fpfn = fpfn;
878 if (!bo->placements[i].lpfn ||
879 (lpfn && lpfn < bo->placements[i].lpfn))
880 bo->placements[i].lpfn = lpfn;
881 bo->placements[i].flags |= TTM_PL_FLAG_NO_EVICT;
884 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
886 dev_err(adev->dev, "%p pin failed\n", bo);
892 domain = amdgpu_mem_type_to_domain(bo->tbo.mem.mem_type);
893 if (domain == AMDGPU_GEM_DOMAIN_VRAM) {
894 atomic64_add(amdgpu_bo_size(bo), &adev->vram_pin_size);
895 atomic64_add(amdgpu_vram_mgr_bo_visible_size(bo),
896 &adev->visible_pin_size);
897 } else if (domain == AMDGPU_GEM_DOMAIN_GTT) {
898 atomic64_add(amdgpu_bo_size(bo), &adev->gart_pin_size);
906 * amdgpu_bo_pin - pin an &amdgpu_bo buffer object
907 * @bo: &amdgpu_bo buffer object to be pinned
908 * @domain: domain to be pinned to
910 * A simple wrapper to amdgpu_bo_pin_restricted().
911 * Provides a simpler API for buffers that do not have any strict restrictions
912 * on where a buffer must be located.
915 * 0 for success or a negative error code on failure.
917 int amdgpu_bo_pin(struct amdgpu_bo *bo, u32 domain)
919 return amdgpu_bo_pin_restricted(bo, domain, 0, 0);
923 * amdgpu_bo_unpin - unpin an &amdgpu_bo buffer object
924 * @bo: &amdgpu_bo buffer object to be unpinned
926 * Decreases the pin_count, and clears the flags if pin_count reaches 0.
927 * Changes placement and pin size accordingly.
930 * 0 for success or a negative error code on failure.
932 int amdgpu_bo_unpin(struct amdgpu_bo *bo)
934 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
935 struct ttm_operation_ctx ctx = { false, false };
938 if (WARN_ON_ONCE(!bo->pin_count)) {
939 dev_warn(adev->dev, "%p unpin not necessary\n", bo);
946 amdgpu_bo_subtract_pin_size(bo);
948 for (i = 0; i < bo->placement.num_placement; i++) {
949 bo->placements[i].lpfn = 0;
950 bo->placements[i].flags &= ~TTM_PL_FLAG_NO_EVICT;
952 r = ttm_bo_validate(&bo->tbo, &bo->placement, &ctx);
954 dev_err(adev->dev, "%p validate failed for unpin\n", bo);
960 * amdgpu_bo_evict_vram - evict VRAM buffers
961 * @adev: amdgpu device object
963 * Evicts all VRAM buffers on the lru list of the memory type.
964 * Mainly used for evicting vram at suspend time.
967 * 0 for success or a negative error code on failure.
969 int amdgpu_bo_evict_vram(struct amdgpu_device *adev)
971 /* late 2.6.33 fix IGP hibernate - we need pm ops to do this correct */
972 #ifndef CONFIG_HIBERNATION
973 if (adev->flags & AMD_IS_APU) {
974 /* Useless to evict on IGP chips */
978 return ttm_bo_evict_mm(&adev->mman.bdev, TTM_PL_VRAM);
981 static const char *amdgpu_vram_names[] = {
995 * amdgpu_bo_init - initialize memory manager
996 * @adev: amdgpu device object
998 * Calls amdgpu_ttm_init() to initialize amdgpu memory manager.
1001 * 0 for success or a negative error code on failure.
1003 int amdgpu_bo_init(struct amdgpu_device *adev)
1005 /* reserve PAT memory space to WC for VRAM */
1006 arch_io_reserve_memtype_wc(adev->gmc.aper_base,
1007 adev->gmc.aper_size);
1009 /* Add an MTRR for the VRAM */
1010 adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base,
1011 adev->gmc.aper_size);
1012 DRM_INFO("Detected VRAM RAM=%lluM, BAR=%lluM\n",
1013 adev->gmc.mc_vram_size >> 20,
1014 (unsigned long long)adev->gmc.aper_size >> 20);
1015 DRM_INFO("RAM width %dbits %s\n",
1016 adev->gmc.vram_width, amdgpu_vram_names[adev->gmc.vram_type]);
1017 return amdgpu_ttm_init(adev);
1021 * amdgpu_bo_late_init - late init
1022 * @adev: amdgpu device object
1024 * Calls amdgpu_ttm_late_init() to free resources used earlier during
1028 * 0 for success or a negative error code on failure.
1030 int amdgpu_bo_late_init(struct amdgpu_device *adev)
1032 amdgpu_ttm_late_init(adev);
1038 * amdgpu_bo_fini - tear down memory manager
1039 * @adev: amdgpu device object
1041 * Reverses amdgpu_bo_init() to tear down memory manager.
1043 void amdgpu_bo_fini(struct amdgpu_device *adev)
1045 amdgpu_ttm_fini(adev);
1046 arch_phys_wc_del(adev->gmc.vram_mtrr);
1047 arch_io_free_memtype_wc(adev->gmc.aper_base, adev->gmc.aper_size);
1051 * amdgpu_bo_fbdev_mmap - mmap fbdev memory
1052 * @bo: &amdgpu_bo buffer object
1053 * @vma: vma as input from the fbdev mmap method
1055 * Calls ttm_fbdev_mmap() to mmap fbdev memory if it is backed by a bo.
1058 * 0 for success or a negative error code on failure.
1060 int amdgpu_bo_fbdev_mmap(struct amdgpu_bo *bo,
1061 struct vm_area_struct *vma)
1063 return ttm_fbdev_mmap(vma, &bo->tbo);
1067 * amdgpu_bo_set_tiling_flags - set tiling flags
1068 * @bo: &amdgpu_bo buffer object
1069 * @tiling_flags: new flags
1071 * Sets buffer object's tiling flags with the new one. Used by GEM ioctl or
1072 * kernel driver to set the tiling flags on a buffer.
1075 * 0 for success or a negative error code on failure.
1077 int amdgpu_bo_set_tiling_flags(struct amdgpu_bo *bo, u64 tiling_flags)
1079 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
1081 if (adev->family <= AMDGPU_FAMILY_CZ &&
1082 AMDGPU_TILING_GET(tiling_flags, TILE_SPLIT) > 6)
1085 bo->tiling_flags = tiling_flags;
1090 * amdgpu_bo_get_tiling_flags - get tiling flags
1091 * @bo: &amdgpu_bo buffer object
1092 * @tiling_flags: returned flags
1094 * Gets buffer object's tiling flags. Used by GEM ioctl or kernel driver to
1095 * set the tiling flags on a buffer.
1097 void amdgpu_bo_get_tiling_flags(struct amdgpu_bo *bo, u64 *tiling_flags)
1099 lockdep_assert_held(&bo->tbo.resv->lock.base);
1102 *tiling_flags = bo->tiling_flags;
1106 * amdgpu_bo_set_metadata - set metadata
1107 * @bo: &amdgpu_bo buffer object
1108 * @metadata: new metadata
1109 * @metadata_size: size of the new metadata
1110 * @flags: flags of the new metadata
1112 * Sets buffer object's metadata, its size and flags.
1113 * Used via GEM ioctl.
1116 * 0 for success or a negative error code on failure.
1118 int amdgpu_bo_set_metadata (struct amdgpu_bo *bo, void *metadata,
1119 uint32_t metadata_size, uint64_t flags)
1123 if (!metadata_size) {
1124 if (bo->metadata_size) {
1125 kfree(bo->metadata);
1126 bo->metadata = NULL;
1127 bo->metadata_size = 0;
1132 if (metadata == NULL)
1135 buffer = kmemdup(metadata, metadata_size, GFP_KERNEL);
1139 kfree(bo->metadata);
1140 bo->metadata_flags = flags;
1141 bo->metadata = buffer;
1142 bo->metadata_size = metadata_size;
1148 * amdgpu_bo_get_metadata - get metadata
1149 * @bo: &amdgpu_bo buffer object
1150 * @buffer: returned metadata
1151 * @buffer_size: size of the buffer
1152 * @metadata_size: size of the returned metadata
1153 * @flags: flags of the returned metadata
1155 * Gets buffer object's metadata, its size and flags. buffer_size shall not be
1156 * less than metadata_size.
1157 * Used via GEM ioctl.
1160 * 0 for success or a negative error code on failure.
1162 int amdgpu_bo_get_metadata(struct amdgpu_bo *bo, void *buffer,
1163 size_t buffer_size, uint32_t *metadata_size,
1166 if (!buffer && !metadata_size)
1170 if (buffer_size < bo->metadata_size)
1173 if (bo->metadata_size)
1174 memcpy(buffer, bo->metadata, bo->metadata_size);
1178 *metadata_size = bo->metadata_size;
1180 *flags = bo->metadata_flags;
1186 * amdgpu_bo_move_notify - notification about a memory move
1187 * @bo: pointer to a buffer object
1188 * @evict: if this move is evicting the buffer from the graphics address space
1189 * @new_mem: new information of the bufer object
1191 * Marks the corresponding &amdgpu_bo buffer object as invalid, also performs
1193 * TTM driver callback which is called when ttm moves a buffer.
1195 void amdgpu_bo_move_notify(struct ttm_buffer_object *bo,
1197 struct ttm_mem_reg *new_mem)
1199 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
1200 struct amdgpu_bo *abo;
1201 struct ttm_mem_reg *old_mem = &bo->mem;
1203 if (!amdgpu_bo_is_amdgpu_bo(bo))
1206 abo = ttm_to_amdgpu_bo(bo);
1207 amdgpu_vm_bo_invalidate(adev, abo, evict);
1209 amdgpu_bo_kunmap(abo);
1211 /* remember the eviction */
1213 atomic64_inc(&adev->num_evictions);
1215 /* update statistics */
1219 /* move_notify is called before move happens */
1220 trace_amdgpu_bo_move(abo, new_mem->mem_type, old_mem->mem_type);
1224 * amdgpu_bo_fault_reserve_notify - notification about a memory fault
1225 * @bo: pointer to a buffer object
1227 * Notifies the driver we are taking a fault on this BO and have reserved it,
1228 * also performs bookkeeping.
1229 * TTM driver callback for dealing with vm faults.
1232 * 0 for success or a negative error code on failure.
1234 int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo)
1236 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->bdev);
1237 struct ttm_operation_ctx ctx = { false, false };
1238 struct amdgpu_bo *abo;
1239 unsigned long offset, size;
1242 if (!amdgpu_bo_is_amdgpu_bo(bo))
1245 abo = ttm_to_amdgpu_bo(bo);
1247 /* Remember that this BO was accessed by the CPU */
1248 abo->flags |= AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
1250 if (bo->mem.mem_type != TTM_PL_VRAM)
1253 size = bo->mem.num_pages << PAGE_SHIFT;
1254 offset = bo->mem.start << PAGE_SHIFT;
1255 if ((offset + size) <= adev->gmc.visible_vram_size)
1258 /* Can't move a pinned BO to visible VRAM */
1259 if (abo->pin_count > 0)
1262 /* hurrah the memory is not visible ! */
1263 atomic64_inc(&adev->num_vram_cpu_page_faults);
1264 amdgpu_bo_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM |
1265 AMDGPU_GEM_DOMAIN_GTT);
1267 /* Avoid costly evictions; only set GTT as a busy placement */
1268 abo->placement.num_busy_placement = 1;
1269 abo->placement.busy_placement = &abo->placements[1];
1271 r = ttm_bo_validate(bo, &abo->placement, &ctx);
1272 if (unlikely(r != 0))
1275 offset = bo->mem.start << PAGE_SHIFT;
1276 /* this should never happen */
1277 if (bo->mem.mem_type == TTM_PL_VRAM &&
1278 (offset + size) > adev->gmc.visible_vram_size)
1285 * amdgpu_bo_fence - add fence to buffer object
1287 * @bo: buffer object in question
1288 * @fence: fence to add
1289 * @shared: true if fence should be added shared
1292 void amdgpu_bo_fence(struct amdgpu_bo *bo, struct dma_fence *fence,
1295 struct reservation_object *resv = bo->tbo.resv;
1298 reservation_object_add_shared_fence(resv, fence);
1300 reservation_object_add_excl_fence(resv, fence);
1304 * amdgpu_sync_wait_resv - Wait for BO reservation fences
1306 * @bo: buffer object
1307 * @owner: fence owner
1308 * @intr: Whether the wait is interruptible
1311 * 0 on success, errno otherwise.
1313 int amdgpu_bo_sync_wait(struct amdgpu_bo *bo, void *owner, bool intr)
1315 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
1316 struct amdgpu_sync sync;
1319 amdgpu_sync_create(&sync);
1320 amdgpu_sync_resv(adev, &sync, bo->tbo.resv, owner, false);
1321 r = amdgpu_sync_wait(&sync, intr);
1322 amdgpu_sync_free(&sync);
1328 * amdgpu_bo_gpu_offset - return GPU offset of bo
1329 * @bo: amdgpu object for which we query the offset
1331 * Note: object should either be pinned or reserved when calling this
1332 * function, it might be useful to add check for this for debugging.
1335 * current GPU offset of the object.
1337 u64 amdgpu_bo_gpu_offset(struct amdgpu_bo *bo)
1339 WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_SYSTEM);
1340 WARN_ON_ONCE(!ww_mutex_is_locked(&bo->tbo.resv->lock) &&
1341 !bo->pin_count && bo->tbo.type != ttm_bo_type_kernel);
1342 WARN_ON_ONCE(bo->tbo.mem.start == AMDGPU_BO_INVALID_OFFSET);
1343 WARN_ON_ONCE(bo->tbo.mem.mem_type == TTM_PL_VRAM &&
1344 !(bo->flags & AMDGPU_GEM_CREATE_VRAM_CONTIGUOUS));
1346 return amdgpu_gmc_sign_extend(bo->tbo.offset);
1350 * amdgpu_bo_get_preferred_pin_domain - get preferred domain for scanout
1351 * @adev: amdgpu device object
1352 * @domain: allowed :ref:`memory domains <amdgpu_memory_domains>`
1355 * Which of the allowed domains is preferred for pinning the BO for scanout.
1357 uint32_t amdgpu_bo_get_preferred_pin_domain(struct amdgpu_device *adev,
1360 if (domain == (AMDGPU_GEM_DOMAIN_VRAM | AMDGPU_GEM_DOMAIN_GTT)) {
1361 domain = AMDGPU_GEM_DOMAIN_VRAM;
1362 if (adev->gmc.real_vram_size <= AMDGPU_SG_THRESHOLD)
1363 domain = AMDGPU_GEM_DOMAIN_GTT;