1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2017 Marvell
5 * Antoine Tenart <antoine.tenart@free-electrons.com>
8 #include <crypto/hmac.h>
9 #include <crypto/md5.h>
10 #include <crypto/sha.h>
11 #include <linux/device.h>
12 #include <linux/dma-mapping.h>
13 #include <linux/dmapool.h>
17 struct safexcel_ahash_ctx {
18 struct safexcel_context base;
19 struct safexcel_crypto_priv *priv;
23 u32 ipad[SHA512_DIGEST_SIZE / sizeof(u32)];
24 u32 opad[SHA512_DIGEST_SIZE / sizeof(u32)];
27 struct safexcel_ahash_req {
36 dma_addr_t result_dma;
40 u8 state_sz; /* expected state size, only set once */
41 u8 block_sz; /* block size, only set once */
42 u32 state[SHA512_DIGEST_SIZE / sizeof(u32)] __aligned(sizeof(u32));
47 u8 cache[HASH_CACHE_SIZE] __aligned(sizeof(u32));
49 unsigned int cache_sz;
51 u8 cache_next[HASH_CACHE_SIZE] __aligned(sizeof(u32));
54 static inline u64 safexcel_queued_len(struct safexcel_ahash_req *req)
56 return req->len - req->processed;
59 static void safexcel_hash_token(struct safexcel_command_desc *cdesc,
60 u32 input_length, u32 result_length)
62 struct safexcel_token *token =
63 (struct safexcel_token *)cdesc->control_data.token;
65 token[0].opcode = EIP197_TOKEN_OPCODE_DIRECTION;
66 token[0].packet_length = input_length;
67 token[0].stat = EIP197_TOKEN_STAT_LAST_HASH;
68 token[0].instructions = EIP197_TOKEN_INS_TYPE_HASH;
70 token[1].opcode = EIP197_TOKEN_OPCODE_INSERT;
71 token[1].packet_length = result_length;
72 token[1].stat = EIP197_TOKEN_STAT_LAST_HASH |
73 EIP197_TOKEN_STAT_LAST_PACKET;
74 token[1].instructions = EIP197_TOKEN_INS_TYPE_OUTPUT |
75 EIP197_TOKEN_INS_INSERT_HASH_DIGEST;
78 static void safexcel_context_control(struct safexcel_ahash_ctx *ctx,
79 struct safexcel_ahash_req *req,
80 struct safexcel_command_desc *cdesc)
82 struct safexcel_crypto_priv *priv = ctx->priv;
85 cdesc->control_data.control0 |= ctx->alg;
88 * Copy the input digest if needed, and setup the context
89 * fields. Do this now as we need it to setup the first command
92 if (!req->processed) {
93 /* First - and possibly only - block of basic hash only */
95 cdesc->control_data.control0 |=
96 CONTEXT_CONTROL_TYPE_HASH_OUT |
97 CONTEXT_CONTROL_RESTART_HASH |
98 /* ensure its not 0! */
99 CONTEXT_CONTROL_SIZE(1);
101 cdesc->control_data.control0 |=
102 CONTEXT_CONTROL_TYPE_HASH_OUT |
103 CONTEXT_CONTROL_RESTART_HASH |
104 CONTEXT_CONTROL_NO_FINISH_HASH |
105 /* ensure its not 0! */
106 CONTEXT_CONTROL_SIZE(1);
111 /* Hash continuation or HMAC, setup (inner) digest from state */
112 memcpy(ctx->base.ctxr->data, req->state, req->state_sz);
115 /* Compute digest count for hash/HMAC finish operations */
116 if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
117 req->hmac_zlen || (req->processed != req->block_sz)) {
118 count = req->processed / EIP197_COUNTER_BLOCK_SIZE;
120 /* This is a hardware limitation, as the
121 * counter must fit into an u32. This represents
122 * a fairly big amount of input data, so we
123 * shouldn't see this.
125 if (unlikely(count & 0xffffffff00000000ULL)) {
127 "Input data is too big\n");
132 if ((req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED) ||
133 /* Special case: zero length HMAC */
135 /* PE HW < 4.4 cannot do HMAC continue, fake using hash */
136 (req->processed != req->block_sz)) {
137 /* Basic hash continue operation, need digest + cnt */
138 cdesc->control_data.control0 |=
139 CONTEXT_CONTROL_SIZE((req->state_sz >> 2) + 1) |
140 CONTEXT_CONTROL_TYPE_HASH_OUT |
141 CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
142 /* For zero-len HMAC, don't finalize, already padded! */
144 cdesc->control_data.control0 |=
145 CONTEXT_CONTROL_NO_FINISH_HASH;
146 cdesc->control_data.control1 |=
147 CONTEXT_CONTROL_DIGEST_CNT;
148 ctx->base.ctxr->data[req->state_sz >> 2] =
150 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
152 /* Clear zero-length HMAC flag for next operation! */
153 req->hmac_zlen = false;
155 /* Need outer digest for HMAC finalization */
156 memcpy(ctx->base.ctxr->data + (req->state_sz >> 2),
157 ctx->opad, req->state_sz);
159 /* Single pass HMAC - no digest count */
160 cdesc->control_data.control0 |=
161 CONTEXT_CONTROL_SIZE(req->state_sz >> 1) |
162 CONTEXT_CONTROL_TYPE_HASH_OUT |
163 CONTEXT_CONTROL_DIGEST_HMAC;
165 } else { /* Hash continuation, do not finish yet */
166 cdesc->control_data.control0 |=
167 CONTEXT_CONTROL_SIZE(req->state_sz >> 2) |
168 CONTEXT_CONTROL_DIGEST_PRECOMPUTED |
169 CONTEXT_CONTROL_TYPE_HASH_OUT |
170 CONTEXT_CONTROL_NO_FINISH_HASH;
174 static int safexcel_ahash_enqueue(struct ahash_request *areq);
176 static int safexcel_handle_req_result(struct safexcel_crypto_priv *priv,
178 struct crypto_async_request *async,
179 bool *should_complete, int *ret)
181 struct safexcel_result_desc *rdesc;
182 struct ahash_request *areq = ahash_request_cast(async);
183 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
184 struct safexcel_ahash_req *sreq = ahash_request_ctx(areq);
185 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
190 rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
193 "hash: result: could not retrieve the result descriptor\n");
194 *ret = PTR_ERR(rdesc);
196 *ret = safexcel_rdesc_check_errors(priv, rdesc);
199 safexcel_complete(priv, ring);
202 dma_unmap_sg(priv->dev, areq->src, sreq->nents, DMA_TO_DEVICE);
206 if (sreq->result_dma) {
207 dma_unmap_single(priv->dev, sreq->result_dma, sreq->state_sz,
209 sreq->result_dma = 0;
212 if (sreq->cache_dma) {
213 dma_unmap_single(priv->dev, sreq->cache_dma, sreq->cache_sz,
221 (sreq->digest != CONTEXT_CONTROL_DIGEST_HMAC)) {
222 /* Faking HMAC using hash - need to do outer hash */
223 memcpy(sreq->cache, sreq->state,
224 crypto_ahash_digestsize(ahash));
226 memcpy(sreq->state, ctx->opad, sreq->state_sz);
228 sreq->len = sreq->block_sz +
229 crypto_ahash_digestsize(ahash);
230 sreq->processed = sreq->block_sz;
233 ctx->base.needs_inv = true;
235 safexcel_ahash_enqueue(areq);
237 *should_complete = false; /* Not done yet */
241 memcpy(areq->result, sreq->state,
242 crypto_ahash_digestsize(ahash));
245 cache_len = safexcel_queued_len(sreq);
247 memcpy(sreq->cache, sreq->cache_next, cache_len);
249 *should_complete = true;
254 static int safexcel_ahash_send_req(struct crypto_async_request *async, int ring,
255 int *commands, int *results)
257 struct ahash_request *areq = ahash_request_cast(async);
258 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
259 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
260 struct safexcel_crypto_priv *priv = ctx->priv;
261 struct safexcel_command_desc *cdesc, *first_cdesc = NULL;
262 struct safexcel_result_desc *rdesc;
263 struct scatterlist *sg;
264 int i, extra = 0, n_cdesc = 0, ret = 0;
265 u64 queued, len, cache_len;
267 queued = len = safexcel_queued_len(req);
268 if (queued <= HASH_CACHE_SIZE)
271 cache_len = queued - areq->nbytes;
273 if (!req->finish && !req->last_req) {
274 /* If this is not the last request and the queued data does not
275 * fit into full cache blocks, cache it for the next send call.
277 extra = queued & (HASH_CACHE_SIZE - 1);
279 /* If this is not the last request and the queued data
280 * is a multiple of a block, cache the last one for now.
283 extra = HASH_CACHE_SIZE;
285 sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
286 req->cache_next, extra,
287 areq->nbytes - extra);
299 /* Add a command descriptor for the cached data, if any */
301 req->cache_dma = dma_map_single(priv->dev, req->cache,
302 cache_len, DMA_TO_DEVICE);
303 if (dma_mapping_error(priv->dev, req->cache_dma))
306 req->cache_sz = cache_len;
307 first_cdesc = safexcel_add_cdesc(priv, ring, 1,
309 req->cache_dma, cache_len, len,
311 if (IS_ERR(first_cdesc)) {
312 ret = PTR_ERR(first_cdesc);
322 /* Skip descriptor generation for zero-length requests */
326 /* Now handle the current ahash request buffer(s) */
327 req->nents = dma_map_sg(priv->dev, areq->src,
328 sg_nents_for_len(areq->src,
336 for_each_sg(areq->src, sg, req->nents, i) {
337 int sglen = sg_dma_len(sg);
339 /* Do not overflow the request */
343 cdesc = safexcel_add_cdesc(priv, ring, !n_cdesc,
346 sglen, len, ctx->base.ctxr_dma);
348 ret = PTR_ERR(cdesc);
362 /* Setup the context options */
363 safexcel_context_control(ctx, req, first_cdesc);
366 safexcel_hash_token(first_cdesc, len, req->state_sz);
368 req->result_dma = dma_map_single(priv->dev, req->state, req->state_sz,
370 if (dma_mapping_error(priv->dev, req->result_dma)) {
375 /* Add a result descriptor */
376 rdesc = safexcel_add_rdesc(priv, ring, 1, 1, req->result_dma,
379 ret = PTR_ERR(rdesc);
383 safexcel_rdr_req_set(priv, ring, rdesc, &areq->base);
385 req->processed += len;
392 dma_unmap_single(priv->dev, req->result_dma, req->state_sz,
395 dma_unmap_sg(priv->dev, areq->src, req->nents, DMA_TO_DEVICE);
397 for (i = 0; i < n_cdesc; i++)
398 safexcel_ring_rollback_wptr(priv, &priv->ring[ring].cdr);
400 if (req->cache_dma) {
401 dma_unmap_single(priv->dev, req->cache_dma, req->cache_sz,
410 static int safexcel_handle_inv_result(struct safexcel_crypto_priv *priv,
412 struct crypto_async_request *async,
413 bool *should_complete, int *ret)
415 struct safexcel_result_desc *rdesc;
416 struct ahash_request *areq = ahash_request_cast(async);
417 struct crypto_ahash *ahash = crypto_ahash_reqtfm(areq);
418 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(ahash);
423 rdesc = safexcel_ring_next_rptr(priv, &priv->ring[ring].rdr);
426 "hash: invalidate: could not retrieve the result descriptor\n");
427 *ret = PTR_ERR(rdesc);
429 *ret = safexcel_rdesc_check_errors(priv, rdesc);
432 safexcel_complete(priv, ring);
434 if (ctx->base.exit_inv) {
435 dma_pool_free(priv->context_pool, ctx->base.ctxr,
438 *should_complete = true;
442 ring = safexcel_select_ring(priv);
443 ctx->base.ring = ring;
445 spin_lock_bh(&priv->ring[ring].queue_lock);
446 enq_ret = crypto_enqueue_request(&priv->ring[ring].queue, async);
447 spin_unlock_bh(&priv->ring[ring].queue_lock);
449 if (enq_ret != -EINPROGRESS)
452 queue_work(priv->ring[ring].workqueue,
453 &priv->ring[ring].work_data.work);
455 *should_complete = false;
460 static int safexcel_handle_result(struct safexcel_crypto_priv *priv, int ring,
461 struct crypto_async_request *async,
462 bool *should_complete, int *ret)
464 struct ahash_request *areq = ahash_request_cast(async);
465 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
468 BUG_ON(!(priv->flags & EIP197_TRC_CACHE) && req->needs_inv);
470 if (req->needs_inv) {
471 req->needs_inv = false;
472 err = safexcel_handle_inv_result(priv, ring, async,
473 should_complete, ret);
475 err = safexcel_handle_req_result(priv, ring, async,
476 should_complete, ret);
482 static int safexcel_ahash_send_inv(struct crypto_async_request *async,
483 int ring, int *commands, int *results)
485 struct ahash_request *areq = ahash_request_cast(async);
486 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
489 ret = safexcel_invalidate_cache(async, ctx->priv,
490 ctx->base.ctxr_dma, ring);
500 static int safexcel_ahash_send(struct crypto_async_request *async,
501 int ring, int *commands, int *results)
503 struct ahash_request *areq = ahash_request_cast(async);
504 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
508 ret = safexcel_ahash_send_inv(async, ring, commands, results);
510 ret = safexcel_ahash_send_req(async, ring, commands, results);
515 static int safexcel_ahash_exit_inv(struct crypto_tfm *tfm)
517 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
518 struct safexcel_crypto_priv *priv = ctx->priv;
519 EIP197_REQUEST_ON_STACK(req, ahash, EIP197_AHASH_REQ_SIZE);
520 struct safexcel_ahash_req *rctx = ahash_request_ctx(req);
521 struct safexcel_inv_result result = {};
522 int ring = ctx->base.ring;
524 memset(req, 0, EIP197_AHASH_REQ_SIZE);
526 /* create invalidation request */
527 init_completion(&result.completion);
528 ahash_request_set_callback(req, CRYPTO_TFM_REQ_MAY_BACKLOG,
529 safexcel_inv_complete, &result);
531 ahash_request_set_tfm(req, __crypto_ahash_cast(tfm));
532 ctx = crypto_tfm_ctx(req->base.tfm);
533 ctx->base.exit_inv = true;
534 rctx->needs_inv = true;
536 spin_lock_bh(&priv->ring[ring].queue_lock);
537 crypto_enqueue_request(&priv->ring[ring].queue, &req->base);
538 spin_unlock_bh(&priv->ring[ring].queue_lock);
540 queue_work(priv->ring[ring].workqueue,
541 &priv->ring[ring].work_data.work);
543 wait_for_completion(&result.completion);
546 dev_warn(priv->dev, "hash: completion error (%d)\n",
554 /* safexcel_ahash_cache: cache data until at least one request can be sent to
555 * the engine, aka. when there is at least 1 block size in the pipe.
557 static int safexcel_ahash_cache(struct ahash_request *areq)
559 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
562 /* cache_len: everything accepted by the driver but not sent yet,
563 * tot sz handled by update() - last req sz - tot sz handled by send()
565 cache_len = safexcel_queued_len(req);
568 * In case there isn't enough bytes to proceed (less than a
569 * block size), cache the data until we have enough.
571 if (cache_len + areq->nbytes <= HASH_CACHE_SIZE) {
572 sg_pcopy_to_buffer(areq->src, sg_nents(areq->src),
573 req->cache + cache_len,
578 /* We couldn't cache all the data */
582 static int safexcel_ahash_enqueue(struct ahash_request *areq)
584 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
585 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
586 struct safexcel_crypto_priv *priv = ctx->priv;
589 req->needs_inv = false;
591 if (ctx->base.ctxr) {
592 if (priv->flags & EIP197_TRC_CACHE && !ctx->base.needs_inv &&
594 (/* invalidate for basic hash continuation finish */
596 (req->digest == CONTEXT_CONTROL_DIGEST_PRECOMPUTED)) ||
597 /* invalidate if (i)digest changed */
598 memcmp(ctx->base.ctxr->data, req->state, req->state_sz) ||
599 /* invalidate for HMAC continuation finish */
600 (req->finish && (req->processed != req->block_sz)) ||
601 /* invalidate for HMAC finish with odigest changed */
603 memcmp(ctx->base.ctxr->data + (req->state_sz>>2),
604 ctx->opad, req->state_sz))))
606 * We're still setting needs_inv here, even though it is
607 * cleared right away, because the needs_inv flag can be
608 * set in other functions and we want to keep the same
611 ctx->base.needs_inv = true;
613 if (ctx->base.needs_inv) {
614 ctx->base.needs_inv = false;
615 req->needs_inv = true;
618 ctx->base.ring = safexcel_select_ring(priv);
619 ctx->base.ctxr = dma_pool_zalloc(priv->context_pool,
620 EIP197_GFP_FLAGS(areq->base),
621 &ctx->base.ctxr_dma);
626 ring = ctx->base.ring;
628 spin_lock_bh(&priv->ring[ring].queue_lock);
629 ret = crypto_enqueue_request(&priv->ring[ring].queue, &areq->base);
630 spin_unlock_bh(&priv->ring[ring].queue_lock);
632 queue_work(priv->ring[ring].workqueue,
633 &priv->ring[ring].work_data.work);
638 static int safexcel_ahash_update(struct ahash_request *areq)
640 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
643 /* If the request is 0 length, do nothing */
647 /* Add request to the cache if it fits */
648 ret = safexcel_ahash_cache(areq);
650 /* Update total request length */
651 req->len += areq->nbytes;
653 /* If not all data could fit into the cache, go process the excess.
654 * Also go process immediately for an HMAC IV precompute, which
655 * will never be finished at all, but needs to be processed anyway.
657 if ((ret && !req->finish) || req->last_req)
658 return safexcel_ahash_enqueue(areq);
663 static int safexcel_ahash_final(struct ahash_request *areq)
665 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
666 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
670 if (unlikely(!req->len && !areq->nbytes)) {
672 * If we have an overall 0 length *hash* request:
673 * The HW cannot do 0 length hash, so we provide the correct
674 * result directly here.
676 if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_MD5)
677 memcpy(areq->result, md5_zero_message_hash,
679 else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA1)
680 memcpy(areq->result, sha1_zero_message_hash,
682 else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA224)
683 memcpy(areq->result, sha224_zero_message_hash,
685 else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA256)
686 memcpy(areq->result, sha256_zero_message_hash,
688 else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA384)
689 memcpy(areq->result, sha384_zero_message_hash,
691 else if (ctx->alg == CONTEXT_CONTROL_CRYPTO_ALG_SHA512)
692 memcpy(areq->result, sha512_zero_message_hash,
696 } else if (unlikely(req->hmac &&
697 (req->len == req->block_sz) &&
700 * If we have an overall 0 length *HMAC* request:
701 * For HMAC, we need to finalize the inner digest
702 * and then perform the outer hash.
705 /* generate pad block in the cache */
706 /* start with a hash block of all zeroes */
707 memset(req->cache, 0, req->block_sz);
708 /* set the first byte to 0x80 to 'append a 1 bit' */
709 req->cache[0] = 0x80;
710 /* add the length in bits in the last 2 bytes */
711 if (req->len_is_le) {
712 /* Little endian length word (e.g. MD5) */
713 req->cache[req->block_sz-8] = (req->block_sz << 3) &
715 req->cache[req->block_sz-7] = (req->block_sz >> 5);
717 /* Big endian length word (e.g. any SHA) */
718 req->cache[req->block_sz-2] = (req->block_sz >> 5);
719 req->cache[req->block_sz-1] = (req->block_sz << 3) &
723 req->len += req->block_sz; /* plus 1 hash block */
725 /* Set special zero-length HMAC flag */
726 req->hmac_zlen = true;
729 req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
730 } else if (req->hmac) {
732 req->digest = CONTEXT_CONTROL_DIGEST_HMAC;
735 return safexcel_ahash_enqueue(areq);
738 static int safexcel_ahash_finup(struct ahash_request *areq)
740 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
744 safexcel_ahash_update(areq);
745 return safexcel_ahash_final(areq);
748 static int safexcel_ahash_export(struct ahash_request *areq, void *out)
750 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
751 struct safexcel_ahash_export_state *export = out;
753 export->len = req->len;
754 export->processed = req->processed;
756 export->digest = req->digest;
758 memcpy(export->state, req->state, req->state_sz);
759 memcpy(export->cache, req->cache, HASH_CACHE_SIZE);
764 static int safexcel_ahash_import(struct ahash_request *areq, const void *in)
766 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
767 const struct safexcel_ahash_export_state *export = in;
770 ret = crypto_ahash_init(areq);
774 req->len = export->len;
775 req->processed = export->processed;
777 req->digest = export->digest;
779 memcpy(req->cache, export->cache, HASH_CACHE_SIZE);
780 memcpy(req->state, export->state, req->state_sz);
785 static int safexcel_ahash_cra_init(struct crypto_tfm *tfm)
787 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
788 struct safexcel_alg_template *tmpl =
789 container_of(__crypto_ahash_alg(tfm->__crt_alg),
790 struct safexcel_alg_template, alg.ahash);
792 ctx->priv = tmpl->priv;
793 ctx->base.send = safexcel_ahash_send;
794 ctx->base.handle_result = safexcel_handle_result;
796 crypto_ahash_set_reqsize(__crypto_ahash_cast(tfm),
797 sizeof(struct safexcel_ahash_req));
801 static int safexcel_sha1_init(struct ahash_request *areq)
803 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
804 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
806 memset(req, 0, sizeof(*req));
808 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
809 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
810 req->state_sz = SHA1_DIGEST_SIZE;
811 req->block_sz = SHA1_BLOCK_SIZE;
816 static int safexcel_sha1_digest(struct ahash_request *areq)
818 int ret = safexcel_sha1_init(areq);
823 return safexcel_ahash_finup(areq);
826 static void safexcel_ahash_cra_exit(struct crypto_tfm *tfm)
828 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(tfm);
829 struct safexcel_crypto_priv *priv = ctx->priv;
832 /* context not allocated, skip invalidation */
836 if (priv->flags & EIP197_TRC_CACHE) {
837 ret = safexcel_ahash_exit_inv(tfm);
839 dev_warn(priv->dev, "hash: invalidation error %d\n", ret);
841 dma_pool_free(priv->context_pool, ctx->base.ctxr,
846 struct safexcel_alg_template safexcel_alg_sha1 = {
847 .type = SAFEXCEL_ALG_TYPE_AHASH,
848 .algo_mask = SAFEXCEL_ALG_SHA1,
850 .init = safexcel_sha1_init,
851 .update = safexcel_ahash_update,
852 .final = safexcel_ahash_final,
853 .finup = safexcel_ahash_finup,
854 .digest = safexcel_sha1_digest,
855 .export = safexcel_ahash_export,
856 .import = safexcel_ahash_import,
858 .digestsize = SHA1_DIGEST_SIZE,
859 .statesize = sizeof(struct safexcel_ahash_export_state),
862 .cra_driver_name = "safexcel-sha1",
863 .cra_priority = SAFEXCEL_CRA_PRIORITY,
864 .cra_flags = CRYPTO_ALG_ASYNC |
865 CRYPTO_ALG_KERN_DRIVER_ONLY,
866 .cra_blocksize = SHA1_BLOCK_SIZE,
867 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
868 .cra_init = safexcel_ahash_cra_init,
869 .cra_exit = safexcel_ahash_cra_exit,
870 .cra_module = THIS_MODULE,
876 static int safexcel_hmac_sha1_init(struct ahash_request *areq)
878 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
879 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
881 memset(req, 0, sizeof(*req));
883 /* Start from ipad precompute */
884 memcpy(req->state, ctx->ipad, SHA1_DIGEST_SIZE);
885 /* Already processed the key^ipad part now! */
886 req->len = SHA1_BLOCK_SIZE;
887 req->processed = SHA1_BLOCK_SIZE;
889 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA1;
890 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
891 req->state_sz = SHA1_DIGEST_SIZE;
892 req->block_sz = SHA1_BLOCK_SIZE;
898 static int safexcel_hmac_sha1_digest(struct ahash_request *areq)
900 int ret = safexcel_hmac_sha1_init(areq);
905 return safexcel_ahash_finup(areq);
908 struct safexcel_ahash_result {
909 struct completion completion;
913 static void safexcel_ahash_complete(struct crypto_async_request *req, int error)
915 struct safexcel_ahash_result *result = req->data;
917 if (error == -EINPROGRESS)
920 result->error = error;
921 complete(&result->completion);
924 static int safexcel_hmac_init_pad(struct ahash_request *areq,
925 unsigned int blocksize, const u8 *key,
926 unsigned int keylen, u8 *ipad, u8 *opad)
928 struct safexcel_ahash_result result;
929 struct scatterlist sg;
933 if (keylen <= blocksize) {
934 memcpy(ipad, key, keylen);
936 keydup = kmemdup(key, keylen, GFP_KERNEL);
940 ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
941 safexcel_ahash_complete, &result);
942 sg_init_one(&sg, keydup, keylen);
943 ahash_request_set_crypt(areq, &sg, ipad, keylen);
944 init_completion(&result.completion);
946 ret = crypto_ahash_digest(areq);
947 if (ret == -EINPROGRESS || ret == -EBUSY) {
948 wait_for_completion_interruptible(&result.completion);
953 memzero_explicit(keydup, keylen);
959 keylen = crypto_ahash_digestsize(crypto_ahash_reqtfm(areq));
962 memset(ipad + keylen, 0, blocksize - keylen);
963 memcpy(opad, ipad, blocksize);
965 for (i = 0; i < blocksize; i++) {
966 ipad[i] ^= HMAC_IPAD_VALUE;
967 opad[i] ^= HMAC_OPAD_VALUE;
973 static int safexcel_hmac_init_iv(struct ahash_request *areq,
974 unsigned int blocksize, u8 *pad, void *state)
976 struct safexcel_ahash_result result;
977 struct safexcel_ahash_req *req;
978 struct scatterlist sg;
981 ahash_request_set_callback(areq, CRYPTO_TFM_REQ_MAY_BACKLOG,
982 safexcel_ahash_complete, &result);
983 sg_init_one(&sg, pad, blocksize);
984 ahash_request_set_crypt(areq, &sg, pad, blocksize);
985 init_completion(&result.completion);
987 ret = crypto_ahash_init(areq);
991 req = ahash_request_ctx(areq);
993 req->last_req = true;
995 ret = crypto_ahash_update(areq);
996 if (ret && ret != -EINPROGRESS && ret != -EBUSY)
999 wait_for_completion_interruptible(&result.completion);
1001 return result.error;
1003 return crypto_ahash_export(areq, state);
1006 int safexcel_hmac_setkey(const char *alg, const u8 *key, unsigned int keylen,
1007 void *istate, void *ostate)
1009 struct ahash_request *areq;
1010 struct crypto_ahash *tfm;
1011 unsigned int blocksize;
1015 tfm = crypto_alloc_ahash(alg, 0, 0);
1017 return PTR_ERR(tfm);
1019 areq = ahash_request_alloc(tfm, GFP_KERNEL);
1025 crypto_ahash_clear_flags(tfm, ~0);
1026 blocksize = crypto_tfm_alg_blocksize(crypto_ahash_tfm(tfm));
1028 ipad = kcalloc(2, blocksize, GFP_KERNEL);
1034 opad = ipad + blocksize;
1036 ret = safexcel_hmac_init_pad(areq, blocksize, key, keylen, ipad, opad);
1040 ret = safexcel_hmac_init_iv(areq, blocksize, ipad, istate);
1044 ret = safexcel_hmac_init_iv(areq, blocksize, opad, ostate);
1049 ahash_request_free(areq);
1051 crypto_free_ahash(tfm);
1056 static int safexcel_hmac_alg_setkey(struct crypto_ahash *tfm, const u8 *key,
1057 unsigned int keylen, const char *alg,
1058 unsigned int state_sz)
1060 struct safexcel_ahash_ctx *ctx = crypto_tfm_ctx(crypto_ahash_tfm(tfm));
1061 struct safexcel_crypto_priv *priv = ctx->priv;
1062 struct safexcel_ahash_export_state istate, ostate;
1065 ret = safexcel_hmac_setkey(alg, key, keylen, &istate, &ostate);
1069 if (priv->flags & EIP197_TRC_CACHE && ctx->base.ctxr &&
1070 (memcmp(ctx->ipad, istate.state, state_sz) ||
1071 memcmp(ctx->opad, ostate.state, state_sz)))
1072 ctx->base.needs_inv = true;
1074 memcpy(ctx->ipad, &istate.state, state_sz);
1075 memcpy(ctx->opad, &ostate.state, state_sz);
1080 static int safexcel_hmac_sha1_setkey(struct crypto_ahash *tfm, const u8 *key,
1081 unsigned int keylen)
1083 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha1",
1087 struct safexcel_alg_template safexcel_alg_hmac_sha1 = {
1088 .type = SAFEXCEL_ALG_TYPE_AHASH,
1089 .algo_mask = SAFEXCEL_ALG_SHA1,
1091 .init = safexcel_hmac_sha1_init,
1092 .update = safexcel_ahash_update,
1093 .final = safexcel_ahash_final,
1094 .finup = safexcel_ahash_finup,
1095 .digest = safexcel_hmac_sha1_digest,
1096 .setkey = safexcel_hmac_sha1_setkey,
1097 .export = safexcel_ahash_export,
1098 .import = safexcel_ahash_import,
1100 .digestsize = SHA1_DIGEST_SIZE,
1101 .statesize = sizeof(struct safexcel_ahash_export_state),
1103 .cra_name = "hmac(sha1)",
1104 .cra_driver_name = "safexcel-hmac-sha1",
1105 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1106 .cra_flags = CRYPTO_ALG_ASYNC |
1107 CRYPTO_ALG_KERN_DRIVER_ONLY,
1108 .cra_blocksize = SHA1_BLOCK_SIZE,
1109 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1110 .cra_init = safexcel_ahash_cra_init,
1111 .cra_exit = safexcel_ahash_cra_exit,
1112 .cra_module = THIS_MODULE,
1118 static int safexcel_sha256_init(struct ahash_request *areq)
1120 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1121 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1123 memset(req, 0, sizeof(*req));
1125 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
1126 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1127 req->state_sz = SHA256_DIGEST_SIZE;
1128 req->block_sz = SHA256_BLOCK_SIZE;
1133 static int safexcel_sha256_digest(struct ahash_request *areq)
1135 int ret = safexcel_sha256_init(areq);
1140 return safexcel_ahash_finup(areq);
1143 struct safexcel_alg_template safexcel_alg_sha256 = {
1144 .type = SAFEXCEL_ALG_TYPE_AHASH,
1145 .algo_mask = SAFEXCEL_ALG_SHA2_256,
1147 .init = safexcel_sha256_init,
1148 .update = safexcel_ahash_update,
1149 .final = safexcel_ahash_final,
1150 .finup = safexcel_ahash_finup,
1151 .digest = safexcel_sha256_digest,
1152 .export = safexcel_ahash_export,
1153 .import = safexcel_ahash_import,
1155 .digestsize = SHA256_DIGEST_SIZE,
1156 .statesize = sizeof(struct safexcel_ahash_export_state),
1158 .cra_name = "sha256",
1159 .cra_driver_name = "safexcel-sha256",
1160 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1161 .cra_flags = CRYPTO_ALG_ASYNC |
1162 CRYPTO_ALG_KERN_DRIVER_ONLY,
1163 .cra_blocksize = SHA256_BLOCK_SIZE,
1164 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1165 .cra_init = safexcel_ahash_cra_init,
1166 .cra_exit = safexcel_ahash_cra_exit,
1167 .cra_module = THIS_MODULE,
1173 static int safexcel_sha224_init(struct ahash_request *areq)
1175 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1176 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1178 memset(req, 0, sizeof(*req));
1180 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
1181 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1182 req->state_sz = SHA256_DIGEST_SIZE;
1183 req->block_sz = SHA256_BLOCK_SIZE;
1188 static int safexcel_sha224_digest(struct ahash_request *areq)
1190 int ret = safexcel_sha224_init(areq);
1195 return safexcel_ahash_finup(areq);
1198 struct safexcel_alg_template safexcel_alg_sha224 = {
1199 .type = SAFEXCEL_ALG_TYPE_AHASH,
1200 .algo_mask = SAFEXCEL_ALG_SHA2_256,
1202 .init = safexcel_sha224_init,
1203 .update = safexcel_ahash_update,
1204 .final = safexcel_ahash_final,
1205 .finup = safexcel_ahash_finup,
1206 .digest = safexcel_sha224_digest,
1207 .export = safexcel_ahash_export,
1208 .import = safexcel_ahash_import,
1210 .digestsize = SHA224_DIGEST_SIZE,
1211 .statesize = sizeof(struct safexcel_ahash_export_state),
1213 .cra_name = "sha224",
1214 .cra_driver_name = "safexcel-sha224",
1215 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1216 .cra_flags = CRYPTO_ALG_ASYNC |
1217 CRYPTO_ALG_KERN_DRIVER_ONLY,
1218 .cra_blocksize = SHA224_BLOCK_SIZE,
1219 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1220 .cra_init = safexcel_ahash_cra_init,
1221 .cra_exit = safexcel_ahash_cra_exit,
1222 .cra_module = THIS_MODULE,
1228 static int safexcel_hmac_sha224_setkey(struct crypto_ahash *tfm, const u8 *key,
1229 unsigned int keylen)
1231 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha224",
1232 SHA256_DIGEST_SIZE);
1235 static int safexcel_hmac_sha224_init(struct ahash_request *areq)
1237 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1238 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1240 memset(req, 0, sizeof(*req));
1242 /* Start from ipad precompute */
1243 memcpy(req->state, ctx->ipad, SHA256_DIGEST_SIZE);
1244 /* Already processed the key^ipad part now! */
1245 req->len = SHA256_BLOCK_SIZE;
1246 req->processed = SHA256_BLOCK_SIZE;
1248 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA224;
1249 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1250 req->state_sz = SHA256_DIGEST_SIZE;
1251 req->block_sz = SHA256_BLOCK_SIZE;
1257 static int safexcel_hmac_sha224_digest(struct ahash_request *areq)
1259 int ret = safexcel_hmac_sha224_init(areq);
1264 return safexcel_ahash_finup(areq);
1267 struct safexcel_alg_template safexcel_alg_hmac_sha224 = {
1268 .type = SAFEXCEL_ALG_TYPE_AHASH,
1269 .algo_mask = SAFEXCEL_ALG_SHA2_256,
1271 .init = safexcel_hmac_sha224_init,
1272 .update = safexcel_ahash_update,
1273 .final = safexcel_ahash_final,
1274 .finup = safexcel_ahash_finup,
1275 .digest = safexcel_hmac_sha224_digest,
1276 .setkey = safexcel_hmac_sha224_setkey,
1277 .export = safexcel_ahash_export,
1278 .import = safexcel_ahash_import,
1280 .digestsize = SHA224_DIGEST_SIZE,
1281 .statesize = sizeof(struct safexcel_ahash_export_state),
1283 .cra_name = "hmac(sha224)",
1284 .cra_driver_name = "safexcel-hmac-sha224",
1285 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1286 .cra_flags = CRYPTO_ALG_ASYNC |
1287 CRYPTO_ALG_KERN_DRIVER_ONLY,
1288 .cra_blocksize = SHA224_BLOCK_SIZE,
1289 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1290 .cra_init = safexcel_ahash_cra_init,
1291 .cra_exit = safexcel_ahash_cra_exit,
1292 .cra_module = THIS_MODULE,
1298 static int safexcel_hmac_sha256_setkey(struct crypto_ahash *tfm, const u8 *key,
1299 unsigned int keylen)
1301 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha256",
1302 SHA256_DIGEST_SIZE);
1305 static int safexcel_hmac_sha256_init(struct ahash_request *areq)
1307 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1308 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1310 memset(req, 0, sizeof(*req));
1312 /* Start from ipad precompute */
1313 memcpy(req->state, ctx->ipad, SHA256_DIGEST_SIZE);
1314 /* Already processed the key^ipad part now! */
1315 req->len = SHA256_BLOCK_SIZE;
1316 req->processed = SHA256_BLOCK_SIZE;
1318 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA256;
1319 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1320 req->state_sz = SHA256_DIGEST_SIZE;
1321 req->block_sz = SHA256_BLOCK_SIZE;
1327 static int safexcel_hmac_sha256_digest(struct ahash_request *areq)
1329 int ret = safexcel_hmac_sha256_init(areq);
1334 return safexcel_ahash_finup(areq);
1337 struct safexcel_alg_template safexcel_alg_hmac_sha256 = {
1338 .type = SAFEXCEL_ALG_TYPE_AHASH,
1339 .algo_mask = SAFEXCEL_ALG_SHA2_256,
1341 .init = safexcel_hmac_sha256_init,
1342 .update = safexcel_ahash_update,
1343 .final = safexcel_ahash_final,
1344 .finup = safexcel_ahash_finup,
1345 .digest = safexcel_hmac_sha256_digest,
1346 .setkey = safexcel_hmac_sha256_setkey,
1347 .export = safexcel_ahash_export,
1348 .import = safexcel_ahash_import,
1350 .digestsize = SHA256_DIGEST_SIZE,
1351 .statesize = sizeof(struct safexcel_ahash_export_state),
1353 .cra_name = "hmac(sha256)",
1354 .cra_driver_name = "safexcel-hmac-sha256",
1355 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1356 .cra_flags = CRYPTO_ALG_ASYNC |
1357 CRYPTO_ALG_KERN_DRIVER_ONLY,
1358 .cra_blocksize = SHA256_BLOCK_SIZE,
1359 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1360 .cra_init = safexcel_ahash_cra_init,
1361 .cra_exit = safexcel_ahash_cra_exit,
1362 .cra_module = THIS_MODULE,
1368 static int safexcel_sha512_init(struct ahash_request *areq)
1370 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1371 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1373 memset(req, 0, sizeof(*req));
1375 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
1376 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1377 req->state_sz = SHA512_DIGEST_SIZE;
1378 req->block_sz = SHA512_BLOCK_SIZE;
1383 static int safexcel_sha512_digest(struct ahash_request *areq)
1385 int ret = safexcel_sha512_init(areq);
1390 return safexcel_ahash_finup(areq);
1393 struct safexcel_alg_template safexcel_alg_sha512 = {
1394 .type = SAFEXCEL_ALG_TYPE_AHASH,
1395 .algo_mask = SAFEXCEL_ALG_SHA2_512,
1397 .init = safexcel_sha512_init,
1398 .update = safexcel_ahash_update,
1399 .final = safexcel_ahash_final,
1400 .finup = safexcel_ahash_finup,
1401 .digest = safexcel_sha512_digest,
1402 .export = safexcel_ahash_export,
1403 .import = safexcel_ahash_import,
1405 .digestsize = SHA512_DIGEST_SIZE,
1406 .statesize = sizeof(struct safexcel_ahash_export_state),
1408 .cra_name = "sha512",
1409 .cra_driver_name = "safexcel-sha512",
1410 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1411 .cra_flags = CRYPTO_ALG_ASYNC |
1412 CRYPTO_ALG_KERN_DRIVER_ONLY,
1413 .cra_blocksize = SHA512_BLOCK_SIZE,
1414 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1415 .cra_init = safexcel_ahash_cra_init,
1416 .cra_exit = safexcel_ahash_cra_exit,
1417 .cra_module = THIS_MODULE,
1423 static int safexcel_sha384_init(struct ahash_request *areq)
1425 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1426 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1428 memset(req, 0, sizeof(*req));
1430 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
1431 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1432 req->state_sz = SHA512_DIGEST_SIZE;
1433 req->block_sz = SHA512_BLOCK_SIZE;
1438 static int safexcel_sha384_digest(struct ahash_request *areq)
1440 int ret = safexcel_sha384_init(areq);
1445 return safexcel_ahash_finup(areq);
1448 struct safexcel_alg_template safexcel_alg_sha384 = {
1449 .type = SAFEXCEL_ALG_TYPE_AHASH,
1450 .algo_mask = SAFEXCEL_ALG_SHA2_512,
1452 .init = safexcel_sha384_init,
1453 .update = safexcel_ahash_update,
1454 .final = safexcel_ahash_final,
1455 .finup = safexcel_ahash_finup,
1456 .digest = safexcel_sha384_digest,
1457 .export = safexcel_ahash_export,
1458 .import = safexcel_ahash_import,
1460 .digestsize = SHA384_DIGEST_SIZE,
1461 .statesize = sizeof(struct safexcel_ahash_export_state),
1463 .cra_name = "sha384",
1464 .cra_driver_name = "safexcel-sha384",
1465 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1466 .cra_flags = CRYPTO_ALG_ASYNC |
1467 CRYPTO_ALG_KERN_DRIVER_ONLY,
1468 .cra_blocksize = SHA384_BLOCK_SIZE,
1469 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1470 .cra_init = safexcel_ahash_cra_init,
1471 .cra_exit = safexcel_ahash_cra_exit,
1472 .cra_module = THIS_MODULE,
1478 static int safexcel_hmac_sha512_setkey(struct crypto_ahash *tfm, const u8 *key,
1479 unsigned int keylen)
1481 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha512",
1482 SHA512_DIGEST_SIZE);
1485 static int safexcel_hmac_sha512_init(struct ahash_request *areq)
1487 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1488 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1490 memset(req, 0, sizeof(*req));
1492 /* Start from ipad precompute */
1493 memcpy(req->state, ctx->ipad, SHA512_DIGEST_SIZE);
1494 /* Already processed the key^ipad part now! */
1495 req->len = SHA512_BLOCK_SIZE;
1496 req->processed = SHA512_BLOCK_SIZE;
1498 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA512;
1499 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1500 req->state_sz = SHA512_DIGEST_SIZE;
1501 req->block_sz = SHA512_BLOCK_SIZE;
1507 static int safexcel_hmac_sha512_digest(struct ahash_request *areq)
1509 int ret = safexcel_hmac_sha512_init(areq);
1514 return safexcel_ahash_finup(areq);
1517 struct safexcel_alg_template safexcel_alg_hmac_sha512 = {
1518 .type = SAFEXCEL_ALG_TYPE_AHASH,
1519 .algo_mask = SAFEXCEL_ALG_SHA2_512,
1521 .init = safexcel_hmac_sha512_init,
1522 .update = safexcel_ahash_update,
1523 .final = safexcel_ahash_final,
1524 .finup = safexcel_ahash_finup,
1525 .digest = safexcel_hmac_sha512_digest,
1526 .setkey = safexcel_hmac_sha512_setkey,
1527 .export = safexcel_ahash_export,
1528 .import = safexcel_ahash_import,
1530 .digestsize = SHA512_DIGEST_SIZE,
1531 .statesize = sizeof(struct safexcel_ahash_export_state),
1533 .cra_name = "hmac(sha512)",
1534 .cra_driver_name = "safexcel-hmac-sha512",
1535 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1536 .cra_flags = CRYPTO_ALG_ASYNC |
1537 CRYPTO_ALG_KERN_DRIVER_ONLY,
1538 .cra_blocksize = SHA512_BLOCK_SIZE,
1539 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1540 .cra_init = safexcel_ahash_cra_init,
1541 .cra_exit = safexcel_ahash_cra_exit,
1542 .cra_module = THIS_MODULE,
1548 static int safexcel_hmac_sha384_setkey(struct crypto_ahash *tfm, const u8 *key,
1549 unsigned int keylen)
1551 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-sha384",
1552 SHA512_DIGEST_SIZE);
1555 static int safexcel_hmac_sha384_init(struct ahash_request *areq)
1557 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1558 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1560 memset(req, 0, sizeof(*req));
1562 /* Start from ipad precompute */
1563 memcpy(req->state, ctx->ipad, SHA512_DIGEST_SIZE);
1564 /* Already processed the key^ipad part now! */
1565 req->len = SHA512_BLOCK_SIZE;
1566 req->processed = SHA512_BLOCK_SIZE;
1568 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_SHA384;
1569 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1570 req->state_sz = SHA512_DIGEST_SIZE;
1571 req->block_sz = SHA512_BLOCK_SIZE;
1577 static int safexcel_hmac_sha384_digest(struct ahash_request *areq)
1579 int ret = safexcel_hmac_sha384_init(areq);
1584 return safexcel_ahash_finup(areq);
1587 struct safexcel_alg_template safexcel_alg_hmac_sha384 = {
1588 .type = SAFEXCEL_ALG_TYPE_AHASH,
1589 .algo_mask = SAFEXCEL_ALG_SHA2_512,
1591 .init = safexcel_hmac_sha384_init,
1592 .update = safexcel_ahash_update,
1593 .final = safexcel_ahash_final,
1594 .finup = safexcel_ahash_finup,
1595 .digest = safexcel_hmac_sha384_digest,
1596 .setkey = safexcel_hmac_sha384_setkey,
1597 .export = safexcel_ahash_export,
1598 .import = safexcel_ahash_import,
1600 .digestsize = SHA384_DIGEST_SIZE,
1601 .statesize = sizeof(struct safexcel_ahash_export_state),
1603 .cra_name = "hmac(sha384)",
1604 .cra_driver_name = "safexcel-hmac-sha384",
1605 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1606 .cra_flags = CRYPTO_ALG_ASYNC |
1607 CRYPTO_ALG_KERN_DRIVER_ONLY,
1608 .cra_blocksize = SHA384_BLOCK_SIZE,
1609 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1610 .cra_init = safexcel_ahash_cra_init,
1611 .cra_exit = safexcel_ahash_cra_exit,
1612 .cra_module = THIS_MODULE,
1618 static int safexcel_md5_init(struct ahash_request *areq)
1620 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1621 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1623 memset(req, 0, sizeof(*req));
1625 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
1626 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1627 req->state_sz = MD5_DIGEST_SIZE;
1628 req->block_sz = MD5_HMAC_BLOCK_SIZE;
1633 static int safexcel_md5_digest(struct ahash_request *areq)
1635 int ret = safexcel_md5_init(areq);
1640 return safexcel_ahash_finup(areq);
1643 struct safexcel_alg_template safexcel_alg_md5 = {
1644 .type = SAFEXCEL_ALG_TYPE_AHASH,
1645 .algo_mask = SAFEXCEL_ALG_MD5,
1647 .init = safexcel_md5_init,
1648 .update = safexcel_ahash_update,
1649 .final = safexcel_ahash_final,
1650 .finup = safexcel_ahash_finup,
1651 .digest = safexcel_md5_digest,
1652 .export = safexcel_ahash_export,
1653 .import = safexcel_ahash_import,
1655 .digestsize = MD5_DIGEST_SIZE,
1656 .statesize = sizeof(struct safexcel_ahash_export_state),
1659 .cra_driver_name = "safexcel-md5",
1660 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1661 .cra_flags = CRYPTO_ALG_ASYNC |
1662 CRYPTO_ALG_KERN_DRIVER_ONLY,
1663 .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
1664 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1665 .cra_init = safexcel_ahash_cra_init,
1666 .cra_exit = safexcel_ahash_cra_exit,
1667 .cra_module = THIS_MODULE,
1673 static int safexcel_hmac_md5_init(struct ahash_request *areq)
1675 struct safexcel_ahash_ctx *ctx = crypto_ahash_ctx(crypto_ahash_reqtfm(areq));
1676 struct safexcel_ahash_req *req = ahash_request_ctx(areq);
1678 memset(req, 0, sizeof(*req));
1680 /* Start from ipad precompute */
1681 memcpy(req->state, ctx->ipad, MD5_DIGEST_SIZE);
1682 /* Already processed the key^ipad part now! */
1683 req->len = MD5_HMAC_BLOCK_SIZE;
1684 req->processed = MD5_HMAC_BLOCK_SIZE;
1686 ctx->alg = CONTEXT_CONTROL_CRYPTO_ALG_MD5;
1687 req->digest = CONTEXT_CONTROL_DIGEST_PRECOMPUTED;
1688 req->state_sz = MD5_DIGEST_SIZE;
1689 req->block_sz = MD5_HMAC_BLOCK_SIZE;
1690 req->len_is_le = true; /* MD5 is little endian! ... */
1696 static int safexcel_hmac_md5_setkey(struct crypto_ahash *tfm, const u8 *key,
1697 unsigned int keylen)
1699 return safexcel_hmac_alg_setkey(tfm, key, keylen, "safexcel-md5",
1703 static int safexcel_hmac_md5_digest(struct ahash_request *areq)
1705 int ret = safexcel_hmac_md5_init(areq);
1710 return safexcel_ahash_finup(areq);
1713 struct safexcel_alg_template safexcel_alg_hmac_md5 = {
1714 .type = SAFEXCEL_ALG_TYPE_AHASH,
1715 .algo_mask = SAFEXCEL_ALG_MD5,
1717 .init = safexcel_hmac_md5_init,
1718 .update = safexcel_ahash_update,
1719 .final = safexcel_ahash_final,
1720 .finup = safexcel_ahash_finup,
1721 .digest = safexcel_hmac_md5_digest,
1722 .setkey = safexcel_hmac_md5_setkey,
1723 .export = safexcel_ahash_export,
1724 .import = safexcel_ahash_import,
1726 .digestsize = MD5_DIGEST_SIZE,
1727 .statesize = sizeof(struct safexcel_ahash_export_state),
1729 .cra_name = "hmac(md5)",
1730 .cra_driver_name = "safexcel-hmac-md5",
1731 .cra_priority = SAFEXCEL_CRA_PRIORITY,
1732 .cra_flags = CRYPTO_ALG_ASYNC |
1733 CRYPTO_ALG_KERN_DRIVER_ONLY,
1734 .cra_blocksize = MD5_HMAC_BLOCK_SIZE,
1735 .cra_ctxsize = sizeof(struct safexcel_ahash_ctx),
1736 .cra_init = safexcel_ahash_cra_init,
1737 .cra_exit = safexcel_ahash_cra_exit,
1738 .cra_module = THIS_MODULE,