drivers/block/nvme-core.c

   1 /*
   2  * NVM Express device driver
   3  * Copyright (c) 2011-2014, Intel Corporation.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms and conditions of the GNU General Public License,
   7  * version 2, as published by the Free Software Foundation.
   8  *
   9  * This program is distributed in the hope it will be useful, but WITHOUT
  10  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  12  * more details.
  13  */
  14
  15 #include <linux/nvme.h>
  16 #include <linux/bitops.h>
  17 #include <linux/blkdev.h>
  18 #include <linux/blk-mq.h>
  19 #include <linux/cpu.h>
  20 #include <linux/delay.h>
  21 #include <linux/errno.h>
  22 #include <linux/fs.h>
  23 #include <linux/genhd.h>
  24 #include <linux/hdreg.h>
  25 #include <linux/idr.h>
  26 #include <linux/init.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/io.h>
  29 #include <linux/kdev_t.h>
  30 #include <linux/kthread.h>
  31 #include <linux/kernel.h>
  32 #include <linux/list_sort.h>
  33 #include <linux/mm.h>
  34 #include <linux/module.h>
  35 #include <linux/moduleparam.h>
  36 #include <linux/pci.h>
  37 #include <linux/poison.h>
  38 #include <linux/ptrace.h>
  39 #include <linux/sched.h>
  40 #include <linux/slab.h>
  41 #include <linux/t10-pi.h>
  42 #include <linux/types.h>
  43 #include <scsi/sg.h>
  44 #include <asm-generic/io-64-nonatomic-lo-hi.h>
  45
  46 #define NVME_MINORS             (1U << MINORBITS)
  47 #define NVME_Q_DEPTH            1024
  48 #define NVME_AQ_DEPTH           256
  49 #define SQ_SIZE(depth)          (depth * sizeof(struct nvme_command))
  50 #define CQ_SIZE(depth)          (depth * sizeof(struct nvme_completion))
  51 #define ADMIN_TIMEOUT           (admin_timeout * HZ)
  52 #define SHUTDOWN_TIMEOUT        (shutdown_timeout * HZ)
  53
  54 static unsigned char admin_timeout = 60;
  55 module_param(admin_timeout, byte, 0644);
  56 MODULE_PARM_DESC(admin_timeout, "timeout in seconds for admin commands");
  57
  58 unsigned char nvme_io_timeout = 30;
  59 module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
  60 MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
  61
  62 static unsigned char shutdown_timeout = 5;
  63 module_param(shutdown_timeout, byte, 0644);
  64 MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
  65
  66 static int nvme_major;
  67 module_param(nvme_major, int, 0);
  68
  69 static int nvme_char_major;
  70 module_param(nvme_char_major, int, 0);
  71
  72 static int use_threaded_interrupts;
  73 module_param(use_threaded_interrupts, int, 0);
  74
  75 static bool use_cmb_sqes = true;
  76 module_param(use_cmb_sqes, bool, 0644);
  77 MODULE_PARM_DESC(use_cmb_sqes, "use controller's memory buffer for I/O SQes");
  78
  79 static DEFINE_SPINLOCK(dev_list_lock);
  80 static LIST_HEAD(dev_list);
  81 static struct task_struct *nvme_thread;
  82 static struct workqueue_struct *nvme_workq;
  83 static wait_queue_head_t nvme_kthread_wait;
  84
  85 static struct class *nvme_class;
  86
  87 static int __nvme_reset(struct nvme_dev *dev);
  88 static int nvme_reset(struct nvme_dev *dev);
  89 static int nvme_process_cq(struct nvme_queue *nvmeq);
  90 static void nvme_dead_ctrl(struct nvme_dev *dev);
  91
  92 struct async_cmd_info {
  93         struct kthread_work work;
  94         struct kthread_worker *worker;
  95         struct request *req;
  96         u32 result;
  97         int status;
  98         void *ctx;
  99 };
 100
 101 /*
 102  * An NVM Express queue.  Each device has at least two (one for admin
 103  * commands and one for I/O commands).
 104  */
 105 struct nvme_queue {
 106         struct device *q_dmadev;
 107         struct nvme_dev *dev;
 108         char irqname[24];       /* nvme4294967295-65535\0 */
 109         spinlock_t q_lock;
 110         struct nvme_command *sq_cmds;
 111         struct nvme_command __iomem *sq_cmds_io;
 112         volatile struct nvme_completion *cqes;
 113         struct blk_mq_tags **tags;
 114         dma_addr_t sq_dma_addr;
 115         dma_addr_t cq_dma_addr;
 116         u32 __iomem *q_db;
 117         u16 q_depth;
 118         s16 cq_vector;
 119         u16 sq_head;
 120         u16 sq_tail;
 121         u16 cq_head;
 122         u16 qid;
 123         u8 cq_phase;
 124         u8 cqe_seen;
 125         struct async_cmd_info cmdinfo;
 126 };
 127
 128 /*
 129  * Check we didin't inadvertently grow the command struct
 130  */
 131 static inline void _nvme_check_size(void)
 132 {
 133         BUILD_BUG_ON(sizeof(struct nvme_rw_command) != 64);
 134         BUILD_BUG_ON(sizeof(struct nvme_create_cq) != 64);
 135         BUILD_BUG_ON(sizeof(struct nvme_create_sq) != 64);
 136         BUILD_BUG_ON(sizeof(struct nvme_delete_queue) != 64);
 137         BUILD_BUG_ON(sizeof(struct nvme_features) != 64);
 138         BUILD_BUG_ON(sizeof(struct nvme_format_cmd) != 64);
 139         BUILD_BUG_ON(sizeof(struct nvme_abort_cmd) != 64);
 140         BUILD_BUG_ON(sizeof(struct nvme_command) != 64);
 141         BUILD_BUG_ON(sizeof(struct nvme_id_ctrl) != 4096);
 142         BUILD_BUG_ON(sizeof(struct nvme_id_ns) != 4096);
 143         BUILD_BUG_ON(sizeof(struct nvme_lba_range_type) != 64);
 144         BUILD_BUG_ON(sizeof(struct nvme_smart_log) != 512);
 145 }
 146
 147 typedef void (*nvme_completion_fn)(struct nvme_queue *, void *,
 148                                                 struct nvme_completion *);
 149
 150 struct nvme_cmd_info {
 151         nvme_completion_fn fn;
 152         void *ctx;
 153         int aborted;
 154         struct nvme_queue *nvmeq;
 155         struct nvme_iod iod[0];
 156 };
 157
 158 /*
 159  * Max size of iod being embedded in the request payload
 160  */
 161 #define NVME_INT_PAGES          2
 162 #define NVME_INT_BYTES(dev)     (NVME_INT_PAGES * (dev)->page_size)
 163 #define NVME_INT_MASK           0x01
 164
 165 /*
 166  * Will slightly overestimate the number of pages needed.  This is OK
 167  * as it only leads to a small amount of wasted memory for the lifetime of
 168  * the I/O.
 169  */
 170 static int nvme_npages(unsigned size, struct nvme_dev *dev)
 171 {
 172         unsigned nprps = DIV_ROUND_UP(size + dev->page_size, dev->page_size);
 173         return DIV_ROUND_UP(8 * nprps, PAGE_SIZE - 8);
 174 }
 175
 176 static unsigned int nvme_cmd_size(struct nvme_dev *dev)
 177 {
 178         unsigned int ret = sizeof(struct nvme_cmd_info);
 179
 180         ret += sizeof(struct nvme_iod);
 181         ret += sizeof(__le64 *) * nvme_npages(NVME_INT_BYTES(dev), dev);
 182         ret += sizeof(struct scatterlist) * NVME_INT_PAGES;
 183
 184         return ret;
 185 }
 186
 187 static int nvme_admin_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 188                                 unsigned int hctx_idx)
 189 {
 190         struct nvme_dev *dev = data;
 191         struct nvme_queue *nvmeq = dev->queues[0];
 192
 193         WARN_ON(hctx_idx != 0);
 194         WARN_ON(dev->admin_tagset.tags[0] != hctx->tags);
 195         WARN_ON(nvmeq->tags);
 196
 197         hctx->driver_data = nvmeq;
 198         nvmeq->tags = &dev->admin_tagset.tags[0];
 199         return 0;
 200 }
 201
 202 static void nvme_admin_exit_hctx(struct blk_mq_hw_ctx *hctx, unsigned int hctx_idx)
 203 {
 204         struct nvme_queue *nvmeq = hctx->driver_data;
 205
 206         nvmeq->tags = NULL;
 207 }
 208
 209 static int nvme_admin_init_request(void *data, struct request *req,
 210                                 unsigned int hctx_idx, unsigned int rq_idx,
 211                                 unsigned int numa_node)
 212 {
 213         struct nvme_dev *dev = data;
 214         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 215         struct nvme_queue *nvmeq = dev->queues[0];
 216
 217         BUG_ON(!nvmeq);
 218         cmd->nvmeq = nvmeq;
 219         return 0;
 220 }
 221
 222 static int nvme_init_hctx(struct blk_mq_hw_ctx *hctx, void *data,
 223                           unsigned int hctx_idx)
 224 {
 225         struct nvme_dev *dev = data;
 226         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 227
 228         if (!nvmeq->tags)
 229                 nvmeq->tags = &dev->tagset.tags[hctx_idx];
 230
 231         WARN_ON(dev->tagset.tags[hctx_idx] != hctx->tags);
 232         hctx->driver_data = nvmeq;
 233         return 0;
 234 }
 235
 236 static int nvme_init_request(void *data, struct request *req,
 237                                 unsigned int hctx_idx, unsigned int rq_idx,
 238                                 unsigned int numa_node)
 239 {
 240         struct nvme_dev *dev = data;
 241         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 242         struct nvme_queue *nvmeq = dev->queues[hctx_idx + 1];
 243
 244         BUG_ON(!nvmeq);
 245         cmd->nvmeq = nvmeq;
 246         return 0;
 247 }
 248
 249 static void nvme_set_info(struct nvme_cmd_info *cmd, void *ctx,
 250                                 nvme_completion_fn handler)
 251 {
 252         cmd->fn = handler;
 253         cmd->ctx = ctx;
 254         cmd->aborted = 0;
 255         blk_mq_start_request(blk_mq_rq_from_pdu(cmd));
 256 }
 257
 258 static void *iod_get_private(struct nvme_iod *iod)
 259 {
 260         return (void *) (iod->private & ~0x1UL);
 261 }
 262
 263 /*
 264  * If bit 0 is set, the iod is embedded in the request payload.
 265  */
 266 static bool iod_should_kfree(struct nvme_iod *iod)
 267 {
 268         return (iod->private & NVME_INT_MASK) == 0;
 269 }
 270
 271 /* Special values must be less than 0x1000 */
 272 #define CMD_CTX_BASE            ((void *)POISON_POINTER_DELTA)
 273 #define CMD_CTX_CANCELLED       (0x30C + CMD_CTX_BASE)
 274 #define CMD_CTX_COMPLETED       (0x310 + CMD_CTX_BASE)
 275 #define CMD_CTX_INVALID         (0x314 + CMD_CTX_BASE)
 276
 277 static void special_completion(struct nvme_queue *nvmeq, void *ctx,
 278                                                 struct nvme_completion *cqe)
 279 {
 280         if (ctx == CMD_CTX_CANCELLED)
 281                 return;
 282         if (ctx == CMD_CTX_COMPLETED) {
 283                 dev_warn(nvmeq->q_dmadev,
 284                                 "completed id %d twice on queue %d\n",
 285                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 286                 return;
 287         }
 288         if (ctx == CMD_CTX_INVALID) {
 289                 dev_warn(nvmeq->q_dmadev,
 290                                 "invalid id %d completed on queue %d\n",
 291                                 cqe->command_id, le16_to_cpup(&cqe->sq_id));
 292                 return;
 293         }
 294         dev_warn(nvmeq->q_dmadev, "Unknown special completion %p\n", ctx);
 295 }
 296
 297 static void *cancel_cmd_info(struct nvme_cmd_info *cmd, nvme_completion_fn *fn)
 298 {
 299         void *ctx;
 300
 301         if (fn)
 302                 *fn = cmd->fn;
 303         ctx = cmd->ctx;
 304         cmd->fn = special_completion;
 305         cmd->ctx = CMD_CTX_CANCELLED;
 306         return ctx;
 307 }
 308
 309 static void async_req_completion(struct nvme_queue *nvmeq, void *ctx,
 310                                                 struct nvme_completion *cqe)
 311 {
 312         u32 result = le32_to_cpup(&cqe->result);
 313         u16 status = le16_to_cpup(&cqe->status) >> 1;
 314
 315         if (status == NVME_SC_SUCCESS || status == NVME_SC_ABORT_REQ)
 316                 ++nvmeq->dev->event_limit;
 317         if (status != NVME_SC_SUCCESS)
 318                 return;
 319
 320         switch (result & 0xff07) {
 321         case NVME_AER_NOTICE_NS_CHANGED:
 322                 dev_info(nvmeq->q_dmadev, "rescanning\n");
 323                 schedule_work(&nvmeq->dev->scan_work);
 324         default:
 325                 dev_warn(nvmeq->q_dmadev, "async event result %08x\n", result);
 326         }
 327 }
 328
 329 static void abort_completion(struct nvme_queue *nvmeq, void *ctx,
 330                                                 struct nvme_completion *cqe)
 331 {
 332         struct request *req = ctx;
 333
 334         u16 status = le16_to_cpup(&cqe->status) >> 1;
 335         u32 result = le32_to_cpup(&cqe->result);
 336
 337         blk_mq_free_request(req);
 338
 339         dev_warn(nvmeq->q_dmadev, "Abort status:%x result:%x", status, result);
 340         ++nvmeq->dev->abort_limit;
 341 }
 342
 343 static void async_completion(struct nvme_queue *nvmeq, void *ctx,
 344                                                 struct nvme_completion *cqe)
 345 {
 346         struct async_cmd_info *cmdinfo = ctx;
 347         cmdinfo->result = le32_to_cpup(&cqe->result);
 348         cmdinfo->status = le16_to_cpup(&cqe->status) >> 1;
 349         queue_kthread_work(cmdinfo->worker, &cmdinfo->work);
 350         blk_mq_free_request(cmdinfo->req);
 351 }
 352
 353 static inline struct nvme_cmd_info *get_cmd_from_tag(struct nvme_queue *nvmeq,
 354                                   unsigned int tag)
 355 {
 356         struct request *req = blk_mq_tag_to_rq(*nvmeq->tags, tag);
 357
 358         return blk_mq_rq_to_pdu(req);
 359 }
 360
 361 /*
 362  * Called with local interrupts disabled and the q_lock held.  May not sleep.
 363  */
 364 static void *nvme_finish_cmd(struct nvme_queue *nvmeq, int tag,
 365                                                 nvme_completion_fn *fn)
 366 {
 367         struct nvme_cmd_info *cmd = get_cmd_from_tag(nvmeq, tag);
 368         void *ctx;
 369         if (tag >= nvmeq->q_depth) {
 370                 *fn = special_completion;
 371                 return CMD_CTX_INVALID;
 372         }
 373         if (fn)
 374                 *fn = cmd->fn;
 375         ctx = cmd->ctx;
 376         cmd->fn = special_completion;
 377         cmd->ctx = CMD_CTX_COMPLETED;
 378         return ctx;
 379 }
 380
 381 /**
 382  * nvme_submit_cmd() - Copy a command into a queue and ring the doorbell
 383  * @nvmeq: The queue to use
 384  * @cmd: The command to send
 385  *
 386  * Safe to use from interrupt context
 387  */
 388 static void __nvme_submit_cmd(struct nvme_queue *nvmeq,
 389                                                 struct nvme_command *cmd)
 390 {
 391         u16 tail = nvmeq->sq_tail;
 392
 393         if (nvmeq->sq_cmds_io)
 394                 memcpy_toio(&nvmeq->sq_cmds_io[tail], cmd, sizeof(*cmd));
 395         else
 396                 memcpy(&nvmeq->sq_cmds[tail], cmd, sizeof(*cmd));
 397
 398         if (++tail == nvmeq->q_depth)
 399                 tail = 0;
 400         writel(tail, nvmeq->q_db);
 401         nvmeq->sq_tail = tail;
 402 }
 403
 404 static void nvme_submit_cmd(struct nvme_queue *nvmeq, struct nvme_command *cmd)
 405 {
 406         unsigned long flags;
 407         spin_lock_irqsave(&nvmeq->q_lock, flags);
 408         __nvme_submit_cmd(nvmeq, cmd);
 409         spin_unlock_irqrestore(&nvmeq->q_lock, flags);
 410 }
 411
 412 static __le64 **iod_list(struct nvme_iod *iod)
 413 {
 414         return ((void *)iod) + iod->offset;
 415 }
 416
 417 static inline void iod_init(struct nvme_iod *iod, unsigned nbytes,
 418                             unsigned nseg, unsigned long private)
 419 {
 420         iod->private = private;
 421         iod->offset = offsetof(struct nvme_iod, sg[nseg]);
 422         iod->npages = -1;
 423         iod->length = nbytes;
 424         iod->nents = 0;
 425 }
 426
 427 static struct nvme_iod *
 428 __nvme_alloc_iod(unsigned nseg, unsigned bytes, struct nvme_dev *dev,
 429                  unsigned long priv, gfp_t gfp)
 430 {
 431         struct nvme_iod *iod = kmalloc(sizeof(struct nvme_iod) +
 432                                 sizeof(__le64 *) * nvme_npages(bytes, dev) +
 433                                 sizeof(struct scatterlist) * nseg, gfp);
 434
 435         if (iod)
 436                 iod_init(iod, bytes, nseg, priv);
 437
 438         return iod;
 439 }
 440
 441 static struct nvme_iod *nvme_alloc_iod(struct request *rq, struct nvme_dev *dev,
 442                                        gfp_t gfp)
 443 {
 444         unsigned size = !(rq->cmd_flags & REQ_DISCARD) ? blk_rq_bytes(rq) :
 445                                                 sizeof(struct nvme_dsm_range);
 446         struct nvme_iod *iod;
 447
 448         if (rq->nr_phys_segments <= NVME_INT_PAGES &&
 449             size <= NVME_INT_BYTES(dev)) {
 450                 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(rq);
 451
 452                 iod = cmd->iod;
 453                 iod_init(iod, size, rq->nr_phys_segments,
 454                                 (unsigned long) rq | NVME_INT_MASK);
 455                 return iod;
 456         }
 457
 458         return __nvme_alloc_iod(rq->nr_phys_segments, size, dev,
 459                                 (unsigned long) rq, gfp);
 460 }
 461
 462 static void nvme_free_iod(struct nvme_dev *dev, struct nvme_iod *iod)
 463 {
 464         const int last_prp = dev->page_size / 8 - 1;
 465         int i;
 466         __le64 **list = iod_list(iod);
 467         dma_addr_t prp_dma = iod->first_dma;
 468
 469         if (iod->npages == 0)
 470                 dma_pool_free(dev->prp_small_pool, list[0], prp_dma);
 471         for (i = 0; i < iod->npages; i++) {
 472                 __le64 *prp_list = list[i];
 473                 dma_addr_t next_prp_dma = le64_to_cpu(prp_list[last_prp]);
 474                 dma_pool_free(dev->prp_page_pool, prp_list, prp_dma);
 475                 prp_dma = next_prp_dma;
 476         }
 477
 478         if (iod_should_kfree(iod))
 479                 kfree(iod);
 480 }
 481
 482 static int nvme_error_status(u16 status)
 483 {
 484         switch (status & 0x7ff) {
 485         case NVME_SC_SUCCESS:
 486                 return 0;
 487         case NVME_SC_CAP_EXCEEDED:
 488                 return -ENOSPC;
 489         default:
 490                 return -EIO;
 491         }
 492 }
 493
 494 #ifdef CONFIG_BLK_DEV_INTEGRITY
 495 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 496 {
 497         if (be32_to_cpu(pi->ref_tag) == v)
 498                 pi->ref_tag = cpu_to_be32(p);
 499 }
 500
 501 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 502 {
 503         if (be32_to_cpu(pi->ref_tag) == p)
 504                 pi->ref_tag = cpu_to_be32(v);
 505 }
 506
 507 /**
 508  * nvme_dif_remap - remaps ref tags to bip seed and physical lba
 509  *
 510  * The virtual start sector is the one that was originally submitted by the
 511  * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
 512  * start sector may be different. Remap protection information to match the
 513  * physical LBA on writes, and back to the original seed on reads.
 514  *
 515  * Type 0 and 3 do not have a ref tag, so no remapping required.
 516  */
 517 static void nvme_dif_remap(struct request *req,
 518                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 519 {
 520         struct nvme_ns *ns = req->rq_disk->private_data;
 521         struct bio_integrity_payload *bip;
 522         struct t10_pi_tuple *pi;
 523         void *p, *pmap;
 524         u32 i, nlb, ts, phys, virt;
 525
 526         if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
 527                 return;
 528
 529         bip = bio_integrity(req->bio);
 530         if (!bip)
 531                 return;
 532
 533         pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
 534
 535         p = pmap;
 536         virt = bip_get_seed(bip);
 537         phys = nvme_block_nr(ns, blk_rq_pos(req));
 538         nlb = (blk_rq_bytes(req) >> ns->lba_shift);
 539         ts = ns->disk->integrity->tuple_size;
 540
 541         for (i = 0; i < nlb; i++, virt++, phys++) {
 542                 pi = (struct t10_pi_tuple *)p;
 543                 dif_swap(phys, virt, pi);
 544                 p += ts;
 545         }
 546         kunmap_atomic(pmap);
 547 }
 548
 549 static int nvme_noop_verify(struct blk_integrity_iter *iter)
 550 {
 551         return 0;
 552 }
 553
 554 static int nvme_noop_generate(struct blk_integrity_iter *iter)
 555 {
 556         return 0;
 557 }
 558
 559 struct blk_integrity nvme_meta_noop = {
 560         .name                   = "NVME_META_NOOP",
 561         .generate_fn            = nvme_noop_generate,
 562         .verify_fn              = nvme_noop_verify,
 563 };
 564
 565 static void nvme_init_integrity(struct nvme_ns *ns)
 566 {
 567         struct blk_integrity integrity;
 568
 569         switch (ns->pi_type) {
 570         case NVME_NS_DPS_PI_TYPE3:
 571                 integrity = t10_pi_type3_crc;
 572                 break;
 573         case NVME_NS_DPS_PI_TYPE1:
 574         case NVME_NS_DPS_PI_TYPE2:
 575                 integrity = t10_pi_type1_crc;
 576                 break;
 577         default:
 578                 integrity = nvme_meta_noop;
 579                 break;
 580         }
 581         integrity.tuple_size = ns->ms;
 582         blk_integrity_register(ns->disk, &integrity);
 583         blk_queue_max_integrity_segments(ns->queue, 1);
 584 }
 585 #else /* CONFIG_BLK_DEV_INTEGRITY */
 586 static void nvme_dif_remap(struct request *req,
 587                         void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
 588 {
 589 }
 590 static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
 591 {
 592 }
 593 static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
 594 {
 595 }
 596 static void nvme_init_integrity(struct nvme_ns *ns)
 597 {
 598 }
 599 #endif
 600
 601 static void req_completion(struct nvme_queue *nvmeq, void *ctx,
 602                                                 struct nvme_completion *cqe)
 603 {
 604         struct nvme_iod *iod = ctx;
 605         struct request *req = iod_get_private(iod);
 606         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
 607
 608         u16 status = le16_to_cpup(&cqe->status) >> 1;
 609
 610         if (unlikely(status)) {
 611                 if (!(status & NVME_SC_DNR || blk_noretry_request(req))
 612                     && (jiffies - req->start_time) < req->timeout) {
 613                         unsigned long flags;
 614
 615                         blk_mq_requeue_request(req);
 616                         spin_lock_irqsave(req->q->queue_lock, flags);
 617                         if (!blk_queue_stopped(req->q))
 618                                 blk_mq_kick_requeue_list(req->q);
 619                         spin_unlock_irqrestore(req->q->queue_lock, flags);
 620                         return;
 621                 }
 622
 623                 if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 624                         if (cmd_rq->ctx == CMD_CTX_CANCELLED)
 625                                 status = -EINTR;
 626                 } else {
 627                         status = nvme_error_status(status);
 628                 }
 629         }
 630
 631         if (req->cmd_type == REQ_TYPE_DRV_PRIV) {
 632                 u32 result = le32_to_cpup(&cqe->result);
 633                 req->special = (void *)(uintptr_t)result;
 634         }
 635
 636         if (cmd_rq->aborted)
 637                 dev_warn(nvmeq->dev->dev,
 638                         "completing aborted command with status:%04x\n",
 639                         status);
 640
 641         if (iod->nents) {
 642                 dma_unmap_sg(nvmeq->dev->dev, iod->sg, iod->nents,
 643                         rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 644                 if (blk_integrity_rq(req)) {
 645                         if (!rq_data_dir(req))
 646                                 nvme_dif_remap(req, nvme_dif_complete);
 647                         dma_unmap_sg(nvmeq->dev->dev, iod->meta_sg, 1,
 648                                 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
 649                 }
 650         }
 651         nvme_free_iod(nvmeq->dev, iod);
 652
 653         blk_mq_complete_request(req, status);
 654 }
 655
 656 /* length is in bytes.  gfp flags indicates whether we may sleep. */
 657 static int nvme_setup_prps(struct nvme_dev *dev, struct nvme_iod *iod,
 658                 int total_len, gfp_t gfp)
 659 {
 660         struct dma_pool *pool;
 661         int length = total_len;
 662         struct scatterlist *sg = iod->sg;
 663         int dma_len = sg_dma_len(sg);
 664         u64 dma_addr = sg_dma_address(sg);
 665         u32 page_size = dev->page_size;
 666         int offset = dma_addr & (page_size - 1);
 667         __le64 *prp_list;
 668         __le64 **list = iod_list(iod);
 669         dma_addr_t prp_dma;
 670         int nprps, i;
 671
 672         length -= (page_size - offset);
 673         if (length <= 0)
 674                 return total_len;
 675
 676         dma_len -= (page_size - offset);
 677         if (dma_len) {
 678                 dma_addr += (page_size - offset);
 679         } else {
 680                 sg = sg_next(sg);
 681                 dma_addr = sg_dma_address(sg);
 682                 dma_len = sg_dma_len(sg);
 683         }
 684
 685         if (length <= page_size) {
 686                 iod->first_dma = dma_addr;
 687                 return total_len;
 688         }
 689
 690         nprps = DIV_ROUND_UP(length, page_size);
 691         if (nprps <= (256 / 8)) {
 692                 pool = dev->prp_small_pool;
 693                 iod->npages = 0;
 694         } else {
 695                 pool = dev->prp_page_pool;
 696                 iod->npages = 1;
 697         }
 698
 699         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 700         if (!prp_list) {
 701                 iod->first_dma = dma_addr;
 702                 iod->npages = -1;
 703                 return (total_len - length) + page_size;
 704         }
 705         list[0] = prp_list;
 706         iod->first_dma = prp_dma;
 707         i = 0;
 708         for (;;) {
 709                 if (i == page_size >> 3) {
 710                         __le64 *old_prp_list = prp_list;
 711                         prp_list = dma_pool_alloc(pool, gfp, &prp_dma);
 712                         if (!prp_list)
 713                                 return total_len - length;
 714                         list[iod->npages++] = prp_list;
 715                         prp_list[0] = old_prp_list[i - 1];
 716                         old_prp_list[i - 1] = cpu_to_le64(prp_dma);
 717                         i = 1;
 718                 }
 719                 prp_list[i++] = cpu_to_le64(dma_addr);
 720                 dma_len -= page_size;
 721                 dma_addr += page_size;
 722                 length -= page_size;
 723                 if (length <= 0)
 724                         break;
 725                 if (dma_len > 0)
 726                         continue;
 727                 BUG_ON(dma_len < 0);
 728                 sg = sg_next(sg);
 729                 dma_addr = sg_dma_address(sg);
 730                 dma_len = sg_dma_len(sg);
 731         }
 732
 733         return total_len;
 734 }
 735
 736 static void nvme_submit_priv(struct nvme_queue *nvmeq, struct request *req,
 737                 struct nvme_iod *iod)
 738 {
 739         struct nvme_command cmnd;
 740
 741         memcpy(&cmnd, req->cmd, sizeof(cmnd));
 742         cmnd.rw.command_id = req->tag;
 743         if (req->nr_phys_segments) {
 744                 cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 745                 cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 746         }
 747
 748         __nvme_submit_cmd(nvmeq, &cmnd);
 749 }
 750
 751 /*
 752  * We reuse the small pool to allocate the 16-byte range here as it is not
 753  * worth having a special pool for these or additional cases to handle freeing
 754  * the iod.
 755  */
 756 static void nvme_submit_discard(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 757                 struct request *req, struct nvme_iod *iod)
 758 {
 759         struct nvme_dsm_range *range =
 760                                 (struct nvme_dsm_range *)iod_list(iod)[0];
 761         struct nvme_command cmnd;
 762
 763         range->cattr = cpu_to_le32(0);
 764         range->nlb = cpu_to_le32(blk_rq_bytes(req) >> ns->lba_shift);
 765         range->slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 766
 767         memset(&cmnd, 0, sizeof(cmnd));
 768         cmnd.dsm.opcode = nvme_cmd_dsm;
 769         cmnd.dsm.command_id = req->tag;
 770         cmnd.dsm.nsid = cpu_to_le32(ns->ns_id);
 771         cmnd.dsm.prp1 = cpu_to_le64(iod->first_dma);
 772         cmnd.dsm.nr = 0;
 773         cmnd.dsm.attributes = cpu_to_le32(NVME_DSMGMT_AD);
 774
 775         __nvme_submit_cmd(nvmeq, &cmnd);
 776 }
 777
 778 static void nvme_submit_flush(struct nvme_queue *nvmeq, struct nvme_ns *ns,
 779                                                                 int cmdid)
 780 {
 781         struct nvme_command cmnd;
 782
 783         memset(&cmnd, 0, sizeof(cmnd));
 784         cmnd.common.opcode = nvme_cmd_flush;
 785         cmnd.common.command_id = cmdid;
 786         cmnd.common.nsid = cpu_to_le32(ns->ns_id);
 787
 788         __nvme_submit_cmd(nvmeq, &cmnd);
 789 }
 790
 791 static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
 792                                                         struct nvme_ns *ns)
 793 {
 794         struct request *req = iod_get_private(iod);
 795         struct nvme_command cmnd;
 796         u16 control = 0;
 797         u32 dsmgmt = 0;
 798
 799         if (req->cmd_flags & REQ_FUA)
 800                 control |= NVME_RW_FUA;
 801         if (req->cmd_flags & (REQ_FAILFAST_DEV | REQ_RAHEAD))
 802                 control |= NVME_RW_LR;
 803
 804         if (req->cmd_flags & REQ_RAHEAD)
 805                 dsmgmt |= NVME_RW_DSM_FREQ_PREFETCH;
 806
 807         memset(&cmnd, 0, sizeof(cmnd));
 808         cmnd.rw.opcode = (rq_data_dir(req) ? nvme_cmd_write : nvme_cmd_read);
 809         cmnd.rw.command_id = req->tag;
 810         cmnd.rw.nsid = cpu_to_le32(ns->ns_id);
 811         cmnd.rw.prp1 = cpu_to_le64(sg_dma_address(iod->sg));
 812         cmnd.rw.prp2 = cpu_to_le64(iod->first_dma);
 813         cmnd.rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
 814         cmnd.rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
 815
 816         if (ns->ms) {
 817                 switch (ns->pi_type) {
 818                 case NVME_NS_DPS_PI_TYPE3:
 819                         control |= NVME_RW_PRINFO_PRCHK_GUARD;
 820                         break;
 821                 case NVME_NS_DPS_PI_TYPE1:
 822                 case NVME_NS_DPS_PI_TYPE2:
 823                         control |= NVME_RW_PRINFO_PRCHK_GUARD |
 824                                         NVME_RW_PRINFO_PRCHK_REF;
 825                         cmnd.rw.reftag = cpu_to_le32(
 826                                         nvme_block_nr(ns, blk_rq_pos(req)));
 827                         break;
 828                 }
 829                 if (blk_integrity_rq(req))
 830                         cmnd.rw.metadata =
 831                                 cpu_to_le64(sg_dma_address(iod->meta_sg));
 832                 else
 833                         control |= NVME_RW_PRINFO_PRACT;
 834         }
 835
 836         cmnd.rw.control = cpu_to_le16(control);
 837         cmnd.rw.dsmgmt = cpu_to_le32(dsmgmt);
 838
 839         __nvme_submit_cmd(nvmeq, &cmnd);
 840
 841         return 0;
 842 }
 843
 844 /*
 845  * NOTE: ns is NULL when called on the admin queue.
 846  */
 847 static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
 848                          const struct blk_mq_queue_data *bd)
 849 {
 850         struct nvme_ns *ns = hctx->queue->queuedata;
 851         struct nvme_queue *nvmeq = hctx->driver_data;
 852         struct nvme_dev *dev = nvmeq->dev;
 853         struct request *req = bd->rq;
 854         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
 855         struct nvme_iod *iod;
 856         enum dma_data_direction dma_dir;
 857
 858         /*
 859          * If formated with metadata, require the block layer provide a buffer
 860          * unless this namespace is formated such that the metadata can be
 861          * stripped/generated by the controller with PRACT=1.
 862          */
 863         if (ns && ns->ms && !blk_integrity_rq(req)) {
 864                 if (!(ns->pi_type && ns->ms == 8) &&
 865                                         req->cmd_type != REQ_TYPE_DRV_PRIV) {
 866                         blk_mq_complete_request(req, -EFAULT);
 867                         return BLK_MQ_RQ_QUEUE_OK;
 868                 }
 869         }
 870
 871         iod = nvme_alloc_iod(req, dev, GFP_ATOMIC);
 872         if (!iod)
 873                 return BLK_MQ_RQ_QUEUE_BUSY;
 874
 875         if (req->cmd_flags & REQ_DISCARD) {
 876                 void *range;
 877                 /*
 878                  * We reuse the small pool to allocate the 16-byte range here
 879                  * as it is not worth having a special pool for these or
 880                  * additional cases to handle freeing the iod.
 881                  */
 882                 range = dma_pool_alloc(dev->prp_small_pool, GFP_ATOMIC,
 883                                                 &iod->first_dma);
 884                 if (!range)
 885                         goto retry_cmd;
 886                 iod_list(iod)[0] = (__le64 *)range;
 887                 iod->npages = 0;
 888         } else if (req->nr_phys_segments) {
 889                 dma_dir = rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
 890
 891                 sg_init_table(iod->sg, req->nr_phys_segments);
 892                 iod->nents = blk_rq_map_sg(req->q, req, iod->sg);
 893                 if (!iod->nents)
 894                         goto error_cmd;
 895
 896                 if (!dma_map_sg(nvmeq->q_dmadev, iod->sg, iod->nents, dma_dir))
 897                         goto retry_cmd;
 898
 899                 if (blk_rq_bytes(req) !=
 900                     nvme_setup_prps(dev, iod, blk_rq_bytes(req), GFP_ATOMIC)) {
 901                         dma_unmap_sg(dev->dev, iod->sg, iod->nents, dma_dir);
 902                         goto retry_cmd;
 903                 }
 904                 if (blk_integrity_rq(req)) {
 905                         if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
 906                                 goto error_cmd;
 907
 908                         sg_init_table(iod->meta_sg, 1);
 909                         if (blk_rq_map_integrity_sg(
 910                                         req->q, req->bio, iod->meta_sg) != 1)
 911                                 goto error_cmd;
 912
 913                         if (rq_data_dir(req))
 914                                 nvme_dif_remap(req, nvme_dif_prep);
 915
 916                         if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
 917                                 goto error_cmd;
 918                 }
 919         }
 920
 921         nvme_set_info(cmd, iod, req_completion);
 922         spin_lock_irq(&nvmeq->q_lock);
 923         if (req->cmd_type == REQ_TYPE_DRV_PRIV)
 924                 nvme_submit_priv(nvmeq, req, iod);
 925         else if (req->cmd_flags & REQ_DISCARD)
 926                 nvme_submit_discard(nvmeq, ns, req, iod);
 927         else if (req->cmd_flags & REQ_FLUSH)
 928                 nvme_submit_flush(nvmeq, ns, req->tag);
 929         else
 930                 nvme_submit_iod(nvmeq, iod, ns);
 931
 932         nvme_process_cq(nvmeq);
 933         spin_unlock_irq(&nvmeq->q_lock);
 934         return BLK_MQ_RQ_QUEUE_OK;
 935
 936  error_cmd:
 937         nvme_free_iod(dev, iod);
 938         return BLK_MQ_RQ_QUEUE_ERROR;
 939  retry_cmd:
 940         nvme_free_iod(dev, iod);
 941         return BLK_MQ_RQ_QUEUE_BUSY;
 942 }
 943
 944 static int nvme_process_cq(struct nvme_queue *nvmeq)
 945 {
 946         u16 head, phase;
 947
 948         head = nvmeq->cq_head;
 949         phase = nvmeq->cq_phase;
 950
 951         for (;;) {
 952                 void *ctx;
 953                 nvme_completion_fn fn;
 954                 struct nvme_completion cqe = nvmeq->cqes[head];
 955                 if ((le16_to_cpu(cqe.status) & 1) != phase)
 956                         break;
 957                 nvmeq->sq_head = le16_to_cpu(cqe.sq_head);
 958                 if (++head == nvmeq->q_depth) {
 959                         head = 0;
 960                         phase = !phase;
 961                 }
 962                 ctx = nvme_finish_cmd(nvmeq, cqe.command_id, &fn);
 963                 fn(nvmeq, ctx, &cqe);
 964         }
 965
 966         /* If the controller ignores the cq head doorbell and continuously
 967          * writes to the queue, it is theoretically possible to wrap around
 968          * the queue twice and mistakenly return IRQ_NONE.  Linux only
 969          * requires that 0.1% of your interrupts are handled, so this isn't
 970          * a big problem.
 971          */
 972         if (head == nvmeq->cq_head && phase == nvmeq->cq_phase)
 973                 return 0;
 974
 975         writel(head, nvmeq->q_db + nvmeq->dev->db_stride);
 976         nvmeq->cq_head = head;
 977         nvmeq->cq_phase = phase;
 978
 979         nvmeq->cqe_seen = 1;
 980         return 1;
 981 }
 982
 983 static irqreturn_t nvme_irq(int irq, void *data)
 984 {
 985         irqreturn_t result;
 986         struct nvme_queue *nvmeq = data;
 987         spin_lock(&nvmeq->q_lock);
 988         nvme_process_cq(nvmeq);
 989         result = nvmeq->cqe_seen ? IRQ_HANDLED : IRQ_NONE;
 990         nvmeq->cqe_seen = 0;
 991         spin_unlock(&nvmeq->q_lock);
 992         return result;
 993 }
 994
 995 static irqreturn_t nvme_irq_check(int irq, void *data)
 996 {
 997         struct nvme_queue *nvmeq = data;
 998         struct nvme_completion cqe = nvmeq->cqes[nvmeq->cq_head];
 999         if ((le16_to_cpu(cqe.status) & 1) != nvmeq->cq_phase)
1000                 return IRQ_NONE;
1001         return IRQ_WAKE_THREAD;
1002 }
1003
1004 /*
1005  * Returns 0 on success.  If the result is negative, it's a Linux error code;
1006  * if the result is positive, it's an NVM Express status code
1007  */
1008 int __nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1009                 void *buffer, void __user *ubuffer, unsigned bufflen,
1010                 u32 *result, unsigned timeout)
1011 {
1012         bool write = cmd->common.opcode & 1;
1013         struct bio *bio = NULL;
1014         struct request *req;
1015         int ret;
1016
1017         req = blk_mq_alloc_request(q, write, GFP_KERNEL, false);
1018         if (IS_ERR(req))
1019                 return PTR_ERR(req);
1020
1021         req->cmd_type = REQ_TYPE_DRV_PRIV;
1022         req->cmd_flags |= REQ_FAILFAST_DRIVER;
1023         req->__data_len = 0;
1024         req->__sector = (sector_t) -1;
1025         req->bio = req->biotail = NULL;
1026
1027         req->timeout = timeout ? timeout : ADMIN_TIMEOUT;
1028
1029         req->cmd = (unsigned char *)cmd;
1030         req->cmd_len = sizeof(struct nvme_command);
1031         req->special = (void *)0;
1032
1033         if (buffer && bufflen) {
1034                 ret = blk_rq_map_kern(q, req, buffer, bufflen, __GFP_WAIT);
1035                 if (ret)
1036                         goto out;
1037         } else if (ubuffer && bufflen) {
1038                 ret = blk_rq_map_user(q, req, NULL, ubuffer, bufflen, __GFP_WAIT);
1039                 if (ret)
1040                         goto out;
1041                 bio = req->bio;
1042         }
1043
1044         blk_execute_rq(req->q, NULL, req, 0);
1045         if (bio)
1046                 blk_rq_unmap_user(bio);
1047         if (result)
1048                 *result = (u32)(uintptr_t)req->special;
1049         ret = req->errors;
1050  out:
1051         blk_mq_free_request(req);
1052         return ret;
1053 }
1054
1055 int nvme_submit_sync_cmd(struct request_queue *q, struct nvme_command *cmd,
1056                 void *buffer, unsigned bufflen)
1057 {
1058         return __nvme_submit_sync_cmd(q, cmd, buffer, NULL, bufflen, NULL, 0);
1059 }
1060
1061 static int nvme_submit_async_admin_req(struct nvme_dev *dev)
1062 {
1063         struct nvme_queue *nvmeq = dev->queues[0];
1064         struct nvme_command c;
1065         struct nvme_cmd_info *cmd_info;
1066         struct request *req;
1067
1068         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC, true);
1069         if (IS_ERR(req))
1070                 return PTR_ERR(req);
1071
1072         req->cmd_flags |= REQ_NO_TIMEOUT;
1073         cmd_info = blk_mq_rq_to_pdu(req);
1074         nvme_set_info(cmd_info, NULL, async_req_completion);
1075
1076         memset(&c, 0, sizeof(c));
1077         c.common.opcode = nvme_admin_async_event;
1078         c.common.command_id = req->tag;
1079
1080         blk_mq_free_request(req);
1081         __nvme_submit_cmd(nvmeq, &c);
1082         return 0;
1083 }
1084
1085 static int nvme_submit_admin_async_cmd(struct nvme_dev *dev,
1086                         struct nvme_command *cmd,
1087                         struct async_cmd_info *cmdinfo, unsigned timeout)
1088 {
1089         struct nvme_queue *nvmeq = dev->queues[0];
1090         struct request *req;
1091         struct nvme_cmd_info *cmd_rq;
1092
1093         req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_KERNEL, false);
1094         if (IS_ERR(req))
1095                 return PTR_ERR(req);
1096
1097         req->timeout = timeout;
1098         cmd_rq = blk_mq_rq_to_pdu(req);
1099         cmdinfo->req = req;
1100         nvme_set_info(cmd_rq, cmdinfo, async_completion);
1101         cmdinfo->status = -EINTR;
1102
1103         cmd->common.command_id = req->tag;
1104
1105         nvme_submit_cmd(nvmeq, cmd);
1106         return 0;
1107 }
1108
1109 static int adapter_delete_queue(struct nvme_dev *dev, u8 opcode, u16 id)
1110 {
1111         struct nvme_command c;
1112
1113         memset(&c, 0, sizeof(c));
1114         c.delete_queue.opcode = opcode;
1115         c.delete_queue.qid = cpu_to_le16(id);
1116
1117         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1118 }
1119
1120 static int adapter_alloc_cq(struct nvme_dev *dev, u16 qid,
1121                                                 struct nvme_queue *nvmeq)
1122 {
1123         struct nvme_command c;
1124         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_CQ_IRQ_ENABLED;
1125
1126         /*
1127          * Note: we (ab)use the fact the the prp fields survive if no data
1128          * is attached to the request.
1129          */
1130         memset(&c, 0, sizeof(c));
1131         c.create_cq.opcode = nvme_admin_create_cq;
1132         c.create_cq.prp1 = cpu_to_le64(nvmeq->cq_dma_addr);
1133         c.create_cq.cqid = cpu_to_le16(qid);
1134         c.create_cq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1135         c.create_cq.cq_flags = cpu_to_le16(flags);
1136         c.create_cq.irq_vector = cpu_to_le16(nvmeq->cq_vector);
1137
1138         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1139 }
1140
1141 static int adapter_alloc_sq(struct nvme_dev *dev, u16 qid,
1142                                                 struct nvme_queue *nvmeq)
1143 {
1144         struct nvme_command c;
1145         int flags = NVME_QUEUE_PHYS_CONTIG | NVME_SQ_PRIO_MEDIUM;
1146
1147         /*
1148          * Note: we (ab)use the fact the the prp fields survive if no data
1149          * is attached to the request.
1150          */
1151         memset(&c, 0, sizeof(c));
1152         c.create_sq.opcode = nvme_admin_create_sq;
1153         c.create_sq.prp1 = cpu_to_le64(nvmeq->sq_dma_addr);
1154         c.create_sq.sqid = cpu_to_le16(qid);
1155         c.create_sq.qsize = cpu_to_le16(nvmeq->q_depth - 1);
1156         c.create_sq.sq_flags = cpu_to_le16(flags);
1157         c.create_sq.cqid = cpu_to_le16(qid);
1158
1159         return nvme_submit_sync_cmd(dev->admin_q, &c, NULL, 0);
1160 }
1161
1162 static int adapter_delete_cq(struct nvme_dev *dev, u16 cqid)
1163 {
1164         return adapter_delete_queue(dev, nvme_admin_delete_cq, cqid);
1165 }
1166
1167 static int adapter_delete_sq(struct nvme_dev *dev, u16 sqid)
1168 {
1169         return adapter_delete_queue(dev, nvme_admin_delete_sq, sqid);
1170 }
1171
1172 int nvme_identify_ctrl(struct nvme_dev *dev, struct nvme_id_ctrl **id)
1173 {
1174         struct nvme_command c = { };
1175         int error;
1176
1177         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1178         c.identify.opcode = nvme_admin_identify;
1179         c.identify.cns = cpu_to_le32(1);
1180
1181         *id = kmalloc(sizeof(struct nvme_id_ctrl), GFP_KERNEL);
1182         if (!*id)
1183                 return -ENOMEM;
1184
1185         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1186                         sizeof(struct nvme_id_ctrl));
1187         if (error)
1188                 kfree(*id);
1189         return error;
1190 }
1191
1192 int nvme_identify_ns(struct nvme_dev *dev, unsigned nsid,
1193                 struct nvme_id_ns **id)
1194 {
1195         struct nvme_command c = { };
1196         int error;
1197
1198         /* gcc-4.4.4 (at least) has issues with initializers and anon unions */
1199         c.identify.opcode = nvme_admin_identify,
1200         c.identify.nsid = cpu_to_le32(nsid),
1201
1202         *id = kmalloc(sizeof(struct nvme_id_ns), GFP_KERNEL);
1203         if (!*id)
1204                 return -ENOMEM;
1205
1206         error = nvme_submit_sync_cmd(dev->admin_q, &c, *id,
1207                         sizeof(struct nvme_id_ns));
1208         if (error)
1209                 kfree(*id);
1210         return error;
1211 }
1212
1213 int nvme_get_features(struct nvme_dev *dev, unsigned fid, unsigned nsid,
1214                                         dma_addr_t dma_addr, u32 *result)
1215 {
1216         struct nvme_command c;
1217
1218         memset(&c, 0, sizeof(c));
1219         c.features.opcode = nvme_admin_get_features;
1220         c.features.nsid = cpu_to_le32(nsid);
1221         c.features.prp1 = cpu_to_le64(dma_addr);
1222         c.features.fid = cpu_to_le32(fid);
1223
1224         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1225                         result, 0);
1226 }
1227
1228 int nvme_set_features(struct nvme_dev *dev, unsigned fid, unsigned dword11,
1229                                         dma_addr_t dma_addr, u32 *result)
1230 {
1231         struct nvme_command c;
1232
1233         memset(&c, 0, sizeof(c));
1234         c.features.opcode = nvme_admin_set_features;
1235         c.features.prp1 = cpu_to_le64(dma_addr);
1236         c.features.fid = cpu_to_le32(fid);
1237         c.features.dword11 = cpu_to_le32(dword11);
1238
1239         return __nvme_submit_sync_cmd(dev->admin_q, &c, NULL, NULL, 0,
1240                         result, 0);
1241 }
1242
1243 int nvme_get_log_page(struct nvme_dev *dev, struct nvme_smart_log **log)
1244 {
1245         struct nvme_command c = { };
1246         int error;
1247
1248         c.common.opcode = nvme_admin_get_log_page,
1249         c.common.nsid = cpu_to_le32(0xFFFFFFFF),
1250         c.common.cdw10[0] = cpu_to_le32(
1251                         (((sizeof(struct nvme_smart_log) / 4) - 1) << 16) |
1252                          NVME_LOG_SMART),
1253
1254         *log = kmalloc(sizeof(struct nvme_smart_log), GFP_KERNEL);
1255         if (!*log)
1256                 return -ENOMEM;
1257
1258         error = nvme_submit_sync_cmd(dev->admin_q, &c, *log,
1259                         sizeof(struct nvme_smart_log));
1260         if (error)
1261                 kfree(*log);
1262         return error;
1263 }
1264
1265 /**
1266  * nvme_abort_req - Attempt aborting a request
1267  *
1268  * Schedule controller reset if the command was already aborted once before and
1269  * still hasn't been returned to the driver, or if this is the admin queue.
1270  */
1271 static void nvme_abort_req(struct request *req)
1272 {
1273         struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
1274         struct nvme_queue *nvmeq = cmd_rq->nvmeq;
1275         struct nvme_dev *dev = nvmeq->dev;
1276         struct request *abort_req;
1277         struct nvme_cmd_info *abort_cmd;
1278         struct nvme_command cmd;
1279
1280         if (!nvmeq->qid || cmd_rq->aborted) {
1281                 spin_lock(&dev_list_lock);
1282                 if (!__nvme_reset(dev)) {
1283                         dev_warn(dev->dev,
1284                                  "I/O %d QID %d timeout, reset controller\n",
1285                                  req->tag, nvmeq->qid);
1286                 }
1287                 spin_unlock(&dev_list_lock);
1288                 return;
1289         }
1290
1291         if (!dev->abort_limit)
1292                 return;
1293
1294         abort_req = blk_mq_alloc_request(dev->admin_q, WRITE, GFP_ATOMIC,
1295                                                                         false);
1296         if (IS_ERR(abort_req))
1297                 return;
1298
1299         abort_cmd = blk_mq_rq_to_pdu(abort_req);
1300         nvme_set_info(abort_cmd, abort_req, abort_completion);
1301
1302         memset(&cmd, 0, sizeof(cmd));
1303         cmd.abort.opcode = nvme_admin_abort_cmd;
1304         cmd.abort.cid = req->tag;
1305         cmd.abort.sqid = cpu_to_le16(nvmeq->qid);
1306         cmd.abort.command_id = abort_req->tag;
1307
1308         --dev->abort_limit;
1309         cmd_rq->aborted = 1;
1310
1311         dev_warn(nvmeq->q_dmadev, "Aborting I/O %d QID %d\n", req->tag,
1312                                                         nvmeq->qid);
1313         nvme_submit_cmd(dev->queues[0], &cmd);
1314 }
1315
1316 static void nvme_cancel_queue_ios(struct request *req, void *data, bool reserved)
1317 {
1318         struct nvme_queue *nvmeq = data;
1319         void *ctx;
1320         nvme_completion_fn fn;
1321         struct nvme_cmd_info *cmd;
1322         struct nvme_completion cqe;
1323
1324         if (!blk_mq_request_started(req))
1325                 return;
1326
1327         cmd = blk_mq_rq_to_pdu(req);
1328
1329         if (cmd->ctx == CMD_CTX_CANCELLED)
1330                 return;
1331
1332         if (blk_queue_dying(req->q))
1333                 cqe.status = cpu_to_le16((NVME_SC_ABORT_REQ | NVME_SC_DNR) << 1);
1334         else
1335                 cqe.status = cpu_to_le16(NVME_SC_ABORT_REQ << 1);
1336
1337
1338         dev_warn(nvmeq->q_dmadev, "Cancelling I/O %d QID %d\n",
1339                                                 req->tag, nvmeq->qid);
1340         ctx = cancel_cmd_info(cmd, &fn);
1341         fn(nvmeq, ctx, &cqe);
1342 }
1343
1344 static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1345 {
1346         struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1347         struct nvme_queue *nvmeq = cmd->nvmeq;
1348
1349         dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1350                                                         nvmeq->qid);
1351         spin_lock_irq(&nvmeq->q_lock);
1352         nvme_abort_req(req);
1353         spin_unlock_irq(&nvmeq->q_lock);
1354
1355         /*
1356          * The aborted req will be completed on receiving the abort req.
1357          * We enable the timer again. If hit twice, it'll cause a device reset,
1358          * as the device then is in a faulty state.
1359          */
1360         return BLK_EH_RESET_TIMER;
1361 }
1362
1363 static void nvme_free_queue(struct nvme_queue *nvmeq)
1364 {
1365         dma_free_coherent(nvmeq->q_dmadev, CQ_SIZE(nvmeq->q_depth),
1366                                 (void *)nvmeq->cqes, nvmeq->cq_dma_addr);
1367         if (nvmeq->sq_cmds)
1368                 dma_free_coherent(nvmeq->q_dmadev, SQ_SIZE(nvmeq->q_depth),
1369                                         nvmeq->sq_cmds, nvmeq->sq_dma_addr);
1370         kfree(nvmeq);
1371 }
1372
1373 static void nvme_free_queues(struct nvme_dev *dev, int lowest)
1374 {
1375         int i;
1376
1377         for (i = dev->queue_count - 1; i >= lowest; i--) {
1378                 struct nvme_queue *nvmeq = dev->queues[i];
1379                 dev->queue_count--;
1380                 dev->queues[i] = NULL;
1381                 nvme_free_queue(nvmeq);
1382         }
1383 }
1384
1385 /**
1386  * nvme_suspend_queue - put queue into suspended state
1387  * @nvmeq - queue to suspend
1388  */
1389 static int nvme_suspend_queue(struct nvme_queue *nvmeq)
1390 {
1391         int vector;
1392
1393         spin_lock_irq(&nvmeq->q_lock);
1394         if (nvmeq->cq_vector == -1) {
1395                 spin_unlock_irq(&nvmeq->q_lock);
1396                 return 1;
1397         }
1398         vector = nvmeq->dev->entry[nvmeq->cq_vector].vector;
1399         nvmeq->dev->online_queues--;
1400         nvmeq->cq_vector = -1;
1401         spin_unlock_irq(&nvmeq->q_lock);
1402
1403         if (!nvmeq->qid && nvmeq->dev->admin_q)
1404                 blk_mq_freeze_queue_start(nvmeq->dev->admin_q);
1405
1406         irq_set_affinity_hint(vector, NULL);
1407         free_irq(vector, nvmeq);
1408
1409         return 0;
1410 }
1411
1412 static void nvme_clear_queue(struct nvme_queue *nvmeq)
1413 {
1414         spin_lock_irq(&nvmeq->q_lock);
1415         if (nvmeq->tags && *nvmeq->tags)
1416                 blk_mq_all_tag_busy_iter(*nvmeq->tags, nvme_cancel_queue_ios, nvmeq);
1417         spin_unlock_irq(&nvmeq->q_lock);
1418 }
1419
1420 static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1421 {
1422         struct nvme_queue *nvmeq = dev->queues[qid];
1423
1424         if (!nvmeq)
1425                 return;
1426         if (nvme_suspend_queue(nvmeq))
1427                 return;
1428
1429         /* Don't tell the adapter to delete the admin queue.
1430          * Don't tell a removed adapter to delete IO queues. */
1431         if (qid && readl(&dev->bar->csts) != -1) {
1432                 adapter_delete_sq(dev, qid);
1433                 adapter_delete_cq(dev, qid);
1434         }
1435
1436         spin_lock_irq(&nvmeq->q_lock);
1437         nvme_process_cq(nvmeq);
1438         spin_unlock_irq(&nvmeq->q_lock);
1439 }
1440
1441 static int nvme_cmb_qdepth(struct nvme_dev *dev, int nr_io_queues,
1442                                 int entry_size)
1443 {
1444         int q_depth = dev->q_depth;
1445         unsigned q_size_aligned = roundup(q_depth * entry_size, dev->page_size);
1446
1447         if (q_size_aligned * nr_io_queues > dev->cmb_size) {
1448                 u64 mem_per_q = div_u64(dev->cmb_size, nr_io_queues);
1449                 mem_per_q = round_down(mem_per_q, dev->page_size);
1450                 q_depth = div_u64(mem_per_q, entry_size);
1451
1452                 /*
1453                  * Ensure the reduced q_depth is above some threshold where it
1454                  * would be better to map queues in system memory with the
1455                  * original depth
1456                  */
1457                 if (q_depth < 64)
1458                         return -ENOMEM;
1459         }
1460
1461         return q_depth;
1462 }
1463
1464 static int nvme_alloc_sq_cmds(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1465                                 int qid, int depth)
1466 {
1467         if (qid && dev->cmb && use_cmb_sqes && NVME_CMB_SQS(dev->cmbsz)) {
1468                 unsigned offset = (qid - 1) *
1469                                         roundup(SQ_SIZE(depth), dev->page_size);
1470                 nvmeq->sq_dma_addr = dev->cmb_dma_addr + offset;
1471                 nvmeq->sq_cmds_io = dev->cmb + offset;
1472         } else {
1473                 nvmeq->sq_cmds = dma_alloc_coherent(dev->dev, SQ_SIZE(depth),
1474                                         &nvmeq->sq_dma_addr, GFP_KERNEL);
1475                 if (!nvmeq->sq_cmds)
1476                         return -ENOMEM;
1477         }
1478
1479         return 0;
1480 }
1481
1482 static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
1483                                                         int depth)
1484 {
1485         struct nvme_queue *nvmeq = kzalloc(sizeof(*nvmeq), GFP_KERNEL);
1486         if (!nvmeq)
1487                 return NULL;
1488
1489         nvmeq->cqes = dma_zalloc_coherent(dev->dev, CQ_SIZE(depth),
1490                                           &nvmeq->cq_dma_addr, GFP_KERNEL);
1491         if (!nvmeq->cqes)
1492                 goto free_nvmeq;
1493
1494         if (nvme_alloc_sq_cmds(dev, nvmeq, qid, depth))
1495                 goto free_cqdma;
1496
1497         nvmeq->q_dmadev = dev->dev;
1498         nvmeq->dev = dev;
1499         snprintf(nvmeq->irqname, sizeof(nvmeq->irqname), "nvme%dq%d",
1500                         dev->instance, qid);
1501         spin_lock_init(&nvmeq->q_lock);
1502         nvmeq->cq_head = 0;
1503         nvmeq->cq_phase = 1;
1504         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1505         nvmeq->q_depth = depth;
1506         nvmeq->qid = qid;
1507         nvmeq->cq_vector = -1;
1508         dev->queues[qid] = nvmeq;
1509
1510         /* make sure queue descriptor is set before queue count, for kthread */
1511         mb();
1512         dev->queue_count++;
1513
1514         return nvmeq;
1515
1516  free_cqdma:
1517         dma_free_coherent(dev->dev, CQ_SIZE(depth), (void *)nvmeq->cqes,
1518                                                         nvmeq->cq_dma_addr);
1519  free_nvmeq:
1520         kfree(nvmeq);
1521         return NULL;
1522 }
1523
1524 static int queue_request_irq(struct nvme_dev *dev, struct nvme_queue *nvmeq,
1525                                                         const char *name)
1526 {
1527         if (use_threaded_interrupts)
1528                 return request_threaded_irq(dev->entry[nvmeq->cq_vector].vector,
1529                                         nvme_irq_check, nvme_irq, IRQF_SHARED,
1530                                         name, nvmeq);
1531         return request_irq(dev->entry[nvmeq->cq_vector].vector, nvme_irq,
1532                                 IRQF_SHARED, name, nvmeq);
1533 }
1534
1535 static void nvme_init_queue(struct nvme_queue *nvmeq, u16 qid)
1536 {
1537         struct nvme_dev *dev = nvmeq->dev;
1538
1539         spin_lock_irq(&nvmeq->q_lock);
1540         nvmeq->sq_tail = 0;
1541         nvmeq->cq_head = 0;
1542         nvmeq->cq_phase = 1;
1543         nvmeq->q_db = &dev->dbs[qid * 2 * dev->db_stride];
1544         memset((void *)nvmeq->cqes, 0, CQ_SIZE(nvmeq->q_depth));
1545         dev->online_queues++;
1546         spin_unlock_irq(&nvmeq->q_lock);
1547 }
1548
1549 static int nvme_create_queue(struct nvme_queue *nvmeq, int qid)
1550 {
1551         struct nvme_dev *dev = nvmeq->dev;
1552         int result;
1553
1554         nvmeq->cq_vector = qid - 1;
1555         result = adapter_alloc_cq(dev, qid, nvmeq);
1556         if (result < 0)
1557                 return result;
1558
1559         result = adapter_alloc_sq(dev, qid, nvmeq);
1560         if (result < 0)
1561                 goto release_cq;
1562
1563         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1564         if (result < 0)
1565                 goto release_sq;
1566
1567         nvme_init_queue(nvmeq, qid);
1568         return result;
1569
1570  release_sq:
1571         adapter_delete_sq(dev, qid);
1572  release_cq:
1573         adapter_delete_cq(dev, qid);
1574         return result;
1575 }
1576
1577 static int nvme_wait_ready(struct nvme_dev *dev, u64 cap, bool enabled)
1578 {
1579         unsigned long timeout;
1580         u32 bit = enabled ? NVME_CSTS_RDY : 0;
1581
1582         timeout = ((NVME_CAP_TIMEOUT(cap) + 1) * HZ / 2) + jiffies;
1583
1584         while ((readl(&dev->bar->csts) & NVME_CSTS_RDY) != bit) {
1585                 msleep(100);
1586                 if (fatal_signal_pending(current))
1587                         return -EINTR;
1588                 if (time_after(jiffies, timeout)) {
1589                         dev_err(dev->dev,
1590                                 "Device not ready; aborting %s\n", enabled ?
1591                                                 "initialisation" : "reset");
1592                         return -ENODEV;
1593                 }
1594         }
1595
1596         return 0;
1597 }
1598
1599 /*
1600  * If the device has been passed off to us in an enabled state, just clear
1601  * the enabled bit.  The spec says we should set the 'shutdown notification
1602  * bits', but doing so may cause the device to complete commands to the
1603  * admin queue ... and we don't know what memory that might be pointing at!
1604  */
1605 static int nvme_disable_ctrl(struct nvme_dev *dev, u64 cap)
1606 {
1607         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1608         dev->ctrl_config &= ~NVME_CC_ENABLE;
1609         writel(dev->ctrl_config, &dev->bar->cc);
1610
1611         return nvme_wait_ready(dev, cap, false);
1612 }
1613
1614 static int nvme_enable_ctrl(struct nvme_dev *dev, u64 cap)
1615 {
1616         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1617         dev->ctrl_config |= NVME_CC_ENABLE;
1618         writel(dev->ctrl_config, &dev->bar->cc);
1619
1620         return nvme_wait_ready(dev, cap, true);
1621 }
1622
1623 static int nvme_shutdown_ctrl(struct nvme_dev *dev)
1624 {
1625         unsigned long timeout;
1626
1627         dev->ctrl_config &= ~NVME_CC_SHN_MASK;
1628         dev->ctrl_config |= NVME_CC_SHN_NORMAL;
1629
1630         writel(dev->ctrl_config, &dev->bar->cc);
1631
1632         timeout = SHUTDOWN_TIMEOUT + jiffies;
1633         while ((readl(&dev->bar->csts) & NVME_CSTS_SHST_MASK) !=
1634                                                         NVME_CSTS_SHST_CMPLT) {
1635                 msleep(100);
1636                 if (fatal_signal_pending(current))
1637                         return -EINTR;
1638                 if (time_after(jiffies, timeout)) {
1639                         dev_err(dev->dev,
1640                                 "Device shutdown incomplete; abort shutdown\n");
1641                         return -ENODEV;
1642                 }
1643         }
1644
1645         return 0;
1646 }
1647
1648 static struct blk_mq_ops nvme_mq_admin_ops = {
1649         .queue_rq       = nvme_queue_rq,
1650         .map_queue      = blk_mq_map_queue,
1651         .init_hctx      = nvme_admin_init_hctx,
1652         .exit_hctx      = nvme_admin_exit_hctx,
1653         .init_request   = nvme_admin_init_request,
1654         .timeout        = nvme_timeout,
1655 };
1656
1657 static struct blk_mq_ops nvme_mq_ops = {
1658         .queue_rq       = nvme_queue_rq,
1659         .map_queue      = blk_mq_map_queue,
1660         .init_hctx      = nvme_init_hctx,
1661         .init_request   = nvme_init_request,
1662         .timeout        = nvme_timeout,
1663 };
1664
1665 static void nvme_dev_remove_admin(struct nvme_dev *dev)
1666 {
1667         if (dev->admin_q && !blk_queue_dying(dev->admin_q)) {
1668                 blk_cleanup_queue(dev->admin_q);
1669                 blk_mq_free_tag_set(&dev->admin_tagset);
1670         }
1671 }
1672
1673 static int nvme_alloc_admin_tags(struct nvme_dev *dev)
1674 {
1675         if (!dev->admin_q) {
1676                 dev->admin_tagset.ops = &nvme_mq_admin_ops;
1677                 dev->admin_tagset.nr_hw_queues = 1;
1678                 dev->admin_tagset.queue_depth = NVME_AQ_DEPTH - 1;
1679                 dev->admin_tagset.reserved_tags = 1;
1680                 dev->admin_tagset.timeout = ADMIN_TIMEOUT;
1681                 dev->admin_tagset.numa_node = dev_to_node(dev->dev);
1682                 dev->admin_tagset.cmd_size = nvme_cmd_size(dev);
1683                 dev->admin_tagset.driver_data = dev;
1684
1685                 if (blk_mq_alloc_tag_set(&dev->admin_tagset))
1686                         return -ENOMEM;
1687
1688                 dev->admin_q = blk_mq_init_queue(&dev->admin_tagset);
1689                 if (IS_ERR(dev->admin_q)) {
1690                         blk_mq_free_tag_set(&dev->admin_tagset);
1691                         return -ENOMEM;
1692                 }
1693                 if (!blk_get_queue(dev->admin_q)) {
1694                         nvme_dev_remove_admin(dev);
1695                         dev->admin_q = NULL;
1696                         return -ENODEV;
1697                 }
1698         } else
1699                 blk_mq_unfreeze_queue(dev->admin_q);
1700
1701         return 0;
1702 }
1703
1704 static int nvme_configure_admin_queue(struct nvme_dev *dev)
1705 {
1706         int result;
1707         u32 aqa;
1708         u64 cap = readq(&dev->bar->cap);
1709         struct nvme_queue *nvmeq;
1710         unsigned page_shift = PAGE_SHIFT;
1711         unsigned dev_page_min = NVME_CAP_MPSMIN(cap) + 12;
1712         unsigned dev_page_max = NVME_CAP_MPSMAX(cap) + 12;
1713
1714         if (page_shift < dev_page_min) {
1715                 dev_err(dev->dev,
1716                                 "Minimum device page size (%u) too large for "
1717                                 "host (%u)\n", 1 << dev_page_min,
1718                                 1 << page_shift);
1719                 return -ENODEV;
1720         }
1721         if (page_shift > dev_page_max) {
1722                 dev_info(dev->dev,
1723                                 "Device maximum page size (%u) smaller than "
1724                                 "host (%u); enabling work-around\n",
1725                                 1 << dev_page_max, 1 << page_shift);
1726                 page_shift = dev_page_max;
1727         }
1728
1729         dev->subsystem = readl(&dev->bar->vs) >= NVME_VS(1, 1) ?
1730                                                 NVME_CAP_NSSRC(cap) : 0;
1731
1732         if (dev->subsystem && (readl(&dev->bar->csts) & NVME_CSTS_NSSRO))
1733                 writel(NVME_CSTS_NSSRO, &dev->bar->csts);
1734
1735         result = nvme_disable_ctrl(dev, cap);
1736         if (result < 0)
1737                 return result;
1738
1739         nvmeq = dev->queues[0];
1740         if (!nvmeq) {
1741                 nvmeq = nvme_alloc_queue(dev, 0, NVME_AQ_DEPTH);
1742                 if (!nvmeq)
1743                         return -ENOMEM;
1744         }
1745
1746         aqa = nvmeq->q_depth - 1;
1747         aqa |= aqa << 16;
1748
1749         dev->page_size = 1 << page_shift;
1750
1751         dev->ctrl_config = NVME_CC_CSS_NVM;
1752         dev->ctrl_config |= (page_shift - 12) << NVME_CC_MPS_SHIFT;
1753         dev->ctrl_config |= NVME_CC_ARB_RR | NVME_CC_SHN_NONE;
1754         dev->ctrl_config |= NVME_CC_IOSQES | NVME_CC_IOCQES;
1755
1756         writel(aqa, &dev->bar->aqa);
1757         writeq(nvmeq->sq_dma_addr, &dev->bar->asq);
1758         writeq(nvmeq->cq_dma_addr, &dev->bar->acq);
1759
1760         result = nvme_enable_ctrl(dev, cap);
1761         if (result)
1762                 goto free_nvmeq;
1763
1764         nvmeq->cq_vector = 0;
1765         result = queue_request_irq(dev, nvmeq, nvmeq->irqname);
1766         if (result) {
1767                 nvmeq->cq_vector = -1;
1768                 goto free_nvmeq;
1769         }
1770
1771         return result;
1772
1773  free_nvmeq:
1774         nvme_free_queues(dev, 0);
1775         return result;
1776 }
1777
1778 static int nvme_submit_io(struct nvme_ns *ns, struct nvme_user_io __user *uio)
1779 {
1780         struct nvme_dev *dev = ns->dev;
1781         struct nvme_user_io io;
1782         struct nvme_command c;
1783         unsigned length, meta_len;
1784         int status, write;
1785         dma_addr_t meta_dma = 0;
1786         void *meta = NULL;
1787         void __user *metadata;
1788
1789         if (copy_from_user(&io, uio, sizeof(io)))
1790                 return -EFAULT;
1791
1792         switch (io.opcode) {
1793         case nvme_cmd_write:
1794         case nvme_cmd_read:
1795         case nvme_cmd_compare:
1796                 break;
1797         default:
1798                 return -EINVAL;
1799         }
1800
1801         length = (io.nblocks + 1) << ns->lba_shift;
1802         meta_len = (io.nblocks + 1) * ns->ms;
1803         metadata = (void __user *)(unsigned long)io.metadata;
1804         write = io.opcode & 1;
1805
1806         if (ns->ext) {
1807                 length += meta_len;
1808                 meta_len = 0;
1809         }
1810         if (meta_len) {
1811                 if (((io.metadata & 3) || !io.metadata) && !ns->ext)
1812                         return -EINVAL;
1813
1814                 meta = dma_alloc_coherent(dev->dev, meta_len,
1815                                                 &meta_dma, GFP_KERNEL);
1816
1817                 if (!meta) {
1818                         status = -ENOMEM;
1819                         goto unmap;
1820                 }
1821                 if (write) {
1822                         if (copy_from_user(meta, metadata, meta_len)) {
1823                                 status = -EFAULT;
1824                                 goto unmap;
1825                         }
1826                 }
1827         }
1828
1829         memset(&c, 0, sizeof(c));
1830         c.rw.opcode = io.opcode;
1831         c.rw.flags = io.flags;
1832         c.rw.nsid = cpu_to_le32(ns->ns_id);
1833         c.rw.slba = cpu_to_le64(io.slba);
1834         c.rw.length = cpu_to_le16(io.nblocks);
1835         c.rw.control = cpu_to_le16(io.control);
1836         c.rw.dsmgmt = cpu_to_le32(io.dsmgmt);
1837         c.rw.reftag = cpu_to_le32(io.reftag);
1838         c.rw.apptag = cpu_to_le16(io.apptag);
1839         c.rw.appmask = cpu_to_le16(io.appmask);
1840         c.rw.metadata = cpu_to_le64(meta_dma);
1841
1842         status = __nvme_submit_sync_cmd(ns->queue, &c, NULL,
1843                         (void __user *)io.addr, length, NULL, 0);
1844  unmap:
1845         if (meta) {
1846                 if (status == NVME_SC_SUCCESS && !write) {
1847                         if (copy_to_user(metadata, meta, meta_len))
1848                                 status = -EFAULT;
1849                 }
1850                 dma_free_coherent(dev->dev, meta_len, meta, meta_dma);
1851         }
1852         return status;
1853 }
1854
1855 static int nvme_user_cmd(struct nvme_dev *dev, struct nvme_ns *ns,
1856                         struct nvme_passthru_cmd __user *ucmd)
1857 {
1858         struct nvme_passthru_cmd cmd;
1859         struct nvme_command c;
1860         unsigned timeout = 0;
1861         int status;
1862
1863         if (!capable(CAP_SYS_ADMIN))
1864                 return -EACCES;
1865         if (copy_from_user(&cmd, ucmd, sizeof(cmd)))
1866                 return -EFAULT;
1867
1868         memset(&c, 0, sizeof(c));
1869         c.common.opcode = cmd.opcode;
1870         c.common.flags = cmd.flags;
1871         c.common.nsid = cpu_to_le32(cmd.nsid);
1872         c.common.cdw2[0] = cpu_to_le32(cmd.cdw2);
1873         c.common.cdw2[1] = cpu_to_le32(cmd.cdw3);
1874         c.common.cdw10[0] = cpu_to_le32(cmd.cdw10);
1875         c.common.cdw10[1] = cpu_to_le32(cmd.cdw11);
1876         c.common.cdw10[2] = cpu_to_le32(cmd.cdw12);
1877         c.common.cdw10[3] = cpu_to_le32(cmd.cdw13);
1878         c.common.cdw10[4] = cpu_to_le32(cmd.cdw14);
1879         c.common.cdw10[5] = cpu_to_le32(cmd.cdw15);
1880
1881         if (cmd.timeout_ms)
1882                 timeout = msecs_to_jiffies(cmd.timeout_ms);
1883
1884         status = __nvme_submit_sync_cmd(ns ? ns->queue : dev->admin_q, &c,
1885                         NULL, (void __user *)cmd.addr, cmd.data_len,
1886                         &cmd.result, timeout);
1887         if (status >= 0) {
1888                 if (put_user(cmd.result, &ucmd->result))
1889                         return -EFAULT;
1890         }
1891
1892         return status;
1893 }
1894
1895 static int nvme_subsys_reset(struct nvme_dev *dev)
1896 {
1897         if (!dev->subsystem)
1898                 return -ENOTTY;
1899
1900         writel(0x4E564D65, &dev->bar->nssr); /* "NVMe" */
1901         return 0;
1902 }
1903
1904 static int nvme_ioctl(struct block_device *bdev, fmode_t mode, unsigned int cmd,
1905                                                         unsigned long arg)
1906 {
1907         struct nvme_ns *ns = bdev->bd_disk->private_data;
1908
1909         switch (cmd) {
1910         case NVME_IOCTL_ID:
1911                 force_successful_syscall_return();
1912                 return ns->ns_id;
1913         case NVME_IOCTL_ADMIN_CMD:
1914                 return nvme_user_cmd(ns->dev, NULL, (void __user *)arg);
1915         case NVME_IOCTL_IO_CMD:
1916                 return nvme_user_cmd(ns->dev, ns, (void __user *)arg);
1917         case NVME_IOCTL_SUBMIT_IO:
1918                 return nvme_submit_io(ns, (void __user *)arg);
1919         case SG_GET_VERSION_NUM:
1920                 return nvme_sg_get_version_num((void __user *)arg);
1921         case SG_IO:
1922                 return nvme_sg_io(ns, (void __user *)arg);
1923         default:
1924                 return -ENOTTY;
1925         }
1926 }
1927
1928 #ifdef CONFIG_COMPAT
1929 static int nvme_compat_ioctl(struct block_device *bdev, fmode_t mode,
1930                                         unsigned int cmd, unsigned long arg)
1931 {
1932         switch (cmd) {
1933         case SG_IO:
1934                 return -ENOIOCTLCMD;
1935         }
1936         return nvme_ioctl(bdev, mode, cmd, arg);
1937 }
1938 #else
1939 #define nvme_compat_ioctl       NULL
1940 #endif
1941
1942 static void nvme_free_dev(struct kref *kref);
1943 static void nvme_free_ns(struct kref *kref)
1944 {
1945         struct nvme_ns *ns = container_of(kref, struct nvme_ns, kref);
1946
1947         spin_lock(&dev_list_lock);
1948         ns->disk->private_data = NULL;
1949         spin_unlock(&dev_list_lock);
1950
1951         kref_put(&ns->dev->kref, nvme_free_dev);
1952         put_disk(ns->disk);
1953         kfree(ns);
1954 }
1955
1956 static int nvme_open(struct block_device *bdev, fmode_t mode)
1957 {
1958         int ret = 0;
1959         struct nvme_ns *ns;
1960
1961         spin_lock(&dev_list_lock);
1962         ns = bdev->bd_disk->private_data;
1963         if (!ns)
1964                 ret = -ENXIO;
1965         else if (!kref_get_unless_zero(&ns->kref))
1966                 ret = -ENXIO;
1967         spin_unlock(&dev_list_lock);
1968
1969         return ret;
1970 }
1971
1972 static void nvme_release(struct gendisk *disk, fmode_t mode)
1973 {
1974         struct nvme_ns *ns = disk->private_data;
1975         kref_put(&ns->kref, nvme_free_ns);
1976 }
1977
1978 static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1979 {
1980         /* some standard values */
1981         geo->heads = 1 << 6;
1982         geo->sectors = 1 << 5;
1983         geo->cylinders = get_capacity(bd->bd_disk) >> 11;
1984         return 0;
1985 }
1986
1987 static void nvme_config_discard(struct nvme_ns *ns)
1988 {
1989         u32 logical_block_size = queue_logical_block_size(ns->queue);
1990         ns->queue->limits.discard_zeroes_data = 0;
1991         ns->queue->limits.discard_alignment = logical_block_size;
1992         ns->queue->limits.discard_granularity = logical_block_size;
1993         blk_queue_max_discard_sectors(ns->queue, 0xffffffff);
1994         queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1995 }
1996
1997 static int nvme_revalidate_disk(struct gendisk *disk)
1998 {
1999         struct nvme_ns *ns = disk->private_data;
2000         struct nvme_dev *dev = ns->dev;
2001         struct nvme_id_ns *id;
2002         u8 lbaf, pi_type;
2003         u16 old_ms;
2004         unsigned short bs;
2005
2006         if (nvme_identify_ns(dev, ns->ns_id, &id)) {
2007                 dev_warn(dev->dev, "%s: Identify failure nvme%dn%d\n", __func__,
2008                                                 dev->instance, ns->ns_id);
2009                 return -ENODEV;
2010         }
2011         if (id->ncap == 0) {
2012                 kfree(id);
2013                 return -ENODEV;
2014         }
2015
2016         old_ms = ns->ms;
2017         lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
2018         ns->lba_shift = id->lbaf[lbaf].ds;
2019         ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2020         ns->ext = ns->ms && (id->flbas & NVME_NS_FLBAS_META_EXT);
2021
2022         /*
2023          * If identify namespace failed, use default 512 byte block size so
2024          * block layer can use before failing read/write for 0 capacity.
2025          */
2026         if (ns->lba_shift == 0)
2027                 ns->lba_shift = 9;
2028         bs = 1 << ns->lba_shift;
2029
2030         /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2031         pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2032                                         id->dps & NVME_NS_DPS_PI_MASK : 0;
2033
2034         if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2035                                 ns->ms != old_ms ||
2036                                 bs != queue_logical_block_size(disk->queue) ||
2037                                 (ns->ms && ns->ext)))
2038                 blk_integrity_unregister(disk);
2039
2040         ns->pi_type = pi_type;
2041         blk_queue_logical_block_size(ns->queue, bs);
2042
2043         if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2044                                                                 !ns->ext)
2045                 nvme_init_integrity(ns);
2046
2047         if (ns->ms && !(ns->ms == 8 && ns->pi_type) && !blk_get_integrity(disk))
2048                 set_capacity(disk, 0);
2049         else
2050                 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2051
2052         if (dev->oncs & NVME_CTRL_ONCS_DSM)
2053                 nvme_config_discard(ns);
2054
2055         kfree(id);
2056         return 0;
2057 }
2058
2059 static const struct block_device_operations nvme_fops = {
2060         .owner          = THIS_MODULE,
2061         .ioctl          = nvme_ioctl,
2062         .compat_ioctl   = nvme_compat_ioctl,
2063         .open           = nvme_open,
2064         .release        = nvme_release,
2065         .getgeo         = nvme_getgeo,
2066         .revalidate_disk= nvme_revalidate_disk,
2067 };
2068
2069 static int nvme_kthread(void *data)
2070 {
2071         struct nvme_dev *dev, *next;
2072
2073         while (!kthread_should_stop()) {
2074                 set_current_state(TASK_INTERRUPTIBLE);
2075                 spin_lock(&dev_list_lock);
2076                 list_for_each_entry_safe(dev, next, &dev_list, node) {
2077                         int i;
2078                         u32 csts = readl(&dev->bar->csts);
2079
2080                         if ((dev->subsystem && (csts & NVME_CSTS_NSSRO)) ||
2081                                                         csts & NVME_CSTS_CFS) {
2082                                 if (!__nvme_reset(dev)) {
2083                                         dev_warn(dev->dev,
2084                                                 "Failed status: %x, reset controller\n",
2085                                                 readl(&dev->bar->csts));
2086                                 }
2087                                 continue;
2088                         }
2089                         for (i = 0; i < dev->queue_count; i++) {
2090                                 struct nvme_queue *nvmeq = dev->queues[i];
2091                                 if (!nvmeq)
2092                                         continue;
2093                                 spin_lock_irq(&nvmeq->q_lock);
2094                                 nvme_process_cq(nvmeq);
2095
2096                                 while ((i == 0) && (dev->event_limit > 0)) {
2097                                         if (nvme_submit_async_admin_req(dev))
2098                                                 break;
2099                                         dev->event_limit--;
2100                                 }
2101                                 spin_unlock_irq(&nvmeq->q_lock);
2102                         }
2103                 }
2104                 spin_unlock(&dev_list_lock);
2105                 schedule_timeout(round_jiffies_relative(HZ));
2106         }
2107         return 0;
2108 }
2109
2110 static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
2111 {
2112         struct nvme_ns *ns;
2113         struct gendisk *disk;
2114         int node = dev_to_node(dev->dev);
2115
2116         ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
2117         if (!ns)
2118                 return;
2119
2120         ns->queue = blk_mq_init_queue(&dev->tagset);
2121         if (IS_ERR(ns->queue))
2122                 goto out_free_ns;
2123         queue_flag_set_unlocked(QUEUE_FLAG_NOMERGES, ns->queue);
2124         queue_flag_set_unlocked(QUEUE_FLAG_NONROT, ns->queue);
2125         ns->dev = dev;
2126         ns->queue->queuedata = ns;
2127
2128         disk = alloc_disk_node(0, node);
2129         if (!disk)
2130                 goto out_free_queue;
2131
2132         kref_init(&ns->kref);
2133         ns->ns_id = nsid;
2134         ns->disk = disk;
2135         ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
2136         list_add_tail(&ns->list, &dev->namespaces);
2137
2138         blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2139         if (dev->max_hw_sectors) {
2140                 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
2141                 blk_queue_max_segments(ns->queue,
2142                         ((dev->max_hw_sectors << 9) / dev->page_size) + 1);
2143         }
2144         if (dev->stripe_size)
2145                 blk_queue_chunk_sectors(ns->queue, dev->stripe_size >> 9);
2146         if (dev->vwc & NVME_CTRL_VWC_PRESENT)
2147                 blk_queue_flush(ns->queue, REQ_FLUSH | REQ_FUA);
2148         blk_queue_virt_boundary(ns->queue, dev->page_size - 1);
2149
2150         disk->major = nvme_major;
2151         disk->first_minor = 0;
2152         disk->fops = &nvme_fops;
2153         disk->private_data = ns;
2154         disk->queue = ns->queue;
2155         disk->driverfs_dev = dev->device;
2156         disk->flags = GENHD_FL_EXT_DEVT;
2157         sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2158
2159         /*
2160          * Initialize capacity to 0 until we establish the namespace format and
2161          * setup integrity extentions if necessary. The revalidate_disk after
2162          * add_disk allows the driver to register with integrity if the format
2163          * requires it.
2164          */
2165         set_capacity(disk, 0);
2166         if (nvme_revalidate_disk(ns->disk))
2167                 goto out_free_disk;
2168
2169         kref_get(&dev->kref);
2170         add_disk(ns->disk);
2171         if (ns->ms) {
2172                 struct block_device *bd = bdget_disk(ns->disk, 0);
2173                 if (!bd)
2174                         return;
2175                 if (blkdev_get(bd, FMODE_READ, NULL)) {
2176                         bdput(bd);
2177                         return;
2178                 }
2179                 blkdev_reread_part(bd);
2180                 blkdev_put(bd, FMODE_READ);
2181         }
2182         return;
2183  out_free_disk:
2184         kfree(disk);
2185         list_del(&ns->list);
2186  out_free_queue:
2187         blk_cleanup_queue(ns->queue);
2188  out_free_ns:
2189         kfree(ns);
2190 }
2191
2192 /*
2193  * Create I/O queues.  Failing to create an I/O queue is not an issue,
2194  * we can continue with less than the desired amount of queues, and
2195  * even a controller without I/O queues an still be used to issue
2196  * admin commands.  This might be useful to upgrade a buggy firmware
2197  * for example.
2198  */
2199 static void nvme_create_io_queues(struct nvme_dev *dev)
2200 {
2201         unsigned i;
2202
2203         for (i = dev->queue_count; i <= dev->max_qid; i++)
2204                 if (!nvme_alloc_queue(dev, i, dev->q_depth))
2205                         break;
2206
2207         for (i = dev->online_queues; i <= dev->queue_count - 1; i++)
2208                 if (nvme_create_queue(dev->queues[i], i)) {
2209                         nvme_free_queues(dev, i);
2210                         break;
2211                 }
2212 }
2213
2214 static int set_queue_count(struct nvme_dev *dev, int count)
2215 {
2216         int status;
2217         u32 result;
2218         u32 q_count = (count - 1) | ((count - 1) << 16);
2219
2220         status = nvme_set_features(dev, NVME_FEAT_NUM_QUEUES, q_count, 0,
2221                                                                 &result);
2222         if (status < 0)
2223                 return status;
2224         if (status > 0) {
2225                 dev_err(dev->dev, "Could not set queue count (%d)\n", status);
2226                 return 0;
2227         }
2228         return min(result & 0xffff, result >> 16) + 1;
2229 }
2230
2231 static void __iomem *nvme_map_cmb(struct nvme_dev *dev)
2232 {
2233         u64 szu, size, offset;
2234         u32 cmbloc;
2235         resource_size_t bar_size;
2236         struct pci_dev *pdev = to_pci_dev(dev->dev);
2237         void __iomem *cmb;
2238         dma_addr_t dma_addr;
2239
2240         if (!use_cmb_sqes)
2241                 return NULL;
2242
2243         dev->cmbsz = readl(&dev->bar->cmbsz);
2244         if (!(NVME_CMB_SZ(dev->cmbsz)))
2245                 return NULL;
2246
2247         cmbloc = readl(&dev->bar->cmbloc);
2248
2249         szu = (u64)1 << (12 + 4 * NVME_CMB_SZU(dev->cmbsz));
2250         size = szu * NVME_CMB_SZ(dev->cmbsz);
2251         offset = szu * NVME_CMB_OFST(cmbloc);
2252         bar_size = pci_resource_len(pdev, NVME_CMB_BIR(cmbloc));
2253
2254         if (offset > bar_size)
2255                 return NULL;
2256
2257         /*
2258          * Controllers may support a CMB size larger than their BAR,
2259          * for example, due to being behind a bridge. Reduce the CMB to
2260          * the reported size of the BAR
2261          */
2262         if (size > bar_size - offset)
2263                 size = bar_size - offset;
2264
2265         dma_addr = pci_resource_start(pdev, NVME_CMB_BIR(cmbloc)) + offset;
2266         cmb = ioremap_wc(dma_addr, size);
2267         if (!cmb)
2268                 return NULL;
2269
2270         dev->cmb_dma_addr = dma_addr;
2271         dev->cmb_size = size;
2272         return cmb;
2273 }
2274
2275 static inline void nvme_release_cmb(struct nvme_dev *dev)
2276 {
2277         if (dev->cmb) {
2278                 iounmap(dev->cmb);
2279                 dev->cmb = NULL;
2280         }
2281 }
2282
2283 static size_t db_bar_size(struct nvme_dev *dev, unsigned nr_io_queues)
2284 {
2285         return 4096 + ((nr_io_queues + 1) * 8 * dev->db_stride);
2286 }
2287
2288 static int nvme_setup_io_queues(struct nvme_dev *dev)
2289 {
2290         struct nvme_queue *adminq = dev->queues[0];
2291         struct pci_dev *pdev = to_pci_dev(dev->dev);
2292         int result, i, vecs, nr_io_queues, size;
2293
2294         nr_io_queues = num_possible_cpus();
2295         result = set_queue_count(dev, nr_io_queues);
2296         if (result <= 0)
2297                 return result;
2298         if (result < nr_io_queues)
2299                 nr_io_queues = result;
2300
2301         if (dev->cmb && NVME_CMB_SQS(dev->cmbsz)) {
2302                 result = nvme_cmb_qdepth(dev, nr_io_queues,
2303                                 sizeof(struct nvme_command));
2304                 if (result > 0)
2305                         dev->q_depth = result;
2306                 else
2307                         nvme_release_cmb(dev);
2308         }
2309
2310         size = db_bar_size(dev, nr_io_queues);
2311         if (size > 8192) {
2312                 iounmap(dev->bar);
2313                 do {
2314                         dev->bar = ioremap(pci_resource_start(pdev, 0), size);
2315                         if (dev->bar)
2316                                 break;
2317                         if (!--nr_io_queues)
2318                                 return -ENOMEM;
2319                         size = db_bar_size(dev, nr_io_queues);
2320                 } while (1);
2321                 dev->dbs = ((void __iomem *)dev->bar) + 4096;
2322                 adminq->q_db = dev->dbs;
2323         }
2324
2325         /* Deregister the admin queue's interrupt */
2326         free_irq(dev->entry[0].vector, adminq);
2327
2328         /*
2329          * If we enable msix early due to not intx, disable it again before
2330          * setting up the full range we need.
2331          */
2332         if (!pdev->irq)
2333                 pci_disable_msix(pdev);
2334
2335         for (i = 0; i < nr_io_queues; i++)
2336                 dev->entry[i].entry = i;
2337         vecs = pci_enable_msix_range(pdev, dev->entry, 1, nr_io_queues);
2338         if (vecs < 0) {
2339                 vecs = pci_enable_msi_range(pdev, 1, min(nr_io_queues, 32));
2340                 if (vecs < 0) {
2341                         vecs = 1;
2342                 } else {
2343                         for (i = 0; i < vecs; i++)
2344                                 dev->entry[i].vector = i + pdev->irq;
2345                 }
2346         }
2347
2348         /*
2349          * Should investigate if there's a performance win from allocating
2350          * more queues than interrupt vectors; it might allow the submission
2351          * path to scale better, even if the receive path is limited by the
2352          * number of interrupts.
2353          */
2354         nr_io_queues = vecs;
2355         dev->max_qid = nr_io_queues;
2356
2357         result = queue_request_irq(dev, adminq, adminq->irqname);
2358         if (result) {
2359                 adminq->cq_vector = -1;
2360                 goto free_queues;
2361         }
2362
2363         /* Free previously allocated queues that are no longer usable */
2364         nvme_free_queues(dev, nr_io_queues + 1);
2365         nvme_create_io_queues(dev);
2366
2367         return 0;
2368
2369  free_queues:
2370         nvme_free_queues(dev, 1);
2371         return result;
2372 }
2373
2374 static int ns_cmp(void *priv, struct list_head *a, struct list_head *b)
2375 {
2376         struct nvme_ns *nsa = container_of(a, struct nvme_ns, list);
2377         struct nvme_ns *nsb = container_of(b, struct nvme_ns, list);
2378
2379         return nsa->ns_id - nsb->ns_id;
2380 }
2381
2382 static struct nvme_ns *nvme_find_ns(struct nvme_dev *dev, unsigned nsid)
2383 {
2384         struct nvme_ns *ns;
2385
2386         list_for_each_entry(ns, &dev->namespaces, list) {
2387                 if (ns->ns_id == nsid)
2388                         return ns;
2389                 if (ns->ns_id > nsid)
2390                         break;
2391         }
2392         return NULL;
2393 }
2394
2395 static inline bool nvme_io_incapable(struct nvme_dev *dev)
2396 {
2397         return (!dev->bar || readl(&dev->bar->csts) & NVME_CSTS_CFS ||
2398                                                         dev->online_queues < 2);
2399 }
2400
2401 static void nvme_ns_remove(struct nvme_ns *ns)
2402 {
2403         bool kill = nvme_io_incapable(ns->dev) && !blk_queue_dying(ns->queue);
2404
2405         if (kill)
2406                 blk_set_queue_dying(ns->queue);
2407         if (ns->disk->flags & GENHD_FL_UP) {
2408                 if (blk_get_integrity(ns->disk))
2409                         blk_integrity_unregister(ns->disk);
2410                 del_gendisk(ns->disk);
2411         }
2412         if (kill || !blk_queue_dying(ns->queue)) {
2413                 blk_mq_abort_requeue_list(ns->queue);
2414                 blk_cleanup_queue(ns->queue);
2415         }
2416         list_del_init(&ns->list);
2417         kref_put(&ns->kref, nvme_free_ns);
2418 }
2419
2420 static void nvme_scan_namespaces(struct nvme_dev *dev, unsigned nn)
2421 {
2422         struct nvme_ns *ns, *next;
2423         unsigned i;
2424
2425         for (i = 1; i <= nn; i++) {
2426                 ns = nvme_find_ns(dev, i);
2427                 if (ns) {
2428                         if (revalidate_disk(ns->disk))
2429                                 nvme_ns_remove(ns);
2430                 } else
2431                         nvme_alloc_ns(dev, i);
2432         }
2433         list_for_each_entry_safe(ns, next, &dev->namespaces, list) {
2434                 if (ns->ns_id > nn)
2435                         nvme_ns_remove(ns);
2436         }
2437         list_sort(NULL, &dev->namespaces, ns_cmp);
2438 }
2439
2440 static void nvme_set_irq_hints(struct nvme_dev *dev)
2441 {
2442         struct nvme_queue *nvmeq;
2443         int i;
2444
2445         for (i = 0; i < dev->online_queues; i++) {
2446                 nvmeq = dev->queues[i];
2447
2448                 if (!nvmeq->tags || !(*nvmeq->tags))
2449                         continue;
2450
2451                 irq_set_affinity_hint(dev->entry[nvmeq->cq_vector].vector,
2452                                         blk_mq_tags_cpumask(*nvmeq->tags));
2453         }
2454 }
2455
2456 static void nvme_dev_scan(struct work_struct *work)
2457 {
2458         struct nvme_dev *dev = container_of(work, struct nvme_dev, scan_work);
2459         struct nvme_id_ctrl *ctrl;
2460
2461         if (!dev->tagset.tags)
2462                 return;
2463         if (nvme_identify_ctrl(dev, &ctrl))
2464                 return;
2465         nvme_scan_namespaces(dev, le32_to_cpup(&ctrl->nn));
2466         kfree(ctrl);
2467         nvme_set_irq_hints(dev);
2468 }
2469
2470 /*
2471  * Return: error value if an error occurred setting up the queues or calling
2472  * Identify Device.  0 if these succeeded, even if adding some of the
2473  * namespaces failed.  At the moment, these failures are silent.  TBD which
2474  * failures should be reported.
2475  */
2476 static int nvme_dev_add(struct nvme_dev *dev)
2477 {
2478         struct pci_dev *pdev = to_pci_dev(dev->dev);
2479         int res;
2480         struct nvme_id_ctrl *ctrl;
2481         int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2482
2483         res = nvme_identify_ctrl(dev, &ctrl);
2484         if (res) {
2485                 dev_err(dev->dev, "Identify Controller failed (%d)\n", res);
2486                 return -EIO;
2487         }
2488
2489         dev->oncs = le16_to_cpup(&ctrl->oncs);
2490         dev->abort_limit = ctrl->acl + 1;
2491         dev->vwc = ctrl->vwc;
2492         memcpy(dev->serial, ctrl->sn, sizeof(ctrl->sn));
2493         memcpy(dev->model, ctrl->mn, sizeof(ctrl->mn));
2494         memcpy(dev->firmware_rev, ctrl->fr, sizeof(ctrl->fr));
2495         if (ctrl->mdts)
2496                 dev->max_hw_sectors = 1 << (ctrl->mdts + shift - 9);
2497         if ((pdev->vendor == PCI_VENDOR_ID_INTEL) &&
2498                         (pdev->device == 0x0953) && ctrl->vs[3]) {
2499                 unsigned int max_hw_sectors;
2500
2501                 dev->stripe_size = 1 << (ctrl->vs[3] + shift);
2502                 max_hw_sectors = dev->stripe_size >> (shift - 9);
2503                 if (dev->max_hw_sectors) {
2504                         dev->max_hw_sectors = min(max_hw_sectors,
2505                                                         dev->max_hw_sectors);
2506                 } else
2507                         dev->max_hw_sectors = max_hw_sectors;
2508         }
2509         kfree(ctrl);
2510
2511         if (!dev->tagset.tags) {
2512                 dev->tagset.ops = &nvme_mq_ops;
2513                 dev->tagset.nr_hw_queues = dev->online_queues - 1;
2514                 dev->tagset.timeout = NVME_IO_TIMEOUT;
2515                 dev->tagset.numa_node = dev_to_node(dev->dev);
2516                 dev->tagset.queue_depth =
2517                                 min_t(int, dev->q_depth, BLK_MQ_MAX_DEPTH) - 1;
2518                 dev->tagset.cmd_size = nvme_cmd_size(dev);
2519                 dev->tagset.flags = BLK_MQ_F_SHOULD_MERGE;
2520                 dev->tagset.driver_data = dev;
2521
2522                 if (blk_mq_alloc_tag_set(&dev->tagset))
2523                         return 0;
2524         }
2525         schedule_work(&dev->scan_work);
2526         return 0;
2527 }
2528
2529 static int nvme_dev_map(struct nvme_dev *dev)
2530 {
2531         u64 cap;
2532         int bars, result = -ENOMEM;
2533         struct pci_dev *pdev = to_pci_dev(dev->dev);
2534
2535         if (pci_enable_device_mem(pdev))
2536                 return result;
2537
2538         dev->entry[0].vector = pdev->irq;
2539         pci_set_master(pdev);
2540         bars = pci_select_bars(pdev, IORESOURCE_MEM);
2541         if (!bars)
2542                 goto disable_pci;
2543
2544         if (pci_request_selected_regions(pdev, bars, "nvme"))
2545                 goto disable_pci;
2546
2547         if (dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(64)) &&
2548             dma_set_mask_and_coherent(dev->dev, DMA_BIT_MASK(32)))
2549                 goto disable;
2550
2551         dev->bar = ioremap(pci_resource_start(pdev, 0), 8192);
2552         if (!dev->bar)
2553                 goto disable;
2554
2555         if (readl(&dev->bar->csts) == -1) {
2556                 result = -ENODEV;
2557                 goto unmap;
2558         }
2559
2560         /*
2561          * Some devices don't advertse INTx interrupts, pre-enable a single
2562          * MSIX vec for setup. We'll adjust this later.
2563          */
2564         if (!pdev->irq) {
2565                 result = pci_enable_msix(pdev, dev->entry, 1);
2566                 if (result < 0)
2567                         goto unmap;
2568         }
2569
2570         cap = readq(&dev->bar->cap);
2571         dev->q_depth = min_t(int, NVME_CAP_MQES(cap) + 1, NVME_Q_DEPTH);
2572         dev->db_stride = 1 << NVME_CAP_STRIDE(cap);
2573         dev->dbs = ((void __iomem *)dev->bar) + 4096;
2574         if (readl(&dev->bar->vs) >= NVME_VS(1, 2))
2575                 dev->cmb = nvme_map_cmb(dev);
2576
2577         return 0;
2578
2579  unmap:
2580         iounmap(dev->bar);
2581         dev->bar = NULL;
2582  disable:
2583         pci_release_regions(pdev);
2584  disable_pci:
2585         pci_disable_device(pdev);
2586         return result;
2587 }
2588
2589 static void nvme_dev_unmap(struct nvme_dev *dev)
2590 {
2591         struct pci_dev *pdev = to_pci_dev(dev->dev);
2592
2593         if (pdev->msi_enabled)
2594                 pci_disable_msi(pdev);
2595         else if (pdev->msix_enabled)
2596                 pci_disable_msix(pdev);
2597
2598         if (dev->bar) {
2599                 iounmap(dev->bar);
2600                 dev->bar = NULL;
2601                 pci_release_regions(pdev);
2602         }
2603
2604         if (pci_is_enabled(pdev))
2605                 pci_disable_device(pdev);
2606 }
2607
2608 struct nvme_delq_ctx {
2609         struct task_struct *waiter;
2610         struct kthread_worker *worker;
2611         atomic_t refcount;
2612 };
2613
2614 static void nvme_wait_dq(struct nvme_delq_ctx *dq, struct nvme_dev *dev)
2615 {
2616         dq->waiter = current;
2617         mb();
2618
2619         for (;;) {
2620                 set_current_state(TASK_KILLABLE);
2621                 if (!atomic_read(&dq->refcount))
2622                         break;
2623                 if (!schedule_timeout(ADMIN_TIMEOUT) ||
2624                                         fatal_signal_pending(current)) {
2625                         /*
2626                          * Disable the controller first since we can't trust it
2627                          * at this point, but leave the admin queue enabled
2628                          * until all queue deletion requests are flushed.
2629                          * FIXME: This may take a while if there are more h/w
2630                          * queues than admin tags.
2631                          */
2632                         set_current_state(TASK_RUNNING);
2633                         nvme_disable_ctrl(dev, readq(&dev->bar->cap));
2634                         nvme_clear_queue(dev->queues[0]);
2635                         flush_kthread_worker(dq->worker);
2636                         nvme_disable_queue(dev, 0);
2637                         return;
2638                 }
2639         }
2640         set_current_state(TASK_RUNNING);
2641 }
2642
2643 static void nvme_put_dq(struct nvme_delq_ctx *dq)
2644 {
2645         atomic_dec(&dq->refcount);
2646         if (dq->waiter)
2647                 wake_up_process(dq->waiter);
2648 }
2649
2650 static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2651 {
2652         atomic_inc(&dq->refcount);
2653         return dq;
2654 }
2655
2656 static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2657 {
2658         struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2659         nvme_put_dq(dq);
2660 }
2661
2662 static int adapter_async_del_queue(struct nvme_queue *nvmeq, u8 opcode,
2663                                                 kthread_work_func_t fn)
2664 {
2665         struct nvme_command c;
2666
2667         memset(&c, 0, sizeof(c));
2668         c.delete_queue.opcode = opcode;
2669         c.delete_queue.qid = cpu_to_le16(nvmeq->qid);
2670
2671         init_kthread_work(&nvmeq->cmdinfo.work, fn);
2672         return nvme_submit_admin_async_cmd(nvmeq->dev, &c, &nvmeq->cmdinfo,
2673                                                                 ADMIN_TIMEOUT);
2674 }
2675
2676 static void nvme_del_cq_work_handler(struct kthread_work *work)
2677 {
2678         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2679                                                         cmdinfo.work);
2680         nvme_del_queue_end(nvmeq);
2681 }
2682
2683 static int nvme_delete_cq(struct nvme_queue *nvmeq)
2684 {
2685         return adapter_async_del_queue(nvmeq, nvme_admin_delete_cq,
2686                                                 nvme_del_cq_work_handler);
2687 }
2688
2689 static void nvme_del_sq_work_handler(struct kthread_work *work)
2690 {
2691         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2692                                                         cmdinfo.work);
2693         int status = nvmeq->cmdinfo.status;
2694
2695         if (!status)
2696                 status = nvme_delete_cq(nvmeq);
2697         if (status)
2698                 nvme_del_queue_end(nvmeq);
2699 }
2700
2701 static int nvme_delete_sq(struct nvme_queue *nvmeq)
2702 {
2703         return adapter_async_del_queue(nvmeq, nvme_admin_delete_sq,
2704                                                 nvme_del_sq_work_handler);
2705 }
2706
2707 static void nvme_del_queue_start(struct kthread_work *work)
2708 {
2709         struct nvme_queue *nvmeq = container_of(work, struct nvme_queue,
2710                                                         cmdinfo.work);
2711         if (nvme_delete_sq(nvmeq))
2712                 nvme_del_queue_end(nvmeq);
2713 }
2714
2715 static void nvme_disable_io_queues(struct nvme_dev *dev)
2716 {
2717         int i;
2718         DEFINE_KTHREAD_WORKER_ONSTACK(worker);
2719         struct nvme_delq_ctx dq;
2720         struct task_struct *kworker_task = kthread_run(kthread_worker_fn,
2721                                         &worker, "nvme%d", dev->instance);
2722
2723         if (IS_ERR(kworker_task)) {
2724                 dev_err(dev->dev,
2725                         "Failed to create queue del task\n");
2726                 for (i = dev->queue_count - 1; i > 0; i--)
2727                         nvme_disable_queue(dev, i);
2728                 return;
2729         }
2730
2731         dq.waiter = NULL;
2732         atomic_set(&dq.refcount, 0);
2733         dq.worker = &worker;
2734         for (i = dev->queue_count - 1; i > 0; i--) {
2735                 struct nvme_queue *nvmeq = dev->queues[i];
2736
2737                 if (nvme_suspend_queue(nvmeq))
2738                         continue;
2739                 nvmeq->cmdinfo.ctx = nvme_get_dq(&dq);
2740                 nvmeq->cmdinfo.worker = dq.worker;
2741                 init_kthread_work(&nvmeq->cmdinfo.work, nvme_del_queue_start);
2742                 queue_kthread_work(dq.worker, &nvmeq->cmdinfo.work);
2743         }
2744         nvme_wait_dq(&dq, dev);
2745         kthread_stop(kworker_task);
2746 }
2747
2748 /*
2749 * Remove the node from the device list and check
2750 * for whether or not we need to stop the nvme_thread.
2751 */
2752 static void nvme_dev_list_remove(struct nvme_dev *dev)
2753 {
2754         struct task_struct *tmp = NULL;
2755
2756         spin_lock(&dev_list_lock);
2757         list_del_init(&dev->node);
2758         if (list_empty(&dev_list) && !IS_ERR_OR_NULL(nvme_thread)) {
2759                 tmp = nvme_thread;
2760                 nvme_thread = NULL;
2761         }
2762         spin_unlock(&dev_list_lock);
2763
2764         if (tmp)
2765                 kthread_stop(tmp);
2766 }
2767
2768 static void nvme_freeze_queues(struct nvme_dev *dev)
2769 {
2770         struct nvme_ns *ns;
2771
2772         list_for_each_entry(ns, &dev->namespaces, list) {
2773                 blk_mq_freeze_queue_start(ns->queue);
2774
2775                 spin_lock_irq(ns->queue->queue_lock);
2776                 queue_flag_set(QUEUE_FLAG_STOPPED, ns->queue);
2777                 spin_unlock_irq(ns->queue->queue_lock);
2778
2779                 blk_mq_cancel_requeue_work(ns->queue);
2780                 blk_mq_stop_hw_queues(ns->queue);
2781         }
2782 }
2783
2784 static void nvme_unfreeze_queues(struct nvme_dev *dev)
2785 {
2786         struct nvme_ns *ns;
2787
2788         list_for_each_entry(ns, &dev->namespaces, list) {
2789                 queue_flag_clear_unlocked(QUEUE_FLAG_STOPPED, ns->queue);
2790                 blk_mq_unfreeze_queue(ns->queue);
2791                 blk_mq_start_stopped_hw_queues(ns->queue, true);
2792                 blk_mq_kick_requeue_list(ns->queue);
2793         }
2794 }
2795
2796 static void nvme_dev_shutdown(struct nvme_dev *dev)
2797 {
2798         int i;
2799         u32 csts = -1;
2800
2801         nvme_dev_list_remove(dev);
2802
2803         if (dev->bar) {
2804                 nvme_freeze_queues(dev);
2805                 csts = readl(&dev->bar->csts);
2806         }
2807         if (csts & NVME_CSTS_CFS || !(csts & NVME_CSTS_RDY)) {
2808                 for (i = dev->queue_count - 1; i >= 0; i--) {
2809                         struct nvme_queue *nvmeq = dev->queues[i];
2810                         nvme_suspend_queue(nvmeq);
2811                 }
2812         } else {
2813                 nvme_disable_io_queues(dev);
2814                 nvme_shutdown_ctrl(dev);
2815                 nvme_disable_queue(dev, 0);
2816         }
2817         nvme_dev_unmap(dev);
2818
2819         for (i = dev->queue_count - 1; i >= 0; i--)
2820                 nvme_clear_queue(dev->queues[i]);
2821 }
2822
2823 static void nvme_dev_remove(struct nvme_dev *dev)
2824 {
2825         struct nvme_ns *ns, *next;
2826
2827         list_for_each_entry_safe(ns, next, &dev->namespaces, list)
2828                 nvme_ns_remove(ns);
2829 }
2830
2831 static int nvme_setup_prp_pools(struct nvme_dev *dev)
2832 {
2833         dev->prp_page_pool = dma_pool_create("prp list page", dev->dev,
2834                                                 PAGE_SIZE, PAGE_SIZE, 0);
2835         if (!dev->prp_page_pool)
2836                 return -ENOMEM;
2837
2838         /* Optimisation for I/Os between 4k and 128k */
2839         dev->prp_small_pool = dma_pool_create("prp list 256", dev->dev,
2840                                                 256, 256, 0);
2841         if (!dev->prp_small_pool) {
2842                 dma_pool_destroy(dev->prp_page_pool);
2843                 return -ENOMEM;
2844         }
2845         return 0;
2846 }
2847
2848 static void nvme_release_prp_pools(struct nvme_dev *dev)
2849 {
2850         dma_pool_destroy(dev->prp_page_pool);
2851         dma_pool_destroy(dev->prp_small_pool);
2852 }
2853
2854 static DEFINE_IDA(nvme_instance_ida);
2855
2856 static int nvme_set_instance(struct nvme_dev *dev)
2857 {
2858         int instance, error;
2859
2860         do {
2861                 if (!ida_pre_get(&nvme_instance_ida, GFP_KERNEL))
2862                         return -ENODEV;
2863
2864                 spin_lock(&dev_list_lock);
2865                 error = ida_get_new(&nvme_instance_ida, &instance);
2866                 spin_unlock(&dev_list_lock);
2867         } while (error == -EAGAIN);
2868
2869         if (error)
2870                 return -ENODEV;
2871
2872         dev->instance = instance;
2873         return 0;
2874 }
2875
2876 static void nvme_release_instance(struct nvme_dev *dev)
2877 {
2878         spin_lock(&dev_list_lock);
2879         ida_remove(&nvme_instance_ida, dev->instance);
2880         spin_unlock(&dev_list_lock);
2881 }
2882
2883 static void nvme_free_dev(struct kref *kref)
2884 {
2885         struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2886
2887         put_device(dev->dev);
2888         put_device(dev->device);
2889         nvme_release_instance(dev);
2890         if (dev->tagset.tags)
2891                 blk_mq_free_tag_set(&dev->tagset);
2892         if (dev->admin_q)
2893                 blk_put_queue(dev->admin_q);
2894         kfree(dev->queues);
2895         kfree(dev->entry);
2896         kfree(dev);
2897 }
2898
2899 static int nvme_dev_open(struct inode *inode, struct file *f)
2900 {
2901         struct nvme_dev *dev;
2902         int instance = iminor(inode);
2903         int ret = -ENODEV;
2904
2905         spin_lock(&dev_list_lock);
2906         list_for_each_entry(dev, &dev_list, node) {
2907                 if (dev->instance == instance) {
2908                         if (!dev->admin_q) {
2909                                 ret = -EWOULDBLOCK;
2910                                 break;
2911                         }
2912                         if (!kref_get_unless_zero(&dev->kref))
2913                                 break;
2914                         f->private_data = dev;
2915                         ret = 0;
2916                         break;
2917                 }
2918         }
2919         spin_unlock(&dev_list_lock);
2920
2921         return ret;
2922 }
2923
2924 static int nvme_dev_release(struct inode *inode, struct file *f)
2925 {
2926         struct nvme_dev *dev = f->private_data;
2927         kref_put(&dev->kref, nvme_free_dev);
2928         return 0;
2929 }
2930
2931 static long nvme_dev_ioctl(struct file *f, unsigned int cmd, unsigned long arg)
2932 {
2933         struct nvme_dev *dev = f->private_data;
2934         struct nvme_ns *ns;
2935
2936         switch (cmd) {
2937         case NVME_IOCTL_ADMIN_CMD:
2938                 return nvme_user_cmd(dev, NULL, (void __user *)arg);
2939         case NVME_IOCTL_IO_CMD:
2940                 if (list_empty(&dev->namespaces))
2941                         return -ENOTTY;
2942                 ns = list_first_entry(&dev->namespaces, struct nvme_ns, list);
2943                 return nvme_user_cmd(dev, ns, (void __user *)arg);
2944         case NVME_IOCTL_RESET:
2945                 dev_warn(dev->dev, "resetting controller\n");
2946                 return nvme_reset(dev);
2947         case NVME_IOCTL_SUBSYS_RESET:
2948                 return nvme_subsys_reset(dev);
2949         default:
2950                 return -ENOTTY;
2951         }
2952 }
2953
2954 static const struct file_operations nvme_dev_fops = {
2955         .owner          = THIS_MODULE,
2956         .open           = nvme_dev_open,
2957         .release        = nvme_dev_release,
2958         .unlocked_ioctl = nvme_dev_ioctl,
2959         .compat_ioctl   = nvme_dev_ioctl,
2960 };
2961
2962 static void nvme_probe_work(struct work_struct *work)
2963 {
2964         struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
2965         bool start_thread = false;
2966         int result;
2967
2968         result = nvme_dev_map(dev);
2969         if (result)
2970                 goto out;
2971
2972         result = nvme_configure_admin_queue(dev);
2973         if (result)
2974                 goto unmap;
2975
2976         spin_lock(&dev_list_lock);
2977         if (list_empty(&dev_list) && IS_ERR_OR_NULL(nvme_thread)) {
2978                 start_thread = true;
2979                 nvme_thread = NULL;
2980         }
2981         list_add(&dev->node, &dev_list);
2982         spin_unlock(&dev_list_lock);
2983
2984         if (start_thread) {
2985                 nvme_thread = kthread_run(nvme_kthread, NULL, "nvme");
2986                 wake_up_all(&nvme_kthread_wait);
2987         } else
2988                 wait_event_killable(nvme_kthread_wait, nvme_thread);
2989
2990         if (IS_ERR_OR_NULL(nvme_thread)) {
2991                 result = nvme_thread ? PTR_ERR(nvme_thread) : -EINTR;
2992                 goto disable;
2993         }
2994
2995         nvme_init_queue(dev->queues[0], 0);
2996         result = nvme_alloc_admin_tags(dev);
2997         if (result)
2998                 goto disable;
2999
3000         result = nvme_setup_io_queues(dev);
3001         if (result)
3002                 goto free_tags;
3003
3004         dev->event_limit = 1;
3005
3006         /*
3007          * Keep the controller around but remove all namespaces if we don't have
3008          * any working I/O queue.
3009          */
3010         if (dev->online_queues < 2) {
3011                 dev_warn(dev->dev, "IO queues not created\n");
3012                 nvme_dev_remove(dev);
3013         } else {
3014                 nvme_unfreeze_queues(dev);
3015                 nvme_dev_add(dev);
3016         }
3017
3018         return;
3019
3020  free_tags:
3021         nvme_dev_remove_admin(dev);
3022         blk_put_queue(dev->admin_q);
3023         dev->admin_q = NULL;
3024         dev->queues[0]->tags = NULL;
3025  disable:
3026         nvme_disable_queue(dev, 0);
3027         nvme_dev_list_remove(dev);
3028  unmap:
3029         nvme_dev_unmap(dev);
3030  out:
3031         if (!work_busy(&dev->reset_work))
3032                 nvme_dead_ctrl(dev);
3033 }
3034
3035 static int nvme_remove_dead_ctrl(void *arg)
3036 {
3037         struct nvme_dev *dev = (struct nvme_dev *)arg;
3038         struct pci_dev *pdev = to_pci_dev(dev->dev);
3039
3040         if (pci_get_drvdata(pdev))
3041                 pci_stop_and_remove_bus_device_locked(pdev);
3042         kref_put(&dev->kref, nvme_free_dev);
3043         return 0;
3044 }
3045
3046 static void nvme_dead_ctrl(struct nvme_dev *dev)
3047 {
3048         dev_warn(dev->dev, "Device failed to resume\n");
3049         kref_get(&dev->kref);
3050         if (IS_ERR(kthread_run(nvme_remove_dead_ctrl, dev, "nvme%d",
3051                                                 dev->instance))) {
3052                 dev_err(dev->dev,
3053                         "Failed to start controller remove task\n");
3054                 kref_put(&dev->kref, nvme_free_dev);
3055         }
3056 }
3057
3058 static void nvme_reset_work(struct work_struct *ws)
3059 {
3060         struct nvme_dev *dev = container_of(ws, struct nvme_dev, reset_work);
3061         bool in_probe = work_busy(&dev->probe_work);
3062
3063         nvme_dev_shutdown(dev);
3064
3065         /* Synchronize with device probe so that work will see failure status
3066          * and exit gracefully without trying to schedule another reset */
3067         flush_work(&dev->probe_work);
3068
3069         /* Fail this device if reset occured during probe to avoid
3070          * infinite initialization loops. */
3071         if (in_probe) {
3072                 nvme_dead_ctrl(dev);
3073                 return;
3074         }
3075         /* Schedule device resume asynchronously so the reset work is available
3076          * to cleanup errors that may occur during reinitialization */
3077         schedule_work(&dev->probe_work);
3078 }
3079
3080 static int __nvme_reset(struct nvme_dev *dev)
3081 {
3082         if (work_pending(&dev->reset_work))
3083                 return -EBUSY;
3084         list_del_init(&dev->node);
3085         queue_work(nvme_workq, &dev->reset_work);
3086         return 0;
3087 }
3088
3089 static int nvme_reset(struct nvme_dev *dev)
3090 {
3091         int ret;
3092
3093         if (!dev->admin_q || blk_queue_dying(dev->admin_q))
3094                 return -ENODEV;
3095
3096         spin_lock(&dev_list_lock);
3097         ret = __nvme_reset(dev);
3098         spin_unlock(&dev_list_lock);
3099
3100         if (!ret) {
3101                 flush_work(&dev->reset_work);
3102                 flush_work(&dev->probe_work);
3103                 return 0;
3104         }
3105
3106         return ret;
3107 }
3108
3109 static ssize_t nvme_sysfs_reset(struct device *dev,
3110                                 struct device_attribute *attr, const char *buf,
3111                                 size_t count)
3112 {
3113         struct nvme_dev *ndev = dev_get_drvdata(dev);
3114         int ret;
3115
3116         ret = nvme_reset(ndev);
3117         if (ret < 0)
3118                 return ret;
3119
3120         return count;
3121 }
3122 static DEVICE_ATTR(reset_controller, S_IWUSR, NULL, nvme_sysfs_reset);
3123
3124 static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
3125 {
3126         int node, result = -ENOMEM;
3127         struct nvme_dev *dev;
3128
3129         node = dev_to_node(&pdev->dev);
3130         if (node == NUMA_NO_NODE)
3131                 set_dev_node(&pdev->dev, 0);
3132
3133         dev = kzalloc_node(sizeof(*dev), GFP_KERNEL, node);
3134         if (!dev)
3135                 return -ENOMEM;
3136         dev->entry = kzalloc_node(num_possible_cpus() * sizeof(*dev->entry),
3137                                                         GFP_KERNEL, node);
3138         if (!dev->entry)
3139                 goto free;
3140         dev->queues = kzalloc_node((num_possible_cpus() + 1) * sizeof(void *),
3141                                                         GFP_KERNEL, node);
3142         if (!dev->queues)
3143                 goto free;
3144
3145         INIT_LIST_HEAD(&dev->namespaces);
3146         INIT_WORK(&dev->reset_work, nvme_reset_work);
3147         dev->dev = get_device(&pdev->dev);
3148         pci_set_drvdata(pdev, dev);
3149         result = nvme_set_instance(dev);
3150         if (result)
3151                 goto put_pci;
3152
3153         result = nvme_setup_prp_pools(dev);
3154         if (result)
3155                 goto release;
3156
3157         kref_init(&dev->kref);
3158         dev->device = device_create(nvme_class, &pdev->dev,
3159                                 MKDEV(nvme_char_major, dev->instance),
3160                                 dev, "nvme%d", dev->instance);
3161         if (IS_ERR(dev->device)) {
3162                 result = PTR_ERR(dev->device);
3163                 goto release_pools;
3164         }
3165         get_device(dev->device);
3166         dev_set_drvdata(dev->device, dev);
3167
3168         result = device_create_file(dev->device, &dev_attr_reset_controller);
3169         if (result)
3170                 goto put_dev;
3171
3172         INIT_LIST_HEAD(&dev->node);
3173         INIT_WORK(&dev->scan_work, nvme_dev_scan);
3174         INIT_WORK(&dev->probe_work, nvme_probe_work);
3175         schedule_work(&dev->probe_work);
3176         return 0;
3177
3178  put_dev:
3179         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3180         put_device(dev->device);
3181  release_pools:
3182         nvme_release_prp_pools(dev);
3183  release:
3184         nvme_release_instance(dev);
3185  put_pci:
3186         put_device(dev->dev);
3187  free:
3188         kfree(dev->queues);
3189         kfree(dev->entry);
3190         kfree(dev);
3191         return result;
3192 }
3193
3194 static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
3195 {
3196         struct nvme_dev *dev = pci_get_drvdata(pdev);
3197
3198         if (prepare)
3199                 nvme_dev_shutdown(dev);
3200         else
3201                 schedule_work(&dev->probe_work);
3202 }
3203
3204 static void nvme_shutdown(struct pci_dev *pdev)
3205 {
3206         struct nvme_dev *dev = pci_get_drvdata(pdev);
3207         nvme_dev_shutdown(dev);
3208 }
3209
3210 static void nvme_remove(struct pci_dev *pdev)
3211 {
3212         struct nvme_dev *dev = pci_get_drvdata(pdev);
3213
3214         spin_lock(&dev_list_lock);
3215         list_del_init(&dev->node);
3216         spin_unlock(&dev_list_lock);
3217
3218         pci_set_drvdata(pdev, NULL);
3219         flush_work(&dev->probe_work);
3220         flush_work(&dev->reset_work);
3221         flush_work(&dev->scan_work);
3222         device_remove_file(dev->device, &dev_attr_reset_controller);
3223         nvme_dev_remove(dev);
3224         nvme_dev_shutdown(dev);
3225         nvme_dev_remove_admin(dev);
3226         device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
3227         nvme_free_queues(dev, 0);
3228         nvme_release_cmb(dev);
3229         nvme_release_prp_pools(dev);
3230         kref_put(&dev->kref, nvme_free_dev);
3231 }
3232
3233 /* These functions are yet to be implemented */
3234 #define nvme_error_detected NULL
3235 #define nvme_dump_registers NULL
3236 #define nvme_link_reset NULL
3237 #define nvme_slot_reset NULL
3238 #define nvme_error_resume NULL
3239
3240 #ifdef CONFIG_PM_SLEEP
3241 static int nvme_suspend(struct device *dev)
3242 {
3243         struct pci_dev *pdev = to_pci_dev(dev);
3244         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3245
3246         nvme_dev_shutdown(ndev);
3247         return 0;
3248 }
3249
3250 static int nvme_resume(struct device *dev)
3251 {
3252         struct pci_dev *pdev = to_pci_dev(dev);
3253         struct nvme_dev *ndev = pci_get_drvdata(pdev);
3254
3255         schedule_work(&ndev->probe_work);
3256         return 0;
3257 }
3258 #endif
3259
3260 static SIMPLE_DEV_PM_OPS(nvme_dev_pm_ops, nvme_suspend, nvme_resume);
3261
3262 static const struct pci_error_handlers nvme_err_handler = {
3263         .error_detected = nvme_error_detected,
3264         .mmio_enabled   = nvme_dump_registers,
3265         .link_reset     = nvme_link_reset,
3266         .slot_reset     = nvme_slot_reset,
3267         .resume         = nvme_error_resume,
3268         .reset_notify   = nvme_reset_notify,
3269 };
3270
3271 /* Move to pci_ids.h later */
3272 #define PCI_CLASS_STORAGE_EXPRESS       0x010802
3273
3274 static const struct pci_device_id nvme_id_table[] = {
3275         { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_EXPRESS, 0xffffff) },
3276         { 0, }
3277 };
3278 MODULE_DEVICE_TABLE(pci, nvme_id_table);
3279
3280 static struct pci_driver nvme_driver = {
3281         .name           = "nvme",
3282         .id_table       = nvme_id_table,
3283         .probe          = nvme_probe,
3284         .remove         = nvme_remove,
3285         .shutdown       = nvme_shutdown,
3286         .driver         = {
3287                 .pm     = &nvme_dev_pm_ops,
3288         },
3289         .err_handler    = &nvme_err_handler,
3290 };
3291
3292 static int __init nvme_init(void)
3293 {
3294         int result;
3295
3296         init_waitqueue_head(&nvme_kthread_wait);
3297
3298         nvme_workq = create_singlethread_workqueue("nvme");
3299         if (!nvme_workq)
3300                 return -ENOMEM;
3301
3302         result = register_blkdev(nvme_major, "nvme");
3303         if (result < 0)
3304                 goto kill_workq;
3305         else if (result > 0)
3306                 nvme_major = result;
3307
3308         result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3309                                                         &nvme_dev_fops);
3310         if (result < 0)
3311                 goto unregister_blkdev;
3312         else if (result > 0)
3313                 nvme_char_major = result;
3314
3315         nvme_class = class_create(THIS_MODULE, "nvme");
3316         if (IS_ERR(nvme_class)) {
3317                 result = PTR_ERR(nvme_class);
3318                 goto unregister_chrdev;
3319         }
3320
3321         result = pci_register_driver(&nvme_driver);
3322         if (result)
3323                 goto destroy_class;
3324         return 0;
3325
3326  destroy_class:
3327         class_destroy(nvme_class);
3328  unregister_chrdev:
3329         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3330  unregister_blkdev:
3331         unregister_blkdev(nvme_major, "nvme");
3332  kill_workq:
3333         destroy_workqueue(nvme_workq);
3334         return result;
3335 }
3336
3337 static void __exit nvme_exit(void)
3338 {
3339         pci_unregister_driver(&nvme_driver);
3340         unregister_blkdev(nvme_major, "nvme");
3341         destroy_workqueue(nvme_workq);
3342         class_destroy(nvme_class);
3343         __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3344         BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3345         _nvme_check_size();
3346 }
3347
3348 MODULE_AUTHOR("Matthew Wilcox <willy@linux.intel.com>");
3349 MODULE_LICENSE("GPL");
3350 MODULE_VERSION("1.0");
3351 module_init(nvme_init);
3352 module_exit(nvme_exit);