drivers/acpi/acpica/hwregs.c

   1 /*******************************************************************************
   2  *
   3  * Module Name: hwregs - Read/write access functions for the various ACPI
   4  *                       control and status registers.
   5  *
   6  ******************************************************************************/
   7
   8 /*
   9  * Copyright (C) 2000 - 2016, Intel Corp.
  10  * All rights reserved.
  11  *
  12  * Redistribution and use in source and binary forms, with or without
  13  * modification, are permitted provided that the following conditions
  14  * are met:
  15  * 1. Redistributions of source code must retain the above copyright
  16  *    notice, this list of conditions, and the following disclaimer,
  17  *    without modification.
  18  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
  19  *    substantially similar to the "NO WARRANTY" disclaimer below
  20  *    ("Disclaimer") and any redistribution must be conditioned upon
  21  *    including a substantially similar Disclaimer requirement for further
  22  *    binary redistribution.
  23  * 3. Neither the names of the above-listed copyright holders nor the names
  24  *    of any contributors may be used to endorse or promote products derived
  25  *    from this software without specific prior written permission.
  26  *
  27  * Alternatively, this software may be distributed under the terms of the
  28  * GNU General Public License ("GPL") version 2 as published by the Free
  29  * Software Foundation.
  30  *
  31  * NO WARRANTY
  32  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  33  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  34  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
  35  * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  36  * HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  37  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
  38  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
  39  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
  40  * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
  41  * IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  42  * POSSIBILITY OF SUCH DAMAGES.
  43  */
  44
  45 #include <acpi/acpi.h>
  46 #include "accommon.h"
  47 #include "acevents.h"
  48
  49 #define _COMPONENT          ACPI_HARDWARE
  50 ACPI_MODULE_NAME("hwregs")
  51
  52 #if (!ACPI_REDUCED_HARDWARE)
  53 /* Local Prototypes */
  54 static acpi_status
  55 acpi_hw_read_multiple(u32 *value,
  56                       struct acpi_generic_address *register_a,
  57                       struct acpi_generic_address *register_b);
  58
  59 static acpi_status
  60 acpi_hw_write_multiple(u32 value,
  61                        struct acpi_generic_address *register_a,
  62                        struct acpi_generic_address *register_b);
  63
  64 #endif                          /* !ACPI_REDUCED_HARDWARE */
  65
  66 /******************************************************************************
  67  *
  68  * FUNCTION:    acpi_hw_validate_register
  69  *
  70  * PARAMETERS:  reg                 - GAS register structure
  71  *              max_bit_width       - Max bit_width supported (32 or 64)
  72  *              address             - Pointer to where the gas->address
  73  *                                    is returned
  74  *
  75  * RETURN:      Status
  76  *
  77  * DESCRIPTION: Validate the contents of a GAS register. Checks the GAS
  78  *              pointer, Address, space_id, bit_width, and bit_offset.
  79  *
  80  ******************************************************************************/
  81
  82 acpi_status
  83 acpi_hw_validate_register(struct acpi_generic_address *reg,
  84                           u8 max_bit_width, u64 *address)
  85 {
  86         u8 bit_width;
  87         u8 access_width;
  88
  89         /* Must have a valid pointer to a GAS structure */
  90
  91         if (!reg) {
  92                 return (AE_BAD_PARAMETER);
  93         }
  94
  95         /*
  96          * Copy the target address. This handles possible alignment issues.
  97          * Address must not be null. A null address also indicates an optional
  98          * ACPI register that is not supported, so no error message.
  99          */
 100         ACPI_MOVE_64_TO_64(address, &reg->address);
 101         if (!(*address)) {
 102                 return (AE_BAD_ADDRESS);
 103         }
 104
 105         /* Validate the space_ID */
 106
 107         if ((reg->space_id != ACPI_ADR_SPACE_SYSTEM_MEMORY) &&
 108             (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO)) {
 109                 ACPI_ERROR((AE_INFO,
 110                             "Unsupported address space: 0x%X", reg->space_id));
 111                 return (AE_SUPPORT);
 112         }
 113
 114         /* Validate the access_width */
 115
 116         if (reg->access_width > 4) {
 117                 ACPI_ERROR((AE_INFO,
 118                             "Unsupported register access width: 0x%X",
 119                             reg->access_width));
 120                 return (AE_SUPPORT);
 121         }
 122
 123         /* Validate the bit_width, convert access_width into number of bits */
 124
 125         access_width = reg->access_width ? reg->access_width : 1;
 126         access_width = 1 << (access_width + 2);
 127         bit_width =
 128             ACPI_ROUND_UP(reg->bit_offset + reg->bit_width, access_width);
 129         if (max_bit_width < bit_width) {
 130                 ACPI_WARNING((AE_INFO,
 131                               "Requested bit width 0x%X is smaller than register bit width 0x%X",
 132                               max_bit_width, bit_width));
 133                 return (AE_SUPPORT);
 134         }
 135
 136         return (AE_OK);
 137 }
 138
 139 /******************************************************************************
 140  *
 141  * FUNCTION:    acpi_hw_read
 142  *
 143  * PARAMETERS:  value               - Where the value is returned
 144  *              reg                 - GAS register structure
 145  *
 146  * RETURN:      Status
 147  *
 148  * DESCRIPTION: Read from either memory or IO space. This is a 32-bit max
 149  *              version of acpi_read, used internally since the overhead of
 150  *              64-bit values is not needed.
 151  *
 152  * LIMITATIONS: <These limitations also apply to acpi_hw_write>
 153  *      bit_width must be exactly 8, 16, or 32.
 154  *      space_ID must be system_memory or system_IO.
 155  *      bit_offset and access_width are currently ignored, as there has
 156  *          not been a need to implement these.
 157  *
 158  ******************************************************************************/
 159
 160 acpi_status acpi_hw_read(u32 *value, struct acpi_generic_address *reg)
 161 {
 162         u64 address;
 163         u64 value64;
 164         acpi_status status;
 165
 166         ACPI_FUNCTION_NAME(hw_read);
 167
 168         /* Validate contents of the GAS register */
 169
 170         status = acpi_hw_validate_register(reg, 32, &address);
 171         if (ACPI_FAILURE(status)) {
 172                 return (status);
 173         }
 174
 175         /* Initialize entire 32-bit return value to zero */
 176
 177         *value = 0;
 178
 179         /*
 180          * Two address spaces supported: Memory or IO. PCI_Config is
 181          * not supported here because the GAS structure is insufficient
 182          */
 183         if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
 184                 status = acpi_os_read_memory((acpi_physical_address)
 185                                              address, &value64, reg->bit_width);
 186
 187                 *value = (u32)value64;
 188         } else {                /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
 189
 190                 status = acpi_hw_read_port((acpi_io_address)
 191                                            address, value, reg->bit_width);
 192         }
 193
 194         ACPI_DEBUG_PRINT((ACPI_DB_IO,
 195                           "Read:  %8.8X width %2d from %8.8X%8.8X (%s)\n",
 196                           *value, reg->bit_width, ACPI_FORMAT_UINT64(address),
 197                           acpi_ut_get_region_name(reg->space_id)));
 198
 199         return (status);
 200 }
 201
 202 /******************************************************************************
 203  *
 204  * FUNCTION:    acpi_hw_write
 205  *
 206  * PARAMETERS:  value               - Value to be written
 207  *              reg                 - GAS register structure
 208  *
 209  * RETURN:      Status
 210  *
 211  * DESCRIPTION: Write to either memory or IO space. This is a 32-bit max
 212  *              version of acpi_write, used internally since the overhead of
 213  *              64-bit values is not needed.
 214  *
 215  ******************************************************************************/
 216
 217 acpi_status acpi_hw_write(u32 value, struct acpi_generic_address *reg)
 218 {
 219         u64 address;
 220         acpi_status status;
 221
 222         ACPI_FUNCTION_NAME(hw_write);
 223
 224         /* Validate contents of the GAS register */
 225
 226         status = acpi_hw_validate_register(reg, 32, &address);
 227         if (ACPI_FAILURE(status)) {
 228                 return (status);
 229         }
 230
 231         /*
 232          * Two address spaces supported: Memory or IO. PCI_Config is
 233          * not supported here because the GAS structure is insufficient
 234          */
 235         if (reg->space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) {
 236                 status = acpi_os_write_memory((acpi_physical_address)
 237                                               address, (u64)value,
 238                                               reg->bit_width);
 239         } else {                /* ACPI_ADR_SPACE_SYSTEM_IO, validated earlier */
 240
 241                 status = acpi_hw_write_port((acpi_io_address)
 242                                             address, value, reg->bit_width);
 243         }
 244
 245         ACPI_DEBUG_PRINT((ACPI_DB_IO,
 246                           "Wrote: %8.8X width %2d   to %8.8X%8.8X (%s)\n",
 247                           value, reg->bit_width, ACPI_FORMAT_UINT64(address),
 248                           acpi_ut_get_region_name(reg->space_id)));
 249
 250         return (status);
 251 }
 252
 253 #if (!ACPI_REDUCED_HARDWARE)
 254 /*******************************************************************************
 255  *
 256  * FUNCTION:    acpi_hw_clear_acpi_status
 257  *
 258  * PARAMETERS:  None
 259  *
 260  * RETURN:      Status
 261  *
 262  * DESCRIPTION: Clears all fixed and general purpose status bits
 263  *
 264  ******************************************************************************/
 265
 266 acpi_status acpi_hw_clear_acpi_status(void)
 267 {
 268         acpi_status status;
 269         acpi_cpu_flags lock_flags = 0;
 270
 271         ACPI_FUNCTION_TRACE(hw_clear_acpi_status);
 272
 273         ACPI_DEBUG_PRINT((ACPI_DB_IO, "About to write %04X to %8.8X%8.8X\n",
 274                           ACPI_BITMASK_ALL_FIXED_STATUS,
 275                           ACPI_FORMAT_UINT64(acpi_gbl_xpm1a_status.address)));
 276
 277         lock_flags = acpi_os_acquire_lock(acpi_gbl_hardware_lock);
 278
 279         /* Clear the fixed events in PM1 A/B */
 280
 281         status = acpi_hw_register_write(ACPI_REGISTER_PM1_STATUS,
 282                                         ACPI_BITMASK_ALL_FIXED_STATUS);
 283
 284         acpi_os_release_lock(acpi_gbl_hardware_lock, lock_flags);
 285
 286         if (ACPI_FAILURE(status)) {
 287                 goto exit;
 288         }
 289
 290         /* Clear the GPE Bits in all GPE registers in all GPE blocks */
 291
 292         status = acpi_ev_walk_gpe_list(acpi_hw_clear_gpe_block, NULL);
 293
 294 exit:
 295         return_ACPI_STATUS(status);
 296 }
 297
 298 /*******************************************************************************
 299  *
 300  * FUNCTION:    acpi_hw_get_bit_register_info
 301  *
 302  * PARAMETERS:  register_id         - Index of ACPI Register to access
 303  *
 304  * RETURN:      The bitmask to be used when accessing the register
 305  *
 306  * DESCRIPTION: Map register_id into a register bitmask.
 307  *
 308  ******************************************************************************/
 309
 310 struct acpi_bit_register_info *acpi_hw_get_bit_register_info(u32 register_id)
 311 {
 312         ACPI_FUNCTION_ENTRY();
 313
 314         if (register_id > ACPI_BITREG_MAX) {
 315                 ACPI_ERROR((AE_INFO, "Invalid BitRegister ID: 0x%X",
 316                             register_id));
 317                 return (NULL);
 318         }
 319
 320         return (&acpi_gbl_bit_register_info[register_id]);
 321 }
 322
 323 /******************************************************************************
 324  *
 325  * FUNCTION:    acpi_hw_write_pm1_control
 326  *
 327  * PARAMETERS:  pm1a_control        - Value to be written to PM1A control
 328  *              pm1b_control        - Value to be written to PM1B control
 329  *
 330  * RETURN:      Status
 331  *
 332  * DESCRIPTION: Write the PM1 A/B control registers. These registers are
 333  *              different than than the PM1 A/B status and enable registers
 334  *              in that different values can be written to the A/B registers.
 335  *              Most notably, the SLP_TYP bits can be different, as per the
 336  *              values returned from the _Sx predefined methods.
 337  *
 338  ******************************************************************************/
 339
 340 acpi_status acpi_hw_write_pm1_control(u32 pm1a_control, u32 pm1b_control)
 341 {
 342         acpi_status status;
 343
 344         ACPI_FUNCTION_TRACE(hw_write_pm1_control);
 345
 346         status =
 347             acpi_hw_write(pm1a_control, &acpi_gbl_FADT.xpm1a_control_block);
 348         if (ACPI_FAILURE(status)) {
 349                 return_ACPI_STATUS(status);
 350         }
 351
 352         if (acpi_gbl_FADT.xpm1b_control_block.address) {
 353                 status =
 354                     acpi_hw_write(pm1b_control,
 355                                   &acpi_gbl_FADT.xpm1b_control_block);
 356         }
 357         return_ACPI_STATUS(status);
 358 }
 359
 360 /******************************************************************************
 361  *
 362  * FUNCTION:    acpi_hw_register_read
 363  *
 364  * PARAMETERS:  register_id         - ACPI Register ID
 365  *              return_value        - Where the register value is returned
 366  *
 367  * RETURN:      Status and the value read.
 368  *
 369  * DESCRIPTION: Read from the specified ACPI register
 370  *
 371  ******************************************************************************/
 372 acpi_status acpi_hw_register_read(u32 register_id, u32 *return_value)
 373 {
 374         u32 value = 0;
 375         acpi_status status;
 376
 377         ACPI_FUNCTION_TRACE(hw_register_read);
 378
 379         switch (register_id) {
 380         case ACPI_REGISTER_PM1_STATUS:  /* PM1 A/B: 16-bit access each */
 381
 382                 status = acpi_hw_read_multiple(&value,
 383                                                &acpi_gbl_xpm1a_status,
 384                                                &acpi_gbl_xpm1b_status);
 385                 break;
 386
 387         case ACPI_REGISTER_PM1_ENABLE:  /* PM1 A/B: 16-bit access each */
 388
 389                 status = acpi_hw_read_multiple(&value,
 390                                                &acpi_gbl_xpm1a_enable,
 391                                                &acpi_gbl_xpm1b_enable);
 392                 break;
 393
 394         case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
 395
 396                 status = acpi_hw_read_multiple(&value,
 397                                                &acpi_gbl_FADT.
 398                                                xpm1a_control_block,
 399                                                &acpi_gbl_FADT.
 400                                                xpm1b_control_block);
 401
 402                 /*
 403                  * Zero the write-only bits. From the ACPI specification, "Hardware
 404                  * Write-Only Bits": "Upon reads to registers with write-only bits,
 405                  * software masks out all write-only bits."
 406                  */
 407                 value &= ~ACPI_PM1_CONTROL_WRITEONLY_BITS;
 408                 break;
 409
 410         case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
 411
 412                 status =
 413                     acpi_hw_read(&value, &acpi_gbl_FADT.xpm2_control_block);
 414                 break;
 415
 416         case ACPI_REGISTER_PM_TIMER:    /* 32-bit access */
 417
 418                 status = acpi_hw_read(&value, &acpi_gbl_FADT.xpm_timer_block);
 419                 break;
 420
 421         case ACPI_REGISTER_SMI_COMMAND_BLOCK:   /* 8-bit access */
 422
 423                 status =
 424                     acpi_hw_read_port(acpi_gbl_FADT.smi_command, &value, 8);
 425                 break;
 426
 427         default:
 428
 429                 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
 430                 status = AE_BAD_PARAMETER;
 431                 break;
 432         }
 433
 434         if (ACPI_SUCCESS(status)) {
 435                 *return_value = value;
 436         }
 437
 438         return_ACPI_STATUS(status);
 439 }
 440
 441 /******************************************************************************
 442  *
 443  * FUNCTION:    acpi_hw_register_write
 444  *
 445  * PARAMETERS:  register_id         - ACPI Register ID
 446  *              value               - The value to write
 447  *
 448  * RETURN:      Status
 449  *
 450  * DESCRIPTION: Write to the specified ACPI register
 451  *
 452  * NOTE: In accordance with the ACPI specification, this function automatically
 453  * preserves the value of the following bits, meaning that these bits cannot be
 454  * changed via this interface:
 455  *
 456  * PM1_CONTROL[0] = SCI_EN
 457  * PM1_CONTROL[9]
 458  * PM1_STATUS[11]
 459  *
 460  * ACPI References:
 461  * 1) Hardware Ignored Bits: When software writes to a register with ignored
 462  *      bit fields, it preserves the ignored bit fields
 463  * 2) SCI_EN: OSPM always preserves this bit position
 464  *
 465  ******************************************************************************/
 466
 467 acpi_status acpi_hw_register_write(u32 register_id, u32 value)
 468 {
 469         acpi_status status;
 470         u32 read_value;
 471
 472         ACPI_FUNCTION_TRACE(hw_register_write);
 473
 474         switch (register_id) {
 475         case ACPI_REGISTER_PM1_STATUS:  /* PM1 A/B: 16-bit access each */
 476                 /*
 477                  * Handle the "ignored" bit in PM1 Status. According to the ACPI
 478                  * specification, ignored bits are to be preserved when writing.
 479                  * Normally, this would mean a read/modify/write sequence. However,
 480                  * preserving a bit in the status register is different. Writing a
 481                  * one clears the status, and writing a zero preserves the status.
 482                  * Therefore, we must always write zero to the ignored bit.
 483                  *
 484                  * This behavior is clarified in the ACPI 4.0 specification.
 485                  */
 486                 value &= ~ACPI_PM1_STATUS_PRESERVED_BITS;
 487
 488                 status = acpi_hw_write_multiple(value,
 489                                                 &acpi_gbl_xpm1a_status,
 490                                                 &acpi_gbl_xpm1b_status);
 491                 break;
 492
 493         case ACPI_REGISTER_PM1_ENABLE:  /* PM1 A/B: 16-bit access each */
 494
 495                 status = acpi_hw_write_multiple(value,
 496                                                 &acpi_gbl_xpm1a_enable,
 497                                                 &acpi_gbl_xpm1b_enable);
 498                 break;
 499
 500         case ACPI_REGISTER_PM1_CONTROL: /* PM1 A/B: 16-bit access each */
 501                 /*
 502                  * Perform a read first to preserve certain bits (per ACPI spec)
 503                  * Note: This includes SCI_EN, we never want to change this bit
 504                  */
 505                 status = acpi_hw_read_multiple(&read_value,
 506                                                &acpi_gbl_FADT.
 507                                                xpm1a_control_block,
 508                                                &acpi_gbl_FADT.
 509                                                xpm1b_control_block);
 510                 if (ACPI_FAILURE(status)) {
 511                         goto exit;
 512                 }
 513
 514                 /* Insert the bits to be preserved */
 515
 516                 ACPI_INSERT_BITS(value, ACPI_PM1_CONTROL_PRESERVED_BITS,
 517                                  read_value);
 518
 519                 /* Now we can write the data */
 520
 521                 status = acpi_hw_write_multiple(value,
 522                                                 &acpi_gbl_FADT.
 523                                                 xpm1a_control_block,
 524                                                 &acpi_gbl_FADT.
 525                                                 xpm1b_control_block);
 526                 break;
 527
 528         case ACPI_REGISTER_PM2_CONTROL: /* 8-bit access */
 529                 /*
 530                  * For control registers, all reserved bits must be preserved,
 531                  * as per the ACPI spec.
 532                  */
 533                 status =
 534                     acpi_hw_read(&read_value,
 535                                  &acpi_gbl_FADT.xpm2_control_block);
 536                 if (ACPI_FAILURE(status)) {
 537                         goto exit;
 538                 }
 539
 540                 /* Insert the bits to be preserved */
 541
 542                 ACPI_INSERT_BITS(value, ACPI_PM2_CONTROL_PRESERVED_BITS,
 543                                  read_value);
 544
 545                 status =
 546                     acpi_hw_write(value, &acpi_gbl_FADT.xpm2_control_block);
 547                 break;
 548
 549         case ACPI_REGISTER_PM_TIMER:    /* 32-bit access */
 550
 551                 status = acpi_hw_write(value, &acpi_gbl_FADT.xpm_timer_block);
 552                 break;
 553
 554         case ACPI_REGISTER_SMI_COMMAND_BLOCK:   /* 8-bit access */
 555
 556                 /* SMI_CMD is currently always in IO space */
 557
 558                 status =
 559                     acpi_hw_write_port(acpi_gbl_FADT.smi_command, value, 8);
 560                 break;
 561
 562         default:
 563
 564                 ACPI_ERROR((AE_INFO, "Unknown Register ID: 0x%X", register_id));
 565                 status = AE_BAD_PARAMETER;
 566                 break;
 567         }
 568
 569 exit:
 570         return_ACPI_STATUS(status);
 571 }
 572
 573 /******************************************************************************
 574  *
 575  * FUNCTION:    acpi_hw_read_multiple
 576  *
 577  * PARAMETERS:  value               - Where the register value is returned
 578  *              register_a           - First ACPI register (required)
 579  *              register_b           - Second ACPI register (optional)
 580  *
 581  * RETURN:      Status
 582  *
 583  * DESCRIPTION: Read from the specified two-part ACPI register (such as PM1 A/B)
 584  *
 585  ******************************************************************************/
 586
 587 static acpi_status
 588 acpi_hw_read_multiple(u32 *value,
 589                       struct acpi_generic_address *register_a,
 590                       struct acpi_generic_address *register_b)
 591 {
 592         u32 value_a = 0;
 593         u32 value_b = 0;
 594         acpi_status status;
 595
 596         /* The first register is always required */
 597
 598         status = acpi_hw_read(&value_a, register_a);
 599         if (ACPI_FAILURE(status)) {
 600                 return (status);
 601         }
 602
 603         /* Second register is optional */
 604
 605         if (register_b->address) {
 606                 status = acpi_hw_read(&value_b, register_b);
 607                 if (ACPI_FAILURE(status)) {
 608                         return (status);
 609                 }
 610         }
 611
 612         /*
 613          * OR the two return values together. No shifting or masking is necessary,
 614          * because of how the PM1 registers are defined in the ACPI specification:
 615          *
 616          * "Although the bits can be split between the two register blocks (each
 617          * register block has a unique pointer within the FADT), the bit positions
 618          * are maintained. The register block with unimplemented bits (that is,
 619          * those implemented in the other register block) always returns zeros,
 620          * and writes have no side effects"
 621          */
 622         *value = (value_a | value_b);
 623         return (AE_OK);
 624 }
 625
 626 /******************************************************************************
 627  *
 628  * FUNCTION:    acpi_hw_write_multiple
 629  *
 630  * PARAMETERS:  value               - The value to write
 631  *              register_a           - First ACPI register (required)
 632  *              register_b           - Second ACPI register (optional)
 633  *
 634  * RETURN:      Status
 635  *
 636  * DESCRIPTION: Write to the specified two-part ACPI register (such as PM1 A/B)
 637  *
 638  ******************************************************************************/
 639
 640 static acpi_status
 641 acpi_hw_write_multiple(u32 value,
 642                        struct acpi_generic_address *register_a,
 643                        struct acpi_generic_address *register_b)
 644 {
 645         acpi_status status;
 646
 647         /* The first register is always required */
 648
 649         status = acpi_hw_write(value, register_a);
 650         if (ACPI_FAILURE(status)) {
 651                 return (status);
 652         }
 653
 654         /*
 655          * Second register is optional
 656          *
 657          * No bit shifting or clearing is necessary, because of how the PM1
 658          * registers are defined in the ACPI specification:
 659          *
 660          * "Although the bits can be split between the two register blocks (each
 661          * register block has a unique pointer within the FADT), the bit positions
 662          * are maintained. The register block with unimplemented bits (that is,
 663          * those implemented in the other register block) always returns zeros,
 664          * and writes have no side effects"
 665          */
 666         if (register_b->address) {
 667                 status = acpi_hw_write(value, register_b);
 668         }
 669
 670         return (status);
 671 }
 672
 673 #endif                          /* !ACPI_REDUCED_HARDWARE */