arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "pmu.h"
  31 #include "hyperv.h"
  32
  33 #include <linux/clocksource.h>
  34 #include <linux/interrupt.h>
  35 #include <linux/kvm.h>
  36 #include <linux/fs.h>
  37 #include <linux/vmalloc.h>
  38 #include <linux/export.h>
  39 #include <linux/moduleparam.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <linux/kvm_irqfd.h>
  55 #include <linux/irqbypass.h>
  56 #include <linux/sched/stat.h>
  57 #include <linux/mem_encrypt.h>
  58
  59 #include <trace/events/kvm.h>
  60
  61 #include <asm/debugreg.h>
  62 #include <asm/msr.h>
  63 #include <asm/desc.h>
  64 #include <asm/mce.h>
  65 #include <linux/kernel_stat.h>
  66 #include <asm/fpu/internal.h> /* Ugh! */
  67 #include <asm/pvclock.h>
  68 #include <asm/div64.h>
  69 #include <asm/irq_remapping.h>
  70 #include <asm/mshyperv.h>
  71 #include <asm/hypervisor.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  96 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 139 unsigned int __read_mostly lapic_timer_advance_ns = 0;
 140 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 141 EXPORT_SYMBOL_GPL(lapic_timer_advance_ns);
 142
 143 static bool __read_mostly vector_hashing = true;
 144 module_param(vector_hashing, bool, S_IRUGO);
 145
 146 bool __read_mostly enable_vmware_backdoor = false;
 147 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 148 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 149
 150 static bool __read_mostly force_emulation_prefix = false;
 151 module_param(force_emulation_prefix, bool, S_IRUGO);
 152
 153 #define KVM_NR_SHARED_MSRS 16
 154
 155 struct kvm_shared_msrs_global {
 156         int nr;
 157         u32 msrs[KVM_NR_SHARED_MSRS];
 158 };
 159
 160 struct kvm_shared_msrs {
 161         struct user_return_notifier urn;
 162         bool registered;
 163         struct kvm_shared_msr_values {
 164                 u64 host;
 165                 u64 curr;
 166         } values[KVM_NR_SHARED_MSRS];
 167 };
 168
 169 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 170 static struct kvm_shared_msrs __percpu *shared_msrs;
 171
 172 struct kvm_stats_debugfs_item debugfs_entries[] = {
 173         { "pf_fixed", VCPU_STAT(pf_fixed) },
 174         { "pf_guest", VCPU_STAT(pf_guest) },
 175         { "tlb_flush", VCPU_STAT(tlb_flush) },
 176         { "invlpg", VCPU_STAT(invlpg) },
 177         { "exits", VCPU_STAT(exits) },
 178         { "io_exits", VCPU_STAT(io_exits) },
 179         { "mmio_exits", VCPU_STAT(mmio_exits) },
 180         { "signal_exits", VCPU_STAT(signal_exits) },
 181         { "irq_window", VCPU_STAT(irq_window_exits) },
 182         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 183         { "halt_exits", VCPU_STAT(halt_exits) },
 184         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 185         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 186         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 187         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 188         { "hypercalls", VCPU_STAT(hypercalls) },
 189         { "request_irq", VCPU_STAT(request_irq_exits) },
 190         { "irq_exits", VCPU_STAT(irq_exits) },
 191         { "host_state_reload", VCPU_STAT(host_state_reload) },
 192         { "fpu_reload", VCPU_STAT(fpu_reload) },
 193         { "insn_emulation", VCPU_STAT(insn_emulation) },
 194         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 195         { "irq_injections", VCPU_STAT(irq_injections) },
 196         { "nmi_injections", VCPU_STAT(nmi_injections) },
 197         { "req_event", VCPU_STAT(req_event) },
 198         { "l1d_flush", VCPU_STAT(l1d_flush) },
 199         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 200         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 201         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 202         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 203         { "mmu_flooded", VM_STAT(mmu_flooded) },
 204         { "mmu_recycled", VM_STAT(mmu_recycled) },
 205         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 206         { "mmu_unsync", VM_STAT(mmu_unsync) },
 207         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 208         { "largepages", VM_STAT(lpages) },
 209         { "max_mmu_page_hash_collisions",
 210                 VM_STAT(max_mmu_page_hash_collisions) },
 211         { NULL }
 212 };
 213
 214 u64 __read_mostly host_xcr0;
 215
 216 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 217
 218 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 219 {
 220         int i;
 221         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 222                 vcpu->arch.apf.gfns[i] = ~0;
 223 }
 224
 225 static void kvm_on_user_return(struct user_return_notifier *urn)
 226 {
 227         unsigned slot;
 228         struct kvm_shared_msrs *locals
 229                 = container_of(urn, struct kvm_shared_msrs, urn);
 230         struct kvm_shared_msr_values *values;
 231         unsigned long flags;
 232
 233         /*
 234          * Disabling irqs at this point since the following code could be
 235          * interrupted and executed through kvm_arch_hardware_disable()
 236          */
 237         local_irq_save(flags);
 238         if (locals->registered) {
 239                 locals->registered = false;
 240                 user_return_notifier_unregister(urn);
 241         }
 242         local_irq_restore(flags);
 243         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 244                 values = &locals->values[slot];
 245                 if (values->host != values->curr) {
 246                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 247                         values->curr = values->host;
 248                 }
 249         }
 250 }
 251
 252 static void shared_msr_update(unsigned slot, u32 msr)
 253 {
 254         u64 value;
 255         unsigned int cpu = smp_processor_id();
 256         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 257
 258         /* only read, and nobody should modify it at this time,
 259          * so don't need lock */
 260         if (slot >= shared_msrs_global.nr) {
 261                 printk(KERN_ERR "kvm: invalid MSR slot!");
 262                 return;
 263         }
 264         rdmsrl_safe(msr, &value);
 265         smsr->values[slot].host = value;
 266         smsr->values[slot].curr = value;
 267 }
 268
 269 void kvm_define_shared_msr(unsigned slot, u32 msr)
 270 {
 271         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 272         shared_msrs_global.msrs[slot] = msr;
 273         if (slot >= shared_msrs_global.nr)
 274                 shared_msrs_global.nr = slot + 1;
 275 }
 276 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 277
 278 static void kvm_shared_msr_cpu_online(void)
 279 {
 280         unsigned i;
 281
 282         for (i = 0; i < shared_msrs_global.nr; ++i)
 283                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 284 }
 285
 286 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 287 {
 288         unsigned int cpu = smp_processor_id();
 289         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 290         int err;
 291
 292         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 293                 return 0;
 294         smsr->values[slot].curr = value;
 295         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 296         if (err)
 297                 return 1;
 298
 299         if (!smsr->registered) {
 300                 smsr->urn.on_user_return = kvm_on_user_return;
 301                 user_return_notifier_register(&smsr->urn);
 302                 smsr->registered = true;
 303         }
 304         return 0;
 305 }
 306 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 307
 308 static void drop_user_return_notifiers(void)
 309 {
 310         unsigned int cpu = smp_processor_id();
 311         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 312
 313         if (smsr->registered)
 314                 kvm_on_user_return(&smsr->urn);
 315 }
 316
 317 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 318 {
 319         return vcpu->arch.apic_base;
 320 }
 321 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 322
 323 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 324 {
 325         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 326 }
 327 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 328
 329 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 330 {
 331         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 332         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 333         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 334                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 335
 336         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 337                 return 1;
 338         if (!msr_info->host_initiated) {
 339                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 340                         return 1;
 341                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 342                         return 1;
 343         }
 344
 345         kvm_lapic_set_base(vcpu, msr_info->data);
 346         return 0;
 347 }
 348 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 349
 350 asmlinkage __visible void kvm_spurious_fault(void)
 351 {
 352         /* Fault while not rebooting.  We want the trace. */
 353         BUG();
 354 }
 355 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 356
 357 #define EXCPT_BENIGN            0
 358 #define EXCPT_CONTRIBUTORY      1
 359 #define EXCPT_PF                2
 360
 361 static int exception_class(int vector)
 362 {
 363         switch (vector) {
 364         case PF_VECTOR:
 365                 return EXCPT_PF;
 366         case DE_VECTOR:
 367         case TS_VECTOR:
 368         case NP_VECTOR:
 369         case SS_VECTOR:
 370         case GP_VECTOR:
 371                 return EXCPT_CONTRIBUTORY;
 372         default:
 373                 break;
 374         }
 375         return EXCPT_BENIGN;
 376 }
 377
 378 #define EXCPT_FAULT             0
 379 #define EXCPT_TRAP              1
 380 #define EXCPT_ABORT             2
 381 #define EXCPT_INTERRUPT         3
 382
 383 static int exception_type(int vector)
 384 {
 385         unsigned int mask;
 386
 387         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 388                 return EXCPT_INTERRUPT;
 389
 390         mask = 1 << vector;
 391
 392         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 393         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 394                 return EXCPT_TRAP;
 395
 396         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 397                 return EXCPT_ABORT;
 398
 399         /* Reserved exceptions will result in fault */
 400         return EXCPT_FAULT;
 401 }
 402
 403 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 404                 unsigned nr, bool has_error, u32 error_code,
 405                 bool reinject)
 406 {
 407         u32 prev_nr;
 408         int class1, class2;
 409
 410         kvm_make_request(KVM_REQ_EVENT, vcpu);
 411
 412         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 413         queue:
 414                 if (has_error && !is_protmode(vcpu))
 415                         has_error = false;
 416                 if (reinject) {
 417                         /*
 418                          * On vmentry, vcpu->arch.exception.pending is only
 419                          * true if an event injection was blocked by
 420                          * nested_run_pending.  In that case, however,
 421                          * vcpu_enter_guest requests an immediate exit,
 422                          * and the guest shouldn't proceed far enough to
 423                          * need reinjection.
 424                          */
 425                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 426                         vcpu->arch.exception.injected = true;
 427                 } else {
 428                         vcpu->arch.exception.pending = true;
 429                         vcpu->arch.exception.injected = false;
 430                 }
 431                 vcpu->arch.exception.has_error_code = has_error;
 432                 vcpu->arch.exception.nr = nr;
 433                 vcpu->arch.exception.error_code = error_code;
 434                 return;
 435         }
 436
 437         /* to check exception */
 438         prev_nr = vcpu->arch.exception.nr;
 439         if (prev_nr == DF_VECTOR) {
 440                 /* triple fault -> shutdown */
 441                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 442                 return;
 443         }
 444         class1 = exception_class(prev_nr);
 445         class2 = exception_class(nr);
 446         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 447                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 448                 /*
 449                  * Generate double fault per SDM Table 5-5.  Set
 450                  * exception.pending = true so that the double fault
 451                  * can trigger a nested vmexit.
 452                  */
 453                 vcpu->arch.exception.pending = true;
 454                 vcpu->arch.exception.injected = false;
 455                 vcpu->arch.exception.has_error_code = true;
 456                 vcpu->arch.exception.nr = DF_VECTOR;
 457                 vcpu->arch.exception.error_code = 0;
 458         } else
 459                 /* replace previous exception with a new one in a hope
 460                    that instruction re-execution will regenerate lost
 461                    exception */
 462                 goto queue;
 463 }
 464
 465 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 466 {
 467         kvm_multiple_exception(vcpu, nr, false, 0, false);
 468 }
 469 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 470
 471 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 472 {
 473         kvm_multiple_exception(vcpu, nr, false, 0, true);
 474 }
 475 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 476
 477 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 478 {
 479         if (err)
 480                 kvm_inject_gp(vcpu, 0);
 481         else
 482                 return kvm_skip_emulated_instruction(vcpu);
 483
 484         return 1;
 485 }
 486 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 487
 488 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 489 {
 490         ++vcpu->stat.pf_guest;
 491         vcpu->arch.exception.nested_apf =
 492                 is_guest_mode(vcpu) && fault->async_page_fault;
 493         if (vcpu->arch.exception.nested_apf)
 494                 vcpu->arch.apf.nested_apf_token = fault->address;
 495         else
 496                 vcpu->arch.cr2 = fault->address;
 497         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 498 }
 499 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 500
 501 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 502 {
 503         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 504                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 505         else
 506                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 507
 508         return fault->nested_page_fault;
 509 }
 510
 511 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 512 {
 513         atomic_inc(&vcpu->arch.nmi_queued);
 514         kvm_make_request(KVM_REQ_NMI, vcpu);
 515 }
 516 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 517
 518 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 519 {
 520         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 521 }
 522 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 523
 524 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 525 {
 526         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 527 }
 528 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 529
 530 /*
 531  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 532  * a #GP and return false.
 533  */
 534 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 535 {
 536         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 537                 return true;
 538         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 539         return false;
 540 }
 541 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 542
 543 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 544 {
 545         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 546                 return true;
 547
 548         kvm_queue_exception(vcpu, UD_VECTOR);
 549         return false;
 550 }
 551 EXPORT_SYMBOL_GPL(kvm_require_dr);
 552
 553 /*
 554  * This function will be used to read from the physical memory of the currently
 555  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 556  * can read from guest physical or from the guest's guest physical memory.
 557  */
 558 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 559                             gfn_t ngfn, void *data, int offset, int len,
 560                             u32 access)
 561 {
 562         struct x86_exception exception;
 563         gfn_t real_gfn;
 564         gpa_t ngpa;
 565
 566         ngpa     = gfn_to_gpa(ngfn);
 567         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 568         if (real_gfn == UNMAPPED_GVA)
 569                 return -EFAULT;
 570
 571         real_gfn = gpa_to_gfn(real_gfn);
 572
 573         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 574 }
 575 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 576
 577 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 578                                void *data, int offset, int len, u32 access)
 579 {
 580         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 581                                        data, offset, len, access);
 582 }
 583
 584 /*
 585  * Load the pae pdptrs.  Return true is they are all valid.
 586  */
 587 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 588 {
 589         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 590         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 591         int i;
 592         int ret;
 593         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 594
 595         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 596                                       offset * sizeof(u64), sizeof(pdpte),
 597                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 598         if (ret < 0) {
 599                 ret = 0;
 600                 goto out;
 601         }
 602         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 603                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 604                     (pdpte[i] &
 605                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 606                         ret = 0;
 607                         goto out;
 608                 }
 609         }
 610         ret = 1;
 611
 612         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 613         __set_bit(VCPU_EXREG_PDPTR,
 614                   (unsigned long *)&vcpu->arch.regs_avail);
 615         __set_bit(VCPU_EXREG_PDPTR,
 616                   (unsigned long *)&vcpu->arch.regs_dirty);
 617 out:
 618
 619         return ret;
 620 }
 621 EXPORT_SYMBOL_GPL(load_pdptrs);
 622
 623 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 624 {
 625         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 626         bool changed = true;
 627         int offset;
 628         gfn_t gfn;
 629         int r;
 630
 631         if (is_long_mode(vcpu) || !is_pae(vcpu))
 632                 return false;
 633
 634         if (!test_bit(VCPU_EXREG_PDPTR,
 635                       (unsigned long *)&vcpu->arch.regs_avail))
 636                 return true;
 637
 638         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 639         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 640         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 641                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 642         if (r < 0)
 643                 goto out;
 644         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 645 out:
 646
 647         return changed;
 648 }
 649 EXPORT_SYMBOL_GPL(pdptrs_changed);
 650
 651 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 652 {
 653         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 654         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 655
 656         cr0 |= X86_CR0_ET;
 657
 658 #ifdef CONFIG_X86_64
 659         if (cr0 & 0xffffffff00000000UL)
 660                 return 1;
 661 #endif
 662
 663         cr0 &= ~CR0_RESERVED_BITS;
 664
 665         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 666                 return 1;
 667
 668         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 669                 return 1;
 670
 671         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 672 #ifdef CONFIG_X86_64
 673                 if ((vcpu->arch.efer & EFER_LME)) {
 674                         int cs_db, cs_l;
 675
 676                         if (!is_pae(vcpu))
 677                                 return 1;
 678                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 679                         if (cs_l)
 680                                 return 1;
 681                 } else
 682 #endif
 683                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 684                                                  kvm_read_cr3(vcpu)))
 685                         return 1;
 686         }
 687
 688         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 689                 return 1;
 690
 691         kvm_x86_ops->set_cr0(vcpu, cr0);
 692
 693         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 694                 kvm_clear_async_pf_completion_queue(vcpu);
 695                 kvm_async_pf_hash_reset(vcpu);
 696         }
 697
 698         if ((cr0 ^ old_cr0) & update_bits)
 699                 kvm_mmu_reset_context(vcpu);
 700
 701         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 702             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 703             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 704                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 705
 706         return 0;
 707 }
 708 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 709
 710 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 711 {
 712         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 713 }
 714 EXPORT_SYMBOL_GPL(kvm_lmsw);
 715
 716 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 717 {
 718         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 719                         !vcpu->guest_xcr0_loaded) {
 720                 /* kvm_set_xcr() also depends on this */
 721                 if (vcpu->arch.xcr0 != host_xcr0)
 722                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 723                 vcpu->guest_xcr0_loaded = 1;
 724         }
 725 }
 726
 727 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 728 {
 729         if (vcpu->guest_xcr0_loaded) {
 730                 if (vcpu->arch.xcr0 != host_xcr0)
 731                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 732                 vcpu->guest_xcr0_loaded = 0;
 733         }
 734 }
 735
 736 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 737 {
 738         u64 xcr0 = xcr;
 739         u64 old_xcr0 = vcpu->arch.xcr0;
 740         u64 valid_bits;
 741
 742         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 743         if (index != XCR_XFEATURE_ENABLED_MASK)
 744                 return 1;
 745         if (!(xcr0 & XFEATURE_MASK_FP))
 746                 return 1;
 747         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 748                 return 1;
 749
 750         /*
 751          * Do not allow the guest to set bits that we do not support
 752          * saving.  However, xcr0 bit 0 is always set, even if the
 753          * emulated CPU does not support XSAVE (see fx_init).
 754          */
 755         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 756         if (xcr0 & ~valid_bits)
 757                 return 1;
 758
 759         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 760             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 761                 return 1;
 762
 763         if (xcr0 & XFEATURE_MASK_AVX512) {
 764                 if (!(xcr0 & XFEATURE_MASK_YMM))
 765                         return 1;
 766                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 767                         return 1;
 768         }
 769         vcpu->arch.xcr0 = xcr0;
 770
 771         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 772                 kvm_update_cpuid(vcpu);
 773         return 0;
 774 }
 775
 776 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 777 {
 778         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 779             __kvm_set_xcr(vcpu, index, xcr)) {
 780                 kvm_inject_gp(vcpu, 0);
 781                 return 1;
 782         }
 783         return 0;
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 786
 787 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 788 {
 789         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 790         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 791                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 792
 793         if (cr4 & CR4_RESERVED_BITS)
 794                 return 1;
 795
 796         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 797                 return 1;
 798
 799         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 800                 return 1;
 801
 802         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 803                 return 1;
 804
 805         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 806                 return 1;
 807
 808         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 809                 return 1;
 810
 811         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 812                 return 1;
 813
 814         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 815                 return 1;
 816
 817         if (is_long_mode(vcpu)) {
 818                 if (!(cr4 & X86_CR4_PAE))
 819                         return 1;
 820         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 821                    && ((cr4 ^ old_cr4) & pdptr_bits)
 822                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 823                                    kvm_read_cr3(vcpu)))
 824                 return 1;
 825
 826         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 827                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 828                         return 1;
 829
 830                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 831                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 832                         return 1;
 833         }
 834
 835         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 836                 return 1;
 837
 838         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 839             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 840                 kvm_mmu_reset_context(vcpu);
 841
 842         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 843                 kvm_update_cpuid(vcpu);
 844
 845         return 0;
 846 }
 847 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 848
 849 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 850 {
 851         bool skip_tlb_flush = false;
 852 #ifdef CONFIG_X86_64
 853         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 854
 855         if (pcid_enabled) {
 856                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 857                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 858         }
 859 #endif
 860
 861         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 862                 if (!skip_tlb_flush) {
 863                         kvm_mmu_sync_roots(vcpu);
 864                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 865                 }
 866                 return 0;
 867         }
 868
 869         if (is_long_mode(vcpu) &&
 870             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 871                 return 1;
 872         else if (is_pae(vcpu) && is_paging(vcpu) &&
 873                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 874                 return 1;
 875
 876         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 877         vcpu->arch.cr3 = cr3;
 878         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 879
 880         return 0;
 881 }
 882 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 883
 884 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 885 {
 886         if (cr8 & CR8_RESERVED_BITS)
 887                 return 1;
 888         if (lapic_in_kernel(vcpu))
 889                 kvm_lapic_set_tpr(vcpu, cr8);
 890         else
 891                 vcpu->arch.cr8 = cr8;
 892         return 0;
 893 }
 894 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 895
 896 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 897 {
 898         if (lapic_in_kernel(vcpu))
 899                 return kvm_lapic_get_cr8(vcpu);
 900         else
 901                 return vcpu->arch.cr8;
 902 }
 903 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 904
 905 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 906 {
 907         int i;
 908
 909         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 910                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 911                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 912                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 913         }
 914 }
 915
 916 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 917 {
 918         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 919                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 920 }
 921
 922 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 923 {
 924         unsigned long dr7;
 925
 926         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 927                 dr7 = vcpu->arch.guest_debug_dr7;
 928         else
 929                 dr7 = vcpu->arch.dr7;
 930         kvm_x86_ops->set_dr7(vcpu, dr7);
 931         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 932         if (dr7 & DR7_BP_EN_MASK)
 933                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 934 }
 935
 936 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 937 {
 938         u64 fixed = DR6_FIXED_1;
 939
 940         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
 941                 fixed |= DR6_RTM;
 942         return fixed;
 943 }
 944
 945 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 946 {
 947         switch (dr) {
 948         case 0 ... 3:
 949                 vcpu->arch.db[dr] = val;
 950                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 951                         vcpu->arch.eff_db[dr] = val;
 952                 break;
 953         case 4:
 954                 /* fall through */
 955         case 6:
 956                 if (val & 0xffffffff00000000ULL)
 957                         return -1; /* #GP */
 958                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 959                 kvm_update_dr6(vcpu);
 960                 break;
 961         case 5:
 962                 /* fall through */
 963         default: /* 7 */
 964                 if (val & 0xffffffff00000000ULL)
 965                         return -1; /* #GP */
 966                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 967                 kvm_update_dr7(vcpu);
 968                 break;
 969         }
 970
 971         return 0;
 972 }
 973
 974 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 975 {
 976         if (__kvm_set_dr(vcpu, dr, val)) {
 977                 kvm_inject_gp(vcpu, 0);
 978                 return 1;
 979         }
 980         return 0;
 981 }
 982 EXPORT_SYMBOL_GPL(kvm_set_dr);
 983
 984 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 985 {
 986         switch (dr) {
 987         case 0 ... 3:
 988                 *val = vcpu->arch.db[dr];
 989                 break;
 990         case 4:
 991                 /* fall through */
 992         case 6:
 993                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 994                         *val = vcpu->arch.dr6;
 995                 else
 996                         *val = kvm_x86_ops->get_dr6(vcpu);
 997                 break;
 998         case 5:
 999                 /* fall through */
1000         default: /* 7 */
1001                 *val = vcpu->arch.dr7;
1002                 break;
1003         }
1004         return 0;
1005 }
1006 EXPORT_SYMBOL_GPL(kvm_get_dr);
1007
1008 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1009 {
1010         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
1011         u64 data;
1012         int err;
1013
1014         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1015         if (err)
1016                 return err;
1017         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
1018         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
1019         return err;
1020 }
1021 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1022
1023 /*
1024  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1025  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1026  *
1027  * This list is modified at module load time to reflect the
1028  * capabilities of the host cpu. This capabilities test skips MSRs that are
1029  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1030  * may depend on host virtualization features rather than host cpu features.
1031  */
1032
1033 static u32 msrs_to_save[] = {
1034         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1035         MSR_STAR,
1036 #ifdef CONFIG_X86_64
1037         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1038 #endif
1039         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1040         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1041         MSR_IA32_SPEC_CTRL, MSR_IA32_ARCH_CAPABILITIES
1042 };
1043
1044 static unsigned num_msrs_to_save;
1045
1046 static u32 emulated_msrs[] = {
1047         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1048         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1049         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1050         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1051         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1052         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1053         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1054         HV_X64_MSR_RESET,
1055         HV_X64_MSR_VP_INDEX,
1056         HV_X64_MSR_VP_RUNTIME,
1057         HV_X64_MSR_SCONTROL,
1058         HV_X64_MSR_STIMER0_CONFIG,
1059         HV_X64_MSR_VP_ASSIST_PAGE,
1060         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1061         HV_X64_MSR_TSC_EMULATION_STATUS,
1062
1063         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1064         MSR_KVM_PV_EOI_EN,
1065
1066         MSR_IA32_TSC_ADJUST,
1067         MSR_IA32_TSCDEADLINE,
1068         MSR_IA32_MISC_ENABLE,
1069         MSR_IA32_MCG_STATUS,
1070         MSR_IA32_MCG_CTL,
1071         MSR_IA32_MCG_EXT_CTL,
1072         MSR_IA32_SMBASE,
1073         MSR_SMI_COUNT,
1074         MSR_PLATFORM_INFO,
1075         MSR_MISC_FEATURES_ENABLES,
1076         MSR_AMD64_VIRT_SPEC_CTRL,
1077 };
1078
1079 static unsigned num_emulated_msrs;
1080
1081 /*
1082  * List of msr numbers which are used to expose MSR-based features that
1083  * can be used by a hypervisor to validate requested CPU features.
1084  */
1085 static u32 msr_based_features[] = {
1086         MSR_IA32_VMX_BASIC,
1087         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1088         MSR_IA32_VMX_PINBASED_CTLS,
1089         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1090         MSR_IA32_VMX_PROCBASED_CTLS,
1091         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1092         MSR_IA32_VMX_EXIT_CTLS,
1093         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1094         MSR_IA32_VMX_ENTRY_CTLS,
1095         MSR_IA32_VMX_MISC,
1096         MSR_IA32_VMX_CR0_FIXED0,
1097         MSR_IA32_VMX_CR0_FIXED1,
1098         MSR_IA32_VMX_CR4_FIXED0,
1099         MSR_IA32_VMX_CR4_FIXED1,
1100         MSR_IA32_VMX_VMCS_ENUM,
1101         MSR_IA32_VMX_PROCBASED_CTLS2,
1102         MSR_IA32_VMX_EPT_VPID_CAP,
1103         MSR_IA32_VMX_VMFUNC,
1104
1105         MSR_F10H_DECFG,
1106         MSR_IA32_UCODE_REV,
1107         MSR_IA32_ARCH_CAPABILITIES,
1108 };
1109
1110 static unsigned int num_msr_based_features;
1111
1112 u64 kvm_get_arch_capabilities(void)
1113 {
1114         u64 data;
1115
1116         rdmsrl_safe(MSR_IA32_ARCH_CAPABILITIES, &data);
1117
1118         /*
1119          * If we're doing cache flushes (either "always" or "cond")
1120          * we will do one whenever the guest does a vmlaunch/vmresume.
1121          * If an outer hypervisor is doing the cache flush for us
1122          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1123          * capability to the guest too, and if EPT is disabled we're not
1124          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1125          * require a nested hypervisor to do a flush of its own.
1126          */
1127         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1128                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1129
1130         return data;
1131 }
1132 EXPORT_SYMBOL_GPL(kvm_get_arch_capabilities);
1133
1134 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1135 {
1136         switch (msr->index) {
1137         case MSR_IA32_ARCH_CAPABILITIES:
1138                 msr->data = kvm_get_arch_capabilities();
1139                 break;
1140         case MSR_IA32_UCODE_REV:
1141                 rdmsrl_safe(msr->index, &msr->data);
1142                 break;
1143         default:
1144                 if (kvm_x86_ops->get_msr_feature(msr))
1145                         return 1;
1146         }
1147         return 0;
1148 }
1149
1150 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1151 {
1152         struct kvm_msr_entry msr;
1153         int r;
1154
1155         msr.index = index;
1156         r = kvm_get_msr_feature(&msr);
1157         if (r)
1158                 return r;
1159
1160         *data = msr.data;
1161
1162         return 0;
1163 }
1164
1165 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1166 {
1167         if (efer & efer_reserved_bits)
1168                 return false;
1169
1170         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1171                         return false;
1172
1173         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1174                         return false;
1175
1176         return true;
1177 }
1178 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1179
1180 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
1181 {
1182         u64 old_efer = vcpu->arch.efer;
1183
1184         if (!kvm_valid_efer(vcpu, efer))
1185                 return 1;
1186
1187         if (is_paging(vcpu)
1188             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1189                 return 1;
1190
1191         efer &= ~EFER_LMA;
1192         efer |= vcpu->arch.efer & EFER_LMA;
1193
1194         kvm_x86_ops->set_efer(vcpu, efer);
1195
1196         /* Update reserved bits */
1197         if ((efer ^ old_efer) & EFER_NX)
1198                 kvm_mmu_reset_context(vcpu);
1199
1200         return 0;
1201 }
1202
1203 void kvm_enable_efer_bits(u64 mask)
1204 {
1205        efer_reserved_bits &= ~mask;
1206 }
1207 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1208
1209 /*
1210  * Writes msr value into into the appropriate "register".
1211  * Returns 0 on success, non-0 otherwise.
1212  * Assumes vcpu_load() was already called.
1213  */
1214 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1215 {
1216         switch (msr->index) {
1217         case MSR_FS_BASE:
1218         case MSR_GS_BASE:
1219         case MSR_KERNEL_GS_BASE:
1220         case MSR_CSTAR:
1221         case MSR_LSTAR:
1222                 if (is_noncanonical_address(msr->data, vcpu))
1223                         return 1;
1224                 break;
1225         case MSR_IA32_SYSENTER_EIP:
1226         case MSR_IA32_SYSENTER_ESP:
1227                 /*
1228                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1229                  * non-canonical address is written on Intel but not on
1230                  * AMD (which ignores the top 32-bits, because it does
1231                  * not implement 64-bit SYSENTER).
1232                  *
1233                  * 64-bit code should hence be able to write a non-canonical
1234                  * value on AMD.  Making the address canonical ensures that
1235                  * vmentry does not fail on Intel after writing a non-canonical
1236                  * value, and that something deterministic happens if the guest
1237                  * invokes 64-bit SYSENTER.
1238                  */
1239                 msr->data = get_canonical(msr->data, vcpu_virt_addr_bits(vcpu));
1240         }
1241         return kvm_x86_ops->set_msr(vcpu, msr);
1242 }
1243 EXPORT_SYMBOL_GPL(kvm_set_msr);
1244
1245 /*
1246  * Adapt set_msr() to msr_io()'s calling convention
1247  */
1248 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1249 {
1250         struct msr_data msr;
1251         int r;
1252
1253         msr.index = index;
1254         msr.host_initiated = true;
1255         r = kvm_get_msr(vcpu, &msr);
1256         if (r)
1257                 return r;
1258
1259         *data = msr.data;
1260         return 0;
1261 }
1262
1263 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1264 {
1265         struct msr_data msr;
1266
1267         msr.data = *data;
1268         msr.index = index;
1269         msr.host_initiated = true;
1270         return kvm_set_msr(vcpu, &msr);
1271 }
1272
1273 #ifdef CONFIG_X86_64
1274 struct pvclock_gtod_data {
1275         seqcount_t      seq;
1276
1277         struct { /* extract of a clocksource struct */
1278                 int vclock_mode;
1279                 u64     cycle_last;
1280                 u64     mask;
1281                 u32     mult;
1282                 u32     shift;
1283         } clock;
1284
1285         u64             boot_ns;
1286         u64             nsec_base;
1287         u64             wall_time_sec;
1288 };
1289
1290 static struct pvclock_gtod_data pvclock_gtod_data;
1291
1292 static void update_pvclock_gtod(struct timekeeper *tk)
1293 {
1294         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1295         u64 boot_ns;
1296
1297         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1298
1299         write_seqcount_begin(&vdata->seq);
1300
1301         /* copy pvclock gtod data */
1302         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1303         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1304         vdata->clock.mask               = tk->tkr_mono.mask;
1305         vdata->clock.mult               = tk->tkr_mono.mult;
1306         vdata->clock.shift              = tk->tkr_mono.shift;
1307
1308         vdata->boot_ns                  = boot_ns;
1309         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1310
1311         vdata->wall_time_sec            = tk->xtime_sec;
1312
1313         write_seqcount_end(&vdata->seq);
1314 }
1315 #endif
1316
1317 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1318 {
1319         /*
1320          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1321          * vcpu_enter_guest.  This function is only called from
1322          * the physical CPU that is running vcpu.
1323          */
1324         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1325 }
1326
1327 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1328 {
1329         int version;
1330         int r;
1331         struct pvclock_wall_clock wc;
1332         struct timespec64 boot;
1333
1334         if (!wall_clock)
1335                 return;
1336
1337         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1338         if (r)
1339                 return;
1340
1341         if (version & 1)
1342                 ++version;  /* first time write, random junk */
1343
1344         ++version;
1345
1346         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1347                 return;
1348
1349         /*
1350          * The guest calculates current wall clock time by adding
1351          * system time (updated by kvm_guest_time_update below) to the
1352          * wall clock specified here.  guest system time equals host
1353          * system time for us, thus we must fill in host boot time here.
1354          */
1355         getboottime64(&boot);
1356
1357         if (kvm->arch.kvmclock_offset) {
1358                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1359                 boot = timespec64_sub(boot, ts);
1360         }
1361         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1362         wc.nsec = boot.tv_nsec;
1363         wc.version = version;
1364
1365         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1366
1367         version++;
1368         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1369 }
1370
1371 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1372 {
1373         do_shl32_div32(dividend, divisor);
1374         return dividend;
1375 }
1376
1377 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1378                                s8 *pshift, u32 *pmultiplier)
1379 {
1380         uint64_t scaled64;
1381         int32_t  shift = 0;
1382         uint64_t tps64;
1383         uint32_t tps32;
1384
1385         tps64 = base_hz;
1386         scaled64 = scaled_hz;
1387         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1388                 tps64 >>= 1;
1389                 shift--;
1390         }
1391
1392         tps32 = (uint32_t)tps64;
1393         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1394                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1395                         scaled64 >>= 1;
1396                 else
1397                         tps32 <<= 1;
1398                 shift++;
1399         }
1400
1401         *pshift = shift;
1402         *pmultiplier = div_frac(scaled64, tps32);
1403
1404         pr_debug("%s: base_hz %llu => %llu, shift %d, mul %u\n",
1405                  __func__, base_hz, scaled_hz, shift, *pmultiplier);
1406 }
1407
1408 #ifdef CONFIG_X86_64
1409 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1410 #endif
1411
1412 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1413 static unsigned long max_tsc_khz;
1414
1415 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1416 {
1417         u64 v = (u64)khz * (1000000 + ppm);
1418         do_div(v, 1000000);
1419         return v;
1420 }
1421
1422 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1423 {
1424         u64 ratio;
1425
1426         /* Guest TSC same frequency as host TSC? */
1427         if (!scale) {
1428                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1429                 return 0;
1430         }
1431
1432         /* TSC scaling supported? */
1433         if (!kvm_has_tsc_control) {
1434                 if (user_tsc_khz > tsc_khz) {
1435                         vcpu->arch.tsc_catchup = 1;
1436                         vcpu->arch.tsc_always_catchup = 1;
1437                         return 0;
1438                 } else {
1439                         WARN(1, "user requested TSC rate below hardware speed\n");
1440                         return -1;
1441                 }
1442         }
1443
1444         /* TSC scaling required  - calculate ratio */
1445         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1446                                 user_tsc_khz, tsc_khz);
1447
1448         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1449                 WARN_ONCE(1, "Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1450                           user_tsc_khz);
1451                 return -1;
1452         }
1453
1454         vcpu->arch.tsc_scaling_ratio = ratio;
1455         return 0;
1456 }
1457
1458 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1459 {
1460         u32 thresh_lo, thresh_hi;
1461         int use_scaling = 0;
1462
1463         /* tsc_khz can be zero if TSC calibration fails */
1464         if (user_tsc_khz == 0) {
1465                 /* set tsc_scaling_ratio to a safe value */
1466                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1467                 return -1;
1468         }
1469
1470         /* Compute a scale to convert nanoseconds in TSC cycles */
1471         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1472                            &vcpu->arch.virtual_tsc_shift,
1473                            &vcpu->arch.virtual_tsc_mult);
1474         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1475
1476         /*
1477          * Compute the variation in TSC rate which is acceptable
1478          * within the range of tolerance and decide if the
1479          * rate being applied is within that bounds of the hardware
1480          * rate.  If so, no scaling or compensation need be done.
1481          */
1482         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1483         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1484         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1485                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1486                 use_scaling = 1;
1487         }
1488         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1489 }
1490
1491 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1492 {
1493         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1494                                       vcpu->arch.virtual_tsc_mult,
1495                                       vcpu->arch.virtual_tsc_shift);
1496         tsc += vcpu->arch.this_tsc_write;
1497         return tsc;
1498 }
1499
1500 static inline int gtod_is_based_on_tsc(int mode)
1501 {
1502         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1503 }
1504
1505 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1506 {
1507 #ifdef CONFIG_X86_64
1508         bool vcpus_matched;
1509         struct kvm_arch *ka = &vcpu->kvm->arch;
1510         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1511
1512         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1513                          atomic_read(&vcpu->kvm->online_vcpus));
1514
1515         /*
1516          * Once the masterclock is enabled, always perform request in
1517          * order to update it.
1518          *
1519          * In order to enable masterclock, the host clocksource must be TSC
1520          * and the vcpus need to have matched TSCs.  When that happens,
1521          * perform request to enable masterclock.
1522          */
1523         if (ka->use_master_clock ||
1524             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1525                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1526
1527         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1528                             atomic_read(&vcpu->kvm->online_vcpus),
1529                             ka->use_master_clock, gtod->clock.vclock_mode);
1530 #endif
1531 }
1532
1533 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1534 {
1535         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1536         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1537 }
1538
1539 /*
1540  * Multiply tsc by a fixed point number represented by ratio.
1541  *
1542  * The most significant 64-N bits (mult) of ratio represent the
1543  * integral part of the fixed point number; the remaining N bits
1544  * (frac) represent the fractional part, ie. ratio represents a fixed
1545  * point number (mult + frac * 2^(-N)).
1546  *
1547  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1548  */
1549 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1550 {
1551         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1552 }
1553
1554 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1555 {
1556         u64 _tsc = tsc;
1557         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1558
1559         if (ratio != kvm_default_tsc_scaling_ratio)
1560                 _tsc = __scale_tsc(ratio, tsc);
1561
1562         return _tsc;
1563 }
1564 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1565
1566 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1567 {
1568         u64 tsc;
1569
1570         tsc = kvm_scale_tsc(vcpu, rdtsc());
1571
1572         return target_tsc - tsc;
1573 }
1574
1575 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1576 {
1577         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1578
1579         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1580 }
1581 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1582
1583 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1584 {
1585         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1586         vcpu->arch.tsc_offset = offset;
1587 }
1588
1589 static inline bool kvm_check_tsc_unstable(void)
1590 {
1591 #ifdef CONFIG_X86_64
1592         /*
1593          * TSC is marked unstable when we're running on Hyper-V,
1594          * 'TSC page' clocksource is good.
1595          */
1596         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1597                 return false;
1598 #endif
1599         return check_tsc_unstable();
1600 }
1601
1602 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1603 {
1604         struct kvm *kvm = vcpu->kvm;
1605         u64 offset, ns, elapsed;
1606         unsigned long flags;
1607         bool matched;
1608         bool already_matched;
1609         u64 data = msr->data;
1610         bool synchronizing = false;
1611
1612         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1613         offset = kvm_compute_tsc_offset(vcpu, data);
1614         ns = ktime_get_boot_ns();
1615         elapsed = ns - kvm->arch.last_tsc_nsec;
1616
1617         if (vcpu->arch.virtual_tsc_khz) {
1618                 if (data == 0 && msr->host_initiated) {
1619                         /*
1620                          * detection of vcpu initialization -- need to sync
1621                          * with other vCPUs. This particularly helps to keep
1622                          * kvm_clock stable after CPU hotplug
1623                          */
1624                         synchronizing = true;
1625                 } else {
1626                         u64 tsc_exp = kvm->arch.last_tsc_write +
1627                                                 nsec_to_cycles(vcpu, elapsed);
1628                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1629                         /*
1630                          * Special case: TSC write with a small delta (1 second)
1631                          * of virtual cycle time against real time is
1632                          * interpreted as an attempt to synchronize the CPU.
1633                          */
1634                         synchronizing = data < tsc_exp + tsc_hz &&
1635                                         data + tsc_hz > tsc_exp;
1636                 }
1637         }
1638
1639         /*
1640          * For a reliable TSC, we can match TSC offsets, and for an unstable
1641          * TSC, we add elapsed time in this computation.  We could let the
1642          * compensation code attempt to catch up if we fall behind, but
1643          * it's better to try to match offsets from the beginning.
1644          */
1645         if (synchronizing &&
1646             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1647                 if (!kvm_check_tsc_unstable()) {
1648                         offset = kvm->arch.cur_tsc_offset;
1649                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1650                 } else {
1651                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1652                         data += delta;
1653                         offset = kvm_compute_tsc_offset(vcpu, data);
1654                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1655                 }
1656                 matched = true;
1657                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1658         } else {
1659                 /*
1660                  * We split periods of matched TSC writes into generations.
1661                  * For each generation, we track the original measured
1662                  * nanosecond time, offset, and write, so if TSCs are in
1663                  * sync, we can match exact offset, and if not, we can match
1664                  * exact software computation in compute_guest_tsc()
1665                  *
1666                  * These values are tracked in kvm->arch.cur_xxx variables.
1667                  */
1668                 kvm->arch.cur_tsc_generation++;
1669                 kvm->arch.cur_tsc_nsec = ns;
1670                 kvm->arch.cur_tsc_write = data;
1671                 kvm->arch.cur_tsc_offset = offset;
1672                 matched = false;
1673                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1674                          kvm->arch.cur_tsc_generation, data);
1675         }
1676
1677         /*
1678          * We also track th most recent recorded KHZ, write and time to
1679          * allow the matching interval to be extended at each write.
1680          */
1681         kvm->arch.last_tsc_nsec = ns;
1682         kvm->arch.last_tsc_write = data;
1683         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1684
1685         vcpu->arch.last_guest_tsc = data;
1686
1687         /* Keep track of which generation this VCPU has synchronized to */
1688         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1689         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1690         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1691
1692         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1693                 update_ia32_tsc_adjust_msr(vcpu, offset);
1694
1695         kvm_vcpu_write_tsc_offset(vcpu, offset);
1696         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1697
1698         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1699         if (!matched) {
1700                 kvm->arch.nr_vcpus_matched_tsc = 0;
1701         } else if (!already_matched) {
1702                 kvm->arch.nr_vcpus_matched_tsc++;
1703         }
1704
1705         kvm_track_tsc_matching(vcpu);
1706         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1707 }
1708
1709 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1710
1711 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1712                                            s64 adjustment)
1713 {
1714         kvm_vcpu_write_tsc_offset(vcpu, vcpu->arch.tsc_offset + adjustment);
1715 }
1716
1717 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1718 {
1719         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1720                 WARN_ON(adjustment < 0);
1721         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1722         adjust_tsc_offset_guest(vcpu, adjustment);
1723 }
1724
1725 #ifdef CONFIG_X86_64
1726
1727 static u64 read_tsc(void)
1728 {
1729         u64 ret = (u64)rdtsc_ordered();
1730         u64 last = pvclock_gtod_data.clock.cycle_last;
1731
1732         if (likely(ret >= last))
1733                 return ret;
1734
1735         /*
1736          * GCC likes to generate cmov here, but this branch is extremely
1737          * predictable (it's just a function of time and the likely is
1738          * very likely) and there's a data dependence, so force GCC
1739          * to generate a branch instead.  I don't barrier() because
1740          * we don't actually need a barrier, and if this function
1741          * ever gets inlined it will generate worse code.
1742          */
1743         asm volatile ("");
1744         return last;
1745 }
1746
1747 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
1748 {
1749         long v;
1750         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1751         u64 tsc_pg_val;
1752
1753         switch (gtod->clock.vclock_mode) {
1754         case VCLOCK_HVCLOCK:
1755                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
1756                                                   tsc_timestamp);
1757                 if (tsc_pg_val != U64_MAX) {
1758                         /* TSC page valid */
1759                         *mode = VCLOCK_HVCLOCK;
1760                         v = (tsc_pg_val - gtod->clock.cycle_last) &
1761                                 gtod->clock.mask;
1762                 } else {
1763                         /* TSC page invalid */
1764                         *mode = VCLOCK_NONE;
1765                 }
1766                 break;
1767         case VCLOCK_TSC:
1768                 *mode = VCLOCK_TSC;
1769                 *tsc_timestamp = read_tsc();
1770                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
1771                         gtod->clock.mask;
1772                 break;
1773         default:
1774                 *mode = VCLOCK_NONE;
1775         }
1776
1777         if (*mode == VCLOCK_NONE)
1778                 *tsc_timestamp = v = 0;
1779
1780         return v * gtod->clock.mult;
1781 }
1782
1783 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
1784 {
1785         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1786         unsigned long seq;
1787         int mode;
1788         u64 ns;
1789
1790         do {
1791                 seq = read_seqcount_begin(&gtod->seq);
1792                 ns = gtod->nsec_base;
1793                 ns += vgettsc(tsc_timestamp, &mode);
1794                 ns >>= gtod->clock.shift;
1795                 ns += gtod->boot_ns;
1796         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1797         *t = ns;
1798
1799         return mode;
1800 }
1801
1802 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
1803 {
1804         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1805         unsigned long seq;
1806         int mode;
1807         u64 ns;
1808
1809         do {
1810                 seq = read_seqcount_begin(&gtod->seq);
1811                 ts->tv_sec = gtod->wall_time_sec;
1812                 ns = gtod->nsec_base;
1813                 ns += vgettsc(tsc_timestamp, &mode);
1814                 ns >>= gtod->clock.shift;
1815         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1816
1817         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
1818         ts->tv_nsec = ns;
1819
1820         return mode;
1821 }
1822
1823 /* returns true if host is using TSC based clocksource */
1824 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
1825 {
1826         /* checked again under seqlock below */
1827         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1828                 return false;
1829
1830         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
1831                                                       tsc_timestamp));
1832 }
1833
1834 /* returns true if host is using TSC based clocksource */
1835 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
1836                                            u64 *tsc_timestamp)
1837 {
1838         /* checked again under seqlock below */
1839         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
1840                 return false;
1841
1842         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
1843 }
1844 #endif
1845
1846 /*
1847  *
1848  * Assuming a stable TSC across physical CPUS, and a stable TSC
1849  * across virtual CPUs, the following condition is possible.
1850  * Each numbered line represents an event visible to both
1851  * CPUs at the next numbered event.
1852  *
1853  * "timespecX" represents host monotonic time. "tscX" represents
1854  * RDTSC value.
1855  *
1856  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1857  *
1858  * 1.  read timespec0,tsc0
1859  * 2.                                   | timespec1 = timespec0 + N
1860  *                                      | tsc1 = tsc0 + M
1861  * 3. transition to guest               | transition to guest
1862  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1863  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1864  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1865  *
1866  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1867  *
1868  *      - ret0 < ret1
1869  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1870  *              ...
1871  *      - 0 < N - M => M < N
1872  *
1873  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1874  * always the case (the difference between two distinct xtime instances
1875  * might be smaller then the difference between corresponding TSC reads,
1876  * when updating guest vcpus pvclock areas).
1877  *
1878  * To avoid that problem, do not allow visibility of distinct
1879  * system_timestamp/tsc_timestamp values simultaneously: use a master
1880  * copy of host monotonic time values. Update that master copy
1881  * in lockstep.
1882  *
1883  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1884  *
1885  */
1886
1887 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1888 {
1889 #ifdef CONFIG_X86_64
1890         struct kvm_arch *ka = &kvm->arch;
1891         int vclock_mode;
1892         bool host_tsc_clocksource, vcpus_matched;
1893
1894         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1895                         atomic_read(&kvm->online_vcpus));
1896
1897         /*
1898          * If the host uses TSC clock, then passthrough TSC as stable
1899          * to the guest.
1900          */
1901         host_tsc_clocksource = kvm_get_time_and_clockread(
1902                                         &ka->master_kernel_ns,
1903                                         &ka->master_cycle_now);
1904
1905         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1906                                 && !ka->backwards_tsc_observed
1907                                 && !ka->boot_vcpu_runs_old_kvmclock;
1908
1909         if (ka->use_master_clock)
1910                 atomic_set(&kvm_guest_has_master_clock, 1);
1911
1912         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1913         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1914                                         vcpus_matched);
1915 #endif
1916 }
1917
1918 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
1919 {
1920         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
1921 }
1922
1923 static void kvm_gen_update_masterclock(struct kvm *kvm)
1924 {
1925 #ifdef CONFIG_X86_64
1926         int i;
1927         struct kvm_vcpu *vcpu;
1928         struct kvm_arch *ka = &kvm->arch;
1929
1930         spin_lock(&ka->pvclock_gtod_sync_lock);
1931         kvm_make_mclock_inprogress_request(kvm);
1932         /* no guest entries from this point */
1933         pvclock_update_vm_gtod_copy(kvm);
1934
1935         kvm_for_each_vcpu(i, vcpu, kvm)
1936                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1937
1938         /* guest entries allowed */
1939         kvm_for_each_vcpu(i, vcpu, kvm)
1940                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
1941
1942         spin_unlock(&ka->pvclock_gtod_sync_lock);
1943 #endif
1944 }
1945
1946 u64 get_kvmclock_ns(struct kvm *kvm)
1947 {
1948         struct kvm_arch *ka = &kvm->arch;
1949         struct pvclock_vcpu_time_info hv_clock;
1950         u64 ret;
1951
1952         spin_lock(&ka->pvclock_gtod_sync_lock);
1953         if (!ka->use_master_clock) {
1954                 spin_unlock(&ka->pvclock_gtod_sync_lock);
1955                 return ktime_get_boot_ns() + ka->kvmclock_offset;
1956         }
1957
1958         hv_clock.tsc_timestamp = ka->master_cycle_now;
1959         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
1960         spin_unlock(&ka->pvclock_gtod_sync_lock);
1961
1962         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
1963         get_cpu();
1964
1965         if (__this_cpu_read(cpu_tsc_khz)) {
1966                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
1967                                    &hv_clock.tsc_shift,
1968                                    &hv_clock.tsc_to_system_mul);
1969                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
1970         } else
1971                 ret = ktime_get_boot_ns() + ka->kvmclock_offset;
1972
1973         put_cpu();
1974
1975         return ret;
1976 }
1977
1978 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
1979 {
1980         struct kvm_vcpu_arch *vcpu = &v->arch;
1981         struct pvclock_vcpu_time_info guest_hv_clock;
1982
1983         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1984                 &guest_hv_clock, sizeof(guest_hv_clock))))
1985                 return;
1986
1987         /* This VCPU is paused, but it's legal for a guest to read another
1988          * VCPU's kvmclock, so we really have to follow the specification where
1989          * it says that version is odd if data is being modified, and even after
1990          * it is consistent.
1991          *
1992          * Version field updates must be kept separate.  This is because
1993          * kvm_write_guest_cached might use a "rep movs" instruction, and
1994          * writes within a string instruction are weakly ordered.  So there
1995          * are three writes overall.
1996          *
1997          * As a small optimization, only write the version field in the first
1998          * and third write.  The vcpu->pv_time cache is still valid, because the
1999          * version field is the first in the struct.
2000          */
2001         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2002
2003         if (guest_hv_clock.version & 1)
2004                 ++guest_hv_clock.version;  /* first time write, random junk */
2005
2006         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2007         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2008                                 &vcpu->hv_clock,
2009                                 sizeof(vcpu->hv_clock.version));
2010
2011         smp_wmb();
2012
2013         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2014         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2015
2016         if (vcpu->pvclock_set_guest_stopped_request) {
2017                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2018                 vcpu->pvclock_set_guest_stopped_request = false;
2019         }
2020
2021         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2022
2023         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2024                                 &vcpu->hv_clock,
2025                                 sizeof(vcpu->hv_clock));
2026
2027         smp_wmb();
2028
2029         vcpu->hv_clock.version++;
2030         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2031                                 &vcpu->hv_clock,
2032                                 sizeof(vcpu->hv_clock.version));
2033 }
2034
2035 static int kvm_guest_time_update(struct kvm_vcpu *v)
2036 {
2037         unsigned long flags, tgt_tsc_khz;
2038         struct kvm_vcpu_arch *vcpu = &v->arch;
2039         struct kvm_arch *ka = &v->kvm->arch;
2040         s64 kernel_ns;
2041         u64 tsc_timestamp, host_tsc;
2042         u8 pvclock_flags;
2043         bool use_master_clock;
2044
2045         kernel_ns = 0;
2046         host_tsc = 0;
2047
2048         /*
2049          * If the host uses TSC clock, then passthrough TSC as stable
2050          * to the guest.
2051          */
2052         spin_lock(&ka->pvclock_gtod_sync_lock);
2053         use_master_clock = ka->use_master_clock;
2054         if (use_master_clock) {
2055                 host_tsc = ka->master_cycle_now;
2056                 kernel_ns = ka->master_kernel_ns;
2057         }
2058         spin_unlock(&ka->pvclock_gtod_sync_lock);
2059
2060         /* Keep irq disabled to prevent changes to the clock */
2061         local_irq_save(flags);
2062         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2063         if (unlikely(tgt_tsc_khz == 0)) {
2064                 local_irq_restore(flags);
2065                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2066                 return 1;
2067         }
2068         if (!use_master_clock) {
2069                 host_tsc = rdtsc();
2070                 kernel_ns = ktime_get_boot_ns();
2071         }
2072
2073         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2074
2075         /*
2076          * We may have to catch up the TSC to match elapsed wall clock
2077          * time for two reasons, even if kvmclock is used.
2078          *   1) CPU could have been running below the maximum TSC rate
2079          *   2) Broken TSC compensation resets the base at each VCPU
2080          *      entry to avoid unknown leaps of TSC even when running
2081          *      again on the same CPU.  This may cause apparent elapsed
2082          *      time to disappear, and the guest to stand still or run
2083          *      very slowly.
2084          */
2085         if (vcpu->tsc_catchup) {
2086                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2087                 if (tsc > tsc_timestamp) {
2088                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2089                         tsc_timestamp = tsc;
2090                 }
2091         }
2092
2093         local_irq_restore(flags);
2094
2095         /* With all the info we got, fill in the values */
2096
2097         if (kvm_has_tsc_control)
2098                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2099
2100         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2101                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2102                                    &vcpu->hv_clock.tsc_shift,
2103                                    &vcpu->hv_clock.tsc_to_system_mul);
2104                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2105         }
2106
2107         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2108         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2109         vcpu->last_guest_tsc = tsc_timestamp;
2110
2111         /* If the host uses TSC clocksource, then it is stable */
2112         pvclock_flags = 0;
2113         if (use_master_clock)
2114                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2115
2116         vcpu->hv_clock.flags = pvclock_flags;
2117
2118         if (vcpu->pv_time_enabled)
2119                 kvm_setup_pvclock_page(v);
2120         if (v == kvm_get_vcpu(v->kvm, 0))
2121                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2122         return 0;
2123 }
2124
2125 /*
2126  * kvmclock updates which are isolated to a given vcpu, such as
2127  * vcpu->cpu migration, should not allow system_timestamp from
2128  * the rest of the vcpus to remain static. Otherwise ntp frequency
2129  * correction applies to one vcpu's system_timestamp but not
2130  * the others.
2131  *
2132  * So in those cases, request a kvmclock update for all vcpus.
2133  * We need to rate-limit these requests though, as they can
2134  * considerably slow guests that have a large number of vcpus.
2135  * The time for a remote vcpu to update its kvmclock is bound
2136  * by the delay we use to rate-limit the updates.
2137  */
2138
2139 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2140
2141 static void kvmclock_update_fn(struct work_struct *work)
2142 {
2143         int i;
2144         struct delayed_work *dwork = to_delayed_work(work);
2145         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2146                                            kvmclock_update_work);
2147         struct kvm *kvm = container_of(ka, struct kvm, arch);
2148         struct kvm_vcpu *vcpu;
2149
2150         kvm_for_each_vcpu(i, vcpu, kvm) {
2151                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2152                 kvm_vcpu_kick(vcpu);
2153         }
2154 }
2155
2156 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2157 {
2158         struct kvm *kvm = v->kvm;
2159
2160         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2161         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2162                                         KVMCLOCK_UPDATE_DELAY);
2163 }
2164
2165 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2166
2167 static void kvmclock_sync_fn(struct work_struct *work)
2168 {
2169         struct delayed_work *dwork = to_delayed_work(work);
2170         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2171                                            kvmclock_sync_work);
2172         struct kvm *kvm = container_of(ka, struct kvm, arch);
2173
2174         if (!kvmclock_periodic_sync)
2175                 return;
2176
2177         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2178         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2179                                         KVMCLOCK_SYNC_PERIOD);
2180 }
2181
2182 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2183 {
2184         u64 mcg_cap = vcpu->arch.mcg_cap;
2185         unsigned bank_num = mcg_cap & 0xff;
2186         u32 msr = msr_info->index;
2187         u64 data = msr_info->data;
2188
2189         switch (msr) {
2190         case MSR_IA32_MCG_STATUS:
2191                 vcpu->arch.mcg_status = data;
2192                 break;
2193         case MSR_IA32_MCG_CTL:
2194                 if (!(mcg_cap & MCG_CTL_P) &&
2195                     (data || !msr_info->host_initiated))
2196                         return 1;
2197                 if (data != 0 && data != ~(u64)0)
2198                         return 1;
2199                 vcpu->arch.mcg_ctl = data;
2200                 break;
2201         default:
2202                 if (msr >= MSR_IA32_MC0_CTL &&
2203                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2204                         u32 offset = msr - MSR_IA32_MC0_CTL;
2205                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2206                          * some Linux kernels though clear bit 10 in bank 4 to
2207                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2208                          * this to avoid an uncatched #GP in the guest
2209                          */
2210                         if ((offset & 0x3) == 0 &&
2211                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2212                                 return -1;
2213                         if (!msr_info->host_initiated &&
2214                                 (offset & 0x3) == 1 && data != 0)
2215                                 return -1;
2216                         vcpu->arch.mce_banks[offset] = data;
2217                         break;
2218                 }
2219                 return 1;
2220         }
2221         return 0;
2222 }
2223
2224 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2225 {
2226         struct kvm *kvm = vcpu->kvm;
2227         int lm = is_long_mode(vcpu);
2228         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2229                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2230         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2231                 : kvm->arch.xen_hvm_config.blob_size_32;
2232         u32 page_num = data & ~PAGE_MASK;
2233         u64 page_addr = data & PAGE_MASK;
2234         u8 *page;
2235         int r;
2236
2237         r = -E2BIG;
2238         if (page_num >= blob_size)
2239                 goto out;
2240         r = -ENOMEM;
2241         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2242         if (IS_ERR(page)) {
2243                 r = PTR_ERR(page);
2244                 goto out;
2245         }
2246         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2247                 goto out_free;
2248         r = 0;
2249 out_free:
2250         kfree(page);
2251 out:
2252         return r;
2253 }
2254
2255 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2256 {
2257         gpa_t gpa = data & ~0x3f;
2258
2259         /* Bits 3:5 are reserved, Should be zero */
2260         if (data & 0x38)
2261                 return 1;
2262
2263         vcpu->arch.apf.msr_val = data;
2264
2265         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2266                 kvm_clear_async_pf_completion_queue(vcpu);
2267                 kvm_async_pf_hash_reset(vcpu);
2268                 return 0;
2269         }
2270
2271         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2272                                         sizeof(u32)))
2273                 return 1;
2274
2275         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2276         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2277         kvm_async_pf_wakeup_all(vcpu);
2278         return 0;
2279 }
2280
2281 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2282 {
2283         vcpu->arch.pv_time_enabled = false;
2284 }
2285
2286 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2287 {
2288         ++vcpu->stat.tlb_flush;
2289         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2290 }
2291
2292 static void record_steal_time(struct kvm_vcpu *vcpu)
2293 {
2294         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2295                 return;
2296
2297         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2298                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2299                 return;
2300
2301         /*
2302          * Doing a TLB flush here, on the guest's behalf, can avoid
2303          * expensive IPIs.
2304          */
2305         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2306                 kvm_vcpu_flush_tlb(vcpu, false);
2307
2308         if (vcpu->arch.st.steal.version & 1)
2309                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2310
2311         vcpu->arch.st.steal.version += 1;
2312
2313         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2314                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2315
2316         smp_wmb();
2317
2318         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2319                 vcpu->arch.st.last_steal;
2320         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2321
2322         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2323                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2324
2325         smp_wmb();
2326
2327         vcpu->arch.st.steal.version += 1;
2328
2329         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2330                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2331 }
2332
2333 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2334 {
2335         bool pr = false;
2336         u32 msr = msr_info->index;
2337         u64 data = msr_info->data;
2338
2339         switch (msr) {
2340         case MSR_AMD64_NB_CFG:
2341         case MSR_IA32_UCODE_WRITE:
2342         case MSR_VM_HSAVE_PA:
2343         case MSR_AMD64_PATCH_LOADER:
2344         case MSR_AMD64_BU_CFG2:
2345         case MSR_AMD64_DC_CFG:
2346                 break;
2347
2348         case MSR_IA32_UCODE_REV:
2349                 if (msr_info->host_initiated)
2350                         vcpu->arch.microcode_version = data;
2351                 break;
2352         case MSR_EFER:
2353                 return set_efer(vcpu, data);
2354         case MSR_K7_HWCR:
2355                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2356                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2357                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2358                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
2359                 if (data != 0) {
2360                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2361                                     data);
2362                         return 1;
2363                 }
2364                 break;
2365         case MSR_FAM10H_MMIO_CONF_BASE:
2366                 if (data != 0) {
2367                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2368                                     "0x%llx\n", data);
2369                         return 1;
2370                 }
2371                 break;
2372         case MSR_IA32_DEBUGCTLMSR:
2373                 if (!data) {
2374                         /* We support the non-activated case already */
2375                         break;
2376                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2377                         /* Values other than LBR and BTF are vendor-specific,
2378                            thus reserved and should throw a #GP */
2379                         return 1;
2380                 }
2381                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2382                             __func__, data);
2383                 break;
2384         case 0x200 ... 0x2ff:
2385                 return kvm_mtrr_set_msr(vcpu, msr, data);
2386         case MSR_IA32_APICBASE:
2387                 return kvm_set_apic_base(vcpu, msr_info);
2388         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2389                 return kvm_x2apic_msr_write(vcpu, msr, data);
2390         case MSR_IA32_TSCDEADLINE:
2391                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2392                 break;
2393         case MSR_IA32_TSC_ADJUST:
2394                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2395                         if (!msr_info->host_initiated) {
2396                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2397                                 adjust_tsc_offset_guest(vcpu, adj);
2398                         }
2399                         vcpu->arch.ia32_tsc_adjust_msr = data;
2400                 }
2401                 break;
2402         case MSR_IA32_MISC_ENABLE:
2403                 vcpu->arch.ia32_misc_enable_msr = data;
2404                 break;
2405         case MSR_IA32_SMBASE:
2406                 if (!msr_info->host_initiated)
2407                         return 1;
2408                 vcpu->arch.smbase = data;
2409                 break;
2410         case MSR_IA32_TSC:
2411                 kvm_write_tsc(vcpu, msr_info);
2412                 break;
2413         case MSR_SMI_COUNT:
2414                 if (!msr_info->host_initiated)
2415                         return 1;
2416                 vcpu->arch.smi_count = data;
2417                 break;
2418         case MSR_KVM_WALL_CLOCK_NEW:
2419         case MSR_KVM_WALL_CLOCK:
2420                 vcpu->kvm->arch.wall_clock = data;
2421                 kvm_write_wall_clock(vcpu->kvm, data);
2422                 break;
2423         case MSR_KVM_SYSTEM_TIME_NEW:
2424         case MSR_KVM_SYSTEM_TIME: {
2425                 struct kvm_arch *ka = &vcpu->kvm->arch;
2426
2427                 kvmclock_reset(vcpu);
2428
2429                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2430                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2431
2432                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2433                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2434
2435                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2436                 }
2437
2438                 vcpu->arch.time = data;
2439                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2440
2441                 /* we verify if the enable bit is set... */
2442                 if (!(data & 1))
2443                         break;
2444
2445                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2446                      &vcpu->arch.pv_time, data & ~1ULL,
2447                      sizeof(struct pvclock_vcpu_time_info)))
2448                         vcpu->arch.pv_time_enabled = false;
2449                 else
2450                         vcpu->arch.pv_time_enabled = true;
2451
2452                 break;
2453         }
2454         case MSR_KVM_ASYNC_PF_EN:
2455                 if (kvm_pv_enable_async_pf(vcpu, data))
2456                         return 1;
2457                 break;
2458         case MSR_KVM_STEAL_TIME:
2459
2460                 if (unlikely(!sched_info_on()))
2461                         return 1;
2462
2463                 if (data & KVM_STEAL_RESERVED_MASK)
2464                         return 1;
2465
2466                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2467                                                 data & KVM_STEAL_VALID_BITS,
2468                                                 sizeof(struct kvm_steal_time)))
2469                         return 1;
2470
2471                 vcpu->arch.st.msr_val = data;
2472
2473                 if (!(data & KVM_MSR_ENABLED))
2474                         break;
2475
2476                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2477
2478                 break;
2479         case MSR_KVM_PV_EOI_EN:
2480                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2481                         return 1;
2482                 break;
2483
2484         case MSR_IA32_MCG_CTL:
2485         case MSR_IA32_MCG_STATUS:
2486         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2487                 return set_msr_mce(vcpu, msr_info);
2488
2489         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2490         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2491                 pr = true; /* fall through */
2492         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2493         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2494                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2495                         return kvm_pmu_set_msr(vcpu, msr_info);
2496
2497                 if (pr || data != 0)
2498                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2499                                     "0x%x data 0x%llx\n", msr, data);
2500                 break;
2501         case MSR_K7_CLK_CTL:
2502                 /*
2503                  * Ignore all writes to this no longer documented MSR.
2504                  * Writes are only relevant for old K7 processors,
2505                  * all pre-dating SVM, but a recommended workaround from
2506                  * AMD for these chips. It is possible to specify the
2507                  * affected processor models on the command line, hence
2508                  * the need to ignore the workaround.
2509                  */
2510                 break;
2511         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2512         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2513         case HV_X64_MSR_CRASH_CTL:
2514         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2515         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2516         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2517         case HV_X64_MSR_TSC_EMULATION_STATUS:
2518                 return kvm_hv_set_msr_common(vcpu, msr, data,
2519                                              msr_info->host_initiated);
2520         case MSR_IA32_BBL_CR_CTL3:
2521                 /* Drop writes to this legacy MSR -- see rdmsr
2522                  * counterpart for further detail.
2523                  */
2524                 if (report_ignored_msrs)
2525                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2526                                 msr, data);
2527                 break;
2528         case MSR_AMD64_OSVW_ID_LENGTH:
2529                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2530                         return 1;
2531                 vcpu->arch.osvw.length = data;
2532                 break;
2533         case MSR_AMD64_OSVW_STATUS:
2534                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2535                         return 1;
2536                 vcpu->arch.osvw.status = data;
2537                 break;
2538         case MSR_PLATFORM_INFO:
2539                 if (!msr_info->host_initiated ||
2540                     data & ~MSR_PLATFORM_INFO_CPUID_FAULT ||
2541                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2542                      cpuid_fault_enabled(vcpu)))
2543                         return 1;
2544                 vcpu->arch.msr_platform_info = data;
2545                 break;
2546         case MSR_MISC_FEATURES_ENABLES:
2547                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2548                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2549                      !supports_cpuid_fault(vcpu)))
2550                         return 1;
2551                 vcpu->arch.msr_misc_features_enables = data;
2552                 break;
2553         default:
2554                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2555                         return xen_hvm_config(vcpu, data);
2556                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2557                         return kvm_pmu_set_msr(vcpu, msr_info);
2558                 if (!ignore_msrs) {
2559                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2560                                     msr, data);
2561                         return 1;
2562                 } else {
2563                         if (report_ignored_msrs)
2564                                 vcpu_unimpl(vcpu,
2565                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2566                                         msr, data);
2567                         break;
2568                 }
2569         }
2570         return 0;
2571 }
2572 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2573
2574
2575 /*
2576  * Reads an msr value (of 'msr_index') into 'pdata'.
2577  * Returns 0 on success, non-0 otherwise.
2578  * Assumes vcpu_load() was already called.
2579  */
2580 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2581 {
2582         return kvm_x86_ops->get_msr(vcpu, msr);
2583 }
2584 EXPORT_SYMBOL_GPL(kvm_get_msr);
2585
2586 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2587 {
2588         u64 data;
2589         u64 mcg_cap = vcpu->arch.mcg_cap;
2590         unsigned bank_num = mcg_cap & 0xff;
2591
2592         switch (msr) {
2593         case MSR_IA32_P5_MC_ADDR:
2594         case MSR_IA32_P5_MC_TYPE:
2595                 data = 0;
2596                 break;
2597         case MSR_IA32_MCG_CAP:
2598                 data = vcpu->arch.mcg_cap;
2599                 break;
2600         case MSR_IA32_MCG_CTL:
2601                 if (!(mcg_cap & MCG_CTL_P) && !host)
2602                         return 1;
2603                 data = vcpu->arch.mcg_ctl;
2604                 break;
2605         case MSR_IA32_MCG_STATUS:
2606                 data = vcpu->arch.mcg_status;
2607                 break;
2608         default:
2609                 if (msr >= MSR_IA32_MC0_CTL &&
2610                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2611                         u32 offset = msr - MSR_IA32_MC0_CTL;
2612                         data = vcpu->arch.mce_banks[offset];
2613                         break;
2614                 }
2615                 return 1;
2616         }
2617         *pdata = data;
2618         return 0;
2619 }
2620
2621 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2622 {
2623         switch (msr_info->index) {
2624         case MSR_IA32_PLATFORM_ID:
2625         case MSR_IA32_EBL_CR_POWERON:
2626         case MSR_IA32_DEBUGCTLMSR:
2627         case MSR_IA32_LASTBRANCHFROMIP:
2628         case MSR_IA32_LASTBRANCHTOIP:
2629         case MSR_IA32_LASTINTFROMIP:
2630         case MSR_IA32_LASTINTTOIP:
2631         case MSR_K8_SYSCFG:
2632         case MSR_K8_TSEG_ADDR:
2633         case MSR_K8_TSEG_MASK:
2634         case MSR_K7_HWCR:
2635         case MSR_VM_HSAVE_PA:
2636         case MSR_K8_INT_PENDING_MSG:
2637         case MSR_AMD64_NB_CFG:
2638         case MSR_FAM10H_MMIO_CONF_BASE:
2639         case MSR_AMD64_BU_CFG2:
2640         case MSR_IA32_PERF_CTL:
2641         case MSR_AMD64_DC_CFG:
2642                 msr_info->data = 0;
2643                 break;
2644         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2645         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2646         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2647         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2648         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2649                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2650                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2651                 msr_info->data = 0;
2652                 break;
2653         case MSR_IA32_UCODE_REV:
2654                 msr_info->data = vcpu->arch.microcode_version;
2655                 break;
2656         case MSR_IA32_TSC:
2657                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2658                 break;
2659         case MSR_MTRRcap:
2660         case 0x200 ... 0x2ff:
2661                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2662         case 0xcd: /* fsb frequency */
2663                 msr_info->data = 3;
2664                 break;
2665                 /*
2666                  * MSR_EBC_FREQUENCY_ID
2667                  * Conservative value valid for even the basic CPU models.
2668                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2669                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2670                  * and 266MHz for model 3, or 4. Set Core Clock
2671                  * Frequency to System Bus Frequency Ratio to 1 (bits
2672                  * 31:24) even though these are only valid for CPU
2673                  * models > 2, however guests may end up dividing or
2674                  * multiplying by zero otherwise.
2675                  */
2676         case MSR_EBC_FREQUENCY_ID:
2677                 msr_info->data = 1 << 24;
2678                 break;
2679         case MSR_IA32_APICBASE:
2680                 msr_info->data = kvm_get_apic_base(vcpu);
2681                 break;
2682         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2683                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2684                 break;
2685         case MSR_IA32_TSCDEADLINE:
2686                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2687                 break;
2688         case MSR_IA32_TSC_ADJUST:
2689                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2690                 break;
2691         case MSR_IA32_MISC_ENABLE:
2692                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2693                 break;
2694         case MSR_IA32_SMBASE:
2695                 if (!msr_info->host_initiated)
2696                         return 1;
2697                 msr_info->data = vcpu->arch.smbase;
2698                 break;
2699         case MSR_SMI_COUNT:
2700                 msr_info->data = vcpu->arch.smi_count;
2701                 break;
2702         case MSR_IA32_PERF_STATUS:
2703                 /* TSC increment by tick */
2704                 msr_info->data = 1000ULL;
2705                 /* CPU multiplier */
2706                 msr_info->data |= (((uint64_t)4ULL) << 40);
2707                 break;
2708         case MSR_EFER:
2709                 msr_info->data = vcpu->arch.efer;
2710                 break;
2711         case MSR_KVM_WALL_CLOCK:
2712         case MSR_KVM_WALL_CLOCK_NEW:
2713                 msr_info->data = vcpu->kvm->arch.wall_clock;
2714                 break;
2715         case MSR_KVM_SYSTEM_TIME:
2716         case MSR_KVM_SYSTEM_TIME_NEW:
2717                 msr_info->data = vcpu->arch.time;
2718                 break;
2719         case MSR_KVM_ASYNC_PF_EN:
2720                 msr_info->data = vcpu->arch.apf.msr_val;
2721                 break;
2722         case MSR_KVM_STEAL_TIME:
2723                 msr_info->data = vcpu->arch.st.msr_val;
2724                 break;
2725         case MSR_KVM_PV_EOI_EN:
2726                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2727                 break;
2728         case MSR_IA32_P5_MC_ADDR:
2729         case MSR_IA32_P5_MC_TYPE:
2730         case MSR_IA32_MCG_CAP:
2731         case MSR_IA32_MCG_CTL:
2732         case MSR_IA32_MCG_STATUS:
2733         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2734                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
2735                                    msr_info->host_initiated);
2736         case MSR_K7_CLK_CTL:
2737                 /*
2738                  * Provide expected ramp-up count for K7. All other
2739                  * are set to zero, indicating minimum divisors for
2740                  * every field.
2741                  *
2742                  * This prevents guest kernels on AMD host with CPU
2743                  * type 6, model 8 and higher from exploding due to
2744                  * the rdmsr failing.
2745                  */
2746                 msr_info->data = 0x20000000;
2747                 break;
2748         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2749         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2750         case HV_X64_MSR_CRASH_CTL:
2751         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2752         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2753         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2754         case HV_X64_MSR_TSC_EMULATION_STATUS:
2755                 return kvm_hv_get_msr_common(vcpu,
2756                                              msr_info->index, &msr_info->data,
2757                                              msr_info->host_initiated);
2758                 break;
2759         case MSR_IA32_BBL_CR_CTL3:
2760                 /* This legacy MSR exists but isn't fully documented in current
2761                  * silicon.  It is however accessed by winxp in very narrow
2762                  * scenarios where it sets bit #19, itself documented as
2763                  * a "reserved" bit.  Best effort attempt to source coherent
2764                  * read data here should the balance of the register be
2765                  * interpreted by the guest:
2766                  *
2767                  * L2 cache control register 3: 64GB range, 256KB size,
2768                  * enabled, latency 0x1, configured
2769                  */
2770                 msr_info->data = 0xbe702111;
2771                 break;
2772         case MSR_AMD64_OSVW_ID_LENGTH:
2773                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2774                         return 1;
2775                 msr_info->data = vcpu->arch.osvw.length;
2776                 break;
2777         case MSR_AMD64_OSVW_STATUS:
2778                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2779                         return 1;
2780                 msr_info->data = vcpu->arch.osvw.status;
2781                 break;
2782         case MSR_PLATFORM_INFO:
2783                 msr_info->data = vcpu->arch.msr_platform_info;
2784                 break;
2785         case MSR_MISC_FEATURES_ENABLES:
2786                 msr_info->data = vcpu->arch.msr_misc_features_enables;
2787                 break;
2788         default:
2789                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2790                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2791                 if (!ignore_msrs) {
2792                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
2793                                                msr_info->index);
2794                         return 1;
2795                 } else {
2796                         if (report_ignored_msrs)
2797                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
2798                                         msr_info->index);
2799                         msr_info->data = 0;
2800                 }
2801                 break;
2802         }
2803         return 0;
2804 }
2805 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2806
2807 /*
2808  * Read or write a bunch of msrs. All parameters are kernel addresses.
2809  *
2810  * @return number of msrs set successfully.
2811  */
2812 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2813                     struct kvm_msr_entry *entries,
2814                     int (*do_msr)(struct kvm_vcpu *vcpu,
2815                                   unsigned index, u64 *data))
2816 {
2817         int i;
2818
2819         for (i = 0; i < msrs->nmsrs; ++i)
2820                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2821                         break;
2822
2823         return i;
2824 }
2825
2826 /*
2827  * Read or write a bunch of msrs. Parameters are user addresses.
2828  *
2829  * @return number of msrs set successfully.
2830  */
2831 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2832                   int (*do_msr)(struct kvm_vcpu *vcpu,
2833                                 unsigned index, u64 *data),
2834                   int writeback)
2835 {
2836         struct kvm_msrs msrs;
2837         struct kvm_msr_entry *entries;
2838         int r, n;
2839         unsigned size;
2840
2841         r = -EFAULT;
2842         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2843                 goto out;
2844
2845         r = -E2BIG;
2846         if (msrs.nmsrs >= MAX_IO_MSRS)
2847                 goto out;
2848
2849         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2850         entries = memdup_user(user_msrs->entries, size);
2851         if (IS_ERR(entries)) {
2852                 r = PTR_ERR(entries);
2853                 goto out;
2854         }
2855
2856         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2857         if (r < 0)
2858                 goto out_free;
2859
2860         r = -EFAULT;
2861         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2862                 goto out_free;
2863
2864         r = n;
2865
2866 out_free:
2867         kfree(entries);
2868 out:
2869         return r;
2870 }
2871
2872 static inline bool kvm_can_mwait_in_guest(void)
2873 {
2874         return boot_cpu_has(X86_FEATURE_MWAIT) &&
2875                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
2876                 boot_cpu_has(X86_FEATURE_ARAT);
2877 }
2878
2879 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2880 {
2881         int r = 0;
2882
2883         switch (ext) {
2884         case KVM_CAP_IRQCHIP:
2885         case KVM_CAP_HLT:
2886         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2887         case KVM_CAP_SET_TSS_ADDR:
2888         case KVM_CAP_EXT_CPUID:
2889         case KVM_CAP_EXT_EMUL_CPUID:
2890         case KVM_CAP_CLOCKSOURCE:
2891         case KVM_CAP_PIT:
2892         case KVM_CAP_NOP_IO_DELAY:
2893         case KVM_CAP_MP_STATE:
2894         case KVM_CAP_SYNC_MMU:
2895         case KVM_CAP_USER_NMI:
2896         case KVM_CAP_REINJECT_CONTROL:
2897         case KVM_CAP_IRQ_INJECT_STATUS:
2898         case KVM_CAP_IOEVENTFD:
2899         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2900         case KVM_CAP_PIT2:
2901         case KVM_CAP_PIT_STATE2:
2902         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2903         case KVM_CAP_XEN_HVM:
2904         case KVM_CAP_VCPU_EVENTS:
2905         case KVM_CAP_HYPERV:
2906         case KVM_CAP_HYPERV_VAPIC:
2907         case KVM_CAP_HYPERV_SPIN:
2908         case KVM_CAP_HYPERV_SYNIC:
2909         case KVM_CAP_HYPERV_SYNIC2:
2910         case KVM_CAP_HYPERV_VP_INDEX:
2911         case KVM_CAP_HYPERV_EVENTFD:
2912         case KVM_CAP_HYPERV_TLBFLUSH:
2913         case KVM_CAP_PCI_SEGMENT:
2914         case KVM_CAP_DEBUGREGS:
2915         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2916         case KVM_CAP_XSAVE:
2917         case KVM_CAP_ASYNC_PF:
2918         case KVM_CAP_GET_TSC_KHZ:
2919         case KVM_CAP_KVMCLOCK_CTRL:
2920         case KVM_CAP_READONLY_MEM:
2921         case KVM_CAP_HYPERV_TIME:
2922         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2923         case KVM_CAP_TSC_DEADLINE_TIMER:
2924         case KVM_CAP_ENABLE_CAP_VM:
2925         case KVM_CAP_DISABLE_QUIRKS:
2926         case KVM_CAP_SET_BOOT_CPU_ID:
2927         case KVM_CAP_SPLIT_IRQCHIP:
2928         case KVM_CAP_IMMEDIATE_EXIT:
2929         case KVM_CAP_GET_MSR_FEATURES:
2930                 r = 1;
2931                 break;
2932         case KVM_CAP_SYNC_REGS:
2933                 r = KVM_SYNC_X86_VALID_FIELDS;
2934                 break;
2935         case KVM_CAP_ADJUST_CLOCK:
2936                 r = KVM_CLOCK_TSC_STABLE;
2937                 break;
2938         case KVM_CAP_X86_DISABLE_EXITS:
2939                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE;
2940                 if(kvm_can_mwait_in_guest())
2941                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
2942                 break;
2943         case KVM_CAP_X86_SMM:
2944                 /* SMBASE is usually relocated above 1M on modern chipsets,
2945                  * and SMM handlers might indeed rely on 4G segment limits,
2946                  * so do not report SMM to be available if real mode is
2947                  * emulated via vm86 mode.  Still, do not go to great lengths
2948                  * to avoid userspace's usage of the feature, because it is a
2949                  * fringe case that is not enabled except via specific settings
2950                  * of the module parameters.
2951                  */
2952                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
2953                 break;
2954         case KVM_CAP_VAPIC:
2955                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2956                 break;
2957         case KVM_CAP_NR_VCPUS:
2958                 r = KVM_SOFT_MAX_VCPUS;
2959                 break;
2960         case KVM_CAP_MAX_VCPUS:
2961                 r = KVM_MAX_VCPUS;
2962                 break;
2963         case KVM_CAP_NR_MEMSLOTS:
2964                 r = KVM_USER_MEM_SLOTS;
2965                 break;
2966         case KVM_CAP_PV_MMU:    /* obsolete */
2967                 r = 0;
2968                 break;
2969         case KVM_CAP_MCE:
2970                 r = KVM_MAX_MCE_BANKS;
2971                 break;
2972         case KVM_CAP_XCRS:
2973                 r = boot_cpu_has(X86_FEATURE_XSAVE);
2974                 break;
2975         case KVM_CAP_TSC_CONTROL:
2976                 r = kvm_has_tsc_control;
2977                 break;
2978         case KVM_CAP_X2APIC_API:
2979                 r = KVM_X2APIC_API_VALID_FLAGS;
2980                 break;
2981         case KVM_CAP_NESTED_STATE:
2982                 r = kvm_x86_ops->get_nested_state ?
2983                         kvm_x86_ops->get_nested_state(NULL, 0, 0) : 0;
2984                 break;
2985         default:
2986                 break;
2987         }
2988         return r;
2989
2990 }
2991
2992 long kvm_arch_dev_ioctl(struct file *filp,
2993                         unsigned int ioctl, unsigned long arg)
2994 {
2995         void __user *argp = (void __user *)arg;
2996         long r;
2997
2998         switch (ioctl) {
2999         case KVM_GET_MSR_INDEX_LIST: {
3000                 struct kvm_msr_list __user *user_msr_list = argp;
3001                 struct kvm_msr_list msr_list;
3002                 unsigned n;
3003
3004                 r = -EFAULT;
3005                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
3006                         goto out;
3007                 n = msr_list.nmsrs;
3008                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3009                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
3010                         goto out;
3011                 r = -E2BIG;
3012                 if (n < msr_list.nmsrs)
3013                         goto out;
3014                 r = -EFAULT;
3015                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3016                                  num_msrs_to_save * sizeof(u32)))
3017                         goto out;
3018                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3019                                  &emulated_msrs,
3020                                  num_emulated_msrs * sizeof(u32)))
3021                         goto out;
3022                 r = 0;
3023                 break;
3024         }
3025         case KVM_GET_SUPPORTED_CPUID:
3026         case KVM_GET_EMULATED_CPUID: {
3027                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3028                 struct kvm_cpuid2 cpuid;
3029
3030                 r = -EFAULT;
3031                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3032                         goto out;
3033
3034                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3035                                             ioctl);
3036                 if (r)
3037                         goto out;
3038
3039                 r = -EFAULT;
3040                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3041                         goto out;
3042                 r = 0;
3043                 break;
3044         }
3045         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3046                 r = -EFAULT;
3047                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3048                                  sizeof(kvm_mce_cap_supported)))
3049                         goto out;
3050                 r = 0;
3051                 break;
3052         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3053                 struct kvm_msr_list __user *user_msr_list = argp;
3054                 struct kvm_msr_list msr_list;
3055                 unsigned int n;
3056
3057                 r = -EFAULT;
3058                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3059                         goto out;
3060                 n = msr_list.nmsrs;
3061                 msr_list.nmsrs = num_msr_based_features;
3062                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3063                         goto out;
3064                 r = -E2BIG;
3065                 if (n < msr_list.nmsrs)
3066                         goto out;
3067                 r = -EFAULT;
3068                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3069                                  num_msr_based_features * sizeof(u32)))
3070                         goto out;
3071                 r = 0;
3072                 break;
3073         }
3074         case KVM_GET_MSRS:
3075                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3076                 break;
3077         }
3078         default:
3079                 r = -EINVAL;
3080         }
3081 out:
3082         return r;
3083 }
3084
3085 static void wbinvd_ipi(void *garbage)
3086 {
3087         wbinvd();
3088 }
3089
3090 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3091 {
3092         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3093 }
3094
3095 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3096 {
3097         /* Address WBINVD may be executed by guest */
3098         if (need_emulate_wbinvd(vcpu)) {
3099                 if (kvm_x86_ops->has_wbinvd_exit())
3100                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3101                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3102                         smp_call_function_single(vcpu->cpu,
3103                                         wbinvd_ipi, NULL, 1);
3104         }
3105
3106         kvm_x86_ops->vcpu_load(vcpu, cpu);
3107
3108         /* Apply any externally detected TSC adjustments (due to suspend) */
3109         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3110                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3111                 vcpu->arch.tsc_offset_adjustment = 0;
3112                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3113         }
3114
3115         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3116                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3117                                 rdtsc() - vcpu->arch.last_host_tsc;
3118                 if (tsc_delta < 0)
3119                         mark_tsc_unstable("KVM discovered backwards TSC");
3120
3121                 if (kvm_check_tsc_unstable()) {
3122                         u64 offset = kvm_compute_tsc_offset(vcpu,
3123                                                 vcpu->arch.last_guest_tsc);
3124                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3125                         vcpu->arch.tsc_catchup = 1;
3126                 }
3127
3128                 if (kvm_lapic_hv_timer_in_use(vcpu))
3129                         kvm_lapic_restart_hv_timer(vcpu);
3130
3131                 /*
3132                  * On a host with synchronized TSC, there is no need to update
3133                  * kvmclock on vcpu->cpu migration
3134                  */
3135                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3136                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3137                 if (vcpu->cpu != cpu)
3138                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3139                 vcpu->cpu = cpu;
3140         }
3141
3142         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3143 }
3144
3145 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3146 {
3147         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3148                 return;
3149
3150         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3151
3152         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3153                         &vcpu->arch.st.steal.preempted,
3154                         offsetof(struct kvm_steal_time, preempted),
3155                         sizeof(vcpu->arch.st.steal.preempted));
3156 }
3157
3158 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3159 {
3160         int idx;
3161
3162         if (vcpu->preempted)
3163                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3164
3165         /*
3166          * Disable page faults because we're in atomic context here.
3167          * kvm_write_guest_offset_cached() would call might_fault()
3168          * that relies on pagefault_disable() to tell if there's a
3169          * bug. NOTE: the write to guest memory may not go through if
3170          * during postcopy live migration or if there's heavy guest
3171          * paging.
3172          */
3173         pagefault_disable();
3174         /*
3175          * kvm_memslots() will be called by
3176          * kvm_write_guest_offset_cached() so take the srcu lock.
3177          */
3178         idx = srcu_read_lock(&vcpu->kvm->srcu);
3179         kvm_steal_time_set_preempted(vcpu);
3180         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3181         pagefault_enable();
3182         kvm_x86_ops->vcpu_put(vcpu);
3183         vcpu->arch.last_host_tsc = rdtsc();
3184         /*
3185          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3186          * on every vmexit, but if not, we might have a stale dr6 from the
3187          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3188          */
3189         set_debugreg(0, 6);
3190 }
3191
3192 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3193                                     struct kvm_lapic_state *s)
3194 {
3195         if (vcpu->arch.apicv_active)
3196                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3197
3198         return kvm_apic_get_state(vcpu, s);
3199 }
3200
3201 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3202                                     struct kvm_lapic_state *s)
3203 {
3204         int r;
3205
3206         r = kvm_apic_set_state(vcpu, s);
3207         if (r)
3208                 return r;
3209         update_cr8_intercept(vcpu);
3210
3211         return 0;
3212 }
3213
3214 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3215 {
3216         return (!lapic_in_kernel(vcpu) ||
3217                 kvm_apic_accept_pic_intr(vcpu));
3218 }
3219
3220 /*
3221  * if userspace requested an interrupt window, check that the
3222  * interrupt window is open.
3223  *
3224  * No need to exit to userspace if we already have an interrupt queued.
3225  */
3226 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3227 {
3228         return kvm_arch_interrupt_allowed(vcpu) &&
3229                 !kvm_cpu_has_interrupt(vcpu) &&
3230                 !kvm_event_needs_reinjection(vcpu) &&
3231                 kvm_cpu_accept_dm_intr(vcpu);
3232 }
3233
3234 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3235                                     struct kvm_interrupt *irq)
3236 {
3237         if (irq->irq >= KVM_NR_INTERRUPTS)
3238                 return -EINVAL;
3239
3240         if (!irqchip_in_kernel(vcpu->kvm)) {
3241                 kvm_queue_interrupt(vcpu, irq->irq, false);
3242                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3243                 return 0;
3244         }
3245
3246         /*
3247          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3248          * fail for in-kernel 8259.
3249          */
3250         if (pic_in_kernel(vcpu->kvm))
3251                 return -ENXIO;
3252
3253         if (vcpu->arch.pending_external_vector != -1)
3254                 return -EEXIST;
3255
3256         vcpu->arch.pending_external_vector = irq->irq;
3257         kvm_make_request(KVM_REQ_EVENT, vcpu);
3258         return 0;
3259 }
3260
3261 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3262 {
3263         kvm_inject_nmi(vcpu);
3264
3265         return 0;
3266 }
3267
3268 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3269 {
3270         kvm_make_request(KVM_REQ_SMI, vcpu);
3271
3272         return 0;
3273 }
3274
3275 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3276                                            struct kvm_tpr_access_ctl *tac)
3277 {
3278         if (tac->flags)
3279                 return -EINVAL;
3280         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3281         return 0;
3282 }
3283
3284 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3285                                         u64 mcg_cap)
3286 {
3287         int r;
3288         unsigned bank_num = mcg_cap & 0xff, bank;
3289
3290         r = -EINVAL;
3291         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3292                 goto out;
3293         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3294                 goto out;
3295         r = 0;
3296         vcpu->arch.mcg_cap = mcg_cap;
3297         /* Init IA32_MCG_CTL to all 1s */
3298         if (mcg_cap & MCG_CTL_P)
3299                 vcpu->arch.mcg_ctl = ~(u64)0;
3300         /* Init IA32_MCi_CTL to all 1s */
3301         for (bank = 0; bank < bank_num; bank++)
3302                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3303
3304         if (kvm_x86_ops->setup_mce)
3305                 kvm_x86_ops->setup_mce(vcpu);
3306 out:
3307         return r;
3308 }
3309
3310 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3311                                       struct kvm_x86_mce *mce)
3312 {
3313         u64 mcg_cap = vcpu->arch.mcg_cap;
3314         unsigned bank_num = mcg_cap & 0xff;
3315         u64 *banks = vcpu->arch.mce_banks;
3316
3317         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3318                 return -EINVAL;
3319         /*
3320          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3321          * reporting is disabled
3322          */
3323         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3324             vcpu->arch.mcg_ctl != ~(u64)0)
3325                 return 0;
3326         banks += 4 * mce->bank;
3327         /*
3328          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3329          * reporting is disabled for the bank
3330          */
3331         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3332                 return 0;
3333         if (mce->status & MCI_STATUS_UC) {
3334                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3335                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3336                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3337                         return 0;
3338                 }
3339                 if (banks[1] & MCI_STATUS_VAL)
3340                         mce->status |= MCI_STATUS_OVER;
3341                 banks[2] = mce->addr;
3342                 banks[3] = mce->misc;
3343                 vcpu->arch.mcg_status = mce->mcg_status;
3344                 banks[1] = mce->status;
3345                 kvm_queue_exception(vcpu, MC_VECTOR);
3346         } else if (!(banks[1] & MCI_STATUS_VAL)
3347                    || !(banks[1] & MCI_STATUS_UC)) {
3348                 if (banks[1] & MCI_STATUS_VAL)
3349                         mce->status |= MCI_STATUS_OVER;
3350                 banks[2] = mce->addr;
3351                 banks[3] = mce->misc;
3352                 banks[1] = mce->status;
3353         } else
3354                 banks[1] |= MCI_STATUS_OVER;
3355         return 0;
3356 }
3357
3358 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3359                                                struct kvm_vcpu_events *events)
3360 {
3361         process_nmi(vcpu);
3362         /*
3363          * FIXME: pass injected and pending separately.  This is only
3364          * needed for nested virtualization, whose state cannot be
3365          * migrated yet.  For now we can combine them.
3366          */
3367         events->exception.injected =
3368                 (vcpu->arch.exception.pending ||
3369                  vcpu->arch.exception.injected) &&
3370                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
3371         events->exception.nr = vcpu->arch.exception.nr;
3372         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3373         events->exception.pad = 0;
3374         events->exception.error_code = vcpu->arch.exception.error_code;
3375
3376         events->interrupt.injected =
3377                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3378         events->interrupt.nr = vcpu->arch.interrupt.nr;
3379         events->interrupt.soft = 0;
3380         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3381
3382         events->nmi.injected = vcpu->arch.nmi_injected;
3383         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3384         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3385         events->nmi.pad = 0;
3386
3387         events->sipi_vector = 0; /* never valid when reporting to user space */
3388
3389         events->smi.smm = is_smm(vcpu);
3390         events->smi.pending = vcpu->arch.smi_pending;
3391         events->smi.smm_inside_nmi =
3392                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3393         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3394
3395         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3396                          | KVM_VCPUEVENT_VALID_SHADOW
3397                          | KVM_VCPUEVENT_VALID_SMM);
3398         memset(&events->reserved, 0, sizeof(events->reserved));
3399 }
3400
3401 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags);
3402
3403 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3404                                               struct kvm_vcpu_events *events)
3405 {
3406         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3407                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3408                               | KVM_VCPUEVENT_VALID_SHADOW
3409                               | KVM_VCPUEVENT_VALID_SMM))
3410                 return -EINVAL;
3411
3412         if (events->exception.injected &&
3413             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR ||
3414              is_guest_mode(vcpu)))
3415                 return -EINVAL;
3416
3417         /* INITs are latched while in SMM */
3418         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3419             (events->smi.smm || events->smi.pending) &&
3420             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3421                 return -EINVAL;
3422
3423         process_nmi(vcpu);
3424         vcpu->arch.exception.injected = false;
3425         vcpu->arch.exception.pending = events->exception.injected;
3426         vcpu->arch.exception.nr = events->exception.nr;
3427         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3428         vcpu->arch.exception.error_code = events->exception.error_code;
3429
3430         vcpu->arch.interrupt.injected = events->interrupt.injected;
3431         vcpu->arch.interrupt.nr = events->interrupt.nr;
3432         vcpu->arch.interrupt.soft = events->interrupt.soft;
3433         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3434                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3435                                                   events->interrupt.shadow);
3436
3437         vcpu->arch.nmi_injected = events->nmi.injected;
3438         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3439                 vcpu->arch.nmi_pending = events->nmi.pending;
3440         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3441
3442         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3443             lapic_in_kernel(vcpu))
3444                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3445
3446         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3447                 u32 hflags = vcpu->arch.hflags;
3448                 if (events->smi.smm)
3449                         hflags |= HF_SMM_MASK;
3450                 else
3451                         hflags &= ~HF_SMM_MASK;
3452                 kvm_set_hflags(vcpu, hflags);
3453
3454                 vcpu->arch.smi_pending = events->smi.pending;
3455
3456                 if (events->smi.smm) {
3457                         if (events->smi.smm_inside_nmi)
3458                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3459                         else
3460                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3461                         if (lapic_in_kernel(vcpu)) {
3462                                 if (events->smi.latched_init)
3463                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3464                                 else
3465                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3466                         }
3467                 }
3468         }
3469
3470         kvm_make_request(KVM_REQ_EVENT, vcpu);
3471
3472         return 0;
3473 }
3474
3475 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3476                                              struct kvm_debugregs *dbgregs)
3477 {
3478         unsigned long val;
3479
3480         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3481         kvm_get_dr(vcpu, 6, &val);
3482         dbgregs->dr6 = val;
3483         dbgregs->dr7 = vcpu->arch.dr7;
3484         dbgregs->flags = 0;
3485         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3486 }
3487
3488 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3489                                             struct kvm_debugregs *dbgregs)
3490 {
3491         if (dbgregs->flags)
3492                 return -EINVAL;
3493
3494         if (dbgregs->dr6 & ~0xffffffffull)
3495                 return -EINVAL;
3496         if (dbgregs->dr7 & ~0xffffffffull)
3497                 return -EINVAL;
3498
3499         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3500         kvm_update_dr0123(vcpu);
3501         vcpu->arch.dr6 = dbgregs->dr6;
3502         kvm_update_dr6(vcpu);
3503         vcpu->arch.dr7 = dbgregs->dr7;
3504         kvm_update_dr7(vcpu);
3505
3506         return 0;
3507 }
3508
3509 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3510
3511 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3512 {
3513         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3514         u64 xstate_bv = xsave->header.xfeatures;
3515         u64 valid;
3516
3517         /*
3518          * Copy legacy XSAVE area, to avoid complications with CPUID
3519          * leaves 0 and 1 in the loop below.
3520          */
3521         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3522
3523         /* Set XSTATE_BV */
3524         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3525         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3526
3527         /*
3528          * Copy each region from the possibly compacted offset to the
3529          * non-compacted offset.
3530          */
3531         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3532         while (valid) {
3533                 u64 feature = valid & -valid;
3534                 int index = fls64(feature) - 1;
3535                 void *src = get_xsave_addr(xsave, feature);
3536
3537                 if (src) {
3538                         u32 size, offset, ecx, edx;
3539                         cpuid_count(XSTATE_CPUID, index,
3540                                     &size, &offset, &ecx, &edx);
3541                         if (feature == XFEATURE_MASK_PKRU)
3542                                 memcpy(dest + offset, &vcpu->arch.pkru,
3543                                        sizeof(vcpu->arch.pkru));
3544                         else
3545                                 memcpy(dest + offset, src, size);
3546
3547                 }
3548
3549                 valid -= feature;
3550         }
3551 }
3552
3553 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3554 {
3555         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
3556         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3557         u64 valid;
3558
3559         /*
3560          * Copy legacy XSAVE area, to avoid complications with CPUID
3561          * leaves 0 and 1 in the loop below.
3562          */
3563         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3564
3565         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3566         xsave->header.xfeatures = xstate_bv;
3567         if (boot_cpu_has(X86_FEATURE_XSAVES))
3568                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3569
3570         /*
3571          * Copy each region from the non-compacted offset to the
3572          * possibly compacted offset.
3573          */
3574         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3575         while (valid) {
3576                 u64 feature = valid & -valid;
3577                 int index = fls64(feature) - 1;
3578                 void *dest = get_xsave_addr(xsave, feature);
3579
3580                 if (dest) {
3581                         u32 size, offset, ecx, edx;
3582                         cpuid_count(XSTATE_CPUID, index,
3583                                     &size, &offset, &ecx, &edx);
3584                         if (feature == XFEATURE_MASK_PKRU)
3585                                 memcpy(&vcpu->arch.pkru, src + offset,
3586                                        sizeof(vcpu->arch.pkru));
3587                         else
3588                                 memcpy(dest, src + offset, size);
3589                 }
3590
3591                 valid -= feature;
3592         }
3593 }
3594
3595 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3596                                          struct kvm_xsave *guest_xsave)
3597 {
3598         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3599                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3600                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3601         } else {
3602                 memcpy(guest_xsave->region,
3603                         &vcpu->arch.guest_fpu.state.fxsave,
3604                         sizeof(struct fxregs_state));
3605                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3606                         XFEATURE_MASK_FPSSE;
3607         }
3608 }
3609
3610 #define XSAVE_MXCSR_OFFSET 24
3611
3612 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3613                                         struct kvm_xsave *guest_xsave)
3614 {
3615         u64 xstate_bv =
3616                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3617         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3618
3619         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3620                 /*
3621                  * Here we allow setting states that are not present in
3622                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3623                  * with old userspace.
3624                  */
3625                 if (xstate_bv & ~kvm_supported_xcr0() ||
3626                         mxcsr & ~mxcsr_feature_mask)
3627                         return -EINVAL;
3628                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3629         } else {
3630                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3631                         mxcsr & ~mxcsr_feature_mask)
3632                         return -EINVAL;
3633                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
3634                         guest_xsave->region, sizeof(struct fxregs_state));
3635         }
3636         return 0;
3637 }
3638
3639 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3640                                         struct kvm_xcrs *guest_xcrs)
3641 {
3642         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
3643                 guest_xcrs->nr_xcrs = 0;
3644                 return;
3645         }
3646
3647         guest_xcrs->nr_xcrs = 1;
3648         guest_xcrs->flags = 0;
3649         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3650         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3651 }
3652
3653 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3654                                        struct kvm_xcrs *guest_xcrs)
3655 {
3656         int i, r = 0;
3657
3658         if (!boot_cpu_has(X86_FEATURE_XSAVE))
3659                 return -EINVAL;
3660
3661         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3662                 return -EINVAL;
3663
3664         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3665                 /* Only support XCR0 currently */
3666                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3667                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3668                                 guest_xcrs->xcrs[i].value);
3669                         break;
3670                 }
3671         if (r)
3672                 r = -EINVAL;
3673         return r;
3674 }
3675
3676 /*
3677  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3678  * stopped by the hypervisor.  This function will be called from the host only.
3679  * EINVAL is returned when the host attempts to set the flag for a guest that
3680  * does not support pv clocks.
3681  */
3682 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3683 {
3684         if (!vcpu->arch.pv_time_enabled)
3685                 return -EINVAL;
3686         vcpu->arch.pvclock_set_guest_stopped_request = true;
3687         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3688         return 0;
3689 }
3690
3691 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
3692                                      struct kvm_enable_cap *cap)
3693 {
3694         if (cap->flags)
3695                 return -EINVAL;
3696
3697         switch (cap->cap) {
3698         case KVM_CAP_HYPERV_SYNIC2:
3699                 if (cap->args[0])
3700                         return -EINVAL;
3701         case KVM_CAP_HYPERV_SYNIC:
3702                 if (!irqchip_in_kernel(vcpu->kvm))
3703                         return -EINVAL;
3704                 return kvm_hv_activate_synic(vcpu, cap->cap ==
3705                                              KVM_CAP_HYPERV_SYNIC2);
3706         default:
3707                 return -EINVAL;
3708         }
3709 }
3710
3711 long kvm_arch_vcpu_ioctl(struct file *filp,
3712                          unsigned int ioctl, unsigned long arg)
3713 {
3714         struct kvm_vcpu *vcpu = filp->private_data;
3715         void __user *argp = (void __user *)arg;
3716         int r;
3717         union {
3718                 struct kvm_lapic_state *lapic;
3719                 struct kvm_xsave *xsave;
3720                 struct kvm_xcrs *xcrs;
3721                 void *buffer;
3722         } u;
3723
3724         vcpu_load(vcpu);
3725
3726         u.buffer = NULL;
3727         switch (ioctl) {
3728         case KVM_GET_LAPIC: {
3729                 r = -EINVAL;
3730                 if (!lapic_in_kernel(vcpu))
3731                         goto out;
3732                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3733
3734                 r = -ENOMEM;
3735                 if (!u.lapic)
3736                         goto out;
3737                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3738                 if (r)
3739                         goto out;
3740                 r = -EFAULT;
3741                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3742                         goto out;
3743                 r = 0;
3744                 break;
3745         }
3746         case KVM_SET_LAPIC: {
3747                 r = -EINVAL;
3748                 if (!lapic_in_kernel(vcpu))
3749                         goto out;
3750                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3751                 if (IS_ERR(u.lapic)) {
3752                         r = PTR_ERR(u.lapic);
3753                         goto out_nofree;
3754                 }
3755
3756                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3757                 break;
3758         }
3759         case KVM_INTERRUPT: {
3760                 struct kvm_interrupt irq;
3761
3762                 r = -EFAULT;
3763                 if (copy_from_user(&irq, argp, sizeof irq))
3764                         goto out;
3765                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3766                 break;
3767         }
3768         case KVM_NMI: {
3769                 r = kvm_vcpu_ioctl_nmi(vcpu);
3770                 break;
3771         }
3772         case KVM_SMI: {
3773                 r = kvm_vcpu_ioctl_smi(vcpu);
3774                 break;
3775         }
3776         case KVM_SET_CPUID: {
3777                 struct kvm_cpuid __user *cpuid_arg = argp;
3778                 struct kvm_cpuid cpuid;
3779
3780                 r = -EFAULT;
3781                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3782                         goto out;
3783                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3784                 break;
3785         }
3786         case KVM_SET_CPUID2: {
3787                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3788                 struct kvm_cpuid2 cpuid;
3789
3790                 r = -EFAULT;
3791                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3792                         goto out;
3793                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3794                                               cpuid_arg->entries);
3795                 break;
3796         }
3797         case KVM_GET_CPUID2: {
3798                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3799                 struct kvm_cpuid2 cpuid;
3800
3801                 r = -EFAULT;
3802                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3803                         goto out;
3804                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3805                                               cpuid_arg->entries);
3806                 if (r)
3807                         goto out;
3808                 r = -EFAULT;
3809                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3810                         goto out;
3811                 r = 0;
3812                 break;
3813         }
3814         case KVM_GET_MSRS: {
3815                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3816                 r = msr_io(vcpu, argp, do_get_msr, 1);
3817                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3818                 break;
3819         }
3820         case KVM_SET_MSRS: {
3821                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
3822                 r = msr_io(vcpu, argp, do_set_msr, 0);
3823                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3824                 break;
3825         }
3826         case KVM_TPR_ACCESS_REPORTING: {
3827                 struct kvm_tpr_access_ctl tac;
3828
3829                 r = -EFAULT;
3830                 if (copy_from_user(&tac, argp, sizeof tac))
3831                         goto out;
3832                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3833                 if (r)
3834                         goto out;
3835                 r = -EFAULT;
3836                 if (copy_to_user(argp, &tac, sizeof tac))
3837                         goto out;
3838                 r = 0;
3839                 break;
3840         };
3841         case KVM_SET_VAPIC_ADDR: {
3842                 struct kvm_vapic_addr va;
3843                 int idx;
3844
3845                 r = -EINVAL;
3846                 if (!lapic_in_kernel(vcpu))
3847                         goto out;
3848                 r = -EFAULT;
3849                 if (copy_from_user(&va, argp, sizeof va))
3850                         goto out;
3851                 idx = srcu_read_lock(&vcpu->kvm->srcu);
3852                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3853                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
3854                 break;
3855         }
3856         case KVM_X86_SETUP_MCE: {
3857                 u64 mcg_cap;
3858
3859                 r = -EFAULT;
3860                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3861                         goto out;
3862                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3863                 break;
3864         }
3865         case KVM_X86_SET_MCE: {
3866                 struct kvm_x86_mce mce;
3867
3868                 r = -EFAULT;
3869                 if (copy_from_user(&mce, argp, sizeof mce))
3870                         goto out;
3871                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3872                 break;
3873         }
3874         case KVM_GET_VCPU_EVENTS: {
3875                 struct kvm_vcpu_events events;
3876
3877                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3878
3879                 r = -EFAULT;
3880                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3881                         break;
3882                 r = 0;
3883                 break;
3884         }
3885         case KVM_SET_VCPU_EVENTS: {
3886                 struct kvm_vcpu_events events;
3887
3888                 r = -EFAULT;
3889                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3890                         break;
3891
3892                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3893                 break;
3894         }
3895         case KVM_GET_DEBUGREGS: {
3896                 struct kvm_debugregs dbgregs;
3897
3898                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3899
3900                 r = -EFAULT;
3901                 if (copy_to_user(argp, &dbgregs,
3902                                  sizeof(struct kvm_debugregs)))
3903                         break;
3904                 r = 0;
3905                 break;
3906         }
3907         case KVM_SET_DEBUGREGS: {
3908                 struct kvm_debugregs dbgregs;
3909
3910                 r = -EFAULT;
3911                 if (copy_from_user(&dbgregs, argp,
3912                                    sizeof(struct kvm_debugregs)))
3913                         break;
3914
3915                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3916                 break;
3917         }
3918         case KVM_GET_XSAVE: {
3919                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3920                 r = -ENOMEM;
3921                 if (!u.xsave)
3922                         break;
3923
3924                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3925
3926                 r = -EFAULT;
3927                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3928                         break;
3929                 r = 0;
3930                 break;
3931         }
3932         case KVM_SET_XSAVE: {
3933                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3934                 if (IS_ERR(u.xsave)) {
3935                         r = PTR_ERR(u.xsave);
3936                         goto out_nofree;
3937                 }
3938
3939                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3940                 break;
3941         }
3942         case KVM_GET_XCRS: {
3943                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3944                 r = -ENOMEM;
3945                 if (!u.xcrs)
3946                         break;
3947
3948                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3949
3950                 r = -EFAULT;
3951                 if (copy_to_user(argp, u.xcrs,
3952                                  sizeof(struct kvm_xcrs)))
3953                         break;
3954                 r = 0;
3955                 break;
3956         }
3957         case KVM_SET_XCRS: {
3958                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3959                 if (IS_ERR(u.xcrs)) {
3960                         r = PTR_ERR(u.xcrs);
3961                         goto out_nofree;
3962                 }
3963
3964                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3965                 break;
3966         }
3967         case KVM_SET_TSC_KHZ: {
3968                 u32 user_tsc_khz;
3969
3970                 r = -EINVAL;
3971                 user_tsc_khz = (u32)arg;
3972
3973                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3974                         goto out;
3975
3976                 if (user_tsc_khz == 0)
3977                         user_tsc_khz = tsc_khz;
3978
3979                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
3980                         r = 0;
3981
3982                 goto out;
3983         }
3984         case KVM_GET_TSC_KHZ: {
3985                 r = vcpu->arch.virtual_tsc_khz;
3986                 goto out;
3987         }
3988         case KVM_KVMCLOCK_CTRL: {
3989                 r = kvm_set_guest_paused(vcpu);
3990                 goto out;
3991         }
3992         case KVM_ENABLE_CAP: {
3993                 struct kvm_enable_cap cap;
3994
3995                 r = -EFAULT;
3996                 if (copy_from_user(&cap, argp, sizeof(cap)))
3997                         goto out;
3998                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
3999                 break;
4000         }
4001         case KVM_GET_NESTED_STATE: {
4002                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4003                 u32 user_data_size;
4004
4005                 r = -EINVAL;
4006                 if (!kvm_x86_ops->get_nested_state)
4007                         break;
4008
4009                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4010                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4011                         return -EFAULT;
4012
4013                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4014                                                   user_data_size);
4015                 if (r < 0)
4016                         return r;
4017
4018                 if (r > user_data_size) {
4019                         if (put_user(r, &user_kvm_nested_state->size))
4020                                 return -EFAULT;
4021                         return -E2BIG;
4022                 }
4023                 r = 0;
4024                 break;
4025         }
4026         case KVM_SET_NESTED_STATE: {
4027                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4028                 struct kvm_nested_state kvm_state;
4029
4030                 r = -EINVAL;
4031                 if (!kvm_x86_ops->set_nested_state)
4032                         break;
4033
4034                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4035                         return -EFAULT;
4036
4037                 if (kvm_state.size < sizeof(kvm_state))
4038                         return -EINVAL;
4039
4040                 if (kvm_state.flags &
4041                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE))
4042                         return -EINVAL;
4043
4044                 /* nested_run_pending implies guest_mode.  */
4045                 if (kvm_state.flags == KVM_STATE_NESTED_RUN_PENDING)
4046                         return -EINVAL;
4047
4048                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4049                 break;
4050         }
4051         default:
4052                 r = -EINVAL;
4053         }
4054 out:
4055         kfree(u.buffer);
4056 out_nofree:
4057         vcpu_put(vcpu);
4058         return r;
4059 }
4060
4061 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4062 {
4063         return VM_FAULT_SIGBUS;
4064 }
4065
4066 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4067 {
4068         int ret;
4069
4070         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4071                 return -EINVAL;
4072         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4073         return ret;
4074 }
4075
4076 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4077                                               u64 ident_addr)
4078 {
4079         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4080 }
4081
4082 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4083                                           u32 kvm_nr_mmu_pages)
4084 {
4085         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4086                 return -EINVAL;
4087
4088         mutex_lock(&kvm->slots_lock);
4089
4090         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4091         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4092
4093         mutex_unlock(&kvm->slots_lock);
4094         return 0;
4095 }
4096
4097 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4098 {
4099         return kvm->arch.n_max_mmu_pages;
4100 }
4101
4102 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4103 {
4104         struct kvm_pic *pic = kvm->arch.vpic;
4105         int r;
4106
4107         r = 0;
4108         switch (chip->chip_id) {
4109         case KVM_IRQCHIP_PIC_MASTER:
4110                 memcpy(&chip->chip.pic, &pic->pics[0],
4111                         sizeof(struct kvm_pic_state));
4112                 break;
4113         case KVM_IRQCHIP_PIC_SLAVE:
4114                 memcpy(&chip->chip.pic, &pic->pics[1],
4115                         sizeof(struct kvm_pic_state));
4116                 break;
4117         case KVM_IRQCHIP_IOAPIC:
4118                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4119                 break;
4120         default:
4121                 r = -EINVAL;
4122                 break;
4123         }
4124         return r;
4125 }
4126
4127 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4128 {
4129         struct kvm_pic *pic = kvm->arch.vpic;
4130         int r;
4131
4132         r = 0;
4133         switch (chip->chip_id) {
4134         case KVM_IRQCHIP_PIC_MASTER:
4135                 spin_lock(&pic->lock);
4136                 memcpy(&pic->pics[0], &chip->chip.pic,
4137                         sizeof(struct kvm_pic_state));
4138                 spin_unlock(&pic->lock);
4139                 break;
4140         case KVM_IRQCHIP_PIC_SLAVE:
4141                 spin_lock(&pic->lock);
4142                 memcpy(&pic->pics[1], &chip->chip.pic,
4143                         sizeof(struct kvm_pic_state));
4144                 spin_unlock(&pic->lock);
4145                 break;
4146         case KVM_IRQCHIP_IOAPIC:
4147                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4148                 break;
4149         default:
4150                 r = -EINVAL;
4151                 break;
4152         }
4153         kvm_pic_update_irq(pic);
4154         return r;
4155 }
4156
4157 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4158 {
4159         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4160
4161         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4162
4163         mutex_lock(&kps->lock);
4164         memcpy(ps, &kps->channels, sizeof(*ps));
4165         mutex_unlock(&kps->lock);
4166         return 0;
4167 }
4168
4169 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4170 {
4171         int i;
4172         struct kvm_pit *pit = kvm->arch.vpit;
4173
4174         mutex_lock(&pit->pit_state.lock);
4175         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4176         for (i = 0; i < 3; i++)
4177                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4178         mutex_unlock(&pit->pit_state.lock);
4179         return 0;
4180 }
4181
4182 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4183 {
4184         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4185         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4186                 sizeof(ps->channels));
4187         ps->flags = kvm->arch.vpit->pit_state.flags;
4188         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4189         memset(&ps->reserved, 0, sizeof(ps->reserved));
4190         return 0;
4191 }
4192
4193 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4194 {
4195         int start = 0;
4196         int i;
4197         u32 prev_legacy, cur_legacy;
4198         struct kvm_pit *pit = kvm->arch.vpit;
4199
4200         mutex_lock(&pit->pit_state.lock);
4201         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4202         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4203         if (!prev_legacy && cur_legacy)
4204                 start = 1;
4205         memcpy(&pit->pit_state.channels, &ps->channels,
4206                sizeof(pit->pit_state.channels));
4207         pit->pit_state.flags = ps->flags;
4208         for (i = 0; i < 3; i++)
4209                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4210                                    start && i == 0);
4211         mutex_unlock(&pit->pit_state.lock);
4212         return 0;
4213 }
4214
4215 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4216                                  struct kvm_reinject_control *control)
4217 {
4218         struct kvm_pit *pit = kvm->arch.vpit;
4219
4220         if (!pit)
4221                 return -ENXIO;
4222
4223         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4224          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4225          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4226          */
4227         mutex_lock(&pit->pit_state.lock);
4228         kvm_pit_set_reinject(pit, control->pit_reinject);
4229         mutex_unlock(&pit->pit_state.lock);
4230
4231         return 0;
4232 }
4233
4234 /**
4235  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4236  * @kvm: kvm instance
4237  * @log: slot id and address to which we copy the log
4238  *
4239  * Steps 1-4 below provide general overview of dirty page logging. See
4240  * kvm_get_dirty_log_protect() function description for additional details.
4241  *
4242  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4243  * always flush the TLB (step 4) even if previous step failed  and the dirty
4244  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4245  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4246  * writes will be marked dirty for next log read.
4247  *
4248  *   1. Take a snapshot of the bit and clear it if needed.
4249  *   2. Write protect the corresponding page.
4250  *   3. Copy the snapshot to the userspace.
4251  *   4. Flush TLB's if needed.
4252  */
4253 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4254 {
4255         bool is_dirty = false;
4256         int r;
4257
4258         mutex_lock(&kvm->slots_lock);
4259
4260         /*
4261          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4262          */
4263         if (kvm_x86_ops->flush_log_dirty)
4264                 kvm_x86_ops->flush_log_dirty(kvm);
4265
4266         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
4267
4268         /*
4269          * All the TLBs can be flushed out of mmu lock, see the comments in
4270          * kvm_mmu_slot_remove_write_access().
4271          */
4272         lockdep_assert_held(&kvm->slots_lock);
4273         if (is_dirty)
4274                 kvm_flush_remote_tlbs(kvm);
4275
4276         mutex_unlock(&kvm->slots_lock);
4277         return r;
4278 }
4279
4280 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4281                         bool line_status)
4282 {
4283         if (!irqchip_in_kernel(kvm))
4284                 return -ENXIO;
4285
4286         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4287                                         irq_event->irq, irq_event->level,
4288                                         line_status);
4289         return 0;
4290 }
4291
4292 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4293                                    struct kvm_enable_cap *cap)
4294 {
4295         int r;
4296
4297         if (cap->flags)
4298                 return -EINVAL;
4299
4300         switch (cap->cap) {
4301         case KVM_CAP_DISABLE_QUIRKS:
4302                 kvm->arch.disabled_quirks = cap->args[0];
4303                 r = 0;
4304                 break;
4305         case KVM_CAP_SPLIT_IRQCHIP: {
4306                 mutex_lock(&kvm->lock);
4307                 r = -EINVAL;
4308                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4309                         goto split_irqchip_unlock;
4310                 r = -EEXIST;
4311                 if (irqchip_in_kernel(kvm))
4312                         goto split_irqchip_unlock;
4313                 if (kvm->created_vcpus)
4314                         goto split_irqchip_unlock;
4315                 r = kvm_setup_empty_irq_routing(kvm);
4316                 if (r)
4317                         goto split_irqchip_unlock;
4318                 /* Pairs with irqchip_in_kernel. */
4319                 smp_wmb();
4320                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4321                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4322                 r = 0;
4323 split_irqchip_unlock:
4324                 mutex_unlock(&kvm->lock);
4325                 break;
4326         }
4327         case KVM_CAP_X2APIC_API:
4328                 r = -EINVAL;
4329                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4330                         break;
4331
4332                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4333                         kvm->arch.x2apic_format = true;
4334                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4335                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4336
4337                 r = 0;
4338                 break;
4339         case KVM_CAP_X86_DISABLE_EXITS:
4340                 r = -EINVAL;
4341                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4342                         break;
4343
4344                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4345                         kvm_can_mwait_in_guest())
4346                         kvm->arch.mwait_in_guest = true;
4347                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4348                         kvm->arch.hlt_in_guest = true;
4349                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4350                         kvm->arch.pause_in_guest = true;
4351                 r = 0;
4352                 break;
4353         default:
4354                 r = -EINVAL;
4355                 break;
4356         }
4357         return r;
4358 }
4359
4360 long kvm_arch_vm_ioctl(struct file *filp,
4361                        unsigned int ioctl, unsigned long arg)
4362 {
4363         struct kvm *kvm = filp->private_data;
4364         void __user *argp = (void __user *)arg;
4365         int r = -ENOTTY;
4366         /*
4367          * This union makes it completely explicit to gcc-3.x
4368          * that these two variables' stack usage should be
4369          * combined, not added together.
4370          */
4371         union {
4372                 struct kvm_pit_state ps;
4373                 struct kvm_pit_state2 ps2;
4374                 struct kvm_pit_config pit_config;
4375         } u;
4376
4377         switch (ioctl) {
4378         case KVM_SET_TSS_ADDR:
4379                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4380                 break;
4381         case KVM_SET_IDENTITY_MAP_ADDR: {
4382                 u64 ident_addr;
4383
4384                 mutex_lock(&kvm->lock);
4385                 r = -EINVAL;
4386                 if (kvm->created_vcpus)
4387                         goto set_identity_unlock;
4388                 r = -EFAULT;
4389                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
4390                         goto set_identity_unlock;
4391                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4392 set_identity_unlock:
4393                 mutex_unlock(&kvm->lock);
4394                 break;
4395         }
4396         case KVM_SET_NR_MMU_PAGES:
4397                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4398                 break;
4399         case KVM_GET_NR_MMU_PAGES:
4400                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4401                 break;
4402         case KVM_CREATE_IRQCHIP: {
4403                 mutex_lock(&kvm->lock);
4404
4405                 r = -EEXIST;
4406                 if (irqchip_in_kernel(kvm))
4407                         goto create_irqchip_unlock;
4408
4409                 r = -EINVAL;
4410                 if (kvm->created_vcpus)
4411                         goto create_irqchip_unlock;
4412
4413                 r = kvm_pic_init(kvm);
4414                 if (r)
4415                         goto create_irqchip_unlock;
4416
4417                 r = kvm_ioapic_init(kvm);
4418                 if (r) {
4419                         kvm_pic_destroy(kvm);
4420                         goto create_irqchip_unlock;
4421                 }
4422
4423                 r = kvm_setup_default_irq_routing(kvm);
4424                 if (r) {
4425                         kvm_ioapic_destroy(kvm);
4426                         kvm_pic_destroy(kvm);
4427                         goto create_irqchip_unlock;
4428                 }
4429                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4430                 smp_wmb();
4431                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4432         create_irqchip_unlock:
4433                 mutex_unlock(&kvm->lock);
4434                 break;
4435         }
4436         case KVM_CREATE_PIT:
4437                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4438                 goto create_pit;
4439         case KVM_CREATE_PIT2:
4440                 r = -EFAULT;
4441                 if (copy_from_user(&u.pit_config, argp,
4442                                    sizeof(struct kvm_pit_config)))
4443                         goto out;
4444         create_pit:
4445                 mutex_lock(&kvm->lock);
4446                 r = -EEXIST;
4447                 if (kvm->arch.vpit)
4448                         goto create_pit_unlock;
4449                 r = -ENOMEM;
4450                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4451                 if (kvm->arch.vpit)
4452                         r = 0;
4453         create_pit_unlock:
4454                 mutex_unlock(&kvm->lock);
4455                 break;
4456         case KVM_GET_IRQCHIP: {
4457                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4458                 struct kvm_irqchip *chip;
4459
4460                 chip = memdup_user(argp, sizeof(*chip));
4461                 if (IS_ERR(chip)) {
4462                         r = PTR_ERR(chip);
4463                         goto out;
4464                 }
4465
4466                 r = -ENXIO;
4467                 if (!irqchip_kernel(kvm))
4468                         goto get_irqchip_out;
4469                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4470                 if (r)
4471                         goto get_irqchip_out;
4472                 r = -EFAULT;
4473                 if (copy_to_user(argp, chip, sizeof *chip))
4474                         goto get_irqchip_out;
4475                 r = 0;
4476         get_irqchip_out:
4477                 kfree(chip);
4478                 break;
4479         }
4480         case KVM_SET_IRQCHIP: {
4481                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4482                 struct kvm_irqchip *chip;
4483
4484                 chip = memdup_user(argp, sizeof(*chip));
4485                 if (IS_ERR(chip)) {
4486                         r = PTR_ERR(chip);
4487                         goto out;
4488                 }
4489
4490                 r = -ENXIO;
4491                 if (!irqchip_kernel(kvm))
4492                         goto set_irqchip_out;
4493                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4494                 if (r)
4495                         goto set_irqchip_out;
4496                 r = 0;
4497         set_irqchip_out:
4498                 kfree(chip);
4499                 break;
4500         }
4501         case KVM_GET_PIT: {
4502                 r = -EFAULT;
4503                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4504                         goto out;
4505                 r = -ENXIO;
4506                 if (!kvm->arch.vpit)
4507                         goto out;
4508                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4509                 if (r)
4510                         goto out;
4511                 r = -EFAULT;
4512                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4513                         goto out;
4514                 r = 0;
4515                 break;
4516         }
4517         case KVM_SET_PIT: {
4518                 r = -EFAULT;
4519                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
4520                         goto out;
4521                 r = -ENXIO;
4522                 if (!kvm->arch.vpit)
4523                         goto out;
4524                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4525                 break;
4526         }
4527         case KVM_GET_PIT2: {
4528                 r = -ENXIO;
4529                 if (!kvm->arch.vpit)
4530                         goto out;
4531                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4532                 if (r)
4533                         goto out;
4534                 r = -EFAULT;
4535                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4536                         goto out;
4537                 r = 0;
4538                 break;
4539         }
4540         case KVM_SET_PIT2: {
4541                 r = -EFAULT;
4542                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4543                         goto out;
4544                 r = -ENXIO;
4545                 if (!kvm->arch.vpit)
4546                         goto out;
4547                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4548                 break;
4549         }
4550         case KVM_REINJECT_CONTROL: {
4551                 struct kvm_reinject_control control;
4552                 r =  -EFAULT;
4553                 if (copy_from_user(&control, argp, sizeof(control)))
4554                         goto out;
4555                 r = kvm_vm_ioctl_reinject(kvm, &control);
4556                 break;
4557         }
4558         case KVM_SET_BOOT_CPU_ID:
4559                 r = 0;
4560                 mutex_lock(&kvm->lock);
4561                 if (kvm->created_vcpus)
4562                         r = -EBUSY;
4563                 else
4564                         kvm->arch.bsp_vcpu_id = arg;
4565                 mutex_unlock(&kvm->lock);
4566                 break;
4567         case KVM_XEN_HVM_CONFIG: {
4568                 struct kvm_xen_hvm_config xhc;
4569                 r = -EFAULT;
4570                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
4571                         goto out;
4572                 r = -EINVAL;
4573                 if (xhc.flags)
4574                         goto out;
4575                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
4576                 r = 0;
4577                 break;
4578         }
4579         case KVM_SET_CLOCK: {
4580                 struct kvm_clock_data user_ns;
4581                 u64 now_ns;
4582
4583                 r = -EFAULT;
4584                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
4585                         goto out;
4586
4587                 r = -EINVAL;
4588                 if (user_ns.flags)
4589                         goto out;
4590
4591                 r = 0;
4592                 /*
4593                  * TODO: userspace has to take care of races with VCPU_RUN, so
4594                  * kvm_gen_update_masterclock() can be cut down to locked
4595                  * pvclock_update_vm_gtod_copy().
4596                  */
4597                 kvm_gen_update_masterclock(kvm);
4598                 now_ns = get_kvmclock_ns(kvm);
4599                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
4600                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
4601                 break;
4602         }
4603         case KVM_GET_CLOCK: {
4604                 struct kvm_clock_data user_ns;
4605                 u64 now_ns;
4606
4607                 now_ns = get_kvmclock_ns(kvm);
4608                 user_ns.clock = now_ns;
4609                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
4610                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
4611
4612                 r = -EFAULT;
4613                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
4614                         goto out;
4615                 r = 0;
4616                 break;
4617         }
4618         case KVM_ENABLE_CAP: {
4619                 struct kvm_enable_cap cap;
4620
4621                 r = -EFAULT;
4622                 if (copy_from_user(&cap, argp, sizeof(cap)))
4623                         goto out;
4624                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
4625                 break;
4626         }
4627         case KVM_MEMORY_ENCRYPT_OP: {
4628                 r = -ENOTTY;
4629                 if (kvm_x86_ops->mem_enc_op)
4630                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
4631                 break;
4632         }
4633         case KVM_MEMORY_ENCRYPT_REG_REGION: {
4634                 struct kvm_enc_region region;
4635
4636                 r = -EFAULT;
4637                 if (copy_from_user(&region, argp, sizeof(region)))
4638                         goto out;
4639
4640                 r = -ENOTTY;
4641                 if (kvm_x86_ops->mem_enc_reg_region)
4642                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
4643                 break;
4644         }
4645         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
4646                 struct kvm_enc_region region;
4647
4648                 r = -EFAULT;
4649                 if (copy_from_user(&region, argp, sizeof(region)))
4650                         goto out;
4651
4652                 r = -ENOTTY;
4653                 if (kvm_x86_ops->mem_enc_unreg_region)
4654                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
4655                 break;
4656         }
4657         case KVM_HYPERV_EVENTFD: {
4658                 struct kvm_hyperv_eventfd hvevfd;
4659
4660                 r = -EFAULT;
4661                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
4662                         goto out;
4663                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
4664                 break;
4665         }
4666         default:
4667                 r = -ENOTTY;
4668         }
4669 out:
4670         return r;
4671 }
4672
4673 static void kvm_init_msr_list(void)
4674 {
4675         u32 dummy[2];
4676         unsigned i, j;
4677
4678         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
4679                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
4680                         continue;
4681
4682                 /*
4683                  * Even MSRs that are valid in the host may not be exposed
4684                  * to the guests in some cases.
4685                  */
4686                 switch (msrs_to_save[i]) {
4687                 case MSR_IA32_BNDCFGS:
4688                         if (!kvm_x86_ops->mpx_supported())
4689                                 continue;
4690                         break;
4691                 case MSR_TSC_AUX:
4692                         if (!kvm_x86_ops->rdtscp_supported())
4693                                 continue;
4694                         break;
4695                 default:
4696                         break;
4697                 }
4698
4699                 if (j < i)
4700                         msrs_to_save[j] = msrs_to_save[i];
4701                 j++;
4702         }
4703         num_msrs_to_save = j;
4704
4705         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
4706                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
4707                         continue;
4708
4709                 if (j < i)
4710                         emulated_msrs[j] = emulated_msrs[i];
4711                 j++;
4712         }
4713         num_emulated_msrs = j;
4714
4715         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
4716                 struct kvm_msr_entry msr;
4717
4718                 msr.index = msr_based_features[i];
4719                 if (kvm_get_msr_feature(&msr))
4720                         continue;
4721
4722                 if (j < i)
4723                         msr_based_features[j] = msr_based_features[i];
4724                 j++;
4725         }
4726         num_msr_based_features = j;
4727 }
4728
4729 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
4730                            const void *v)
4731 {
4732         int handled = 0;
4733         int n;
4734
4735         do {
4736                 n = min(len, 8);
4737                 if (!(lapic_in_kernel(vcpu) &&
4738                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
4739                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
4740                         break;
4741                 handled += n;
4742                 addr += n;
4743                 len -= n;
4744                 v += n;
4745         } while (len);
4746
4747         return handled;
4748 }
4749
4750 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
4751 {
4752         int handled = 0;
4753         int n;
4754
4755         do {
4756                 n = min(len, 8);
4757                 if (!(lapic_in_kernel(vcpu) &&
4758                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
4759                                          addr, n, v))
4760                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
4761                         break;
4762                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
4763                 handled += n;
4764                 addr += n;
4765                 len -= n;
4766                 v += n;
4767         } while (len);
4768
4769         return handled;
4770 }
4771
4772 static void kvm_set_segment(struct kvm_vcpu *vcpu,
4773                         struct kvm_segment *var, int seg)
4774 {
4775         kvm_x86_ops->set_segment(vcpu, var, seg);
4776 }
4777
4778 void kvm_get_segment(struct kvm_vcpu *vcpu,
4779                      struct kvm_segment *var, int seg)
4780 {
4781         kvm_x86_ops->get_segment(vcpu, var, seg);
4782 }
4783
4784 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
4785                            struct x86_exception *exception)
4786 {
4787         gpa_t t_gpa;
4788
4789         BUG_ON(!mmu_is_nested(vcpu));
4790
4791         /* NPT walks are always user-walks */
4792         access |= PFERR_USER_MASK;
4793         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
4794
4795         return t_gpa;
4796 }
4797
4798 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
4799                               struct x86_exception *exception)
4800 {
4801         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4802         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4803 }
4804
4805  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
4806                                 struct x86_exception *exception)
4807 {
4808         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4809         access |= PFERR_FETCH_MASK;
4810         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4811 }
4812
4813 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
4814                                struct x86_exception *exception)
4815 {
4816         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4817         access |= PFERR_WRITE_MASK;
4818         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4819 }
4820
4821 /* uses this to access any guest's mapped memory without checking CPL */
4822 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
4823                                 struct x86_exception *exception)
4824 {
4825         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4826 }
4827
4828 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4829                                       struct kvm_vcpu *vcpu, u32 access,
4830                                       struct x86_exception *exception)
4831 {
4832         void *data = val;
4833         int r = X86EMUL_CONTINUE;
4834
4835         while (bytes) {
4836                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4837                                                             exception);
4838                 unsigned offset = addr & (PAGE_SIZE-1);
4839                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4840                 int ret;
4841
4842                 if (gpa == UNMAPPED_GVA)
4843                         return X86EMUL_PROPAGATE_FAULT;
4844                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4845                                                offset, toread);
4846                 if (ret < 0) {
4847                         r = X86EMUL_IO_NEEDED;
4848                         goto out;
4849                 }
4850
4851                 bytes -= toread;
4852                 data += toread;
4853                 addr += toread;
4854         }
4855 out:
4856         return r;
4857 }
4858
4859 /* used for instruction fetching */
4860 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4861                                 gva_t addr, void *val, unsigned int bytes,
4862                                 struct x86_exception *exception)
4863 {
4864         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4865         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4866         unsigned offset;
4867         int ret;
4868
4869         /* Inline kvm_read_guest_virt_helper for speed.  */
4870         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4871                                                     exception);
4872         if (unlikely(gpa == UNMAPPED_GVA))
4873                 return X86EMUL_PROPAGATE_FAULT;
4874
4875         offset = addr & (PAGE_SIZE-1);
4876         if (WARN_ON(offset + bytes > PAGE_SIZE))
4877                 bytes = (unsigned)PAGE_SIZE - offset;
4878         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4879                                        offset, bytes);
4880         if (unlikely(ret < 0))
4881                 return X86EMUL_IO_NEEDED;
4882
4883         return X86EMUL_CONTINUE;
4884 }
4885
4886 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
4887                                gva_t addr, void *val, unsigned int bytes,
4888                                struct x86_exception *exception)
4889 {
4890         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4891
4892         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4893                                           exception);
4894 }
4895 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4896
4897 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
4898                              gva_t addr, void *val, unsigned int bytes,
4899                              struct x86_exception *exception, bool system)
4900 {
4901         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4902         u32 access = 0;
4903
4904         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4905                 access |= PFERR_USER_MASK;
4906
4907         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
4908 }
4909
4910 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
4911                 unsigned long addr, void *val, unsigned int bytes)
4912 {
4913         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4914         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
4915
4916         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
4917 }
4918
4919 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4920                                       struct kvm_vcpu *vcpu, u32 access,
4921                                       struct x86_exception *exception)
4922 {
4923         void *data = val;
4924         int r = X86EMUL_CONTINUE;
4925
4926         while (bytes) {
4927                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4928                                                              access,
4929                                                              exception);
4930                 unsigned offset = addr & (PAGE_SIZE-1);
4931                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4932                 int ret;
4933
4934                 if (gpa == UNMAPPED_GVA)
4935                         return X86EMUL_PROPAGATE_FAULT;
4936                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4937                 if (ret < 0) {
4938                         r = X86EMUL_IO_NEEDED;
4939                         goto out;
4940                 }
4941
4942                 bytes -= towrite;
4943                 data += towrite;
4944                 addr += towrite;
4945         }
4946 out:
4947         return r;
4948 }
4949
4950 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
4951                               unsigned int bytes, struct x86_exception *exception,
4952                               bool system)
4953 {
4954         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4955         u32 access = PFERR_WRITE_MASK;
4956
4957         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
4958                 access |= PFERR_USER_MASK;
4959
4960         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4961                                            access, exception);
4962 }
4963
4964 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
4965                                 unsigned int bytes, struct x86_exception *exception)
4966 {
4967         /* kvm_write_guest_virt_system can pull in tons of pages. */
4968         vcpu->arch.l1tf_flush_l1d = true;
4969
4970         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
4971                                            PFERR_WRITE_MASK, exception);
4972 }
4973 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4974
4975 int handle_ud(struct kvm_vcpu *vcpu)
4976 {
4977         int emul_type = EMULTYPE_TRAP_UD;
4978         enum emulation_result er;
4979         char sig[5]; /* ud2; .ascii "kvm" */
4980         struct x86_exception e;
4981
4982         if (force_emulation_prefix &&
4983             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
4984                                 sig, sizeof(sig), &e) == 0 &&
4985             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
4986                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
4987                 emul_type = 0;
4988         }
4989
4990         er = emulate_instruction(vcpu, emul_type);
4991         if (er == EMULATE_USER_EXIT)
4992                 return 0;
4993         if (er != EMULATE_DONE)
4994                 kvm_queue_exception(vcpu, UD_VECTOR);
4995         return 1;
4996 }
4997 EXPORT_SYMBOL_GPL(handle_ud);
4998
4999 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5000                             gpa_t gpa, bool write)
5001 {
5002         /* For APIC access vmexit */
5003         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5004                 return 1;
5005
5006         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5007                 trace_vcpu_match_mmio(gva, gpa, write, true);
5008                 return 1;
5009         }
5010
5011         return 0;
5012 }
5013
5014 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5015                                 gpa_t *gpa, struct x86_exception *exception,
5016                                 bool write)
5017 {
5018         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5019                 | (write ? PFERR_WRITE_MASK : 0);
5020
5021         /*
5022          * currently PKRU is only applied to ept enabled guest so
5023          * there is no pkey in EPT page table for L1 guest or EPT
5024          * shadow page table for L2 guest.
5025          */
5026         if (vcpu_match_mmio_gva(vcpu, gva)
5027             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5028                                  vcpu->arch.access, 0, access)) {
5029                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5030                                         (gva & (PAGE_SIZE - 1));
5031                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5032                 return 1;
5033         }
5034
5035         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5036
5037         if (*gpa == UNMAPPED_GVA)
5038                 return -1;
5039
5040         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5041 }
5042
5043 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5044                         const void *val, int bytes)
5045 {
5046         int ret;
5047
5048         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5049         if (ret < 0)
5050                 return 0;
5051         kvm_page_track_write(vcpu, gpa, val, bytes);
5052         return 1;
5053 }
5054
5055 struct read_write_emulator_ops {
5056         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5057                                   int bytes);
5058         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5059                                   void *val, int bytes);
5060         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5061                                int bytes, void *val);
5062         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5063                                     void *val, int bytes);
5064         bool write;
5065 };
5066
5067 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5068 {
5069         if (vcpu->mmio_read_completed) {
5070                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5071                                vcpu->mmio_fragments[0].gpa, val);
5072                 vcpu->mmio_read_completed = 0;
5073                 return 1;
5074         }
5075
5076         return 0;
5077 }
5078
5079 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5080                         void *val, int bytes)
5081 {
5082         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5083 }
5084
5085 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5086                          void *val, int bytes)
5087 {
5088         return emulator_write_phys(vcpu, gpa, val, bytes);
5089 }
5090
5091 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5092 {
5093         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5094         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5095 }
5096
5097 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5098                           void *val, int bytes)
5099 {
5100         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5101         return X86EMUL_IO_NEEDED;
5102 }
5103
5104 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5105                            void *val, int bytes)
5106 {
5107         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5108
5109         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5110         return X86EMUL_CONTINUE;
5111 }
5112
5113 static const struct read_write_emulator_ops read_emultor = {
5114         .read_write_prepare = read_prepare,
5115         .read_write_emulate = read_emulate,
5116         .read_write_mmio = vcpu_mmio_read,
5117         .read_write_exit_mmio = read_exit_mmio,
5118 };
5119
5120 static const struct read_write_emulator_ops write_emultor = {
5121         .read_write_emulate = write_emulate,
5122         .read_write_mmio = write_mmio,
5123         .read_write_exit_mmio = write_exit_mmio,
5124         .write = true,
5125 };
5126
5127 static int emulator_read_write_onepage(unsigned long addr, void *val,
5128                                        unsigned int bytes,
5129                                        struct x86_exception *exception,
5130                                        struct kvm_vcpu *vcpu,
5131                                        const struct read_write_emulator_ops *ops)
5132 {
5133         gpa_t gpa;
5134         int handled, ret;
5135         bool write = ops->write;
5136         struct kvm_mmio_fragment *frag;
5137         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5138
5139         /*
5140          * If the exit was due to a NPF we may already have a GPA.
5141          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5142          * Note, this cannot be used on string operations since string
5143          * operation using rep will only have the initial GPA from the NPF
5144          * occurred.
5145          */
5146         if (vcpu->arch.gpa_available &&
5147             emulator_can_use_gpa(ctxt) &&
5148             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5149                 gpa = vcpu->arch.gpa_val;
5150                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5151         } else {
5152                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5153                 if (ret < 0)
5154                         return X86EMUL_PROPAGATE_FAULT;
5155         }
5156
5157         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5158                 return X86EMUL_CONTINUE;
5159
5160         /*
5161          * Is this MMIO handled locally?
5162          */
5163         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5164         if (handled == bytes)
5165                 return X86EMUL_CONTINUE;
5166
5167         gpa += handled;
5168         bytes -= handled;
5169         val += handled;
5170
5171         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5172         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5173         frag->gpa = gpa;
5174         frag->data = val;
5175         frag->len = bytes;
5176         return X86EMUL_CONTINUE;
5177 }
5178
5179 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5180                         unsigned long addr,
5181                         void *val, unsigned int bytes,
5182                         struct x86_exception *exception,
5183                         const struct read_write_emulator_ops *ops)
5184 {
5185         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5186         gpa_t gpa;
5187         int rc;
5188
5189         if (ops->read_write_prepare &&
5190                   ops->read_write_prepare(vcpu, val, bytes))
5191                 return X86EMUL_CONTINUE;
5192
5193         vcpu->mmio_nr_fragments = 0;
5194
5195         /* Crossing a page boundary? */
5196         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5197                 int now;
5198
5199                 now = -addr & ~PAGE_MASK;
5200                 rc = emulator_read_write_onepage(addr, val, now, exception,
5201                                                  vcpu, ops);
5202
5203                 if (rc != X86EMUL_CONTINUE)
5204                         return rc;
5205                 addr += now;
5206                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5207                         addr = (u32)addr;
5208                 val += now;
5209                 bytes -= now;
5210         }
5211
5212         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5213                                          vcpu, ops);
5214         if (rc != X86EMUL_CONTINUE)
5215                 return rc;
5216
5217         if (!vcpu->mmio_nr_fragments)
5218                 return rc;
5219
5220         gpa = vcpu->mmio_fragments[0].gpa;
5221
5222         vcpu->mmio_needed = 1;
5223         vcpu->mmio_cur_fragment = 0;
5224
5225         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5226         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5227         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5228         vcpu->run->mmio.phys_addr = gpa;
5229
5230         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5231 }
5232
5233 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5234                                   unsigned long addr,
5235                                   void *val,
5236                                   unsigned int bytes,
5237                                   struct x86_exception *exception)
5238 {
5239         return emulator_read_write(ctxt, addr, val, bytes,
5240                                    exception, &read_emultor);
5241 }
5242
5243 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5244                             unsigned long addr,
5245                             const void *val,
5246                             unsigned int bytes,
5247                             struct x86_exception *exception)
5248 {
5249         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5250                                    exception, &write_emultor);
5251 }
5252
5253 #define CMPXCHG_TYPE(t, ptr, old, new) \
5254         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5255
5256 #ifdef CONFIG_X86_64
5257 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5258 #else
5259 #  define CMPXCHG64(ptr, old, new) \
5260         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5261 #endif
5262
5263 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5264                                      unsigned long addr,
5265                                      const void *old,
5266                                      const void *new,
5267                                      unsigned int bytes,
5268                                      struct x86_exception *exception)
5269 {
5270         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5271         gpa_t gpa;
5272         struct page *page;
5273         char *kaddr;
5274         bool exchanged;
5275
5276         /* guests cmpxchg8b have to be emulated atomically */
5277         if (bytes > 8 || (bytes & (bytes - 1)))
5278                 goto emul_write;
5279
5280         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5281
5282         if (gpa == UNMAPPED_GVA ||
5283             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5284                 goto emul_write;
5285
5286         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5287                 goto emul_write;
5288
5289         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
5290         if (is_error_page(page))
5291                 goto emul_write;
5292
5293         kaddr = kmap_atomic(page);
5294         kaddr += offset_in_page(gpa);
5295         switch (bytes) {
5296         case 1:
5297                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5298                 break;
5299         case 2:
5300                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5301                 break;
5302         case 4:
5303                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5304                 break;
5305         case 8:
5306                 exchanged = CMPXCHG64(kaddr, old, new);
5307                 break;
5308         default:
5309                 BUG();
5310         }
5311         kunmap_atomic(kaddr);
5312         kvm_release_page_dirty(page);
5313
5314         if (!exchanged)
5315                 return X86EMUL_CMPXCHG_FAILED;
5316
5317         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
5318         kvm_page_track_write(vcpu, gpa, new, bytes);
5319
5320         return X86EMUL_CONTINUE;
5321
5322 emul_write:
5323         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5324
5325         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5326 }
5327
5328 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5329 {
5330         int r = 0, i;
5331
5332         for (i = 0; i < vcpu->arch.pio.count; i++) {
5333                 if (vcpu->arch.pio.in)
5334                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5335                                             vcpu->arch.pio.size, pd);
5336                 else
5337                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5338                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5339                                              pd);
5340                 if (r)
5341                         break;
5342                 pd += vcpu->arch.pio.size;
5343         }
5344         return r;
5345 }
5346
5347 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5348                                unsigned short port, void *val,
5349                                unsigned int count, bool in)
5350 {
5351         vcpu->arch.pio.port = port;
5352         vcpu->arch.pio.in = in;
5353         vcpu->arch.pio.count  = count;
5354         vcpu->arch.pio.size = size;
5355
5356         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5357                 vcpu->arch.pio.count = 0;
5358                 return 1;
5359         }
5360
5361         vcpu->run->exit_reason = KVM_EXIT_IO;
5362         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5363         vcpu->run->io.size = size;
5364         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5365         vcpu->run->io.count = count;
5366         vcpu->run->io.port = port;
5367
5368         return 0;
5369 }
5370
5371 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5372                                     int size, unsigned short port, void *val,
5373                                     unsigned int count)
5374 {
5375         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5376         int ret;
5377
5378         if (vcpu->arch.pio.count)
5379                 goto data_avail;
5380
5381         memset(vcpu->arch.pio_data, 0, size * count);
5382
5383         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5384         if (ret) {
5385 data_avail:
5386                 memcpy(val, vcpu->arch.pio_data, size * count);
5387                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5388                 vcpu->arch.pio.count = 0;
5389                 return 1;
5390         }
5391
5392         return 0;
5393 }
5394
5395 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5396                                      int size, unsigned short port,
5397                                      const void *val, unsigned int count)
5398 {
5399         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5400
5401         memcpy(vcpu->arch.pio_data, val, size * count);
5402         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5403         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5404 }
5405
5406 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5407 {
5408         return kvm_x86_ops->get_segment_base(vcpu, seg);
5409 }
5410
5411 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5412 {
5413         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5414 }
5415
5416 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5417 {
5418         if (!need_emulate_wbinvd(vcpu))
5419                 return X86EMUL_CONTINUE;
5420
5421         if (kvm_x86_ops->has_wbinvd_exit()) {
5422                 int cpu = get_cpu();
5423
5424                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5425                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5426                                 wbinvd_ipi, NULL, 1);
5427                 put_cpu();
5428                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5429         } else
5430                 wbinvd();
5431         return X86EMUL_CONTINUE;
5432 }
5433
5434 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5435 {
5436         kvm_emulate_wbinvd_noskip(vcpu);
5437         return kvm_skip_emulated_instruction(vcpu);
5438 }
5439 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5440
5441
5442
5443 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5444 {
5445         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5446 }
5447
5448 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5449                            unsigned long *dest)
5450 {
5451         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5452 }
5453
5454 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5455                            unsigned long value)
5456 {
5457
5458         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5459 }
5460
5461 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5462 {
5463         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5464 }
5465
5466 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5467 {
5468         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5469         unsigned long value;
5470
5471         switch (cr) {
5472         case 0:
5473                 value = kvm_read_cr0(vcpu);
5474                 break;
5475         case 2:
5476                 value = vcpu->arch.cr2;
5477                 break;
5478         case 3:
5479                 value = kvm_read_cr3(vcpu);
5480                 break;
5481         case 4:
5482                 value = kvm_read_cr4(vcpu);
5483                 break;
5484         case 8:
5485                 value = kvm_get_cr8(vcpu);
5486                 break;
5487         default:
5488                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5489                 return 0;
5490         }
5491
5492         return value;
5493 }
5494
5495 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5496 {
5497         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5498         int res = 0;
5499
5500         switch (cr) {
5501         case 0:
5502                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5503                 break;
5504         case 2:
5505                 vcpu->arch.cr2 = val;
5506                 break;
5507         case 3:
5508                 res = kvm_set_cr3(vcpu, val);
5509                 break;
5510         case 4:
5511                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
5512                 break;
5513         case 8:
5514                 res = kvm_set_cr8(vcpu, val);
5515                 break;
5516         default:
5517                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5518                 res = -1;
5519         }
5520
5521         return res;
5522 }
5523
5524 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
5525 {
5526         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
5527 }
5528
5529 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5530 {
5531         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
5532 }
5533
5534 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5535 {
5536         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
5537 }
5538
5539 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5540 {
5541         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
5542 }
5543
5544 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
5545 {
5546         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
5547 }
5548
5549 static unsigned long emulator_get_cached_segment_base(
5550         struct x86_emulate_ctxt *ctxt, int seg)
5551 {
5552         return get_segment_base(emul_to_vcpu(ctxt), seg);
5553 }
5554
5555 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
5556                                  struct desc_struct *desc, u32 *base3,
5557                                  int seg)
5558 {
5559         struct kvm_segment var;
5560
5561         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
5562         *selector = var.selector;
5563
5564         if (var.unusable) {
5565                 memset(desc, 0, sizeof(*desc));
5566                 if (base3)
5567                         *base3 = 0;
5568                 return false;
5569         }
5570
5571         if (var.g)
5572                 var.limit >>= 12;
5573         set_desc_limit(desc, var.limit);
5574         set_desc_base(desc, (unsigned long)var.base);
5575 #ifdef CONFIG_X86_64
5576         if (base3)
5577                 *base3 = var.base >> 32;
5578 #endif
5579         desc->type = var.type;
5580         desc->s = var.s;
5581         desc->dpl = var.dpl;
5582         desc->p = var.present;
5583         desc->avl = var.avl;
5584         desc->l = var.l;
5585         desc->d = var.db;
5586         desc->g = var.g;
5587
5588         return true;
5589 }
5590
5591 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
5592                                  struct desc_struct *desc, u32 base3,
5593                                  int seg)
5594 {
5595         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5596         struct kvm_segment var;
5597
5598         var.selector = selector;
5599         var.base = get_desc_base(desc);
5600 #ifdef CONFIG_X86_64
5601         var.base |= ((u64)base3) << 32;
5602 #endif
5603         var.limit = get_desc_limit(desc);
5604         if (desc->g)
5605                 var.limit = (var.limit << 12) | 0xfff;
5606         var.type = desc->type;
5607         var.dpl = desc->dpl;
5608         var.db = desc->d;
5609         var.s = desc->s;
5610         var.l = desc->l;
5611         var.g = desc->g;
5612         var.avl = desc->avl;
5613         var.present = desc->p;
5614         var.unusable = !var.present;
5615         var.padding = 0;
5616
5617         kvm_set_segment(vcpu, &var, seg);
5618         return;
5619 }
5620
5621 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
5622                             u32 msr_index, u64 *pdata)
5623 {
5624         struct msr_data msr;
5625         int r;
5626
5627         msr.index = msr_index;
5628         msr.host_initiated = false;
5629         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
5630         if (r)
5631                 return r;
5632
5633         *pdata = msr.data;
5634         return 0;
5635 }
5636
5637 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
5638                             u32 msr_index, u64 data)
5639 {
5640         struct msr_data msr;
5641
5642         msr.data = data;
5643         msr.index = msr_index;
5644         msr.host_initiated = false;
5645         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
5646 }
5647
5648 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
5649 {
5650         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5651
5652         return vcpu->arch.smbase;
5653 }
5654
5655 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
5656 {
5657         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5658
5659         vcpu->arch.smbase = smbase;
5660 }
5661
5662 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
5663                               u32 pmc)
5664 {
5665         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
5666 }
5667
5668 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
5669                              u32 pmc, u64 *pdata)
5670 {
5671         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
5672 }
5673
5674 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
5675 {
5676         emul_to_vcpu(ctxt)->arch.halt_request = 1;
5677 }
5678
5679 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
5680                               struct x86_instruction_info *info,
5681                               enum x86_intercept_stage stage)
5682 {
5683         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
5684 }
5685
5686 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
5687                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
5688 {
5689         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
5690 }
5691
5692 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
5693 {
5694         return kvm_register_read(emul_to_vcpu(ctxt), reg);
5695 }
5696
5697 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
5698 {
5699         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
5700 }
5701
5702 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
5703 {
5704         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
5705 }
5706
5707 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
5708 {
5709         return emul_to_vcpu(ctxt)->arch.hflags;
5710 }
5711
5712 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
5713 {
5714         kvm_set_hflags(emul_to_vcpu(ctxt), emul_flags);
5715 }
5716
5717 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt, u64 smbase)
5718 {
5719         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smbase);
5720 }
5721
5722 static const struct x86_emulate_ops emulate_ops = {
5723         .read_gpr            = emulator_read_gpr,
5724         .write_gpr           = emulator_write_gpr,
5725         .read_std            = emulator_read_std,
5726         .write_std           = emulator_write_std,
5727         .read_phys           = kvm_read_guest_phys_system,
5728         .fetch               = kvm_fetch_guest_virt,
5729         .read_emulated       = emulator_read_emulated,
5730         .write_emulated      = emulator_write_emulated,
5731         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
5732         .invlpg              = emulator_invlpg,
5733         .pio_in_emulated     = emulator_pio_in_emulated,
5734         .pio_out_emulated    = emulator_pio_out_emulated,
5735         .get_segment         = emulator_get_segment,
5736         .set_segment         = emulator_set_segment,
5737         .get_cached_segment_base = emulator_get_cached_segment_base,
5738         .get_gdt             = emulator_get_gdt,
5739         .get_idt             = emulator_get_idt,
5740         .set_gdt             = emulator_set_gdt,
5741         .set_idt             = emulator_set_idt,
5742         .get_cr              = emulator_get_cr,
5743         .set_cr              = emulator_set_cr,
5744         .cpl                 = emulator_get_cpl,
5745         .get_dr              = emulator_get_dr,
5746         .set_dr              = emulator_set_dr,
5747         .get_smbase          = emulator_get_smbase,
5748         .set_smbase          = emulator_set_smbase,
5749         .set_msr             = emulator_set_msr,
5750         .get_msr             = emulator_get_msr,
5751         .check_pmc           = emulator_check_pmc,
5752         .read_pmc            = emulator_read_pmc,
5753         .halt                = emulator_halt,
5754         .wbinvd              = emulator_wbinvd,
5755         .fix_hypercall       = emulator_fix_hypercall,
5756         .intercept           = emulator_intercept,
5757         .get_cpuid           = emulator_get_cpuid,
5758         .set_nmi_mask        = emulator_set_nmi_mask,
5759         .get_hflags          = emulator_get_hflags,
5760         .set_hflags          = emulator_set_hflags,
5761         .pre_leave_smm       = emulator_pre_leave_smm,
5762 };
5763
5764 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
5765 {
5766         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
5767         /*
5768          * an sti; sti; sequence only disable interrupts for the first
5769          * instruction. So, if the last instruction, be it emulated or
5770          * not, left the system with the INT_STI flag enabled, it
5771          * means that the last instruction is an sti. We should not
5772          * leave the flag on in this case. The same goes for mov ss
5773          */
5774         if (int_shadow & mask)
5775                 mask = 0;
5776         if (unlikely(int_shadow || mask)) {
5777                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
5778                 if (!mask)
5779                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5780         }
5781 }
5782
5783 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
5784 {
5785         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5786         if (ctxt->exception.vector == PF_VECTOR)
5787                 return kvm_propagate_fault(vcpu, &ctxt->exception);
5788
5789         if (ctxt->exception.error_code_valid)
5790                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
5791                                       ctxt->exception.error_code);
5792         else
5793                 kvm_queue_exception(vcpu, ctxt->exception.vector);
5794         return false;
5795 }
5796
5797 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
5798 {
5799         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5800         int cs_db, cs_l;
5801
5802         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
5803
5804         ctxt->eflags = kvm_get_rflags(vcpu);
5805         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
5806
5807         ctxt->eip = kvm_rip_read(vcpu);
5808         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
5809                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
5810                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
5811                      cs_db                              ? X86EMUL_MODE_PROT32 :
5812                                                           X86EMUL_MODE_PROT16;
5813         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
5814         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
5815         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
5816
5817         init_decode_cache(ctxt);
5818         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5819 }
5820
5821 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
5822 {
5823         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5824         int ret;
5825
5826         init_emulate_ctxt(vcpu);
5827
5828         ctxt->op_bytes = 2;
5829         ctxt->ad_bytes = 2;
5830         ctxt->_eip = ctxt->eip + inc_eip;
5831         ret = emulate_int_real(ctxt, irq);
5832
5833         if (ret != X86EMUL_CONTINUE)
5834                 return EMULATE_FAIL;
5835
5836         ctxt->eip = ctxt->_eip;
5837         kvm_rip_write(vcpu, ctxt->eip);
5838         kvm_set_rflags(vcpu, ctxt->eflags);
5839
5840         return EMULATE_DONE;
5841 }
5842 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
5843
5844 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
5845 {
5846         int r = EMULATE_DONE;
5847
5848         ++vcpu->stat.insn_emulation_fail;
5849         trace_kvm_emulate_insn_failed(vcpu);
5850
5851         if (emulation_type & EMULTYPE_NO_UD_ON_FAIL)
5852                 return EMULATE_FAIL;
5853
5854         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
5855                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
5856                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
5857                 vcpu->run->internal.ndata = 0;
5858                 r = EMULATE_USER_EXIT;
5859         }
5860
5861         kvm_queue_exception(vcpu, UD_VECTOR);
5862
5863         return r;
5864 }
5865
5866 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
5867                                   bool write_fault_to_shadow_pgtable,
5868                                   int emulation_type)
5869 {
5870         gpa_t gpa = cr2;
5871         kvm_pfn_t pfn;
5872
5873         if (emulation_type & EMULTYPE_NO_REEXECUTE)
5874                 return false;
5875
5876         if (!vcpu->arch.mmu.direct_map) {
5877                 /*
5878                  * Write permission should be allowed since only
5879                  * write access need to be emulated.
5880                  */
5881                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5882
5883                 /*
5884                  * If the mapping is invalid in guest, let cpu retry
5885                  * it to generate fault.
5886                  */
5887                 if (gpa == UNMAPPED_GVA)
5888                         return true;
5889         }
5890
5891         /*
5892          * Do not retry the unhandleable instruction if it faults on the
5893          * readonly host memory, otherwise it will goto a infinite loop:
5894          * retry instruction -> write #PF -> emulation fail -> retry
5895          * instruction -> ...
5896          */
5897         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
5898
5899         /*
5900          * If the instruction failed on the error pfn, it can not be fixed,
5901          * report the error to userspace.
5902          */
5903         if (is_error_noslot_pfn(pfn))
5904                 return false;
5905
5906         kvm_release_pfn_clean(pfn);
5907
5908         /* The instructions are well-emulated on direct mmu. */
5909         if (vcpu->arch.mmu.direct_map) {
5910                 unsigned int indirect_shadow_pages;
5911
5912                 spin_lock(&vcpu->kvm->mmu_lock);
5913                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5914                 spin_unlock(&vcpu->kvm->mmu_lock);
5915
5916                 if (indirect_shadow_pages)
5917                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5918
5919                 return true;
5920         }
5921
5922         /*
5923          * if emulation was due to access to shadowed page table
5924          * and it failed try to unshadow page and re-enter the
5925          * guest to let CPU execute the instruction.
5926          */
5927         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5928
5929         /*
5930          * If the access faults on its page table, it can not
5931          * be fixed by unprotecting shadow page and it should
5932          * be reported to userspace.
5933          */
5934         return !write_fault_to_shadow_pgtable;
5935 }
5936
5937 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5938                               unsigned long cr2,  int emulation_type)
5939 {
5940         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5941         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5942
5943         last_retry_eip = vcpu->arch.last_retry_eip;
5944         last_retry_addr = vcpu->arch.last_retry_addr;
5945
5946         /*
5947          * If the emulation is caused by #PF and it is non-page_table
5948          * writing instruction, it means the VM-EXIT is caused by shadow
5949          * page protected, we can zap the shadow page and retry this
5950          * instruction directly.
5951          *
5952          * Note: if the guest uses a non-page-table modifying instruction
5953          * on the PDE that points to the instruction, then we will unmap
5954          * the instruction and go to an infinite loop. So, we cache the
5955          * last retried eip and the last fault address, if we meet the eip
5956          * and the address again, we can break out of the potential infinite
5957          * loop.
5958          */
5959         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5960
5961         if (!(emulation_type & EMULTYPE_RETRY))
5962                 return false;
5963
5964         if (x86_page_table_writing_insn(ctxt))
5965                 return false;
5966
5967         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5968                 return false;
5969
5970         vcpu->arch.last_retry_eip = ctxt->eip;
5971         vcpu->arch.last_retry_addr = cr2;
5972
5973         if (!vcpu->arch.mmu.direct_map)
5974                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5975
5976         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5977
5978         return true;
5979 }
5980
5981 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5982 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5983
5984 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5985 {
5986         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5987                 /* This is a good place to trace that we are exiting SMM.  */
5988                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5989
5990                 /* Process a latched INIT or SMI, if any.  */
5991                 kvm_make_request(KVM_REQ_EVENT, vcpu);
5992         }
5993
5994         kvm_mmu_reset_context(vcpu);
5995 }
5996
5997 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5998 {
5999         unsigned changed = vcpu->arch.hflags ^ emul_flags;
6000
6001         vcpu->arch.hflags = emul_flags;
6002
6003         if (changed & HF_SMM_MASK)
6004                 kvm_smm_changed(vcpu);
6005 }
6006
6007 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6008                                 unsigned long *db)
6009 {
6010         u32 dr6 = 0;
6011         int i;
6012         u32 enable, rwlen;
6013
6014         enable = dr7;
6015         rwlen = dr7 >> 16;
6016         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6017                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6018                         dr6 |= (1 << i);
6019         return dr6;
6020 }
6021
6022 static void kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu, int *r)
6023 {
6024         struct kvm_run *kvm_run = vcpu->run;
6025
6026         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6027                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6028                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6029                 kvm_run->debug.arch.exception = DB_VECTOR;
6030                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6031                 *r = EMULATE_USER_EXIT;
6032         } else {
6033                 /*
6034                  * "Certain debug exceptions may clear bit 0-3.  The
6035                  * remaining contents of the DR6 register are never
6036                  * cleared by the processor".
6037                  */
6038                 vcpu->arch.dr6 &= ~15;
6039                 vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
6040                 kvm_queue_exception(vcpu, DB_VECTOR);
6041         }
6042 }
6043
6044 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6045 {
6046         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6047         int r = EMULATE_DONE;
6048
6049         kvm_x86_ops->skip_emulated_instruction(vcpu);
6050
6051         /*
6052          * rflags is the old, "raw" value of the flags.  The new value has
6053          * not been saved yet.
6054          *
6055          * This is correct even for TF set by the guest, because "the
6056          * processor will not generate this exception after the instruction
6057          * that sets the TF flag".
6058          */
6059         if (unlikely(rflags & X86_EFLAGS_TF))
6060                 kvm_vcpu_do_singlestep(vcpu, &r);
6061         return r == EMULATE_DONE;
6062 }
6063 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6064
6065 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6066 {
6067         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6068             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6069                 struct kvm_run *kvm_run = vcpu->run;
6070                 unsigned long eip = kvm_get_linear_rip(vcpu);
6071                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6072                                            vcpu->arch.guest_debug_dr7,
6073                                            vcpu->arch.eff_db);
6074
6075                 if (dr6 != 0) {
6076                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6077                         kvm_run->debug.arch.pc = eip;
6078                         kvm_run->debug.arch.exception = DB_VECTOR;
6079                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6080                         *r = EMULATE_USER_EXIT;
6081                         return true;
6082                 }
6083         }
6084
6085         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6086             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6087                 unsigned long eip = kvm_get_linear_rip(vcpu);
6088                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6089                                            vcpu->arch.dr7,
6090                                            vcpu->arch.db);
6091
6092                 if (dr6 != 0) {
6093                         vcpu->arch.dr6 &= ~15;
6094                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6095                         kvm_queue_exception(vcpu, DB_VECTOR);
6096                         *r = EMULATE_DONE;
6097                         return true;
6098                 }
6099         }
6100
6101         return false;
6102 }
6103
6104 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6105 {
6106         switch (ctxt->opcode_len) {
6107         case 1:
6108                 switch (ctxt->b) {
6109                 case 0xe4:      /* IN */
6110                 case 0xe5:
6111                 case 0xec:
6112                 case 0xed:
6113                 case 0xe6:      /* OUT */
6114                 case 0xe7:
6115                 case 0xee:
6116                 case 0xef:
6117                 case 0x6c:      /* INS */
6118                 case 0x6d:
6119                 case 0x6e:      /* OUTS */
6120                 case 0x6f:
6121                         return true;
6122                 }
6123                 break;
6124         case 2:
6125                 switch (ctxt->b) {
6126                 case 0x33:      /* RDPMC */
6127                         return true;
6128                 }
6129                 break;
6130         }
6131
6132         return false;
6133 }
6134
6135 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6136                             unsigned long cr2,
6137                             int emulation_type,
6138                             void *insn,
6139                             int insn_len)
6140 {
6141         int r;
6142         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6143         bool writeback = true;
6144         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6145
6146         vcpu->arch.l1tf_flush_l1d = true;
6147
6148         /*
6149          * Clear write_fault_to_shadow_pgtable here to ensure it is
6150          * never reused.
6151          */
6152         vcpu->arch.write_fault_to_shadow_pgtable = false;
6153         kvm_clear_exception_queue(vcpu);
6154
6155         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6156                 init_emulate_ctxt(vcpu);
6157
6158                 /*
6159                  * We will reenter on the same instruction since
6160                  * we do not set complete_userspace_io.  This does not
6161                  * handle watchpoints yet, those would be handled in
6162                  * the emulate_ops.
6163                  */
6164                 if (!(emulation_type & EMULTYPE_SKIP) &&
6165                     kvm_vcpu_check_breakpoint(vcpu, &r))
6166                         return r;
6167
6168                 ctxt->interruptibility = 0;
6169                 ctxt->have_exception = false;
6170                 ctxt->exception.vector = -1;
6171                 ctxt->perm_ok = false;
6172
6173                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6174
6175                 r = x86_decode_insn(ctxt, insn, insn_len);
6176
6177                 trace_kvm_emulate_insn_start(vcpu);
6178                 ++vcpu->stat.insn_emulation;
6179                 if (r != EMULATION_OK)  {
6180                         if (emulation_type & EMULTYPE_TRAP_UD)
6181                                 return EMULATE_FAIL;
6182                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6183                                                 emulation_type))
6184                                 return EMULATE_DONE;
6185                         if (ctxt->have_exception && inject_emulated_exception(vcpu))
6186                                 return EMULATE_DONE;
6187                         if (emulation_type & EMULTYPE_SKIP)
6188                                 return EMULATE_FAIL;
6189                         return handle_emulation_failure(vcpu, emulation_type);
6190                 }
6191         }
6192
6193         if ((emulation_type & EMULTYPE_VMWARE) &&
6194             !is_vmware_backdoor_opcode(ctxt))
6195                 return EMULATE_FAIL;
6196
6197         if (emulation_type & EMULTYPE_SKIP) {
6198                 kvm_rip_write(vcpu, ctxt->_eip);
6199                 if (ctxt->eflags & X86_EFLAGS_RF)
6200                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6201                 return EMULATE_DONE;
6202         }
6203
6204         if (retry_instruction(ctxt, cr2, emulation_type))
6205                 return EMULATE_DONE;
6206
6207         /* this is needed for vmware backdoor interface to work since it
6208            changes registers values  during IO operation */
6209         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6210                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6211                 emulator_invalidate_register_cache(ctxt);
6212         }
6213
6214 restart:
6215         /* Save the faulting GPA (cr2) in the address field */
6216         ctxt->exception.address = cr2;
6217
6218         r = x86_emulate_insn(ctxt);
6219
6220         if (r == EMULATION_INTERCEPTED)
6221                 return EMULATE_DONE;
6222
6223         if (r == EMULATION_FAILED) {
6224                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6225                                         emulation_type))
6226                         return EMULATE_DONE;
6227
6228                 return handle_emulation_failure(vcpu, emulation_type);
6229         }
6230
6231         if (ctxt->have_exception) {
6232                 r = EMULATE_DONE;
6233                 if (inject_emulated_exception(vcpu))
6234                         return r;
6235         } else if (vcpu->arch.pio.count) {
6236                 if (!vcpu->arch.pio.in) {
6237                         /* FIXME: return into emulator if single-stepping.  */
6238                         vcpu->arch.pio.count = 0;
6239                 } else {
6240                         writeback = false;
6241                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6242                 }
6243                 r = EMULATE_USER_EXIT;
6244         } else if (vcpu->mmio_needed) {
6245                 if (!vcpu->mmio_is_write)
6246                         writeback = false;
6247                 r = EMULATE_USER_EXIT;
6248                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6249         } else if (r == EMULATION_RESTART)
6250                 goto restart;
6251         else
6252                 r = EMULATE_DONE;
6253
6254         if (writeback) {
6255                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6256                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6257                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6258                 kvm_rip_write(vcpu, ctxt->eip);
6259                 if (r == EMULATE_DONE &&
6260                     (ctxt->tf || (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)))
6261                         kvm_vcpu_do_singlestep(vcpu, &r);
6262                 if (!ctxt->have_exception ||
6263                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
6264                         __kvm_set_rflags(vcpu, ctxt->eflags);
6265
6266                 /*
6267                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6268                  * do nothing, and it will be requested again as soon as
6269                  * the shadow expires.  But we still need to check here,
6270                  * because POPF has no interrupt shadow.
6271                  */
6272                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6273                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6274         } else
6275                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6276
6277         return r;
6278 }
6279 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
6280
6281 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6282                             unsigned short port)
6283 {
6284         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
6285         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6286                                             size, port, &val, 1);
6287         /* do not return to emulator after return from userspace */
6288         vcpu->arch.pio.count = 0;
6289         return ret;
6290 }
6291
6292 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6293 {
6294         unsigned long val;
6295
6296         /* We should only ever be called with arch.pio.count equal to 1 */
6297         BUG_ON(vcpu->arch.pio.count != 1);
6298
6299         /* For size less than 4 we merge, else we zero extend */
6300         val = (vcpu->arch.pio.size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX)
6301                                         : 0;
6302
6303         /*
6304          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6305          * the copy and tracing
6306          */
6307         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6308                                  vcpu->arch.pio.port, &val, 1);
6309         kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6310
6311         return 1;
6312 }
6313
6314 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6315                            unsigned short port)
6316 {
6317         unsigned long val;
6318         int ret;
6319
6320         /* For size less than 4 we merge, else we zero extend */
6321         val = (size < 4) ? kvm_register_read(vcpu, VCPU_REGS_RAX) : 0;
6322
6323         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6324                                        &val, 1);
6325         if (ret) {
6326                 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
6327                 return ret;
6328         }
6329
6330         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6331
6332         return 0;
6333 }
6334
6335 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6336 {
6337         int ret = kvm_skip_emulated_instruction(vcpu);
6338
6339         /*
6340          * TODO: we might be squashing a KVM_GUESTDBG_SINGLESTEP-triggered
6341          * KVM_EXIT_DEBUG here.
6342          */
6343         if (in)
6344                 return kvm_fast_pio_in(vcpu, size, port) && ret;
6345         else
6346                 return kvm_fast_pio_out(vcpu, size, port) && ret;
6347 }
6348 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6349
6350 static int kvmclock_cpu_down_prep(unsigned int cpu)
6351 {
6352         __this_cpu_write(cpu_tsc_khz, 0);
6353         return 0;
6354 }
6355
6356 static void tsc_khz_changed(void *data)
6357 {
6358         struct cpufreq_freqs *freq = data;
6359         unsigned long khz = 0;
6360
6361         if (data)
6362                 khz = freq->new;
6363         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6364                 khz = cpufreq_quick_get(raw_smp_processor_id());
6365         if (!khz)
6366                 khz = tsc_khz;
6367         __this_cpu_write(cpu_tsc_khz, khz);
6368 }
6369
6370 #ifdef CONFIG_X86_64
6371 static void kvm_hyperv_tsc_notifier(void)
6372 {
6373         struct kvm *kvm;
6374         struct kvm_vcpu *vcpu;
6375         int cpu;
6376
6377         spin_lock(&kvm_lock);
6378         list_for_each_entry(kvm, &vm_list, vm_list)
6379                 kvm_make_mclock_inprogress_request(kvm);
6380
6381         hyperv_stop_tsc_emulation();
6382
6383         /* TSC frequency always matches when on Hyper-V */
6384         for_each_present_cpu(cpu)
6385                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6386         kvm_max_guest_tsc_khz = tsc_khz;
6387
6388         list_for_each_entry(kvm, &vm_list, vm_list) {
6389                 struct kvm_arch *ka = &kvm->arch;
6390
6391                 spin_lock(&ka->pvclock_gtod_sync_lock);
6392
6393                 pvclock_update_vm_gtod_copy(kvm);
6394
6395                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6396                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6397
6398                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6399                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6400
6401                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6402         }
6403         spin_unlock(&kvm_lock);
6404 }
6405 #endif
6406
6407 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
6408                                      void *data)
6409 {
6410         struct cpufreq_freqs *freq = data;
6411         struct kvm *kvm;
6412         struct kvm_vcpu *vcpu;
6413         int i, send_ipi = 0;
6414
6415         /*
6416          * We allow guests to temporarily run on slowing clocks,
6417          * provided we notify them after, or to run on accelerating
6418          * clocks, provided we notify them before.  Thus time never
6419          * goes backwards.
6420          *
6421          * However, we have a problem.  We can't atomically update
6422          * the frequency of a given CPU from this function; it is
6423          * merely a notifier, which can be called from any CPU.
6424          * Changing the TSC frequency at arbitrary points in time
6425          * requires a recomputation of local variables related to
6426          * the TSC for each VCPU.  We must flag these local variables
6427          * to be updated and be sure the update takes place with the
6428          * new frequency before any guests proceed.
6429          *
6430          * Unfortunately, the combination of hotplug CPU and frequency
6431          * change creates an intractable locking scenario; the order
6432          * of when these callouts happen is undefined with respect to
6433          * CPU hotplug, and they can race with each other.  As such,
6434          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6435          * undefined; you can actually have a CPU frequency change take
6436          * place in between the computation of X and the setting of the
6437          * variable.  To protect against this problem, all updates of
6438          * the per_cpu tsc_khz variable are done in an interrupt
6439          * protected IPI, and all callers wishing to update the value
6440          * must wait for a synchronous IPI to complete (which is trivial
6441          * if the caller is on the CPU already).  This establishes the
6442          * necessary total order on variable updates.
6443          *
6444          * Note that because a guest time update may take place
6445          * anytime after the setting of the VCPU's request bit, the
6446          * correct TSC value must be set before the request.  However,
6447          * to ensure the update actually makes it to any guest which
6448          * starts running in hardware virtualization between the set
6449          * and the acquisition of the spinlock, we must also ping the
6450          * CPU after setting the request bit.
6451          *
6452          */
6453
6454         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
6455                 return 0;
6456         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
6457                 return 0;
6458
6459         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6460
6461         spin_lock(&kvm_lock);
6462         list_for_each_entry(kvm, &vm_list, vm_list) {
6463                 kvm_for_each_vcpu(i, vcpu, kvm) {
6464                         if (vcpu->cpu != freq->cpu)
6465                                 continue;
6466                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6467                         if (vcpu->cpu != smp_processor_id())
6468                                 send_ipi = 1;
6469                 }
6470         }
6471         spin_unlock(&kvm_lock);
6472
6473         if (freq->old < freq->new && send_ipi) {
6474                 /*
6475                  * We upscale the frequency.  Must make the guest
6476                  * doesn't see old kvmclock values while running with
6477                  * the new frequency, otherwise we risk the guest sees
6478                  * time go backwards.
6479                  *
6480                  * In case we update the frequency for another cpu
6481                  * (which might be in guest context) send an interrupt
6482                  * to kick the cpu out of guest context.  Next time
6483                  * guest context is entered kvmclock will be updated,
6484                  * so the guest will not see stale values.
6485                  */
6486                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
6487         }
6488         return 0;
6489 }
6490
6491 static struct notifier_block kvmclock_cpufreq_notifier_block = {
6492         .notifier_call  = kvmclock_cpufreq_notifier
6493 };
6494
6495 static int kvmclock_cpu_online(unsigned int cpu)
6496 {
6497         tsc_khz_changed(NULL);
6498         return 0;
6499 }
6500
6501 static void kvm_timer_init(void)
6502 {
6503         max_tsc_khz = tsc_khz;
6504
6505         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
6506 #ifdef CONFIG_CPU_FREQ
6507                 struct cpufreq_policy policy;
6508                 int cpu;
6509
6510                 memset(&policy, 0, sizeof(policy));
6511                 cpu = get_cpu();
6512                 cpufreq_get_policy(&policy, cpu);
6513                 if (policy.cpuinfo.max_freq)
6514                         max_tsc_khz = policy.cpuinfo.max_freq;
6515                 put_cpu();
6516 #endif
6517                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
6518                                           CPUFREQ_TRANSITION_NOTIFIER);
6519         }
6520         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
6521
6522         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
6523                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
6524 }
6525
6526 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
6527 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
6528
6529 int kvm_is_in_guest(void)
6530 {
6531         return __this_cpu_read(current_vcpu) != NULL;
6532 }
6533
6534 static int kvm_is_user_mode(void)
6535 {
6536         int user_mode = 3;
6537
6538         if (__this_cpu_read(current_vcpu))
6539                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
6540
6541         return user_mode != 0;
6542 }
6543
6544 static unsigned long kvm_get_guest_ip(void)
6545 {
6546         unsigned long ip = 0;
6547
6548         if (__this_cpu_read(current_vcpu))
6549                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
6550
6551         return ip;
6552 }
6553
6554 static struct perf_guest_info_callbacks kvm_guest_cbs = {
6555         .is_in_guest            = kvm_is_in_guest,
6556         .is_user_mode           = kvm_is_user_mode,
6557         .get_guest_ip           = kvm_get_guest_ip,
6558 };
6559
6560 static void kvm_set_mmio_spte_mask(void)
6561 {
6562         u64 mask;
6563         int maxphyaddr = boot_cpu_data.x86_phys_bits;
6564
6565         /*
6566          * Set the reserved bits and the present bit of an paging-structure
6567          * entry to generate page fault with PFER.RSV = 1.
6568          */
6569
6570         /*
6571          * Mask the uppermost physical address bit, which would be reserved as
6572          * long as the supported physical address width is less than 52.
6573          */
6574         mask = 1ull << 51;
6575
6576         /* Set the present bit. */
6577         mask |= 1ull;
6578
6579 #ifdef CONFIG_X86_64
6580         /*
6581          * If reserved bit is not supported, clear the present bit to disable
6582          * mmio page fault.
6583          */
6584         if (maxphyaddr == 52)
6585                 mask &= ~1ull;
6586 #endif
6587
6588         kvm_mmu_set_mmio_spte_mask(mask, mask);
6589 }
6590
6591 #ifdef CONFIG_X86_64
6592 static void pvclock_gtod_update_fn(struct work_struct *work)
6593 {
6594         struct kvm *kvm;
6595
6596         struct kvm_vcpu *vcpu;
6597         int i;
6598
6599         spin_lock(&kvm_lock);
6600         list_for_each_entry(kvm, &vm_list, vm_list)
6601                 kvm_for_each_vcpu(i, vcpu, kvm)
6602                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
6603         atomic_set(&kvm_guest_has_master_clock, 0);
6604         spin_unlock(&kvm_lock);
6605 }
6606
6607 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
6608
6609 /*
6610  * Notification about pvclock gtod data update.
6611  */
6612 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
6613                                void *priv)
6614 {
6615         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
6616         struct timekeeper *tk = priv;
6617
6618         update_pvclock_gtod(tk);
6619
6620         /* disable master clock if host does not trust, or does not
6621          * use, TSC based clocksource.
6622          */
6623         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
6624             atomic_read(&kvm_guest_has_master_clock) != 0)
6625                 queue_work(system_long_wq, &pvclock_gtod_work);
6626
6627         return 0;
6628 }
6629
6630 static struct notifier_block pvclock_gtod_notifier = {
6631         .notifier_call = pvclock_gtod_notify,
6632 };
6633 #endif
6634
6635 int kvm_arch_init(void *opaque)
6636 {
6637         int r;
6638         struct kvm_x86_ops *ops = opaque;
6639
6640         if (kvm_x86_ops) {
6641                 printk(KERN_ERR "kvm: already loaded the other module\n");
6642                 r = -EEXIST;
6643                 goto out;
6644         }
6645
6646         if (!ops->cpu_has_kvm_support()) {
6647                 printk(KERN_ERR "kvm: no hardware support\n");
6648                 r = -EOPNOTSUPP;
6649                 goto out;
6650         }
6651         if (ops->disabled_by_bios()) {
6652                 printk(KERN_ERR "kvm: disabled by bios\n");
6653                 r = -EOPNOTSUPP;
6654                 goto out;
6655         }
6656
6657         r = -ENOMEM;
6658         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
6659         if (!shared_msrs) {
6660                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
6661                 goto out;
6662         }
6663
6664         r = kvm_mmu_module_init();
6665         if (r)
6666                 goto out_free_percpu;
6667
6668         kvm_set_mmio_spte_mask();
6669
6670         kvm_x86_ops = ops;
6671
6672         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
6673                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
6674                         PT_PRESENT_MASK, 0, sme_me_mask);
6675         kvm_timer_init();
6676
6677         perf_register_guest_info_callbacks(&kvm_guest_cbs);
6678
6679         if (boot_cpu_has(X86_FEATURE_XSAVE))
6680                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
6681
6682         kvm_lapic_init();
6683 #ifdef CONFIG_X86_64
6684         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
6685
6686         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6687                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
6688 #endif
6689
6690         return 0;
6691
6692 out_free_percpu:
6693         free_percpu(shared_msrs);
6694 out:
6695         return r;
6696 }
6697
6698 void kvm_arch_exit(void)
6699 {
6700 #ifdef CONFIG_X86_64
6701         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
6702                 clear_hv_tscchange_cb();
6703 #endif
6704         kvm_lapic_exit();
6705         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
6706
6707         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6708                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
6709                                             CPUFREQ_TRANSITION_NOTIFIER);
6710         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
6711 #ifdef CONFIG_X86_64
6712         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
6713 #endif
6714         kvm_x86_ops = NULL;
6715         kvm_mmu_module_exit();
6716         free_percpu(shared_msrs);
6717 }
6718
6719 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
6720 {
6721         ++vcpu->stat.halt_exits;
6722         if (lapic_in_kernel(vcpu)) {
6723                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
6724                 return 1;
6725         } else {
6726                 vcpu->run->exit_reason = KVM_EXIT_HLT;
6727                 return 0;
6728         }
6729 }
6730 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
6731
6732 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
6733 {
6734         int ret = kvm_skip_emulated_instruction(vcpu);
6735         /*
6736          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
6737          * KVM_EXIT_DEBUG here.
6738          */
6739         return kvm_vcpu_halt(vcpu) && ret;
6740 }
6741 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
6742
6743 #ifdef CONFIG_X86_64
6744 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
6745                                 unsigned long clock_type)
6746 {
6747         struct kvm_clock_pairing clock_pairing;
6748         struct timespec64 ts;
6749         u64 cycle;
6750         int ret;
6751
6752         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
6753                 return -KVM_EOPNOTSUPP;
6754
6755         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
6756                 return -KVM_EOPNOTSUPP;
6757
6758         clock_pairing.sec = ts.tv_sec;
6759         clock_pairing.nsec = ts.tv_nsec;
6760         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
6761         clock_pairing.flags = 0;
6762
6763         ret = 0;
6764         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
6765                             sizeof(struct kvm_clock_pairing)))
6766                 ret = -KVM_EFAULT;
6767
6768         return ret;
6769 }
6770 #endif
6771
6772 /*
6773  * kvm_pv_kick_cpu_op:  Kick a vcpu.
6774  *
6775  * @apicid - apicid of vcpu to be kicked.
6776  */
6777 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
6778 {
6779         struct kvm_lapic_irq lapic_irq;
6780
6781         lapic_irq.shorthand = 0;
6782         lapic_irq.dest_mode = 0;
6783         lapic_irq.level = 0;
6784         lapic_irq.dest_id = apicid;
6785         lapic_irq.msi_redir_hint = false;
6786
6787         lapic_irq.delivery_mode = APIC_DM_REMRD;
6788         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
6789 }
6790
6791 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
6792 {
6793         vcpu->arch.apicv_active = false;
6794         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
6795 }
6796
6797 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
6798 {
6799         unsigned long nr, a0, a1, a2, a3, ret;
6800         int op_64_bit;
6801
6802         if (kvm_hv_hypercall_enabled(vcpu->kvm))
6803                 return kvm_hv_hypercall(vcpu);
6804
6805         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
6806         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
6807         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
6808         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
6809         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
6810
6811         trace_kvm_hypercall(nr, a0, a1, a2, a3);
6812
6813         op_64_bit = is_64_bit_mode(vcpu);
6814         if (!op_64_bit) {
6815                 nr &= 0xFFFFFFFF;
6816                 a0 &= 0xFFFFFFFF;
6817                 a1 &= 0xFFFFFFFF;
6818                 a2 &= 0xFFFFFFFF;
6819                 a3 &= 0xFFFFFFFF;
6820         }
6821
6822         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
6823                 ret = -KVM_EPERM;
6824                 goto out;
6825         }
6826
6827         switch (nr) {
6828         case KVM_HC_VAPIC_POLL_IRQ:
6829                 ret = 0;
6830                 break;
6831         case KVM_HC_KICK_CPU:
6832                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
6833                 ret = 0;
6834                 break;
6835 #ifdef CONFIG_X86_64
6836         case KVM_HC_CLOCK_PAIRING:
6837                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
6838                 break;
6839         case KVM_HC_SEND_IPI:
6840                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
6841                 break;
6842 #endif
6843         default:
6844                 ret = -KVM_ENOSYS;
6845                 break;
6846         }
6847 out:
6848         if (!op_64_bit)
6849                 ret = (u32)ret;
6850         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
6851
6852         ++vcpu->stat.hypercalls;
6853         return kvm_skip_emulated_instruction(vcpu);
6854 }
6855 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
6856
6857 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
6858 {
6859         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6860         char instruction[3];
6861         unsigned long rip = kvm_rip_read(vcpu);
6862
6863         kvm_x86_ops->patch_hypercall(vcpu, instruction);
6864
6865         return emulator_write_emulated(ctxt, rip, instruction, 3,
6866                 &ctxt->exception);
6867 }
6868
6869 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
6870 {
6871         return vcpu->run->request_interrupt_window &&
6872                 likely(!pic_in_kernel(vcpu->kvm));
6873 }
6874
6875 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
6876 {
6877         struct kvm_run *kvm_run = vcpu->run;
6878
6879         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
6880         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
6881         kvm_run->cr8 = kvm_get_cr8(vcpu);
6882         kvm_run->apic_base = kvm_get_apic_base(vcpu);
6883         kvm_run->ready_for_interrupt_injection =
6884                 pic_in_kernel(vcpu->kvm) ||
6885                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
6886 }
6887
6888 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
6889 {
6890         int max_irr, tpr;
6891
6892         if (!kvm_x86_ops->update_cr8_intercept)
6893                 return;
6894
6895         if (!lapic_in_kernel(vcpu))
6896                 return;
6897
6898         if (vcpu->arch.apicv_active)
6899                 return;
6900
6901         if (!vcpu->arch.apic->vapic_addr)
6902                 max_irr = kvm_lapic_find_highest_irr(vcpu);
6903         else
6904                 max_irr = -1;
6905
6906         if (max_irr != -1)
6907                 max_irr >>= 4;
6908
6909         tpr = kvm_lapic_get_cr8(vcpu);
6910
6911         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
6912 }
6913
6914 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
6915 {
6916         int r;
6917
6918         /* try to reinject previous events if any */
6919
6920         if (vcpu->arch.exception.injected)
6921                 kvm_x86_ops->queue_exception(vcpu);
6922         /*
6923          * Do not inject an NMI or interrupt if there is a pending
6924          * exception.  Exceptions and interrupts are recognized at
6925          * instruction boundaries, i.e. the start of an instruction.
6926          * Trap-like exceptions, e.g. #DB, have higher priority than
6927          * NMIs and interrupts, i.e. traps are recognized before an
6928          * NMI/interrupt that's pending on the same instruction.
6929          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
6930          * priority, but are only generated (pended) during instruction
6931          * execution, i.e. a pending fault-like exception means the
6932          * fault occurred on the *previous* instruction and must be
6933          * serviced prior to recognizing any new events in order to
6934          * fully complete the previous instruction.
6935          */
6936         else if (!vcpu->arch.exception.pending) {
6937                 if (vcpu->arch.nmi_injected)
6938                         kvm_x86_ops->set_nmi(vcpu);
6939                 else if (vcpu->arch.interrupt.injected)
6940                         kvm_x86_ops->set_irq(vcpu);
6941         }
6942
6943         /*
6944          * Call check_nested_events() even if we reinjected a previous event
6945          * in order for caller to determine if it should require immediate-exit
6946          * from L2 to L1 due to pending L1 events which require exit
6947          * from L2 to L1.
6948          */
6949         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
6950                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
6951                 if (r != 0)
6952                         return r;
6953         }
6954
6955         /* try to inject new event if pending */
6956         if (vcpu->arch.exception.pending) {
6957                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
6958                                         vcpu->arch.exception.has_error_code,
6959                                         vcpu->arch.exception.error_code);
6960
6961                 WARN_ON_ONCE(vcpu->arch.exception.injected);
6962                 vcpu->arch.exception.pending = false;
6963                 vcpu->arch.exception.injected = true;
6964
6965                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
6966                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
6967                                              X86_EFLAGS_RF);
6968
6969                 if (vcpu->arch.exception.nr == DB_VECTOR &&
6970                     (vcpu->arch.dr7 & DR7_GD)) {
6971                         vcpu->arch.dr7 &= ~DR7_GD;
6972                         kvm_update_dr7(vcpu);
6973                 }
6974
6975                 kvm_x86_ops->queue_exception(vcpu);
6976         }
6977
6978         /* Don't consider new event if we re-injected an event */
6979         if (kvm_event_needs_reinjection(vcpu))
6980                 return 0;
6981
6982         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
6983             kvm_x86_ops->smi_allowed(vcpu)) {
6984                 vcpu->arch.smi_pending = false;
6985                 ++vcpu->arch.smi_count;
6986                 enter_smm(vcpu);
6987         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
6988                 --vcpu->arch.nmi_pending;
6989                 vcpu->arch.nmi_injected = true;
6990                 kvm_x86_ops->set_nmi(vcpu);
6991         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
6992                 /*
6993                  * Because interrupts can be injected asynchronously, we are
6994                  * calling check_nested_events again here to avoid a race condition.
6995                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
6996                  * proposal and current concerns.  Perhaps we should be setting
6997                  * KVM_REQ_EVENT only on certain events and not unconditionally?
6998                  */
6999                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7000                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7001                         if (r != 0)
7002                                 return r;
7003                 }
7004                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7005                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7006                                             false);
7007                         kvm_x86_ops->set_irq(vcpu);
7008                 }
7009         }
7010
7011         return 0;
7012 }
7013
7014 static void process_nmi(struct kvm_vcpu *vcpu)
7015 {
7016         unsigned limit = 2;
7017
7018         /*
7019          * x86 is limited to one NMI running, and one NMI pending after it.
7020          * If an NMI is already in progress, limit further NMIs to just one.
7021          * Otherwise, allow two (and we'll inject the first one immediately).
7022          */
7023         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7024                 limit = 1;
7025
7026         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7027         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7028         kvm_make_request(KVM_REQ_EVENT, vcpu);
7029 }
7030
7031 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7032 {
7033         u32 flags = 0;
7034         flags |= seg->g       << 23;
7035         flags |= seg->db      << 22;
7036         flags |= seg->l       << 21;
7037         flags |= seg->avl     << 20;
7038         flags |= seg->present << 15;
7039         flags |= seg->dpl     << 13;
7040         flags |= seg->s       << 12;
7041         flags |= seg->type    << 8;
7042         return flags;
7043 }
7044
7045 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7046 {
7047         struct kvm_segment seg;
7048         int offset;
7049
7050         kvm_get_segment(vcpu, &seg, n);
7051         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7052
7053         if (n < 3)
7054                 offset = 0x7f84 + n * 12;
7055         else
7056                 offset = 0x7f2c + (n - 3) * 12;
7057
7058         put_smstate(u32, buf, offset + 8, seg.base);
7059         put_smstate(u32, buf, offset + 4, seg.limit);
7060         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7061 }
7062
7063 #ifdef CONFIG_X86_64
7064 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7065 {
7066         struct kvm_segment seg;
7067         int offset;
7068         u16 flags;
7069
7070         kvm_get_segment(vcpu, &seg, n);
7071         offset = 0x7e00 + n * 16;
7072
7073         flags = enter_smm_get_segment_flags(&seg) >> 8;
7074         put_smstate(u16, buf, offset, seg.selector);
7075         put_smstate(u16, buf, offset + 2, flags);
7076         put_smstate(u32, buf, offset + 4, seg.limit);
7077         put_smstate(u64, buf, offset + 8, seg.base);
7078 }
7079 #endif
7080
7081 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7082 {
7083         struct desc_ptr dt;
7084         struct kvm_segment seg;
7085         unsigned long val;
7086         int i;
7087
7088         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7089         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7090         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7091         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7092
7093         for (i = 0; i < 8; i++)
7094                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7095
7096         kvm_get_dr(vcpu, 6, &val);
7097         put_smstate(u32, buf, 0x7fcc, (u32)val);
7098         kvm_get_dr(vcpu, 7, &val);
7099         put_smstate(u32, buf, 0x7fc8, (u32)val);
7100
7101         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7102         put_smstate(u32, buf, 0x7fc4, seg.selector);
7103         put_smstate(u32, buf, 0x7f64, seg.base);
7104         put_smstate(u32, buf, 0x7f60, seg.limit);
7105         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7106
7107         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7108         put_smstate(u32, buf, 0x7fc0, seg.selector);
7109         put_smstate(u32, buf, 0x7f80, seg.base);
7110         put_smstate(u32, buf, 0x7f7c, seg.limit);
7111         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7112
7113         kvm_x86_ops->get_gdt(vcpu, &dt);
7114         put_smstate(u32, buf, 0x7f74, dt.address);
7115         put_smstate(u32, buf, 0x7f70, dt.size);
7116
7117         kvm_x86_ops->get_idt(vcpu, &dt);
7118         put_smstate(u32, buf, 0x7f58, dt.address);
7119         put_smstate(u32, buf, 0x7f54, dt.size);
7120
7121         for (i = 0; i < 6; i++)
7122                 enter_smm_save_seg_32(vcpu, buf, i);
7123
7124         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7125
7126         /* revision id */
7127         put_smstate(u32, buf, 0x7efc, 0x00020000);
7128         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7129 }
7130
7131 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7132 {
7133 #ifdef CONFIG_X86_64
7134         struct desc_ptr dt;
7135         struct kvm_segment seg;
7136         unsigned long val;
7137         int i;
7138
7139         for (i = 0; i < 16; i++)
7140                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7141
7142         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7143         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7144
7145         kvm_get_dr(vcpu, 6, &val);
7146         put_smstate(u64, buf, 0x7f68, val);
7147         kvm_get_dr(vcpu, 7, &val);
7148         put_smstate(u64, buf, 0x7f60, val);
7149
7150         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7151         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7152         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7153
7154         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7155
7156         /* revision id */
7157         put_smstate(u32, buf, 0x7efc, 0x00020064);
7158
7159         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7160
7161         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7162         put_smstate(u16, buf, 0x7e90, seg.selector);
7163         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7164         put_smstate(u32, buf, 0x7e94, seg.limit);
7165         put_smstate(u64, buf, 0x7e98, seg.base);
7166
7167         kvm_x86_ops->get_idt(vcpu, &dt);
7168         put_smstate(u32, buf, 0x7e84, dt.size);
7169         put_smstate(u64, buf, 0x7e88, dt.address);
7170
7171         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7172         put_smstate(u16, buf, 0x7e70, seg.selector);
7173         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7174         put_smstate(u32, buf, 0x7e74, seg.limit);
7175         put_smstate(u64, buf, 0x7e78, seg.base);
7176
7177         kvm_x86_ops->get_gdt(vcpu, &dt);
7178         put_smstate(u32, buf, 0x7e64, dt.size);
7179         put_smstate(u64, buf, 0x7e68, dt.address);
7180
7181         for (i = 0; i < 6; i++)
7182                 enter_smm_save_seg_64(vcpu, buf, i);
7183 #else
7184         WARN_ON_ONCE(1);
7185 #endif
7186 }
7187
7188 static void enter_smm(struct kvm_vcpu *vcpu)
7189 {
7190         struct kvm_segment cs, ds;
7191         struct desc_ptr dt;
7192         char buf[512];
7193         u32 cr0;
7194
7195         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7196         memset(buf, 0, 512);
7197         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7198                 enter_smm_save_state_64(vcpu, buf);
7199         else
7200                 enter_smm_save_state_32(vcpu, buf);
7201
7202         /*
7203          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7204          * vCPU state (e.g. leave guest mode) after we've saved the state into
7205          * the SMM state-save area.
7206          */
7207         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7208
7209         vcpu->arch.hflags |= HF_SMM_MASK;
7210         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7211
7212         if (kvm_x86_ops->get_nmi_mask(vcpu))
7213                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7214         else
7215                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7216
7217         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7218         kvm_rip_write(vcpu, 0x8000);
7219
7220         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7221         kvm_x86_ops->set_cr0(vcpu, cr0);
7222         vcpu->arch.cr0 = cr0;
7223
7224         kvm_x86_ops->set_cr4(vcpu, 0);
7225
7226         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7227         dt.address = dt.size = 0;
7228         kvm_x86_ops->set_idt(vcpu, &dt);
7229
7230         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7231
7232         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7233         cs.base = vcpu->arch.smbase;
7234
7235         ds.selector = 0;
7236         ds.base = 0;
7237
7238         cs.limit    = ds.limit = 0xffffffff;
7239         cs.type     = ds.type = 0x3;
7240         cs.dpl      = ds.dpl = 0;
7241         cs.db       = ds.db = 0;
7242         cs.s        = ds.s = 1;
7243         cs.l        = ds.l = 0;
7244         cs.g        = ds.g = 1;
7245         cs.avl      = ds.avl = 0;
7246         cs.present  = ds.present = 1;
7247         cs.unusable = ds.unusable = 0;
7248         cs.padding  = ds.padding = 0;
7249
7250         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7251         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7252         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7253         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7254         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7255         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7256
7257         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7258                 kvm_x86_ops->set_efer(vcpu, 0);
7259
7260         kvm_update_cpuid(vcpu);
7261         kvm_mmu_reset_context(vcpu);
7262 }
7263
7264 static void process_smi(struct kvm_vcpu *vcpu)
7265 {
7266         vcpu->arch.smi_pending = true;
7267         kvm_make_request(KVM_REQ_EVENT, vcpu);
7268 }
7269
7270 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7271 {
7272         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7273 }
7274
7275 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7276 {
7277         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7278                 return;
7279
7280         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7281
7282         if (irqchip_split(vcpu->kvm))
7283                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7284         else {
7285                 if (vcpu->arch.apicv_active)
7286                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7287                 kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7288         }
7289
7290         if (is_guest_mode(vcpu))
7291                 vcpu->arch.load_eoi_exitmap_pending = true;
7292         else
7293                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7294 }
7295
7296 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7297 {
7298         u64 eoi_exit_bitmap[4];
7299
7300         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7301                 return;
7302
7303         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7304                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7305         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7306 }
7307
7308 void kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7309                 unsigned long start, unsigned long end)
7310 {
7311         unsigned long apic_address;
7312
7313         /*
7314          * The physical address of apic access page is stored in the VMCS.
7315          * Update it when it becomes invalid.
7316          */
7317         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7318         if (start <= apic_address && apic_address < end)
7319                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7320 }
7321
7322 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7323 {
7324         struct page *page = NULL;
7325
7326         if (!lapic_in_kernel(vcpu))
7327                 return;
7328
7329         if (!kvm_x86_ops->set_apic_access_page_addr)
7330                 return;
7331
7332         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7333         if (is_error_page(page))
7334                 return;
7335         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7336
7337         /*
7338          * Do not pin apic access page in memory, the MMU notifier
7339          * will call us again if it is migrated or swapped out.
7340          */
7341         put_page(page);
7342 }
7343 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7344
7345 /*
7346  * Returns 1 to let vcpu_run() continue the guest execution loop without
7347  * exiting to the userspace.  Otherwise, the value will be returned to the
7348  * userspace.
7349  */
7350 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7351 {
7352         int r;
7353         bool req_int_win =
7354                 dm_request_for_irq_injection(vcpu) &&
7355                 kvm_cpu_accept_dm_intr(vcpu);
7356
7357         bool req_immediate_exit = false;
7358
7359         if (kvm_request_pending(vcpu)) {
7360                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu))
7361                         kvm_x86_ops->get_vmcs12_pages(vcpu);
7362                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7363                         kvm_mmu_unload(vcpu);
7364                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7365                         __kvm_migrate_timers(vcpu);
7366                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7367                         kvm_gen_update_masterclock(vcpu->kvm);
7368                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7369                         kvm_gen_kvmclock_update(vcpu);
7370                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7371                         r = kvm_guest_time_update(vcpu);
7372                         if (unlikely(r))
7373                                 goto out;
7374                 }
7375                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7376                         kvm_mmu_sync_roots(vcpu);
7377                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7378                         kvm_mmu_load_cr3(vcpu);
7379                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7380                         kvm_vcpu_flush_tlb(vcpu, true);
7381                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7382                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7383                         r = 0;
7384                         goto out;
7385                 }
7386                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
7387                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
7388                         vcpu->mmio_needed = 0;
7389                         r = 0;
7390                         goto out;
7391                 }
7392                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
7393                         /* Page is swapped out. Do synthetic halt */
7394                         vcpu->arch.apf.halted = true;
7395                         r = 1;
7396                         goto out;
7397                 }
7398                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
7399                         record_steal_time(vcpu);
7400                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
7401                         process_smi(vcpu);
7402                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
7403                         process_nmi(vcpu);
7404                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
7405                         kvm_pmu_handle_event(vcpu);
7406                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
7407                         kvm_pmu_deliver_pmi(vcpu);
7408                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
7409                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
7410                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
7411                                      vcpu->arch.ioapic_handled_vectors)) {
7412                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
7413                                 vcpu->run->eoi.vector =
7414                                                 vcpu->arch.pending_ioapic_eoi;
7415                                 r = 0;
7416                                 goto out;
7417                         }
7418                 }
7419                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
7420                         vcpu_scan_ioapic(vcpu);
7421                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
7422                         vcpu_load_eoi_exitmap(vcpu);
7423                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
7424                         kvm_vcpu_reload_apic_access_page(vcpu);
7425                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
7426                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7427                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
7428                         r = 0;
7429                         goto out;
7430                 }
7431                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
7432                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
7433                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
7434                         r = 0;
7435                         goto out;
7436                 }
7437                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
7438                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
7439                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
7440                         r = 0;
7441                         goto out;
7442                 }
7443
7444                 /*
7445                  * KVM_REQ_HV_STIMER has to be processed after
7446                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
7447                  * depend on the guest clock being up-to-date
7448                  */
7449                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
7450                         kvm_hv_process_stimers(vcpu);
7451         }
7452
7453         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
7454                 ++vcpu->stat.req_event;
7455                 kvm_apic_accept_events(vcpu);
7456                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
7457                         r = 1;
7458                         goto out;
7459                 }
7460
7461                 if (inject_pending_event(vcpu, req_int_win) != 0)
7462                         req_immediate_exit = true;
7463                 else {
7464                         /* Enable SMI/NMI/IRQ window open exits if needed.
7465                          *
7466                          * SMIs have three cases:
7467                          * 1) They can be nested, and then there is nothing to
7468                          *    do here because RSM will cause a vmexit anyway.
7469                          * 2) There is an ISA-specific reason why SMI cannot be
7470                          *    injected, and the moment when this changes can be
7471                          *    intercepted.
7472                          * 3) Or the SMI can be pending because
7473                          *    inject_pending_event has completed the injection
7474                          *    of an IRQ or NMI from the previous vmexit, and
7475                          *    then we request an immediate exit to inject the
7476                          *    SMI.
7477                          */
7478                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
7479                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
7480                                         req_immediate_exit = true;
7481                         if (vcpu->arch.nmi_pending)
7482                                 kvm_x86_ops->enable_nmi_window(vcpu);
7483                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
7484                                 kvm_x86_ops->enable_irq_window(vcpu);
7485                         WARN_ON(vcpu->arch.exception.pending);
7486                 }
7487
7488                 if (kvm_lapic_enabled(vcpu)) {
7489                         update_cr8_intercept(vcpu);
7490                         kvm_lapic_sync_to_vapic(vcpu);
7491                 }
7492         }
7493
7494         r = kvm_mmu_reload(vcpu);
7495         if (unlikely(r)) {
7496                 goto cancel_injection;
7497         }
7498
7499         preempt_disable();
7500
7501         kvm_x86_ops->prepare_guest_switch(vcpu);
7502
7503         /*
7504          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
7505          * IPI are then delayed after guest entry, which ensures that they
7506          * result in virtual interrupt delivery.
7507          */
7508         local_irq_disable();
7509         vcpu->mode = IN_GUEST_MODE;
7510
7511         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7512
7513         /*
7514          * 1) We should set ->mode before checking ->requests.  Please see
7515          * the comment in kvm_vcpu_exiting_guest_mode().
7516          *
7517          * 2) For APICv, we should set ->mode before checking PIR.ON.  This
7518          * pairs with the memory barrier implicit in pi_test_and_set_on
7519          * (see vmx_deliver_posted_interrupt).
7520          *
7521          * 3) This also orders the write to mode from any reads to the page
7522          * tables done while the VCPU is running.  Please see the comment
7523          * in kvm_flush_remote_tlbs.
7524          */
7525         smp_mb__after_srcu_read_unlock();
7526
7527         /*
7528          * This handles the case where a posted interrupt was
7529          * notified with kvm_vcpu_kick.
7530          */
7531         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
7532                 kvm_x86_ops->sync_pir_to_irr(vcpu);
7533
7534         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
7535             || need_resched() || signal_pending(current)) {
7536                 vcpu->mode = OUTSIDE_GUEST_MODE;
7537                 smp_wmb();
7538                 local_irq_enable();
7539                 preempt_enable();
7540                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7541                 r = 1;
7542                 goto cancel_injection;
7543         }
7544
7545         kvm_load_guest_xcr0(vcpu);
7546
7547         if (req_immediate_exit) {
7548                 kvm_make_request(KVM_REQ_EVENT, vcpu);
7549                 smp_send_reschedule(vcpu->cpu);
7550         }
7551
7552         trace_kvm_entry(vcpu->vcpu_id);
7553         if (lapic_timer_advance_ns)
7554                 wait_lapic_expire(vcpu);
7555         guest_enter_irqoff();
7556
7557         if (unlikely(vcpu->arch.switch_db_regs)) {
7558                 set_debugreg(0, 7);
7559                 set_debugreg(vcpu->arch.eff_db[0], 0);
7560                 set_debugreg(vcpu->arch.eff_db[1], 1);
7561                 set_debugreg(vcpu->arch.eff_db[2], 2);
7562                 set_debugreg(vcpu->arch.eff_db[3], 3);
7563                 set_debugreg(vcpu->arch.dr6, 6);
7564                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7565         }
7566
7567         kvm_x86_ops->run(vcpu);
7568
7569         /*
7570          * Do this here before restoring debug registers on the host.  And
7571          * since we do this before handling the vmexit, a DR access vmexit
7572          * can (a) read the correct value of the debug registers, (b) set
7573          * KVM_DEBUGREG_WONT_EXIT again.
7574          */
7575         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
7576                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
7577                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
7578                 kvm_update_dr0123(vcpu);
7579                 kvm_update_dr6(vcpu);
7580                 kvm_update_dr7(vcpu);
7581                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
7582         }
7583
7584         /*
7585          * If the guest has used debug registers, at least dr7
7586          * will be disabled while returning to the host.
7587          * If we don't have active breakpoints in the host, we don't
7588          * care about the messed up debug address registers. But if
7589          * we have some of them active, restore the old state.
7590          */
7591         if (hw_breakpoint_active())
7592                 hw_breakpoint_restore();
7593
7594         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
7595
7596         vcpu->mode = OUTSIDE_GUEST_MODE;
7597         smp_wmb();
7598
7599         kvm_put_guest_xcr0(vcpu);
7600
7601         kvm_before_interrupt(vcpu);
7602         kvm_x86_ops->handle_external_intr(vcpu);
7603         kvm_after_interrupt(vcpu);
7604
7605         ++vcpu->stat.exits;
7606
7607         guest_exit_irqoff();
7608
7609         local_irq_enable();
7610         preempt_enable();
7611
7612         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7613
7614         /*
7615          * Profile KVM exit RIPs:
7616          */
7617         if (unlikely(prof_on == KVM_PROFILING)) {
7618                 unsigned long rip = kvm_rip_read(vcpu);
7619                 profile_hit(KVM_PROFILING, (void *)rip);
7620         }
7621
7622         if (unlikely(vcpu->arch.tsc_always_catchup))
7623                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7624
7625         if (vcpu->arch.apic_attention)
7626                 kvm_lapic_sync_from_vapic(vcpu);
7627
7628         vcpu->arch.gpa_available = false;
7629         r = kvm_x86_ops->handle_exit(vcpu);
7630         return r;
7631
7632 cancel_injection:
7633         kvm_x86_ops->cancel_injection(vcpu);
7634         if (unlikely(vcpu->arch.apic_attention))
7635                 kvm_lapic_sync_from_vapic(vcpu);
7636 out:
7637         return r;
7638 }
7639
7640 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
7641 {
7642         if (!kvm_arch_vcpu_runnable(vcpu) &&
7643             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
7644                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7645                 kvm_vcpu_block(vcpu);
7646                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7647
7648                 if (kvm_x86_ops->post_block)
7649                         kvm_x86_ops->post_block(vcpu);
7650
7651                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
7652                         return 1;
7653         }
7654
7655         kvm_apic_accept_events(vcpu);
7656         switch(vcpu->arch.mp_state) {
7657         case KVM_MP_STATE_HALTED:
7658                 vcpu->arch.pv.pv_unhalted = false;
7659                 vcpu->arch.mp_state =
7660                         KVM_MP_STATE_RUNNABLE;
7661         case KVM_MP_STATE_RUNNABLE:
7662                 vcpu->arch.apf.halted = false;
7663                 break;
7664         case KVM_MP_STATE_INIT_RECEIVED:
7665                 break;
7666         default:
7667                 return -EINTR;
7668                 break;
7669         }
7670         return 1;
7671 }
7672
7673 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
7674 {
7675         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7676                 kvm_x86_ops->check_nested_events(vcpu, false);
7677
7678         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7679                 !vcpu->arch.apf.halted);
7680 }
7681
7682 static int vcpu_run(struct kvm_vcpu *vcpu)
7683 {
7684         int r;
7685         struct kvm *kvm = vcpu->kvm;
7686
7687         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7688         vcpu->arch.l1tf_flush_l1d = true;
7689
7690         for (;;) {
7691                 if (kvm_vcpu_running(vcpu)) {
7692                         r = vcpu_enter_guest(vcpu);
7693                 } else {
7694                         r = vcpu_block(kvm, vcpu);
7695                 }
7696
7697                 if (r <= 0)
7698                         break;
7699
7700                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
7701                 if (kvm_cpu_has_pending_timer(vcpu))
7702                         kvm_inject_pending_timer_irqs(vcpu);
7703
7704                 if (dm_request_for_irq_injection(vcpu) &&
7705                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
7706                         r = 0;
7707                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
7708                         ++vcpu->stat.request_irq_exits;
7709                         break;
7710                 }
7711
7712                 kvm_check_async_pf_completion(vcpu);
7713
7714                 if (signal_pending(current)) {
7715                         r = -EINTR;
7716                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7717                         ++vcpu->stat.signal_exits;
7718                         break;
7719                 }
7720                 if (need_resched()) {
7721                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7722                         cond_resched();
7723                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
7724                 }
7725         }
7726
7727         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
7728
7729         return r;
7730 }
7731
7732 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
7733 {
7734         int r;
7735         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
7736         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
7737         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
7738         if (r != EMULATE_DONE)
7739                 return 0;
7740         return 1;
7741 }
7742
7743 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
7744 {
7745         BUG_ON(!vcpu->arch.pio.count);
7746
7747         return complete_emulated_io(vcpu);
7748 }
7749
7750 /*
7751  * Implements the following, as a state machine:
7752  *
7753  * read:
7754  *   for each fragment
7755  *     for each mmio piece in the fragment
7756  *       write gpa, len
7757  *       exit
7758  *       copy data
7759  *   execute insn
7760  *
7761  * write:
7762  *   for each fragment
7763  *     for each mmio piece in the fragment
7764  *       write gpa, len
7765  *       copy data
7766  *       exit
7767  */
7768 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
7769 {
7770         struct kvm_run *run = vcpu->run;
7771         struct kvm_mmio_fragment *frag;
7772         unsigned len;
7773
7774         BUG_ON(!vcpu->mmio_needed);
7775
7776         /* Complete previous fragment */
7777         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
7778         len = min(8u, frag->len);
7779         if (!vcpu->mmio_is_write)
7780                 memcpy(frag->data, run->mmio.data, len);
7781
7782         if (frag->len <= 8) {
7783                 /* Switch to the next fragment. */
7784                 frag++;
7785                 vcpu->mmio_cur_fragment++;
7786         } else {
7787                 /* Go forward to the next mmio piece. */
7788                 frag->data += len;
7789                 frag->gpa += len;
7790                 frag->len -= len;
7791         }
7792
7793         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
7794                 vcpu->mmio_needed = 0;
7795
7796                 /* FIXME: return into emulator if single-stepping.  */
7797                 if (vcpu->mmio_is_write)
7798                         return 1;
7799                 vcpu->mmio_read_completed = 1;
7800                 return complete_emulated_io(vcpu);
7801         }
7802
7803         run->exit_reason = KVM_EXIT_MMIO;
7804         run->mmio.phys_addr = frag->gpa;
7805         if (vcpu->mmio_is_write)
7806                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
7807         run->mmio.len = min(8u, frag->len);
7808         run->mmio.is_write = vcpu->mmio_is_write;
7809         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
7810         return 0;
7811 }
7812
7813 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
7814 {
7815         int r;
7816
7817         vcpu_load(vcpu);
7818         kvm_sigset_activate(vcpu);
7819         kvm_load_guest_fpu(vcpu);
7820
7821         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
7822                 if (kvm_run->immediate_exit) {
7823                         r = -EINTR;
7824                         goto out;
7825                 }
7826                 kvm_vcpu_block(vcpu);
7827                 kvm_apic_accept_events(vcpu);
7828                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
7829                 r = -EAGAIN;
7830                 if (signal_pending(current)) {
7831                         r = -EINTR;
7832                         vcpu->run->exit_reason = KVM_EXIT_INTR;
7833                         ++vcpu->stat.signal_exits;
7834                 }
7835                 goto out;
7836         }
7837
7838         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
7839                 r = -EINVAL;
7840                 goto out;
7841         }
7842
7843         if (vcpu->run->kvm_dirty_regs) {
7844                 r = sync_regs(vcpu);
7845                 if (r != 0)
7846                         goto out;
7847         }
7848
7849         /* re-sync apic's tpr */
7850         if (!lapic_in_kernel(vcpu)) {
7851                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
7852                         r = -EINVAL;
7853                         goto out;
7854                 }
7855         }
7856
7857         if (unlikely(vcpu->arch.complete_userspace_io)) {
7858                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
7859                 vcpu->arch.complete_userspace_io = NULL;
7860                 r = cui(vcpu);
7861                 if (r <= 0)
7862                         goto out;
7863         } else
7864                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
7865
7866         if (kvm_run->immediate_exit)
7867                 r = -EINTR;
7868         else
7869                 r = vcpu_run(vcpu);
7870
7871 out:
7872         kvm_put_guest_fpu(vcpu);
7873         if (vcpu->run->kvm_valid_regs)
7874                 store_regs(vcpu);
7875         post_kvm_run_save(vcpu);
7876         kvm_sigset_deactivate(vcpu);
7877
7878         vcpu_put(vcpu);
7879         return r;
7880 }
7881
7882 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7883 {
7884         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
7885                 /*
7886                  * We are here if userspace calls get_regs() in the middle of
7887                  * instruction emulation. Registers state needs to be copied
7888                  * back from emulation context to vcpu. Userspace shouldn't do
7889                  * that usually, but some bad designed PV devices (vmware
7890                  * backdoor interface) need this to work
7891                  */
7892                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
7893                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7894         }
7895         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
7896         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
7897         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
7898         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
7899         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
7900         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
7901         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
7902         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
7903 #ifdef CONFIG_X86_64
7904         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
7905         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
7906         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
7907         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
7908         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
7909         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
7910         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
7911         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
7912 #endif
7913
7914         regs->rip = kvm_rip_read(vcpu);
7915         regs->rflags = kvm_get_rflags(vcpu);
7916 }
7917
7918 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7919 {
7920         vcpu_load(vcpu);
7921         __get_regs(vcpu, regs);
7922         vcpu_put(vcpu);
7923         return 0;
7924 }
7925
7926 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7927 {
7928         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
7929         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
7930
7931         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
7932         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
7933         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
7934         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
7935         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
7936         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
7937         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
7938         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
7939 #ifdef CONFIG_X86_64
7940         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
7941         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
7942         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
7943         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
7944         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
7945         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
7946         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
7947         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
7948 #endif
7949
7950         kvm_rip_write(vcpu, regs->rip);
7951         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
7952
7953         vcpu->arch.exception.pending = false;
7954
7955         kvm_make_request(KVM_REQ_EVENT, vcpu);
7956 }
7957
7958 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
7959 {
7960         vcpu_load(vcpu);
7961         __set_regs(vcpu, regs);
7962         vcpu_put(vcpu);
7963         return 0;
7964 }
7965
7966 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
7967 {
7968         struct kvm_segment cs;
7969
7970         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7971         *db = cs.db;
7972         *l = cs.l;
7973 }
7974 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
7975
7976 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
7977 {
7978         struct desc_ptr dt;
7979
7980         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
7981         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
7982         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
7983         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
7984         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
7985         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
7986
7987         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
7988         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
7989
7990         kvm_x86_ops->get_idt(vcpu, &dt);
7991         sregs->idt.limit = dt.size;
7992         sregs->idt.base = dt.address;
7993         kvm_x86_ops->get_gdt(vcpu, &dt);
7994         sregs->gdt.limit = dt.size;
7995         sregs->gdt.base = dt.address;
7996
7997         sregs->cr0 = kvm_read_cr0(vcpu);
7998         sregs->cr2 = vcpu->arch.cr2;
7999         sregs->cr3 = kvm_read_cr3(vcpu);
8000         sregs->cr4 = kvm_read_cr4(vcpu);
8001         sregs->cr8 = kvm_get_cr8(vcpu);
8002         sregs->efer = vcpu->arch.efer;
8003         sregs->apic_base = kvm_get_apic_base(vcpu);
8004
8005         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
8006
8007         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8008                 set_bit(vcpu->arch.interrupt.nr,
8009                         (unsigned long *)sregs->interrupt_bitmap);
8010 }
8011
8012 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8013                                   struct kvm_sregs *sregs)
8014 {
8015         vcpu_load(vcpu);
8016         __get_sregs(vcpu, sregs);
8017         vcpu_put(vcpu);
8018         return 0;
8019 }
8020
8021 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8022                                     struct kvm_mp_state *mp_state)
8023 {
8024         vcpu_load(vcpu);
8025
8026         kvm_apic_accept_events(vcpu);
8027         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8028                                         vcpu->arch.pv.pv_unhalted)
8029                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8030         else
8031                 mp_state->mp_state = vcpu->arch.mp_state;
8032
8033         vcpu_put(vcpu);
8034         return 0;
8035 }
8036
8037 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8038                                     struct kvm_mp_state *mp_state)
8039 {
8040         int ret = -EINVAL;
8041
8042         vcpu_load(vcpu);
8043
8044         if (!lapic_in_kernel(vcpu) &&
8045             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8046                 goto out;
8047
8048         /* INITs are latched while in SMM */
8049         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8050             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8051              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8052                 goto out;
8053
8054         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8055                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8056                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8057         } else
8058                 vcpu->arch.mp_state = mp_state->mp_state;
8059         kvm_make_request(KVM_REQ_EVENT, vcpu);
8060
8061         ret = 0;
8062 out:
8063         vcpu_put(vcpu);
8064         return ret;
8065 }
8066
8067 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8068                     int reason, bool has_error_code, u32 error_code)
8069 {
8070         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8071         int ret;
8072
8073         init_emulate_ctxt(vcpu);
8074
8075         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8076                                    has_error_code, error_code);
8077
8078         if (ret)
8079                 return EMULATE_FAIL;
8080
8081         kvm_rip_write(vcpu, ctxt->eip);
8082         kvm_set_rflags(vcpu, ctxt->eflags);
8083         kvm_make_request(KVM_REQ_EVENT, vcpu);
8084         return EMULATE_DONE;
8085 }
8086 EXPORT_SYMBOL_GPL(kvm_task_switch);
8087
8088 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8089 {
8090         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) &&
8091                         (sregs->cr4 & X86_CR4_OSXSAVE))
8092                 return  -EINVAL;
8093
8094         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8095                 /*
8096                  * When EFER.LME and CR0.PG are set, the processor is in
8097                  * 64-bit mode (though maybe in a 32-bit code segment).
8098                  * CR4.PAE and EFER.LMA must be set.
8099                  */
8100                 if (!(sregs->cr4 & X86_CR4_PAE)
8101                     || !(sregs->efer & EFER_LMA))
8102                         return -EINVAL;
8103         } else {
8104                 /*
8105                  * Not in 64-bit mode: EFER.LMA is clear and the code
8106                  * segment cannot be 64-bit.
8107                  */
8108                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8109                         return -EINVAL;
8110         }
8111
8112         return 0;
8113 }
8114
8115 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8116 {
8117         struct msr_data apic_base_msr;
8118         int mmu_reset_needed = 0;
8119         int cpuid_update_needed = 0;
8120         int pending_vec, max_bits, idx;
8121         struct desc_ptr dt;
8122         int ret = -EINVAL;
8123
8124         if (kvm_valid_sregs(vcpu, sregs))
8125                 goto out;
8126
8127         apic_base_msr.data = sregs->apic_base;
8128         apic_base_msr.host_initiated = true;
8129         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8130                 goto out;
8131
8132         dt.size = sregs->idt.limit;
8133         dt.address = sregs->idt.base;
8134         kvm_x86_ops->set_idt(vcpu, &dt);
8135         dt.size = sregs->gdt.limit;
8136         dt.address = sregs->gdt.base;
8137         kvm_x86_ops->set_gdt(vcpu, &dt);
8138
8139         vcpu->arch.cr2 = sregs->cr2;
8140         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8141         vcpu->arch.cr3 = sregs->cr3;
8142         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8143
8144         kvm_set_cr8(vcpu, sregs->cr8);
8145
8146         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8147         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8148
8149         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8150         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8151         vcpu->arch.cr0 = sregs->cr0;
8152
8153         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8154         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8155                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8156         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8157         if (cpuid_update_needed)
8158                 kvm_update_cpuid(vcpu);
8159
8160         idx = srcu_read_lock(&vcpu->kvm->srcu);
8161         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
8162                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8163                 mmu_reset_needed = 1;
8164         }
8165         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8166
8167         if (mmu_reset_needed)
8168                 kvm_mmu_reset_context(vcpu);
8169
8170         max_bits = KVM_NR_INTERRUPTS;
8171         pending_vec = find_first_bit(
8172                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8173         if (pending_vec < max_bits) {
8174                 kvm_queue_interrupt(vcpu, pending_vec, false);
8175                 pr_debug("Set back pending irq %d\n", pending_vec);
8176         }
8177
8178         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8179         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8180         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8181         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8182         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8183         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8184
8185         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8186         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8187
8188         update_cr8_intercept(vcpu);
8189
8190         /* Older userspace won't unhalt the vcpu on reset. */
8191         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8192             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8193             !is_protmode(vcpu))
8194                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8195
8196         kvm_make_request(KVM_REQ_EVENT, vcpu);
8197
8198         ret = 0;
8199 out:
8200         return ret;
8201 }
8202
8203 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8204                                   struct kvm_sregs *sregs)
8205 {
8206         int ret;
8207
8208         vcpu_load(vcpu);
8209         ret = __set_sregs(vcpu, sregs);
8210         vcpu_put(vcpu);
8211         return ret;
8212 }
8213
8214 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8215                                         struct kvm_guest_debug *dbg)
8216 {
8217         unsigned long rflags;
8218         int i, r;
8219
8220         vcpu_load(vcpu);
8221
8222         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8223                 r = -EBUSY;
8224                 if (vcpu->arch.exception.pending)
8225                         goto out;
8226                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8227                         kvm_queue_exception(vcpu, DB_VECTOR);
8228                 else
8229                         kvm_queue_exception(vcpu, BP_VECTOR);
8230         }
8231
8232         /*
8233          * Read rflags as long as potentially injected trace flags are still
8234          * filtered out.
8235          */
8236         rflags = kvm_get_rflags(vcpu);
8237
8238         vcpu->guest_debug = dbg->control;
8239         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8240                 vcpu->guest_debug = 0;
8241
8242         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8243                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8244                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8245                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8246         } else {
8247                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8248                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8249         }
8250         kvm_update_dr7(vcpu);
8251
8252         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8253                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8254                         get_segment_base(vcpu, VCPU_SREG_CS);
8255
8256         /*
8257          * Trigger an rflags update that will inject or remove the trace
8258          * flags.
8259          */
8260         kvm_set_rflags(vcpu, rflags);
8261
8262         kvm_x86_ops->update_bp_intercept(vcpu);
8263
8264         r = 0;
8265
8266 out:
8267         vcpu_put(vcpu);
8268         return r;
8269 }
8270
8271 /*
8272  * Translate a guest virtual address to a guest physical address.
8273  */
8274 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8275                                     struct kvm_translation *tr)
8276 {
8277         unsigned long vaddr = tr->linear_address;
8278         gpa_t gpa;
8279         int idx;
8280
8281         vcpu_load(vcpu);
8282
8283         idx = srcu_read_lock(&vcpu->kvm->srcu);
8284         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8285         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8286         tr->physical_address = gpa;
8287         tr->valid = gpa != UNMAPPED_GVA;
8288         tr->writeable = 1;
8289         tr->usermode = 0;
8290
8291         vcpu_put(vcpu);
8292         return 0;
8293 }
8294
8295 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8296 {
8297         struct fxregs_state *fxsave;
8298
8299         vcpu_load(vcpu);
8300
8301         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8302         memcpy(fpu->fpr, fxsave->st_space, 128);
8303         fpu->fcw = fxsave->cwd;
8304         fpu->fsw = fxsave->swd;
8305         fpu->ftwx = fxsave->twd;
8306         fpu->last_opcode = fxsave->fop;
8307         fpu->last_ip = fxsave->rip;
8308         fpu->last_dp = fxsave->rdp;
8309         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
8310
8311         vcpu_put(vcpu);
8312         return 0;
8313 }
8314
8315 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8316 {
8317         struct fxregs_state *fxsave;
8318
8319         vcpu_load(vcpu);
8320
8321         fxsave = &vcpu->arch.guest_fpu.state.fxsave;
8322
8323         memcpy(fxsave->st_space, fpu->fpr, 128);
8324         fxsave->cwd = fpu->fcw;
8325         fxsave->swd = fpu->fsw;
8326         fxsave->twd = fpu->ftwx;
8327         fxsave->fop = fpu->last_opcode;
8328         fxsave->rip = fpu->last_ip;
8329         fxsave->rdp = fpu->last_dp;
8330         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
8331
8332         vcpu_put(vcpu);
8333         return 0;
8334 }
8335
8336 static void store_regs(struct kvm_vcpu *vcpu)
8337 {
8338         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8339
8340         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8341                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8342
8343         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
8344                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
8345
8346         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
8347                 kvm_vcpu_ioctl_x86_get_vcpu_events(
8348                                 vcpu, &vcpu->run->s.regs.events);
8349 }
8350
8351 static int sync_regs(struct kvm_vcpu *vcpu)
8352 {
8353         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
8354                 return -EINVAL;
8355
8356         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
8357                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
8358                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
8359         }
8360         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
8361                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
8362                         return -EINVAL;
8363                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
8364         }
8365         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
8366                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
8367                                 vcpu, &vcpu->run->s.regs.events))
8368                         return -EINVAL;
8369                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
8370         }
8371
8372         return 0;
8373 }
8374
8375 static void fx_init(struct kvm_vcpu *vcpu)
8376 {
8377         fpstate_init(&vcpu->arch.guest_fpu.state);
8378         if (boot_cpu_has(X86_FEATURE_XSAVES))
8379                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
8380                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
8381
8382         /*
8383          * Ensure guest xcr0 is valid for loading
8384          */
8385         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8386
8387         vcpu->arch.cr0 |= X86_CR0_ET;
8388 }
8389
8390 /* Swap (qemu) user FPU context for the guest FPU context. */
8391 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8392 {
8393         preempt_disable();
8394         copy_fpregs_to_fpstate(&vcpu->arch.user_fpu);
8395         /* PKRU is separately restored in kvm_x86_ops->run.  */
8396         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state,
8397                                 ~XFEATURE_MASK_PKRU);
8398         preempt_enable();
8399         trace_kvm_fpu(1);
8400 }
8401
8402 /* When vcpu_run ends, restore user space FPU context. */
8403 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8404 {
8405         preempt_disable();
8406         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
8407         copy_kernel_to_fpregs(&vcpu->arch.user_fpu.state);
8408         preempt_enable();
8409         ++vcpu->stat.fpu_reload;
8410         trace_kvm_fpu(0);
8411 }
8412
8413 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
8414 {
8415         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
8416
8417         kvmclock_reset(vcpu);
8418
8419         kvm_x86_ops->vcpu_free(vcpu);
8420         free_cpumask_var(wbinvd_dirty_mask);
8421 }
8422
8423 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
8424                                                 unsigned int id)
8425 {
8426         struct kvm_vcpu *vcpu;
8427
8428         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
8429                 printk_once(KERN_WARNING
8430                 "kvm: SMP vm created on host with unstable TSC; "
8431                 "guest TSC will not be reliable\n");
8432
8433         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
8434
8435         return vcpu;
8436 }
8437
8438 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
8439 {
8440         kvm_vcpu_mtrr_init(vcpu);
8441         vcpu_load(vcpu);
8442         kvm_vcpu_reset(vcpu, false);
8443         kvm_mmu_setup(vcpu);
8444         vcpu_put(vcpu);
8445         return 0;
8446 }
8447
8448 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
8449 {
8450         struct msr_data msr;
8451         struct kvm *kvm = vcpu->kvm;
8452
8453         kvm_hv_vcpu_postcreate(vcpu);
8454
8455         if (mutex_lock_killable(&vcpu->mutex))
8456                 return;
8457         vcpu_load(vcpu);
8458         msr.data = 0x0;
8459         msr.index = MSR_IA32_TSC;
8460         msr.host_initiated = true;
8461         kvm_write_tsc(vcpu, &msr);
8462         vcpu_put(vcpu);
8463         mutex_unlock(&vcpu->mutex);
8464
8465         if (!kvmclock_periodic_sync)
8466                 return;
8467
8468         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
8469                                         KVMCLOCK_SYNC_PERIOD);
8470 }
8471
8472 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
8473 {
8474         vcpu->arch.apf.msr_val = 0;
8475
8476         vcpu_load(vcpu);
8477         kvm_mmu_unload(vcpu);
8478         vcpu_put(vcpu);
8479
8480         kvm_x86_ops->vcpu_free(vcpu);
8481 }
8482
8483 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
8484 {
8485         kvm_lapic_reset(vcpu, init_event);
8486
8487         vcpu->arch.hflags = 0;
8488
8489         vcpu->arch.smi_pending = 0;
8490         vcpu->arch.smi_count = 0;
8491         atomic_set(&vcpu->arch.nmi_queued, 0);
8492         vcpu->arch.nmi_pending = 0;
8493         vcpu->arch.nmi_injected = false;
8494         kvm_clear_interrupt_queue(vcpu);
8495         kvm_clear_exception_queue(vcpu);
8496         vcpu->arch.exception.pending = false;
8497
8498         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
8499         kvm_update_dr0123(vcpu);
8500         vcpu->arch.dr6 = DR6_INIT;
8501         kvm_update_dr6(vcpu);
8502         vcpu->arch.dr7 = DR7_FIXED_1;
8503         kvm_update_dr7(vcpu);
8504
8505         vcpu->arch.cr2 = 0;
8506
8507         kvm_make_request(KVM_REQ_EVENT, vcpu);
8508         vcpu->arch.apf.msr_val = 0;
8509         vcpu->arch.st.msr_val = 0;
8510
8511         kvmclock_reset(vcpu);
8512
8513         kvm_clear_async_pf_completion_queue(vcpu);
8514         kvm_async_pf_hash_reset(vcpu);
8515         vcpu->arch.apf.halted = false;
8516
8517         if (kvm_mpx_supported()) {
8518                 void *mpx_state_buffer;
8519
8520                 /*
8521                  * To avoid have the INIT path from kvm_apic_has_events() that be
8522                  * called with loaded FPU and does not let userspace fix the state.
8523                  */
8524                 if (init_event)
8525                         kvm_put_guest_fpu(vcpu);
8526                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8527                                         XFEATURE_MASK_BNDREGS);
8528                 if (mpx_state_buffer)
8529                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
8530                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu.state.xsave,
8531                                         XFEATURE_MASK_BNDCSR);
8532                 if (mpx_state_buffer)
8533                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
8534                 if (init_event)
8535                         kvm_load_guest_fpu(vcpu);
8536         }
8537
8538         if (!init_event) {
8539                 kvm_pmu_reset(vcpu);
8540                 vcpu->arch.smbase = 0x30000;
8541
8542                 vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
8543                 vcpu->arch.msr_misc_features_enables = 0;
8544
8545                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
8546         }
8547
8548         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
8549         vcpu->arch.regs_avail = ~0;
8550         vcpu->arch.regs_dirty = ~0;
8551
8552         vcpu->arch.ia32_xss = 0;
8553
8554         kvm_x86_ops->vcpu_reset(vcpu, init_event);
8555 }
8556
8557 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
8558 {
8559         struct kvm_segment cs;
8560
8561         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8562         cs.selector = vector << 8;
8563         cs.base = vector << 12;
8564         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
8565         kvm_rip_write(vcpu, 0);
8566 }
8567
8568 int kvm_arch_hardware_enable(void)
8569 {
8570         struct kvm *kvm;
8571         struct kvm_vcpu *vcpu;
8572         int i;
8573         int ret;
8574         u64 local_tsc;
8575         u64 max_tsc = 0;
8576         bool stable, backwards_tsc = false;
8577
8578         kvm_shared_msr_cpu_online();
8579         ret = kvm_x86_ops->hardware_enable();
8580         if (ret != 0)
8581                 return ret;
8582
8583         local_tsc = rdtsc();
8584         stable = !kvm_check_tsc_unstable();
8585         list_for_each_entry(kvm, &vm_list, vm_list) {
8586                 kvm_for_each_vcpu(i, vcpu, kvm) {
8587                         if (!stable && vcpu->cpu == smp_processor_id())
8588                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8589                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
8590                                 backwards_tsc = true;
8591                                 if (vcpu->arch.last_host_tsc > max_tsc)
8592                                         max_tsc = vcpu->arch.last_host_tsc;
8593                         }
8594                 }
8595         }
8596
8597         /*
8598          * Sometimes, even reliable TSCs go backwards.  This happens on
8599          * platforms that reset TSC during suspend or hibernate actions, but
8600          * maintain synchronization.  We must compensate.  Fortunately, we can
8601          * detect that condition here, which happens early in CPU bringup,
8602          * before any KVM threads can be running.  Unfortunately, we can't
8603          * bring the TSCs fully up to date with real time, as we aren't yet far
8604          * enough into CPU bringup that we know how much real time has actually
8605          * elapsed; our helper function, ktime_get_boot_ns() will be using boot
8606          * variables that haven't been updated yet.
8607          *
8608          * So we simply find the maximum observed TSC above, then record the
8609          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
8610          * the adjustment will be applied.  Note that we accumulate
8611          * adjustments, in case multiple suspend cycles happen before some VCPU
8612          * gets a chance to run again.  In the event that no KVM threads get a
8613          * chance to run, we will miss the entire elapsed period, as we'll have
8614          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
8615          * loose cycle time.  This isn't too big a deal, since the loss will be
8616          * uniform across all VCPUs (not to mention the scenario is extremely
8617          * unlikely). It is possible that a second hibernate recovery happens
8618          * much faster than a first, causing the observed TSC here to be
8619          * smaller; this would require additional padding adjustment, which is
8620          * why we set last_host_tsc to the local tsc observed here.
8621          *
8622          * N.B. - this code below runs only on platforms with reliable TSC,
8623          * as that is the only way backwards_tsc is set above.  Also note
8624          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
8625          * have the same delta_cyc adjustment applied if backwards_tsc
8626          * is detected.  Note further, this adjustment is only done once,
8627          * as we reset last_host_tsc on all VCPUs to stop this from being
8628          * called multiple times (one for each physical CPU bringup).
8629          *
8630          * Platforms with unreliable TSCs don't have to deal with this, they
8631          * will be compensated by the logic in vcpu_load, which sets the TSC to
8632          * catchup mode.  This will catchup all VCPUs to real time, but cannot
8633          * guarantee that they stay in perfect synchronization.
8634          */
8635         if (backwards_tsc) {
8636                 u64 delta_cyc = max_tsc - local_tsc;
8637                 list_for_each_entry(kvm, &vm_list, vm_list) {
8638                         kvm->arch.backwards_tsc_observed = true;
8639                         kvm_for_each_vcpu(i, vcpu, kvm) {
8640                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
8641                                 vcpu->arch.last_host_tsc = local_tsc;
8642                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
8643                         }
8644
8645                         /*
8646                          * We have to disable TSC offset matching.. if you were
8647                          * booting a VM while issuing an S4 host suspend....
8648                          * you may have some problem.  Solving this issue is
8649                          * left as an exercise to the reader.
8650                          */
8651                         kvm->arch.last_tsc_nsec = 0;
8652                         kvm->arch.last_tsc_write = 0;
8653                 }
8654
8655         }
8656         return 0;
8657 }
8658
8659 void kvm_arch_hardware_disable(void)
8660 {
8661         kvm_x86_ops->hardware_disable();
8662         drop_user_return_notifiers();
8663 }
8664
8665 int kvm_arch_hardware_setup(void)
8666 {
8667         int r;
8668
8669         r = kvm_x86_ops->hardware_setup();
8670         if (r != 0)
8671                 return r;
8672
8673         if (kvm_has_tsc_control) {
8674                 /*
8675                  * Make sure the user can only configure tsc_khz values that
8676                  * fit into a signed integer.
8677                  * A min value is not calculated because it will always
8678                  * be 1 on all machines.
8679                  */
8680                 u64 max = min(0x7fffffffULL,
8681                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
8682                 kvm_max_guest_tsc_khz = max;
8683
8684                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
8685         }
8686
8687         kvm_init_msr_list();
8688         return 0;
8689 }
8690
8691 void kvm_arch_hardware_unsetup(void)
8692 {
8693         kvm_x86_ops->hardware_unsetup();
8694 }
8695
8696 void kvm_arch_check_processor_compat(void *rtn)
8697 {
8698         kvm_x86_ops->check_processor_compatibility(rtn);
8699 }
8700
8701 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
8702 {
8703         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
8704 }
8705 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
8706
8707 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
8708 {
8709         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
8710 }
8711
8712 struct static_key kvm_no_apic_vcpu __read_mostly;
8713 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
8714
8715 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
8716 {
8717         struct page *page;
8718         int r;
8719
8720         vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
8721         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
8722         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
8723                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8724         else
8725                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
8726
8727         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
8728         if (!page) {
8729                 r = -ENOMEM;
8730                 goto fail;
8731         }
8732         vcpu->arch.pio_data = page_address(page);
8733
8734         kvm_set_tsc_khz(vcpu, max_tsc_khz);
8735
8736         r = kvm_mmu_create(vcpu);
8737         if (r < 0)
8738                 goto fail_free_pio_data;
8739
8740         if (irqchip_in_kernel(vcpu->kvm)) {
8741                 r = kvm_create_lapic(vcpu);
8742                 if (r < 0)
8743                         goto fail_mmu_destroy;
8744         } else
8745                 static_key_slow_inc(&kvm_no_apic_vcpu);
8746
8747         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
8748                                        GFP_KERNEL);
8749         if (!vcpu->arch.mce_banks) {
8750                 r = -ENOMEM;
8751                 goto fail_free_lapic;
8752         }
8753         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
8754
8755         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
8756                 r = -ENOMEM;
8757                 goto fail_free_mce_banks;
8758         }
8759
8760         fx_init(vcpu);
8761
8762         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
8763
8764         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
8765
8766         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
8767
8768         kvm_async_pf_hash_reset(vcpu);
8769         kvm_pmu_init(vcpu);
8770
8771         vcpu->arch.pending_external_vector = -1;
8772         vcpu->arch.preempted_in_kernel = false;
8773
8774         kvm_hv_vcpu_init(vcpu);
8775
8776         return 0;
8777
8778 fail_free_mce_banks:
8779         kfree(vcpu->arch.mce_banks);
8780 fail_free_lapic:
8781         kvm_free_lapic(vcpu);
8782 fail_mmu_destroy:
8783         kvm_mmu_destroy(vcpu);
8784 fail_free_pio_data:
8785         free_page((unsigned long)vcpu->arch.pio_data);
8786 fail:
8787         return r;
8788 }
8789
8790 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
8791 {
8792         int idx;
8793
8794         kvm_hv_vcpu_uninit(vcpu);
8795         kvm_pmu_destroy(vcpu);
8796         kfree(vcpu->arch.mce_banks);
8797         kvm_free_lapic(vcpu);
8798         idx = srcu_read_lock(&vcpu->kvm->srcu);
8799         kvm_mmu_destroy(vcpu);
8800         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8801         free_page((unsigned long)vcpu->arch.pio_data);
8802         if (!lapic_in_kernel(vcpu))
8803                 static_key_slow_dec(&kvm_no_apic_vcpu);
8804 }
8805
8806 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
8807 {
8808         vcpu->arch.l1tf_flush_l1d = true;
8809         kvm_x86_ops->sched_in(vcpu, cpu);
8810 }
8811
8812 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
8813 {
8814         if (type)
8815                 return -EINVAL;
8816
8817         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
8818         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
8819         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
8820         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
8821         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
8822
8823         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
8824         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
8825         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
8826         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
8827                 &kvm->arch.irq_sources_bitmap);
8828
8829         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
8830         mutex_init(&kvm->arch.apic_map_lock);
8831         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
8832
8833         kvm->arch.kvmclock_offset = -ktime_get_boot_ns();
8834         pvclock_update_vm_gtod_copy(kvm);
8835
8836         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
8837         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
8838
8839         kvm_hv_init_vm(kvm);
8840         kvm_page_track_init(kvm);
8841         kvm_mmu_init_vm(kvm);
8842
8843         if (kvm_x86_ops->vm_init)
8844                 return kvm_x86_ops->vm_init(kvm);
8845
8846         return 0;
8847 }
8848
8849 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
8850 {
8851         vcpu_load(vcpu);
8852         kvm_mmu_unload(vcpu);
8853         vcpu_put(vcpu);
8854 }
8855
8856 static void kvm_free_vcpus(struct kvm *kvm)
8857 {
8858         unsigned int i;
8859         struct kvm_vcpu *vcpu;
8860
8861         /*
8862          * Unpin any mmu pages first.
8863          */
8864         kvm_for_each_vcpu(i, vcpu, kvm) {
8865                 kvm_clear_async_pf_completion_queue(vcpu);
8866                 kvm_unload_vcpu_mmu(vcpu);
8867         }
8868         kvm_for_each_vcpu(i, vcpu, kvm)
8869                 kvm_arch_vcpu_free(vcpu);
8870
8871         mutex_lock(&kvm->lock);
8872         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
8873                 kvm->vcpus[i] = NULL;
8874
8875         atomic_set(&kvm->online_vcpus, 0);
8876         mutex_unlock(&kvm->lock);
8877 }
8878
8879 void kvm_arch_sync_events(struct kvm *kvm)
8880 {
8881         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
8882         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
8883         kvm_free_pit(kvm);
8884 }
8885
8886 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8887 {
8888         int i, r;
8889         unsigned long hva;
8890         struct kvm_memslots *slots = kvm_memslots(kvm);
8891         struct kvm_memory_slot *slot, old;
8892
8893         /* Called with kvm->slots_lock held.  */
8894         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
8895                 return -EINVAL;
8896
8897         slot = id_to_memslot(slots, id);
8898         if (size) {
8899                 if (slot->npages)
8900                         return -EEXIST;
8901
8902                 /*
8903                  * MAP_SHARED to prevent internal slot pages from being moved
8904                  * by fork()/COW.
8905                  */
8906                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
8907                               MAP_SHARED | MAP_ANONYMOUS, 0);
8908                 if (IS_ERR((void *)hva))
8909                         return PTR_ERR((void *)hva);
8910         } else {
8911                 if (!slot->npages)
8912                         return 0;
8913
8914                 hva = 0;
8915         }
8916
8917         old = *slot;
8918         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
8919                 struct kvm_userspace_memory_region m;
8920
8921                 m.slot = id | (i << 16);
8922                 m.flags = 0;
8923                 m.guest_phys_addr = gpa;
8924                 m.userspace_addr = hva;
8925                 m.memory_size = size;
8926                 r = __kvm_set_memory_region(kvm, &m);
8927                 if (r < 0)
8928                         return r;
8929         }
8930
8931         if (!size)
8932                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
8933
8934         return 0;
8935 }
8936 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
8937
8938 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
8939 {
8940         int r;
8941
8942         mutex_lock(&kvm->slots_lock);
8943         r = __x86_set_memory_region(kvm, id, gpa, size);
8944         mutex_unlock(&kvm->slots_lock);
8945
8946         return r;
8947 }
8948 EXPORT_SYMBOL_GPL(x86_set_memory_region);
8949
8950 void kvm_arch_destroy_vm(struct kvm *kvm)
8951 {
8952         if (current->mm == kvm->mm) {
8953                 /*
8954                  * Free memory regions allocated on behalf of userspace,
8955                  * unless the the memory map has changed due to process exit
8956                  * or fd copying.
8957                  */
8958                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
8959                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
8960                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
8961         }
8962         if (kvm_x86_ops->vm_destroy)
8963                 kvm_x86_ops->vm_destroy(kvm);
8964         kvm_pic_destroy(kvm);
8965         kvm_ioapic_destroy(kvm);
8966         kvm_free_vcpus(kvm);
8967         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
8968         kvm_mmu_uninit_vm(kvm);
8969         kvm_page_track_cleanup(kvm);
8970         kvm_hv_destroy_vm(kvm);
8971 }
8972
8973 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
8974                            struct kvm_memory_slot *dont)
8975 {
8976         int i;
8977
8978         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
8979                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
8980                         kvfree(free->arch.rmap[i]);
8981                         free->arch.rmap[i] = NULL;
8982                 }
8983                 if (i == 0)
8984                         continue;
8985
8986                 if (!dont || free->arch.lpage_info[i - 1] !=
8987                              dont->arch.lpage_info[i - 1]) {
8988                         kvfree(free->arch.lpage_info[i - 1]);
8989                         free->arch.lpage_info[i - 1] = NULL;
8990                 }
8991         }
8992
8993         kvm_page_track_free_memslot(free, dont);
8994 }
8995
8996 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
8997                             unsigned long npages)
8998 {
8999         int i;
9000
9001         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9002                 struct kvm_lpage_info *linfo;
9003                 unsigned long ugfn;
9004                 int lpages;
9005                 int level = i + 1;
9006
9007                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9008                                       slot->base_gfn, level) + 1;
9009
9010                 slot->arch.rmap[i] =
9011                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9012                                  GFP_KERNEL);
9013                 if (!slot->arch.rmap[i])
9014                         goto out_free;
9015                 if (i == 0)
9016                         continue;
9017
9018                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL);
9019                 if (!linfo)
9020                         goto out_free;
9021
9022                 slot->arch.lpage_info[i - 1] = linfo;
9023
9024                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9025                         linfo[0].disallow_lpage = 1;
9026                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9027                         linfo[lpages - 1].disallow_lpage = 1;
9028                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9029                 /*
9030                  * If the gfn and userspace address are not aligned wrt each
9031                  * other, or if explicitly asked to, disable large page
9032                  * support for this slot
9033                  */
9034                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9035                     !kvm_largepages_enabled()) {
9036                         unsigned long j;
9037
9038                         for (j = 0; j < lpages; ++j)
9039                                 linfo[j].disallow_lpage = 1;
9040                 }
9041         }
9042
9043         if (kvm_page_track_create_memslot(slot, npages))
9044                 goto out_free;
9045
9046         return 0;
9047
9048 out_free:
9049         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9050                 kvfree(slot->arch.rmap[i]);
9051                 slot->arch.rmap[i] = NULL;
9052                 if (i == 0)
9053                         continue;
9054
9055                 kvfree(slot->arch.lpage_info[i - 1]);
9056                 slot->arch.lpage_info[i - 1] = NULL;
9057         }
9058         return -ENOMEM;
9059 }
9060
9061 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
9062 {
9063         /*
9064          * memslots->generation has been incremented.
9065          * mmio generation may have reached its maximum value.
9066          */
9067         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
9068 }
9069
9070 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9071                                 struct kvm_memory_slot *memslot,
9072                                 const struct kvm_userspace_memory_region *mem,
9073                                 enum kvm_mr_change change)
9074 {
9075         return 0;
9076 }
9077
9078 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9079                                      struct kvm_memory_slot *new)
9080 {
9081         /* Still write protect RO slot */
9082         if (new->flags & KVM_MEM_READONLY) {
9083                 kvm_mmu_slot_remove_write_access(kvm, new);
9084                 return;
9085         }
9086
9087         /*
9088          * Call kvm_x86_ops dirty logging hooks when they are valid.
9089          *
9090          * kvm_x86_ops->slot_disable_log_dirty is called when:
9091          *
9092          *  - KVM_MR_CREATE with dirty logging is disabled
9093          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9094          *
9095          * The reason is, in case of PML, we need to set D-bit for any slots
9096          * with dirty logging disabled in order to eliminate unnecessary GPA
9097          * logging in PML buffer (and potential PML buffer full VMEXT). This
9098          * guarantees leaving PML enabled during guest's lifetime won't have
9099          * any additonal overhead from PML when guest is running with dirty
9100          * logging disabled for memory slots.
9101          *
9102          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9103          * to dirty logging mode.
9104          *
9105          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9106          *
9107          * In case of write protect:
9108          *
9109          * Write protect all pages for dirty logging.
9110          *
9111          * All the sptes including the large sptes which point to this
9112          * slot are set to readonly. We can not create any new large
9113          * spte on this slot until the end of the logging.
9114          *
9115          * See the comments in fast_page_fault().
9116          */
9117         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9118                 if (kvm_x86_ops->slot_enable_log_dirty)
9119                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9120                 else
9121                         kvm_mmu_slot_remove_write_access(kvm, new);
9122         } else {
9123                 if (kvm_x86_ops->slot_disable_log_dirty)
9124                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9125         }
9126 }
9127
9128 void kvm_arch_commit_memory_region(struct kvm *kvm,
9129                                 const struct kvm_userspace_memory_region *mem,
9130                                 const struct kvm_memory_slot *old,
9131                                 const struct kvm_memory_slot *new,
9132                                 enum kvm_mr_change change)
9133 {
9134         int nr_mmu_pages = 0;
9135
9136         if (!kvm->arch.n_requested_mmu_pages)
9137                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
9138
9139         if (nr_mmu_pages)
9140                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
9141
9142         /*
9143          * Dirty logging tracks sptes in 4k granularity, meaning that large
9144          * sptes have to be split.  If live migration is successful, the guest
9145          * in the source machine will be destroyed and large sptes will be
9146          * created in the destination. However, if the guest continues to run
9147          * in the source machine (for example if live migration fails), small
9148          * sptes will remain around and cause bad performance.
9149          *
9150          * Scan sptes if dirty logging has been stopped, dropping those
9151          * which can be collapsed into a single large-page spte.  Later
9152          * page faults will create the large-page sptes.
9153          */
9154         if ((change != KVM_MR_DELETE) &&
9155                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9156                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9157                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9158
9159         /*
9160          * Set up write protection and/or dirty logging for the new slot.
9161          *
9162          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9163          * been zapped so no dirty logging staff is needed for old slot. For
9164          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9165          * new and it's also covered when dealing with the new slot.
9166          *
9167          * FIXME: const-ify all uses of struct kvm_memory_slot.
9168          */
9169         if (change != KVM_MR_DELETE)
9170                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9171 }
9172
9173 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9174 {
9175         kvm_mmu_invalidate_zap_all_pages(kvm);
9176 }
9177
9178 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9179                                    struct kvm_memory_slot *slot)
9180 {
9181         kvm_page_track_flush_slot(kvm, slot);
9182 }
9183
9184 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9185 {
9186         if (!list_empty_careful(&vcpu->async_pf.done))
9187                 return true;
9188
9189         if (kvm_apic_has_events(vcpu))
9190                 return true;
9191
9192         if (vcpu->arch.pv.pv_unhalted)
9193                 return true;
9194
9195         if (vcpu->arch.exception.pending)
9196                 return true;
9197
9198         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9199             (vcpu->arch.nmi_pending &&
9200              kvm_x86_ops->nmi_allowed(vcpu)))
9201                 return true;
9202
9203         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9204             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9205                 return true;
9206
9207         if (kvm_arch_interrupt_allowed(vcpu) &&
9208             kvm_cpu_has_interrupt(vcpu))
9209                 return true;
9210
9211         if (kvm_hv_has_stimer_pending(vcpu))
9212                 return true;
9213
9214         return false;
9215 }
9216
9217 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9218 {
9219         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9220 }
9221
9222 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9223 {
9224         return vcpu->arch.preempted_in_kernel;
9225 }
9226
9227 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9228 {
9229         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9230 }
9231
9232 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9233 {
9234         return kvm_x86_ops->interrupt_allowed(vcpu);
9235 }
9236
9237 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9238 {
9239         if (is_64_bit_mode(vcpu))
9240                 return kvm_rip_read(vcpu);
9241         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9242                      kvm_rip_read(vcpu));
9243 }
9244 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9245
9246 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9247 {
9248         return kvm_get_linear_rip(vcpu) == linear_rip;
9249 }
9250 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9251
9252 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9253 {
9254         unsigned long rflags;
9255
9256         rflags = kvm_x86_ops->get_rflags(vcpu);
9257         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9258                 rflags &= ~X86_EFLAGS_TF;
9259         return rflags;
9260 }
9261 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9262
9263 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9264 {
9265         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9266             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9267                 rflags |= X86_EFLAGS_TF;
9268         kvm_x86_ops->set_rflags(vcpu, rflags);
9269 }
9270
9271 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9272 {
9273         __kvm_set_rflags(vcpu, rflags);
9274         kvm_make_request(KVM_REQ_EVENT, vcpu);
9275 }
9276 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9277
9278 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9279 {
9280         int r;
9281
9282         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
9283               work->wakeup_all)
9284                 return;
9285
9286         r = kvm_mmu_reload(vcpu);
9287         if (unlikely(r))
9288                 return;
9289
9290         if (!vcpu->arch.mmu.direct_map &&
9291               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
9292                 return;
9293
9294         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
9295 }
9296
9297 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9298 {
9299         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9300 }
9301
9302 static inline u32 kvm_async_pf_next_probe(u32 key)
9303 {
9304         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9305 }
9306
9307 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9308 {
9309         u32 key = kvm_async_pf_hash_fn(gfn);
9310
9311         while (vcpu->arch.apf.gfns[key] != ~0)
9312                 key = kvm_async_pf_next_probe(key);
9313
9314         vcpu->arch.apf.gfns[key] = gfn;
9315 }
9316
9317 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9318 {
9319         int i;
9320         u32 key = kvm_async_pf_hash_fn(gfn);
9321
9322         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9323                      (vcpu->arch.apf.gfns[key] != gfn &&
9324                       vcpu->arch.apf.gfns[key] != ~0); i++)
9325                 key = kvm_async_pf_next_probe(key);
9326
9327         return key;
9328 }
9329
9330 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9331 {
9332         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
9333 }
9334
9335 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9336 {
9337         u32 i, j, k;
9338
9339         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
9340         while (true) {
9341                 vcpu->arch.apf.gfns[i] = ~0;
9342                 do {
9343                         j = kvm_async_pf_next_probe(j);
9344                         if (vcpu->arch.apf.gfns[j] == ~0)
9345                                 return;
9346                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
9347                         /*
9348                          * k lies cyclically in ]i,j]
9349                          * |    i.k.j |
9350                          * |....j i.k.| or  |.k..j i...|
9351                          */
9352                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
9353                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
9354                 i = j;
9355         }
9356 }
9357
9358 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
9359 {
9360
9361         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
9362                                       sizeof(val));
9363 }
9364
9365 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
9366 {
9367
9368         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
9369                                       sizeof(u32));
9370 }
9371
9372 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
9373                                      struct kvm_async_pf *work)
9374 {
9375         struct x86_exception fault;
9376
9377         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
9378         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
9379
9380         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
9381             (vcpu->arch.apf.send_user_only &&
9382              kvm_x86_ops->get_cpl(vcpu) == 0))
9383                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
9384         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
9385                 fault.vector = PF_VECTOR;
9386                 fault.error_code_valid = true;
9387                 fault.error_code = 0;
9388                 fault.nested_page_fault = false;
9389                 fault.address = work->arch.token;
9390                 fault.async_page_fault = true;
9391                 kvm_inject_page_fault(vcpu, &fault);
9392         }
9393 }
9394
9395 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
9396                                  struct kvm_async_pf *work)
9397 {
9398         struct x86_exception fault;
9399         u32 val;
9400
9401         if (work->wakeup_all)
9402                 work->arch.token = ~0; /* broadcast wakeup */
9403         else
9404                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
9405         trace_kvm_async_pf_ready(work->arch.token, work->gva);
9406
9407         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
9408             !apf_get_user(vcpu, &val)) {
9409                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
9410                     vcpu->arch.exception.pending &&
9411                     vcpu->arch.exception.nr == PF_VECTOR &&
9412                     !apf_put_user(vcpu, 0)) {
9413                         vcpu->arch.exception.injected = false;
9414                         vcpu->arch.exception.pending = false;
9415                         vcpu->arch.exception.nr = 0;
9416                         vcpu->arch.exception.has_error_code = false;
9417                         vcpu->arch.exception.error_code = 0;
9418                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
9419                         fault.vector = PF_VECTOR;
9420                         fault.error_code_valid = true;
9421                         fault.error_code = 0;
9422                         fault.nested_page_fault = false;
9423                         fault.address = work->arch.token;
9424                         fault.async_page_fault = true;
9425                         kvm_inject_page_fault(vcpu, &fault);
9426                 }
9427         }
9428         vcpu->arch.apf.halted = false;
9429         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9430 }
9431
9432 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
9433 {
9434         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
9435                 return true;
9436         else
9437                 return kvm_can_do_async_pf(vcpu);
9438 }
9439
9440 void kvm_arch_start_assignment(struct kvm *kvm)
9441 {
9442         atomic_inc(&kvm->arch.assigned_device_count);
9443 }
9444 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
9445
9446 void kvm_arch_end_assignment(struct kvm *kvm)
9447 {
9448         atomic_dec(&kvm->arch.assigned_device_count);
9449 }
9450 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
9451
9452 bool kvm_arch_has_assigned_device(struct kvm *kvm)
9453 {
9454         return atomic_read(&kvm->arch.assigned_device_count);
9455 }
9456 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
9457
9458 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
9459 {
9460         atomic_inc(&kvm->arch.noncoherent_dma_count);
9461 }
9462 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
9463
9464 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
9465 {
9466         atomic_dec(&kvm->arch.noncoherent_dma_count);
9467 }
9468 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
9469
9470 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
9471 {
9472         return atomic_read(&kvm->arch.noncoherent_dma_count);
9473 }
9474 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
9475
9476 bool kvm_arch_has_irq_bypass(void)
9477 {
9478         return kvm_x86_ops->update_pi_irte != NULL;
9479 }
9480
9481 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
9482                                       struct irq_bypass_producer *prod)
9483 {
9484         struct kvm_kernel_irqfd *irqfd =
9485                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9486
9487         irqfd->producer = prod;
9488
9489         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
9490                                            prod->irq, irqfd->gsi, 1);
9491 }
9492
9493 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
9494                                       struct irq_bypass_producer *prod)
9495 {
9496         int ret;
9497         struct kvm_kernel_irqfd *irqfd =
9498                 container_of(cons, struct kvm_kernel_irqfd, consumer);
9499
9500         WARN_ON(irqfd->producer != prod);
9501         irqfd->producer = NULL;
9502
9503         /*
9504          * When producer of consumer is unregistered, we change back to
9505          * remapped mode, so we can re-use the current implementation
9506          * when the irq is masked/disabled or the consumer side (KVM
9507          * int this case doesn't want to receive the interrupts.
9508         */
9509         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
9510         if (ret)
9511                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
9512                        " fails: %d\n", irqfd->consumer.token, ret);
9513 }
9514
9515 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
9516                                    uint32_t guest_irq, bool set)
9517 {
9518         if (!kvm_x86_ops->update_pi_irte)
9519                 return -EINVAL;
9520
9521         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
9522 }
9523
9524 bool kvm_vector_hashing_enabled(void)
9525 {
9526         return vector_hashing;
9527 }
9528 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
9529
9530 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
9531 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
9532 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
9533 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
9534 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
9535 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
9536 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
9537 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
9538 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
9539 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
9540 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
9541 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
9542 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
9543 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
9544 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
9545 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
9546 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
9547 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
9548 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);