arch/x86/kvm/x86.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Kernel-based Virtual Machine driver for Linux
   4  *
   5  * derived from drivers/kvm/kvm_main.c
   6  *
   7  * Copyright (C) 2006 Qumranet, Inc.
   8  * Copyright (C) 2008 Qumranet, Inc.
   9  * Copyright IBM Corporation, 2008
  10  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  11  *
  12  * Authors:
  13  *   Avi Kivity   <avi@qumranet.com>
  14  *   Yaniv Kamay  <yaniv@qumranet.com>
  15  *   Amit Shah    <amit.shah@qumranet.com>
  16  *   Ben-Ami Yassour <benami@il.ibm.com>
  17  */
  18
  19 #include <linux/kvm_host.h>
  20 #include "irq.h"
  21 #include "mmu.h"
  22 #include "i8254.h"
  23 #include "tss.h"
  24 #include "kvm_cache_regs.h"
  25 #include "x86.h"
  26 #include "cpuid.h"
  27 #include "pmu.h"
  28 #include "hyperv.h"
  29
  30 #include <linux/clocksource.h>
  31 #include <linux/interrupt.h>
  32 #include <linux/kvm.h>
  33 #include <linux/fs.h>
  34 #include <linux/vmalloc.h>
  35 #include <linux/export.h>
  36 #include <linux/moduleparam.h>
  37 #include <linux/mman.h>
  38 #include <linux/highmem.h>
  39 #include <linux/iommu.h>
  40 #include <linux/intel-iommu.h>
  41 #include <linux/cpufreq.h>
  42 #include <linux/user-return-notifier.h>
  43 #include <linux/srcu.h>
  44 #include <linux/slab.h>
  45 #include <linux/perf_event.h>
  46 #include <linux/uaccess.h>
  47 #include <linux/hash.h>
  48 #include <linux/pci.h>
  49 #include <linux/timekeeper_internal.h>
  50 #include <linux/pvclock_gtod.h>
  51 #include <linux/kvm_irqfd.h>
  52 #include <linux/irqbypass.h>
  53 #include <linux/sched/stat.h>
  54 #include <linux/sched/isolation.h>
  55 #include <linux/mem_encrypt.h>
  56
  57 #include <trace/events/kvm.h>
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67 #include <asm/irq_remapping.h>
  68 #include <asm/mshyperv.h>
  69 #include <asm/hypervisor.h>
  70 #include <asm/intel_pt.h>
  71 #include <clocksource/hyperv_timer.h>
  72
  73 #define CREATE_TRACE_POINTS
  74 #include "trace.h"
  75
  76 #define MAX_IO_MSRS 256
  77 #define KVM_MAX_MCE_BANKS 32
  78 u64 __read_mostly kvm_mce_cap_supported = MCG_CTL_P | MCG_SER_P;
  79 EXPORT_SYMBOL_GPL(kvm_mce_cap_supported);
  80
  81 #define emul_to_vcpu(ctxt) \
  82         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  83
  84 /* EFER defaults:
  85  * - enable syscall per default because its emulated by KVM
  86  * - enable LME and LMA per default on 64 bit KVM
  87  */
  88 #ifdef CONFIG_X86_64
  89 static
  90 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  91 #else
  92 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  93 #endif
  94
  95 #define VM_STAT(x, ...) offsetof(struct kvm, stat.x), KVM_STAT_VM, ## __VA_ARGS__
  96 #define VCPU_STAT(x, ...) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU, ## __VA_ARGS__
  97
  98 #define KVM_X2APIC_API_VALID_FLAGS (KVM_X2APIC_API_USE_32BIT_IDS | \
  99                                     KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
 100
 101 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
 102 static void process_nmi(struct kvm_vcpu *vcpu);
 103 static void enter_smm(struct kvm_vcpu *vcpu);
 104 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
 105 static void store_regs(struct kvm_vcpu *vcpu);
 106 static int sync_regs(struct kvm_vcpu *vcpu);
 107
 108 struct kvm_x86_ops *kvm_x86_ops __read_mostly;
 109 EXPORT_SYMBOL_GPL(kvm_x86_ops);
 110
 111 static bool __read_mostly ignore_msrs = 0;
 112 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
 113
 114 static bool __read_mostly report_ignored_msrs = true;
 115 module_param(report_ignored_msrs, bool, S_IRUGO | S_IWUSR);
 116
 117 unsigned int min_timer_period_us = 200;
 118 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 119
 120 static bool __read_mostly kvmclock_periodic_sync = true;
 121 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 122
 123 bool __read_mostly kvm_has_tsc_control;
 124 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 125 u32  __read_mostly kvm_max_guest_tsc_khz;
 126 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 127 u8   __read_mostly kvm_tsc_scaling_ratio_frac_bits;
 128 EXPORT_SYMBOL_GPL(kvm_tsc_scaling_ratio_frac_bits);
 129 u64  __read_mostly kvm_max_tsc_scaling_ratio;
 130 EXPORT_SYMBOL_GPL(kvm_max_tsc_scaling_ratio);
 131 u64 __read_mostly kvm_default_tsc_scaling_ratio;
 132 EXPORT_SYMBOL_GPL(kvm_default_tsc_scaling_ratio);
 133
 134 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 135 static u32 __read_mostly tsc_tolerance_ppm = 250;
 136 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 137
 138 /*
 139  * lapic timer advance (tscdeadline mode only) in nanoseconds.  '-1' enables
 140  * adaptive tuning starting from default advancment of 1000ns.  '0' disables
 141  * advancement entirely.  Any other value is used as-is and disables adaptive
 142  * tuning, i.e. allows priveleged userspace to set an exact advancement time.
 143  */
 144 static int __read_mostly lapic_timer_advance_ns = -1;
 145 module_param(lapic_timer_advance_ns, int, S_IRUGO | S_IWUSR);
 146
 147 static bool __read_mostly vector_hashing = true;
 148 module_param(vector_hashing, bool, S_IRUGO);
 149
 150 bool __read_mostly enable_vmware_backdoor = false;
 151 module_param(enable_vmware_backdoor, bool, S_IRUGO);
 152 EXPORT_SYMBOL_GPL(enable_vmware_backdoor);
 153
 154 static bool __read_mostly force_emulation_prefix = false;
 155 module_param(force_emulation_prefix, bool, S_IRUGO);
 156
 157 int __read_mostly pi_inject_timer = -1;
 158 module_param(pi_inject_timer, bint, S_IRUGO | S_IWUSR);
 159
 160 #define KVM_NR_SHARED_MSRS 16
 161
 162 struct kvm_shared_msrs_global {
 163         int nr;
 164         u32 msrs[KVM_NR_SHARED_MSRS];
 165 };
 166
 167 struct kvm_shared_msrs {
 168         struct user_return_notifier urn;
 169         bool registered;
 170         struct kvm_shared_msr_values {
 171                 u64 host;
 172                 u64 curr;
 173         } values[KVM_NR_SHARED_MSRS];
 174 };
 175
 176 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 177 static struct kvm_shared_msrs __percpu *shared_msrs;
 178
 179 struct kvm_stats_debugfs_item debugfs_entries[] = {
 180         { "pf_fixed", VCPU_STAT(pf_fixed) },
 181         { "pf_guest", VCPU_STAT(pf_guest) },
 182         { "tlb_flush", VCPU_STAT(tlb_flush) },
 183         { "invlpg", VCPU_STAT(invlpg) },
 184         { "exits", VCPU_STAT(exits) },
 185         { "io_exits", VCPU_STAT(io_exits) },
 186         { "mmio_exits", VCPU_STAT(mmio_exits) },
 187         { "signal_exits", VCPU_STAT(signal_exits) },
 188         { "irq_window", VCPU_STAT(irq_window_exits) },
 189         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 190         { "halt_exits", VCPU_STAT(halt_exits) },
 191         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 192         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 193         { "halt_poll_invalid", VCPU_STAT(halt_poll_invalid) },
 194         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 195         { "hypercalls", VCPU_STAT(hypercalls) },
 196         { "request_irq", VCPU_STAT(request_irq_exits) },
 197         { "irq_exits", VCPU_STAT(irq_exits) },
 198         { "host_state_reload", VCPU_STAT(host_state_reload) },
 199         { "fpu_reload", VCPU_STAT(fpu_reload) },
 200         { "insn_emulation", VCPU_STAT(insn_emulation) },
 201         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 202         { "irq_injections", VCPU_STAT(irq_injections) },
 203         { "nmi_injections", VCPU_STAT(nmi_injections) },
 204         { "req_event", VCPU_STAT(req_event) },
 205         { "l1d_flush", VCPU_STAT(l1d_flush) },
 206         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 207         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 208         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 209         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 210         { "mmu_flooded", VM_STAT(mmu_flooded) },
 211         { "mmu_recycled", VM_STAT(mmu_recycled) },
 212         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 213         { "mmu_unsync", VM_STAT(mmu_unsync) },
 214         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 215         { "largepages", VM_STAT(lpages, .mode = 0444) },
 216         { "nx_largepages_splitted", VM_STAT(nx_lpage_splits, .mode = 0444) },
 217         { "max_mmu_page_hash_collisions",
 218                 VM_STAT(max_mmu_page_hash_collisions) },
 219         { NULL }
 220 };
 221
 222 u64 __read_mostly host_xcr0;
 223
 224 struct kmem_cache *x86_fpu_cache;
 225 EXPORT_SYMBOL_GPL(x86_fpu_cache);
 226
 227 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 228
 229 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 230 {
 231         int i;
 232         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 233                 vcpu->arch.apf.gfns[i] = ~0;
 234 }
 235
 236 static void kvm_on_user_return(struct user_return_notifier *urn)
 237 {
 238         unsigned slot;
 239         struct kvm_shared_msrs *locals
 240                 = container_of(urn, struct kvm_shared_msrs, urn);
 241         struct kvm_shared_msr_values *values;
 242         unsigned long flags;
 243
 244         /*
 245          * Disabling irqs at this point since the following code could be
 246          * interrupted and executed through kvm_arch_hardware_disable()
 247          */
 248         local_irq_save(flags);
 249         if (locals->registered) {
 250                 locals->registered = false;
 251                 user_return_notifier_unregister(urn);
 252         }
 253         local_irq_restore(flags);
 254         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 255                 values = &locals->values[slot];
 256                 if (values->host != values->curr) {
 257                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 258                         values->curr = values->host;
 259                 }
 260         }
 261 }
 262
 263 static void shared_msr_update(unsigned slot, u32 msr)
 264 {
 265         u64 value;
 266         unsigned int cpu = smp_processor_id();
 267         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 268
 269         /* only read, and nobody should modify it at this time,
 270          * so don't need lock */
 271         if (slot >= shared_msrs_global.nr) {
 272                 printk(KERN_ERR "kvm: invalid MSR slot!");
 273                 return;
 274         }
 275         rdmsrl_safe(msr, &value);
 276         smsr->values[slot].host = value;
 277         smsr->values[slot].curr = value;
 278 }
 279
 280 void kvm_define_shared_msr(unsigned slot, u32 msr)
 281 {
 282         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 283         shared_msrs_global.msrs[slot] = msr;
 284         if (slot >= shared_msrs_global.nr)
 285                 shared_msrs_global.nr = slot + 1;
 286 }
 287 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 288
 289 static void kvm_shared_msr_cpu_online(void)
 290 {
 291         unsigned i;
 292
 293         for (i = 0; i < shared_msrs_global.nr; ++i)
 294                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 295 }
 296
 297 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 298 {
 299         unsigned int cpu = smp_processor_id();
 300         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 301         int err;
 302
 303         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 304                 return 0;
 305         smsr->values[slot].curr = value;
 306         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 307         if (err)
 308                 return 1;
 309
 310         if (!smsr->registered) {
 311                 smsr->urn.on_user_return = kvm_on_user_return;
 312                 user_return_notifier_register(&smsr->urn);
 313                 smsr->registered = true;
 314         }
 315         return 0;
 316 }
 317 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 318
 319 static void drop_user_return_notifiers(void)
 320 {
 321         unsigned int cpu = smp_processor_id();
 322         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 323
 324         if (smsr->registered)
 325                 kvm_on_user_return(&smsr->urn);
 326 }
 327
 328 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 329 {
 330         return vcpu->arch.apic_base;
 331 }
 332 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 333
 334 enum lapic_mode kvm_get_apic_mode(struct kvm_vcpu *vcpu)
 335 {
 336         return kvm_apic_mode(kvm_get_apic_base(vcpu));
 337 }
 338 EXPORT_SYMBOL_GPL(kvm_get_apic_mode);
 339
 340 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 341 {
 342         enum lapic_mode old_mode = kvm_get_apic_mode(vcpu);
 343         enum lapic_mode new_mode = kvm_apic_mode(msr_info->data);
 344         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) | 0x2ff |
 345                 (guest_cpuid_has(vcpu, X86_FEATURE_X2APIC) ? 0 : X2APIC_ENABLE);
 346
 347         if ((msr_info->data & reserved_bits) != 0 || new_mode == LAPIC_MODE_INVALID)
 348                 return 1;
 349         if (!msr_info->host_initiated) {
 350                 if (old_mode == LAPIC_MODE_X2APIC && new_mode == LAPIC_MODE_XAPIC)
 351                         return 1;
 352                 if (old_mode == LAPIC_MODE_DISABLED && new_mode == LAPIC_MODE_X2APIC)
 353                         return 1;
 354         }
 355
 356         kvm_lapic_set_base(vcpu, msr_info->data);
 357         return 0;
 358 }
 359 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 360
 361 asmlinkage __visible void kvm_spurious_fault(void)
 362 {
 363         /* Fault while not rebooting.  We want the trace. */
 364         BUG_ON(!kvm_rebooting);
 365 }
 366 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 367
 368 #define EXCPT_BENIGN            0
 369 #define EXCPT_CONTRIBUTORY      1
 370 #define EXCPT_PF                2
 371
 372 static int exception_class(int vector)
 373 {
 374         switch (vector) {
 375         case PF_VECTOR:
 376                 return EXCPT_PF;
 377         case DE_VECTOR:
 378         case TS_VECTOR:
 379         case NP_VECTOR:
 380         case SS_VECTOR:
 381         case GP_VECTOR:
 382                 return EXCPT_CONTRIBUTORY;
 383         default:
 384                 break;
 385         }
 386         return EXCPT_BENIGN;
 387 }
 388
 389 #define EXCPT_FAULT             0
 390 #define EXCPT_TRAP              1
 391 #define EXCPT_ABORT             2
 392 #define EXCPT_INTERRUPT         3
 393
 394 static int exception_type(int vector)
 395 {
 396         unsigned int mask;
 397
 398         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 399                 return EXCPT_INTERRUPT;
 400
 401         mask = 1 << vector;
 402
 403         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 404         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 405                 return EXCPT_TRAP;
 406
 407         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 408                 return EXCPT_ABORT;
 409
 410         /* Reserved exceptions will result in fault */
 411         return EXCPT_FAULT;
 412 }
 413
 414 void kvm_deliver_exception_payload(struct kvm_vcpu *vcpu)
 415 {
 416         unsigned nr = vcpu->arch.exception.nr;
 417         bool has_payload = vcpu->arch.exception.has_payload;
 418         unsigned long payload = vcpu->arch.exception.payload;
 419
 420         if (!has_payload)
 421                 return;
 422
 423         switch (nr) {
 424         case DB_VECTOR:
 425                 /*
 426                  * "Certain debug exceptions may clear bit 0-3.  The
 427                  * remaining contents of the DR6 register are never
 428                  * cleared by the processor".
 429                  */
 430                 vcpu->arch.dr6 &= ~DR_TRAP_BITS;
 431                 /*
 432                  * DR6.RTM is set by all #DB exceptions that don't clear it.
 433                  */
 434                 vcpu->arch.dr6 |= DR6_RTM;
 435                 vcpu->arch.dr6 |= payload;
 436                 /*
 437                  * Bit 16 should be set in the payload whenever the #DB
 438                  * exception should clear DR6.RTM. This makes the payload
 439                  * compatible with the pending debug exceptions under VMX.
 440                  * Though not currently documented in the SDM, this also
 441                  * makes the payload compatible with the exit qualification
 442                  * for #DB exceptions under VMX.
 443                  */
 444                 vcpu->arch.dr6 ^= payload & DR6_RTM;
 445                 break;
 446         case PF_VECTOR:
 447                 vcpu->arch.cr2 = payload;
 448                 break;
 449         }
 450
 451         vcpu->arch.exception.has_payload = false;
 452         vcpu->arch.exception.payload = 0;
 453 }
 454 EXPORT_SYMBOL_GPL(kvm_deliver_exception_payload);
 455
 456 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 457                 unsigned nr, bool has_error, u32 error_code,
 458                 bool has_payload, unsigned long payload, bool reinject)
 459 {
 460         u32 prev_nr;
 461         int class1, class2;
 462
 463         kvm_make_request(KVM_REQ_EVENT, vcpu);
 464
 465         if (!vcpu->arch.exception.pending && !vcpu->arch.exception.injected) {
 466         queue:
 467                 if (has_error && !is_protmode(vcpu))
 468                         has_error = false;
 469                 if (reinject) {
 470                         /*
 471                          * On vmentry, vcpu->arch.exception.pending is only
 472                          * true if an event injection was blocked by
 473                          * nested_run_pending.  In that case, however,
 474                          * vcpu_enter_guest requests an immediate exit,
 475                          * and the guest shouldn't proceed far enough to
 476                          * need reinjection.
 477                          */
 478                         WARN_ON_ONCE(vcpu->arch.exception.pending);
 479                         vcpu->arch.exception.injected = true;
 480                         if (WARN_ON_ONCE(has_payload)) {
 481                                 /*
 482                                  * A reinjected event has already
 483                                  * delivered its payload.
 484                                  */
 485                                 has_payload = false;
 486                                 payload = 0;
 487                         }
 488                 } else {
 489                         vcpu->arch.exception.pending = true;
 490                         vcpu->arch.exception.injected = false;
 491                 }
 492                 vcpu->arch.exception.has_error_code = has_error;
 493                 vcpu->arch.exception.nr = nr;
 494                 vcpu->arch.exception.error_code = error_code;
 495                 vcpu->arch.exception.has_payload = has_payload;
 496                 vcpu->arch.exception.payload = payload;
 497                 /*
 498                  * In guest mode, payload delivery should be deferred,
 499                  * so that the L1 hypervisor can intercept #PF before
 500                  * CR2 is modified (or intercept #DB before DR6 is
 501                  * modified under nVMX).  However, for ABI
 502                  * compatibility with KVM_GET_VCPU_EVENTS and
 503                  * KVM_SET_VCPU_EVENTS, we can't delay payload
 504                  * delivery unless userspace has enabled this
 505                  * functionality via the per-VM capability,
 506                  * KVM_CAP_EXCEPTION_PAYLOAD.
 507                  */
 508                 if (!vcpu->kvm->arch.exception_payload_enabled ||
 509                     !is_guest_mode(vcpu))
 510                         kvm_deliver_exception_payload(vcpu);
 511                 return;
 512         }
 513
 514         /* to check exception */
 515         prev_nr = vcpu->arch.exception.nr;
 516         if (prev_nr == DF_VECTOR) {
 517                 /* triple fault -> shutdown */
 518                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 519                 return;
 520         }
 521         class1 = exception_class(prev_nr);
 522         class2 = exception_class(nr);
 523         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 524                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 525                 /*
 526                  * Generate double fault per SDM Table 5-5.  Set
 527                  * exception.pending = true so that the double fault
 528                  * can trigger a nested vmexit.
 529                  */
 530                 vcpu->arch.exception.pending = true;
 531                 vcpu->arch.exception.injected = false;
 532                 vcpu->arch.exception.has_error_code = true;
 533                 vcpu->arch.exception.nr = DF_VECTOR;
 534                 vcpu->arch.exception.error_code = 0;
 535                 vcpu->arch.exception.has_payload = false;
 536                 vcpu->arch.exception.payload = 0;
 537         } else
 538                 /* replace previous exception with a new one in a hope
 539                    that instruction re-execution will regenerate lost
 540                    exception */
 541                 goto queue;
 542 }
 543
 544 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 545 {
 546         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, false);
 547 }
 548 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 549
 550 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 551 {
 552         kvm_multiple_exception(vcpu, nr, false, 0, false, 0, true);
 553 }
 554 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 555
 556 static void kvm_queue_exception_p(struct kvm_vcpu *vcpu, unsigned nr,
 557                                   unsigned long payload)
 558 {
 559         kvm_multiple_exception(vcpu, nr, false, 0, true, payload, false);
 560 }
 561
 562 static void kvm_queue_exception_e_p(struct kvm_vcpu *vcpu, unsigned nr,
 563                                     u32 error_code, unsigned long payload)
 564 {
 565         kvm_multiple_exception(vcpu, nr, true, error_code,
 566                                true, payload, false);
 567 }
 568
 569 int kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 570 {
 571         if (err)
 572                 kvm_inject_gp(vcpu, 0);
 573         else
 574                 return kvm_skip_emulated_instruction(vcpu);
 575
 576         return 1;
 577 }
 578 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 579
 580 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 581 {
 582         ++vcpu->stat.pf_guest;
 583         vcpu->arch.exception.nested_apf =
 584                 is_guest_mode(vcpu) && fault->async_page_fault;
 585         if (vcpu->arch.exception.nested_apf) {
 586                 vcpu->arch.apf.nested_apf_token = fault->address;
 587                 kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 588         } else {
 589                 kvm_queue_exception_e_p(vcpu, PF_VECTOR, fault->error_code,
 590                                         fault->address);
 591         }
 592 }
 593 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 594
 595 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 596 {
 597         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 598                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 599         else
 600                 vcpu->arch.mmu->inject_page_fault(vcpu, fault);
 601
 602         return fault->nested_page_fault;
 603 }
 604
 605 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 606 {
 607         atomic_inc(&vcpu->arch.nmi_queued);
 608         kvm_make_request(KVM_REQ_NMI, vcpu);
 609 }
 610 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 611
 612 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 613 {
 614         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, false);
 615 }
 616 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 617
 618 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 619 {
 620         kvm_multiple_exception(vcpu, nr, true, error_code, false, 0, true);
 621 }
 622 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 623
 624 /*
 625  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 626  * a #GP and return false.
 627  */
 628 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 629 {
 630         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 631                 return true;
 632         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 633         return false;
 634 }
 635 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 636
 637 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 638 {
 639         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 640                 return true;
 641
 642         kvm_queue_exception(vcpu, UD_VECTOR);
 643         return false;
 644 }
 645 EXPORT_SYMBOL_GPL(kvm_require_dr);
 646
 647 /*
 648  * This function will be used to read from the physical memory of the currently
 649  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 650  * can read from guest physical or from the guest's guest physical memory.
 651  */
 652 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 653                             gfn_t ngfn, void *data, int offset, int len,
 654                             u32 access)
 655 {
 656         struct x86_exception exception;
 657         gfn_t real_gfn;
 658         gpa_t ngpa;
 659
 660         ngpa     = gfn_to_gpa(ngfn);
 661         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 662         if (real_gfn == UNMAPPED_GVA)
 663                 return -EFAULT;
 664
 665         real_gfn = gpa_to_gfn(real_gfn);
 666
 667         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 668 }
 669 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 670
 671 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 672                                void *data, int offset, int len, u32 access)
 673 {
 674         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 675                                        data, offset, len, access);
 676 }
 677
 678 static inline u64 pdptr_rsvd_bits(struct kvm_vcpu *vcpu)
 679 {
 680         return rsvd_bits(cpuid_maxphyaddr(vcpu), 63) | rsvd_bits(5, 8) |
 681                rsvd_bits(1, 2);
 682 }
 683
 684 /*
 685  * Load the pae pdptrs.  Return 1 if they are all valid, 0 otherwise.
 686  */
 687 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 688 {
 689         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 690         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 691         int i;
 692         int ret;
 693         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 694
 695         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 696                                       offset * sizeof(u64), sizeof(pdpte),
 697                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 698         if (ret < 0) {
 699                 ret = 0;
 700                 goto out;
 701         }
 702         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 703                 if ((pdpte[i] & PT_PRESENT_MASK) &&
 704                     (pdpte[i] & pdptr_rsvd_bits(vcpu))) {
 705                         ret = 0;
 706                         goto out;
 707                 }
 708         }
 709         ret = 1;
 710
 711         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 712         __set_bit(VCPU_EXREG_PDPTR,
 713                   (unsigned long *)&vcpu->arch.regs_avail);
 714         __set_bit(VCPU_EXREG_PDPTR,
 715                   (unsigned long *)&vcpu->arch.regs_dirty);
 716 out:
 717
 718         return ret;
 719 }
 720 EXPORT_SYMBOL_GPL(load_pdptrs);
 721
 722 bool pdptrs_changed(struct kvm_vcpu *vcpu)
 723 {
 724         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 725         bool changed = true;
 726         int offset;
 727         gfn_t gfn;
 728         int r;
 729
 730         if (!is_pae_paging(vcpu))
 731                 return false;
 732
 733         if (!test_bit(VCPU_EXREG_PDPTR,
 734                       (unsigned long *)&vcpu->arch.regs_avail))
 735                 return true;
 736
 737         gfn = (kvm_read_cr3(vcpu) & 0xffffffe0ul) >> PAGE_SHIFT;
 738         offset = (kvm_read_cr3(vcpu) & 0xffffffe0ul) & (PAGE_SIZE - 1);
 739         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 740                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 741         if (r < 0)
 742                 goto out;
 743         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 744 out:
 745
 746         return changed;
 747 }
 748 EXPORT_SYMBOL_GPL(pdptrs_changed);
 749
 750 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 751 {
 752         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 753         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 754
 755         cr0 |= X86_CR0_ET;
 756
 757 #ifdef CONFIG_X86_64
 758         if (cr0 & 0xffffffff00000000UL)
 759                 return 1;
 760 #endif
 761
 762         cr0 &= ~CR0_RESERVED_BITS;
 763
 764         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 765                 return 1;
 766
 767         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 768                 return 1;
 769
 770         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 771 #ifdef CONFIG_X86_64
 772                 if ((vcpu->arch.efer & EFER_LME)) {
 773                         int cs_db, cs_l;
 774
 775                         if (!is_pae(vcpu))
 776                                 return 1;
 777                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 778                         if (cs_l)
 779                                 return 1;
 780                 } else
 781 #endif
 782                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 783                                                  kvm_read_cr3(vcpu)))
 784                         return 1;
 785         }
 786
 787         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 788                 return 1;
 789
 790         kvm_x86_ops->set_cr0(vcpu, cr0);
 791
 792         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 793                 kvm_clear_async_pf_completion_queue(vcpu);
 794                 kvm_async_pf_hash_reset(vcpu);
 795         }
 796
 797         if ((cr0 ^ old_cr0) & update_bits)
 798                 kvm_mmu_reset_context(vcpu);
 799
 800         if (((cr0 ^ old_cr0) & X86_CR0_CD) &&
 801             kvm_arch_has_noncoherent_dma(vcpu->kvm) &&
 802             !kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_CD_NW_CLEARED))
 803                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 804
 805         return 0;
 806 }
 807 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 808
 809 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 810 {
 811         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 812 }
 813 EXPORT_SYMBOL_GPL(kvm_lmsw);
 814
 815 void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 816 {
 817         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 818                         !vcpu->guest_xcr0_loaded) {
 819                 /* kvm_set_xcr() also depends on this */
 820                 if (vcpu->arch.xcr0 != host_xcr0)
 821                         xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 822                 vcpu->guest_xcr0_loaded = 1;
 823         }
 824 }
 825 EXPORT_SYMBOL_GPL(kvm_load_guest_xcr0);
 826
 827 void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 828 {
 829         if (vcpu->guest_xcr0_loaded) {
 830                 if (vcpu->arch.xcr0 != host_xcr0)
 831                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 832                 vcpu->guest_xcr0_loaded = 0;
 833         }
 834 }
 835 EXPORT_SYMBOL_GPL(kvm_put_guest_xcr0);
 836
 837 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 838 {
 839         u64 xcr0 = xcr;
 840         u64 old_xcr0 = vcpu->arch.xcr0;
 841         u64 valid_bits;
 842
 843         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 844         if (index != XCR_XFEATURE_ENABLED_MASK)
 845                 return 1;
 846         if (!(xcr0 & XFEATURE_MASK_FP))
 847                 return 1;
 848         if ((xcr0 & XFEATURE_MASK_YMM) && !(xcr0 & XFEATURE_MASK_SSE))
 849                 return 1;
 850
 851         /*
 852          * Do not allow the guest to set bits that we do not support
 853          * saving.  However, xcr0 bit 0 is always set, even if the
 854          * emulated CPU does not support XSAVE (see fx_init).
 855          */
 856         valid_bits = vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FP;
 857         if (xcr0 & ~valid_bits)
 858                 return 1;
 859
 860         if ((!(xcr0 & XFEATURE_MASK_BNDREGS)) !=
 861             (!(xcr0 & XFEATURE_MASK_BNDCSR)))
 862                 return 1;
 863
 864         if (xcr0 & XFEATURE_MASK_AVX512) {
 865                 if (!(xcr0 & XFEATURE_MASK_YMM))
 866                         return 1;
 867                 if ((xcr0 & XFEATURE_MASK_AVX512) != XFEATURE_MASK_AVX512)
 868                         return 1;
 869         }
 870         vcpu->arch.xcr0 = xcr0;
 871
 872         if ((xcr0 ^ old_xcr0) & XFEATURE_MASK_EXTEND)
 873                 kvm_update_cpuid(vcpu);
 874         return 0;
 875 }
 876
 877 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 878 {
 879         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 880             __kvm_set_xcr(vcpu, index, xcr)) {
 881                 kvm_inject_gp(vcpu, 0);
 882                 return 1;
 883         }
 884         return 0;
 885 }
 886 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 887
 888 static int kvm_valid_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 889 {
 890         if (cr4 & CR4_RESERVED_BITS)
 891                 return -EINVAL;
 892
 893         if (!guest_cpuid_has(vcpu, X86_FEATURE_XSAVE) && (cr4 & X86_CR4_OSXSAVE))
 894                 return -EINVAL;
 895
 896         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMEP) && (cr4 & X86_CR4_SMEP))
 897                 return -EINVAL;
 898
 899         if (!guest_cpuid_has(vcpu, X86_FEATURE_SMAP) && (cr4 & X86_CR4_SMAP))
 900                 return -EINVAL;
 901
 902         if (!guest_cpuid_has(vcpu, X86_FEATURE_FSGSBASE) && (cr4 & X86_CR4_FSGSBASE))
 903                 return -EINVAL;
 904
 905         if (!guest_cpuid_has(vcpu, X86_FEATURE_PKU) && (cr4 & X86_CR4_PKE))
 906                 return -EINVAL;
 907
 908         if (!guest_cpuid_has(vcpu, X86_FEATURE_LA57) && (cr4 & X86_CR4_LA57))
 909                 return -EINVAL;
 910
 911         if (!guest_cpuid_has(vcpu, X86_FEATURE_UMIP) && (cr4 & X86_CR4_UMIP))
 912                 return -EINVAL;
 913
 914         return 0;
 915 }
 916
 917 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 918 {
 919         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 920         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 921                                    X86_CR4_SMEP | X86_CR4_SMAP | X86_CR4_PKE;
 922
 923         if (kvm_valid_cr4(vcpu, cr4))
 924                 return 1;
 925
 926         if (is_long_mode(vcpu)) {
 927                 if (!(cr4 & X86_CR4_PAE))
 928                         return 1;
 929         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 930                    && ((cr4 ^ old_cr4) & pdptr_bits)
 931                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 932                                    kvm_read_cr3(vcpu)))
 933                 return 1;
 934
 935         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 936                 if (!guest_cpuid_has(vcpu, X86_FEATURE_PCID))
 937                         return 1;
 938
 939                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 940                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 941                         return 1;
 942         }
 943
 944         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 945                 return 1;
 946
 947         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 948             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 949                 kvm_mmu_reset_context(vcpu);
 950
 951         if ((cr4 ^ old_cr4) & (X86_CR4_OSXSAVE | X86_CR4_PKE))
 952                 kvm_update_cpuid(vcpu);
 953
 954         return 0;
 955 }
 956 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 957
 958 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 959 {
 960         bool skip_tlb_flush = false;
 961 #ifdef CONFIG_X86_64
 962         bool pcid_enabled = kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE);
 963
 964         if (pcid_enabled) {
 965                 skip_tlb_flush = cr3 & X86_CR3_PCID_NOFLUSH;
 966                 cr3 &= ~X86_CR3_PCID_NOFLUSH;
 967         }
 968 #endif
 969
 970         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 971                 if (!skip_tlb_flush) {
 972                         kvm_mmu_sync_roots(vcpu);
 973                         kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 974                 }
 975                 return 0;
 976         }
 977
 978         if (is_long_mode(vcpu) &&
 979             (cr3 & rsvd_bits(cpuid_maxphyaddr(vcpu), 63)))
 980                 return 1;
 981         else if (is_pae_paging(vcpu) &&
 982                  !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 983                 return 1;
 984
 985         kvm_mmu_new_cr3(vcpu, cr3, skip_tlb_flush);
 986         vcpu->arch.cr3 = cr3;
 987         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 988
 989         return 0;
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 992
 993 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 994 {
 995         if (cr8 & CR8_RESERVED_BITS)
 996                 return 1;
 997         if (lapic_in_kernel(vcpu))
 998                 kvm_lapic_set_tpr(vcpu, cr8);
 999         else
1000                 vcpu->arch.cr8 = cr8;
1001         return 0;
1002 }
1003 EXPORT_SYMBOL_GPL(kvm_set_cr8);
1004
1005 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
1006 {
1007         if (lapic_in_kernel(vcpu))
1008                 return kvm_lapic_get_cr8(vcpu);
1009         else
1010                 return vcpu->arch.cr8;
1011 }
1012 EXPORT_SYMBOL_GPL(kvm_get_cr8);
1013
1014 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
1015 {
1016         int i;
1017
1018         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
1019                 for (i = 0; i < KVM_NR_DB_REGS; i++)
1020                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
1021                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
1022         }
1023 }
1024
1025 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
1026 {
1027         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1028                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
1029 }
1030
1031 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
1032 {
1033         unsigned long dr7;
1034
1035         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1036                 dr7 = vcpu->arch.guest_debug_dr7;
1037         else
1038                 dr7 = vcpu->arch.dr7;
1039         kvm_x86_ops->set_dr7(vcpu, dr7);
1040         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
1041         if (dr7 & DR7_BP_EN_MASK)
1042                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
1043 }
1044
1045 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
1046 {
1047         u64 fixed = DR6_FIXED_1;
1048
1049         if (!guest_cpuid_has(vcpu, X86_FEATURE_RTM))
1050                 fixed |= DR6_RTM;
1051         return fixed;
1052 }
1053
1054 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1055 {
1056         switch (dr) {
1057         case 0 ... 3:
1058                 vcpu->arch.db[dr] = val;
1059                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
1060                         vcpu->arch.eff_db[dr] = val;
1061                 break;
1062         case 4:
1063                 /* fall through */
1064         case 6:
1065                 if (val & 0xffffffff00000000ULL)
1066                         return -1; /* #GP */
1067                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
1068                 kvm_update_dr6(vcpu);
1069                 break;
1070         case 5:
1071                 /* fall through */
1072         default: /* 7 */
1073                 if (val & 0xffffffff00000000ULL)
1074                         return -1; /* #GP */
1075                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
1076                 kvm_update_dr7(vcpu);
1077                 break;
1078         }
1079
1080         return 0;
1081 }
1082
1083 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
1084 {
1085         if (__kvm_set_dr(vcpu, dr, val)) {
1086                 kvm_inject_gp(vcpu, 0);
1087                 return 1;
1088         }
1089         return 0;
1090 }
1091 EXPORT_SYMBOL_GPL(kvm_set_dr);
1092
1093 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
1094 {
1095         switch (dr) {
1096         case 0 ... 3:
1097                 *val = vcpu->arch.db[dr];
1098                 break;
1099         case 4:
1100                 /* fall through */
1101         case 6:
1102                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
1103                         *val = vcpu->arch.dr6;
1104                 else
1105                         *val = kvm_x86_ops->get_dr6(vcpu);
1106                 break;
1107         case 5:
1108                 /* fall through */
1109         default: /* 7 */
1110                 *val = vcpu->arch.dr7;
1111                 break;
1112         }
1113         return 0;
1114 }
1115 EXPORT_SYMBOL_GPL(kvm_get_dr);
1116
1117 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
1118 {
1119         u32 ecx = kvm_rcx_read(vcpu);
1120         u64 data;
1121         int err;
1122
1123         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
1124         if (err)
1125                 return err;
1126         kvm_rax_write(vcpu, (u32)data);
1127         kvm_rdx_write(vcpu, data >> 32);
1128         return err;
1129 }
1130 EXPORT_SYMBOL_GPL(kvm_rdpmc);
1131
1132 /*
1133  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
1134  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
1135  *
1136  * This list is modified at module load time to reflect the
1137  * capabilities of the host cpu. This capabilities test skips MSRs that are
1138  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
1139  * may depend on host virtualization features rather than host cpu features.
1140  */
1141
1142 static u32 msrs_to_save[] = {
1143         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
1144         MSR_STAR,
1145 #ifdef CONFIG_X86_64
1146         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
1147 #endif
1148         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
1149         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS, MSR_TSC_AUX,
1150         MSR_IA32_SPEC_CTRL,
1151         MSR_IA32_RTIT_CTL, MSR_IA32_RTIT_STATUS, MSR_IA32_RTIT_CR3_MATCH,
1152         MSR_IA32_RTIT_OUTPUT_BASE, MSR_IA32_RTIT_OUTPUT_MASK,
1153         MSR_IA32_RTIT_ADDR0_A, MSR_IA32_RTIT_ADDR0_B,
1154         MSR_IA32_RTIT_ADDR1_A, MSR_IA32_RTIT_ADDR1_B,
1155         MSR_IA32_RTIT_ADDR2_A, MSR_IA32_RTIT_ADDR2_B,
1156         MSR_IA32_RTIT_ADDR3_A, MSR_IA32_RTIT_ADDR3_B,
1157         MSR_IA32_UMWAIT_CONTROL,
1158
1159         MSR_ARCH_PERFMON_FIXED_CTR0, MSR_ARCH_PERFMON_FIXED_CTR1,
1160         MSR_ARCH_PERFMON_FIXED_CTR0 + 2, MSR_ARCH_PERFMON_FIXED_CTR0 + 3,
1161         MSR_CORE_PERF_FIXED_CTR_CTRL, MSR_CORE_PERF_GLOBAL_STATUS,
1162         MSR_CORE_PERF_GLOBAL_CTRL, MSR_CORE_PERF_GLOBAL_OVF_CTRL,
1163         MSR_ARCH_PERFMON_PERFCTR0, MSR_ARCH_PERFMON_PERFCTR1,
1164         MSR_ARCH_PERFMON_PERFCTR0 + 2, MSR_ARCH_PERFMON_PERFCTR0 + 3,
1165         MSR_ARCH_PERFMON_PERFCTR0 + 4, MSR_ARCH_PERFMON_PERFCTR0 + 5,
1166         MSR_ARCH_PERFMON_PERFCTR0 + 6, MSR_ARCH_PERFMON_PERFCTR0 + 7,
1167         MSR_ARCH_PERFMON_PERFCTR0 + 8, MSR_ARCH_PERFMON_PERFCTR0 + 9,
1168         MSR_ARCH_PERFMON_PERFCTR0 + 10, MSR_ARCH_PERFMON_PERFCTR0 + 11,
1169         MSR_ARCH_PERFMON_PERFCTR0 + 12, MSR_ARCH_PERFMON_PERFCTR0 + 13,
1170         MSR_ARCH_PERFMON_PERFCTR0 + 14, MSR_ARCH_PERFMON_PERFCTR0 + 15,
1171         MSR_ARCH_PERFMON_PERFCTR0 + 16, MSR_ARCH_PERFMON_PERFCTR0 + 17,
1172         MSR_ARCH_PERFMON_EVENTSEL0, MSR_ARCH_PERFMON_EVENTSEL1,
1173         MSR_ARCH_PERFMON_EVENTSEL0 + 2, MSR_ARCH_PERFMON_EVENTSEL0 + 3,
1174         MSR_ARCH_PERFMON_EVENTSEL0 + 4, MSR_ARCH_PERFMON_EVENTSEL0 + 5,
1175         MSR_ARCH_PERFMON_EVENTSEL0 + 6, MSR_ARCH_PERFMON_EVENTSEL0 + 7,
1176         MSR_ARCH_PERFMON_EVENTSEL0 + 8, MSR_ARCH_PERFMON_EVENTSEL0 + 9,
1177         MSR_ARCH_PERFMON_EVENTSEL0 + 10, MSR_ARCH_PERFMON_EVENTSEL0 + 11,
1178         MSR_ARCH_PERFMON_EVENTSEL0 + 12, MSR_ARCH_PERFMON_EVENTSEL0 + 13,
1179         MSR_ARCH_PERFMON_EVENTSEL0 + 14, MSR_ARCH_PERFMON_EVENTSEL0 + 15,
1180         MSR_ARCH_PERFMON_EVENTSEL0 + 16, MSR_ARCH_PERFMON_EVENTSEL0 + 17,
1181 };
1182
1183 static unsigned num_msrs_to_save;
1184
1185 static u32 emulated_msrs[] = {
1186         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
1187         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
1188         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
1189         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
1190         HV_X64_MSR_TSC_FREQUENCY, HV_X64_MSR_APIC_FREQUENCY,
1191         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
1192         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
1193         HV_X64_MSR_RESET,
1194         HV_X64_MSR_VP_INDEX,
1195         HV_X64_MSR_VP_RUNTIME,
1196         HV_X64_MSR_SCONTROL,
1197         HV_X64_MSR_STIMER0_CONFIG,
1198         HV_X64_MSR_VP_ASSIST_PAGE,
1199         HV_X64_MSR_REENLIGHTENMENT_CONTROL, HV_X64_MSR_TSC_EMULATION_CONTROL,
1200         HV_X64_MSR_TSC_EMULATION_STATUS,
1201
1202         MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
1203         MSR_KVM_PV_EOI_EN,
1204
1205         MSR_IA32_TSC_ADJUST,
1206         MSR_IA32_TSCDEADLINE,
1207         MSR_IA32_ARCH_CAPABILITIES,
1208         MSR_IA32_MISC_ENABLE,
1209         MSR_IA32_MCG_STATUS,
1210         MSR_IA32_MCG_CTL,
1211         MSR_IA32_MCG_EXT_CTL,
1212         MSR_IA32_SMBASE,
1213         MSR_SMI_COUNT,
1214         MSR_PLATFORM_INFO,
1215         MSR_MISC_FEATURES_ENABLES,
1216         MSR_AMD64_VIRT_SPEC_CTRL,
1217         MSR_IA32_POWER_CTL,
1218
1219         /*
1220          * The following list leaves out MSRs whose values are determined
1221          * by arch/x86/kvm/vmx/nested.c based on CPUID or other MSRs.
1222          * We always support the "true" VMX control MSRs, even if the host
1223          * processor does not, so I am putting these registers here rather
1224          * than in msrs_to_save.
1225          */
1226         MSR_IA32_VMX_BASIC,
1227         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1228         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1229         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1230         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1231         MSR_IA32_VMX_MISC,
1232         MSR_IA32_VMX_CR0_FIXED0,
1233         MSR_IA32_VMX_CR4_FIXED0,
1234         MSR_IA32_VMX_VMCS_ENUM,
1235         MSR_IA32_VMX_PROCBASED_CTLS2,
1236         MSR_IA32_VMX_EPT_VPID_CAP,
1237         MSR_IA32_VMX_VMFUNC,
1238
1239         MSR_K7_HWCR,
1240         MSR_KVM_POLL_CONTROL,
1241 };
1242
1243 static unsigned num_emulated_msrs;
1244
1245 /*
1246  * List of msr numbers which are used to expose MSR-based features that
1247  * can be used by a hypervisor to validate requested CPU features.
1248  */
1249 static u32 msr_based_features[] = {
1250         MSR_IA32_VMX_BASIC,
1251         MSR_IA32_VMX_TRUE_PINBASED_CTLS,
1252         MSR_IA32_VMX_PINBASED_CTLS,
1253         MSR_IA32_VMX_TRUE_PROCBASED_CTLS,
1254         MSR_IA32_VMX_PROCBASED_CTLS,
1255         MSR_IA32_VMX_TRUE_EXIT_CTLS,
1256         MSR_IA32_VMX_EXIT_CTLS,
1257         MSR_IA32_VMX_TRUE_ENTRY_CTLS,
1258         MSR_IA32_VMX_ENTRY_CTLS,
1259         MSR_IA32_VMX_MISC,
1260         MSR_IA32_VMX_CR0_FIXED0,
1261         MSR_IA32_VMX_CR0_FIXED1,
1262         MSR_IA32_VMX_CR4_FIXED0,
1263         MSR_IA32_VMX_CR4_FIXED1,
1264         MSR_IA32_VMX_VMCS_ENUM,
1265         MSR_IA32_VMX_PROCBASED_CTLS2,
1266         MSR_IA32_VMX_EPT_VPID_CAP,
1267         MSR_IA32_VMX_VMFUNC,
1268
1269         MSR_F10H_DECFG,
1270         MSR_IA32_UCODE_REV,
1271         MSR_IA32_ARCH_CAPABILITIES,
1272 };
1273
1274 static unsigned int num_msr_based_features;
1275
1276 static u64 kvm_get_arch_capabilities(void)
1277 {
1278         u64 data = 0;
1279
1280         if (boot_cpu_has(X86_FEATURE_ARCH_CAPABILITIES))
1281                 rdmsrl(MSR_IA32_ARCH_CAPABILITIES, data);
1282
1283         /*
1284          * If nx_huge_pages is enabled, KVM's shadow paging will ensure that
1285          * the nested hypervisor runs with NX huge pages.  If it is not,
1286          * L1 is anyway vulnerable to ITLB_MULTIHIT explots from other
1287          * L1 guests, so it need not worry about its own (L2) guests.
1288          */
1289         data |= ARCH_CAP_PSCHANGE_MC_NO;
1290
1291         /*
1292          * If we're doing cache flushes (either "always" or "cond")
1293          * we will do one whenever the guest does a vmlaunch/vmresume.
1294          * If an outer hypervisor is doing the cache flush for us
1295          * (VMENTER_L1D_FLUSH_NESTED_VM), we can safely pass that
1296          * capability to the guest too, and if EPT is disabled we're not
1297          * vulnerable.  Overall, only VMENTER_L1D_FLUSH_NEVER will
1298          * require a nested hypervisor to do a flush of its own.
1299          */
1300         if (l1tf_vmx_mitigation != VMENTER_L1D_FLUSH_NEVER)
1301                 data |= ARCH_CAP_SKIP_VMENTRY_L1DFLUSH;
1302
1303         if (!boot_cpu_has_bug(X86_BUG_CPU_MELTDOWN))
1304                 data |= ARCH_CAP_RDCL_NO;
1305         if (!boot_cpu_has_bug(X86_BUG_SPEC_STORE_BYPASS))
1306                 data |= ARCH_CAP_SSB_NO;
1307         if (!boot_cpu_has_bug(X86_BUG_MDS))
1308                 data |= ARCH_CAP_MDS_NO;
1309
1310         /*
1311          * On TAA affected systems, export MDS_NO=0 when:
1312          *      - TSX is enabled on the host, i.e. X86_FEATURE_RTM=1.
1313          *      - Updated microcode is present. This is detected by
1314          *        the presence of ARCH_CAP_TSX_CTRL_MSR and ensures
1315          *        that VERW clears CPU buffers.
1316          *
1317          * When MDS_NO=0 is exported, guests deploy clear CPU buffer
1318          * mitigation and don't complain:
1319          *
1320          *      "Vulnerable: Clear CPU buffers attempted, no microcode"
1321          *
1322          * If TSX is disabled on the system, guests are also mitigated against
1323          * TAA and clear CPU buffer mitigation is not required for guests.
1324          */
1325         if (boot_cpu_has_bug(X86_BUG_TAA) && boot_cpu_has(X86_FEATURE_RTM) &&
1326             (data & ARCH_CAP_TSX_CTRL_MSR))
1327                 data &= ~ARCH_CAP_MDS_NO;
1328
1329         return data;
1330 }
1331
1332 static int kvm_get_msr_feature(struct kvm_msr_entry *msr)
1333 {
1334         switch (msr->index) {
1335         case MSR_IA32_ARCH_CAPABILITIES:
1336                 msr->data = kvm_get_arch_capabilities();
1337                 break;
1338         case MSR_IA32_UCODE_REV:
1339                 rdmsrl_safe(msr->index, &msr->data);
1340                 break;
1341         default:
1342                 if (kvm_x86_ops->get_msr_feature(msr))
1343                         return 1;
1344         }
1345         return 0;
1346 }
1347
1348 static int do_get_msr_feature(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1349 {
1350         struct kvm_msr_entry msr;
1351         int r;
1352
1353         msr.index = index;
1354         r = kvm_get_msr_feature(&msr);
1355         if (r)
1356                 return r;
1357
1358         *data = msr.data;
1359
1360         return 0;
1361 }
1362
1363 static bool __kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1364 {
1365         if (efer & EFER_FFXSR && !guest_cpuid_has(vcpu, X86_FEATURE_FXSR_OPT))
1366                 return false;
1367
1368         if (efer & EFER_SVME && !guest_cpuid_has(vcpu, X86_FEATURE_SVM))
1369                 return false;
1370
1371         if (efer & (EFER_LME | EFER_LMA) &&
1372             !guest_cpuid_has(vcpu, X86_FEATURE_LM))
1373                 return false;
1374
1375         if (efer & EFER_NX && !guest_cpuid_has(vcpu, X86_FEATURE_NX))
1376                 return false;
1377
1378         return true;
1379
1380 }
1381 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
1382 {
1383         if (efer & efer_reserved_bits)
1384                 return false;
1385
1386         return __kvm_valid_efer(vcpu, efer);
1387 }
1388 EXPORT_SYMBOL_GPL(kvm_valid_efer);
1389
1390 static int set_efer(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1391 {
1392         u64 old_efer = vcpu->arch.efer;
1393         u64 efer = msr_info->data;
1394
1395         if (efer & efer_reserved_bits)
1396                 return 1;
1397
1398         if (!msr_info->host_initiated) {
1399                 if (!__kvm_valid_efer(vcpu, efer))
1400                         return 1;
1401
1402                 if (is_paging(vcpu) &&
1403                     (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1404                         return 1;
1405         }
1406
1407         efer &= ~EFER_LMA;
1408         efer |= vcpu->arch.efer & EFER_LMA;
1409
1410         kvm_x86_ops->set_efer(vcpu, efer);
1411
1412         /* Update reserved bits */
1413         if ((efer ^ old_efer) & EFER_NX)
1414                 kvm_mmu_reset_context(vcpu);
1415
1416         return 0;
1417 }
1418
1419 void kvm_enable_efer_bits(u64 mask)
1420 {
1421        efer_reserved_bits &= ~mask;
1422 }
1423 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1424
1425 /*
1426  * Write @data into the MSR specified by @index.  Select MSR specific fault
1427  * checks are bypassed if @host_initiated is %true.
1428  * Returns 0 on success, non-0 otherwise.
1429  * Assumes vcpu_load() was already called.
1430  */
1431 static int __kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data,
1432                          bool host_initiated)
1433 {
1434         struct msr_data msr;
1435
1436         switch (index) {
1437         case MSR_FS_BASE:
1438         case MSR_GS_BASE:
1439         case MSR_KERNEL_GS_BASE:
1440         case MSR_CSTAR:
1441         case MSR_LSTAR:
1442                 if (is_noncanonical_address(data, vcpu))
1443                         return 1;
1444                 break;
1445         case MSR_IA32_SYSENTER_EIP:
1446         case MSR_IA32_SYSENTER_ESP:
1447                 /*
1448                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1449                  * non-canonical address is written on Intel but not on
1450                  * AMD (which ignores the top 32-bits, because it does
1451                  * not implement 64-bit SYSENTER).
1452                  *
1453                  * 64-bit code should hence be able to write a non-canonical
1454                  * value on AMD.  Making the address canonical ensures that
1455                  * vmentry does not fail on Intel after writing a non-canonical
1456                  * value, and that something deterministic happens if the guest
1457                  * invokes 64-bit SYSENTER.
1458                  */
1459                 data = get_canonical(data, vcpu_virt_addr_bits(vcpu));
1460         }
1461
1462         msr.data = data;
1463         msr.index = index;
1464         msr.host_initiated = host_initiated;
1465
1466         return kvm_x86_ops->set_msr(vcpu, &msr);
1467 }
1468
1469 /*
1470  * Read the MSR specified by @index into @data.  Select MSR specific fault
1471  * checks are bypassed if @host_initiated is %true.
1472  * Returns 0 on success, non-0 otherwise.
1473  * Assumes vcpu_load() was already called.
1474  */
1475 static int __kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data,
1476                          bool host_initiated)
1477 {
1478         struct msr_data msr;
1479         int ret;
1480
1481         msr.index = index;
1482         msr.host_initiated = host_initiated;
1483
1484         ret = kvm_x86_ops->get_msr(vcpu, &msr);
1485         if (!ret)
1486                 *data = msr.data;
1487         return ret;
1488 }
1489
1490 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 index, u64 *data)
1491 {
1492         return __kvm_get_msr(vcpu, index, data, false);
1493 }
1494 EXPORT_SYMBOL_GPL(kvm_get_msr);
1495
1496 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 index, u64 data)
1497 {
1498         return __kvm_set_msr(vcpu, index, data, false);
1499 }
1500 EXPORT_SYMBOL_GPL(kvm_set_msr);
1501
1502 int kvm_emulate_rdmsr(struct kvm_vcpu *vcpu)
1503 {
1504         u32 ecx = kvm_rcx_read(vcpu);
1505         u64 data;
1506
1507         if (kvm_get_msr(vcpu, ecx, &data)) {
1508                 trace_kvm_msr_read_ex(ecx);
1509                 kvm_inject_gp(vcpu, 0);
1510                 return 1;
1511         }
1512
1513         trace_kvm_msr_read(ecx, data);
1514
1515         kvm_rax_write(vcpu, data & -1u);
1516         kvm_rdx_write(vcpu, (data >> 32) & -1u);
1517         return kvm_skip_emulated_instruction(vcpu);
1518 }
1519 EXPORT_SYMBOL_GPL(kvm_emulate_rdmsr);
1520
1521 int kvm_emulate_wrmsr(struct kvm_vcpu *vcpu)
1522 {
1523         u32 ecx = kvm_rcx_read(vcpu);
1524         u64 data = kvm_read_edx_eax(vcpu);
1525
1526         if (kvm_set_msr(vcpu, ecx, data)) {
1527                 trace_kvm_msr_write_ex(ecx, data);
1528                 kvm_inject_gp(vcpu, 0);
1529                 return 1;
1530         }
1531
1532         trace_kvm_msr_write(ecx, data);
1533         return kvm_skip_emulated_instruction(vcpu);
1534 }
1535 EXPORT_SYMBOL_GPL(kvm_emulate_wrmsr);
1536
1537 /*
1538  * Adapt set_msr() to msr_io()'s calling convention
1539  */
1540 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1541 {
1542         return __kvm_get_msr(vcpu, index, data, true);
1543 }
1544
1545 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1546 {
1547         return __kvm_set_msr(vcpu, index, *data, true);
1548 }
1549
1550 #ifdef CONFIG_X86_64
1551 struct pvclock_gtod_data {
1552         seqcount_t      seq;
1553
1554         struct { /* extract of a clocksource struct */
1555                 int vclock_mode;
1556                 u64     cycle_last;
1557                 u64     mask;
1558                 u32     mult;
1559                 u32     shift;
1560         } clock;
1561
1562         u64             boot_ns;
1563         u64             nsec_base;
1564         u64             wall_time_sec;
1565 };
1566
1567 static struct pvclock_gtod_data pvclock_gtod_data;
1568
1569 static void update_pvclock_gtod(struct timekeeper *tk)
1570 {
1571         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1572         u64 boot_ns;
1573
1574         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1575
1576         write_seqcount_begin(&vdata->seq);
1577
1578         /* copy pvclock gtod data */
1579         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1580         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1581         vdata->clock.mask               = tk->tkr_mono.mask;
1582         vdata->clock.mult               = tk->tkr_mono.mult;
1583         vdata->clock.shift              = tk->tkr_mono.shift;
1584
1585         vdata->boot_ns                  = boot_ns;
1586         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1587
1588         vdata->wall_time_sec            = tk->xtime_sec;
1589
1590         write_seqcount_end(&vdata->seq);
1591 }
1592 #endif
1593
1594 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1595 {
1596         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1597         kvm_vcpu_kick(vcpu);
1598 }
1599
1600 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1601 {
1602         int version;
1603         int r;
1604         struct pvclock_wall_clock wc;
1605         struct timespec64 boot;
1606
1607         if (!wall_clock)
1608                 return;
1609
1610         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1611         if (r)
1612                 return;
1613
1614         if (version & 1)
1615                 ++version;  /* first time write, random junk */
1616
1617         ++version;
1618
1619         if (kvm_write_guest(kvm, wall_clock, &version, sizeof(version)))
1620                 return;
1621
1622         /*
1623          * The guest calculates current wall clock time by adding
1624          * system time (updated by kvm_guest_time_update below) to the
1625          * wall clock specified here.  guest system time equals host
1626          * system time for us, thus we must fill in host boot time here.
1627          */
1628         getboottime64(&boot);
1629
1630         if (kvm->arch.kvmclock_offset) {
1631                 struct timespec64 ts = ns_to_timespec64(kvm->arch.kvmclock_offset);
1632                 boot = timespec64_sub(boot, ts);
1633         }
1634         wc.sec = (u32)boot.tv_sec; /* overflow in 2106 guest time */
1635         wc.nsec = boot.tv_nsec;
1636         wc.version = version;
1637
1638         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1639
1640         version++;
1641         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1642 }
1643
1644 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1645 {
1646         do_shl32_div32(dividend, divisor);
1647         return dividend;
1648 }
1649
1650 static void kvm_get_time_scale(uint64_t scaled_hz, uint64_t base_hz,
1651                                s8 *pshift, u32 *pmultiplier)
1652 {
1653         uint64_t scaled64;
1654         int32_t  shift = 0;
1655         uint64_t tps64;
1656         uint32_t tps32;
1657
1658         tps64 = base_hz;
1659         scaled64 = scaled_hz;
1660         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1661                 tps64 >>= 1;
1662                 shift--;
1663         }
1664
1665         tps32 = (uint32_t)tps64;
1666         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1667                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1668                         scaled64 >>= 1;
1669                 else
1670                         tps32 <<= 1;
1671                 shift++;
1672         }
1673
1674         *pshift = shift;
1675         *pmultiplier = div_frac(scaled64, tps32);
1676 }
1677
1678 #ifdef CONFIG_X86_64
1679 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1680 #endif
1681
1682 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1683 static unsigned long max_tsc_khz;
1684
1685 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1686 {
1687         u64 v = (u64)khz * (1000000 + ppm);
1688         do_div(v, 1000000);
1689         return v;
1690 }
1691
1692 static int set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz, bool scale)
1693 {
1694         u64 ratio;
1695
1696         /* Guest TSC same frequency as host TSC? */
1697         if (!scale) {
1698                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1699                 return 0;
1700         }
1701
1702         /* TSC scaling supported? */
1703         if (!kvm_has_tsc_control) {
1704                 if (user_tsc_khz > tsc_khz) {
1705                         vcpu->arch.tsc_catchup = 1;
1706                         vcpu->arch.tsc_always_catchup = 1;
1707                         return 0;
1708                 } else {
1709                         pr_warn_ratelimited("user requested TSC rate below hardware speed\n");
1710                         return -1;
1711                 }
1712         }
1713
1714         /* TSC scaling required  - calculate ratio */
1715         ratio = mul_u64_u32_div(1ULL << kvm_tsc_scaling_ratio_frac_bits,
1716                                 user_tsc_khz, tsc_khz);
1717
1718         if (ratio == 0 || ratio >= kvm_max_tsc_scaling_ratio) {
1719                 pr_warn_ratelimited("Invalid TSC scaling ratio - virtual-tsc-khz=%u\n",
1720                                     user_tsc_khz);
1721                 return -1;
1722         }
1723
1724         vcpu->arch.tsc_scaling_ratio = ratio;
1725         return 0;
1726 }
1727
1728 static int kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 user_tsc_khz)
1729 {
1730         u32 thresh_lo, thresh_hi;
1731         int use_scaling = 0;
1732
1733         /* tsc_khz can be zero if TSC calibration fails */
1734         if (user_tsc_khz == 0) {
1735                 /* set tsc_scaling_ratio to a safe value */
1736                 vcpu->arch.tsc_scaling_ratio = kvm_default_tsc_scaling_ratio;
1737                 return -1;
1738         }
1739
1740         /* Compute a scale to convert nanoseconds in TSC cycles */
1741         kvm_get_time_scale(user_tsc_khz * 1000LL, NSEC_PER_SEC,
1742                            &vcpu->arch.virtual_tsc_shift,
1743                            &vcpu->arch.virtual_tsc_mult);
1744         vcpu->arch.virtual_tsc_khz = user_tsc_khz;
1745
1746         /*
1747          * Compute the variation in TSC rate which is acceptable
1748          * within the range of tolerance and decide if the
1749          * rate being applied is within that bounds of the hardware
1750          * rate.  If so, no scaling or compensation need be done.
1751          */
1752         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1753         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1754         if (user_tsc_khz < thresh_lo || user_tsc_khz > thresh_hi) {
1755                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", user_tsc_khz, thresh_lo, thresh_hi);
1756                 use_scaling = 1;
1757         }
1758         return set_tsc_khz(vcpu, user_tsc_khz, use_scaling);
1759 }
1760
1761 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1762 {
1763         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1764                                       vcpu->arch.virtual_tsc_mult,
1765                                       vcpu->arch.virtual_tsc_shift);
1766         tsc += vcpu->arch.this_tsc_write;
1767         return tsc;
1768 }
1769
1770 static inline int gtod_is_based_on_tsc(int mode)
1771 {
1772         return mode == VCLOCK_TSC || mode == VCLOCK_HVCLOCK;
1773 }
1774
1775 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1776 {
1777 #ifdef CONFIG_X86_64
1778         bool vcpus_matched;
1779         struct kvm_arch *ka = &vcpu->kvm->arch;
1780         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1781
1782         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1783                          atomic_read(&vcpu->kvm->online_vcpus));
1784
1785         /*
1786          * Once the masterclock is enabled, always perform request in
1787          * order to update it.
1788          *
1789          * In order to enable masterclock, the host clocksource must be TSC
1790          * and the vcpus need to have matched TSCs.  When that happens,
1791          * perform request to enable masterclock.
1792          */
1793         if (ka->use_master_clock ||
1794             (gtod_is_based_on_tsc(gtod->clock.vclock_mode) && vcpus_matched))
1795                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1796
1797         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1798                             atomic_read(&vcpu->kvm->online_vcpus),
1799                             ka->use_master_clock, gtod->clock.vclock_mode);
1800 #endif
1801 }
1802
1803 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1804 {
1805         u64 curr_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1806         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1807 }
1808
1809 /*
1810  * Multiply tsc by a fixed point number represented by ratio.
1811  *
1812  * The most significant 64-N bits (mult) of ratio represent the
1813  * integral part of the fixed point number; the remaining N bits
1814  * (frac) represent the fractional part, ie. ratio represents a fixed
1815  * point number (mult + frac * 2^(-N)).
1816  *
1817  * N equals to kvm_tsc_scaling_ratio_frac_bits.
1818  */
1819 static inline u64 __scale_tsc(u64 ratio, u64 tsc)
1820 {
1821         return mul_u64_u64_shr(tsc, ratio, kvm_tsc_scaling_ratio_frac_bits);
1822 }
1823
1824 u64 kvm_scale_tsc(struct kvm_vcpu *vcpu, u64 tsc)
1825 {
1826         u64 _tsc = tsc;
1827         u64 ratio = vcpu->arch.tsc_scaling_ratio;
1828
1829         if (ratio != kvm_default_tsc_scaling_ratio)
1830                 _tsc = __scale_tsc(ratio, tsc);
1831
1832         return _tsc;
1833 }
1834 EXPORT_SYMBOL_GPL(kvm_scale_tsc);
1835
1836 static u64 kvm_compute_tsc_offset(struct kvm_vcpu *vcpu, u64 target_tsc)
1837 {
1838         u64 tsc;
1839
1840         tsc = kvm_scale_tsc(vcpu, rdtsc());
1841
1842         return target_tsc - tsc;
1843 }
1844
1845 u64 kvm_read_l1_tsc(struct kvm_vcpu *vcpu, u64 host_tsc)
1846 {
1847         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1848
1849         return tsc_offset + kvm_scale_tsc(vcpu, host_tsc);
1850 }
1851 EXPORT_SYMBOL_GPL(kvm_read_l1_tsc);
1852
1853 static void kvm_vcpu_write_tsc_offset(struct kvm_vcpu *vcpu, u64 offset)
1854 {
1855         vcpu->arch.tsc_offset = kvm_x86_ops->write_l1_tsc_offset(vcpu, offset);
1856 }
1857
1858 static inline bool kvm_check_tsc_unstable(void)
1859 {
1860 #ifdef CONFIG_X86_64
1861         /*
1862          * TSC is marked unstable when we're running on Hyper-V,
1863          * 'TSC page' clocksource is good.
1864          */
1865         if (pvclock_gtod_data.clock.vclock_mode == VCLOCK_HVCLOCK)
1866                 return false;
1867 #endif
1868         return check_tsc_unstable();
1869 }
1870
1871 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1872 {
1873         struct kvm *kvm = vcpu->kvm;
1874         u64 offset, ns, elapsed;
1875         unsigned long flags;
1876         bool matched;
1877         bool already_matched;
1878         u64 data = msr->data;
1879         bool synchronizing = false;
1880
1881         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1882         offset = kvm_compute_tsc_offset(vcpu, data);
1883         ns = ktime_get_boottime_ns();
1884         elapsed = ns - kvm->arch.last_tsc_nsec;
1885
1886         if (vcpu->arch.virtual_tsc_khz) {
1887                 if (data == 0 && msr->host_initiated) {
1888                         /*
1889                          * detection of vcpu initialization -- need to sync
1890                          * with other vCPUs. This particularly helps to keep
1891                          * kvm_clock stable after CPU hotplug
1892                          */
1893                         synchronizing = true;
1894                 } else {
1895                         u64 tsc_exp = kvm->arch.last_tsc_write +
1896                                                 nsec_to_cycles(vcpu, elapsed);
1897                         u64 tsc_hz = vcpu->arch.virtual_tsc_khz * 1000LL;
1898                         /*
1899                          * Special case: TSC write with a small delta (1 second)
1900                          * of virtual cycle time against real time is
1901                          * interpreted as an attempt to synchronize the CPU.
1902                          */
1903                         synchronizing = data < tsc_exp + tsc_hz &&
1904                                         data + tsc_hz > tsc_exp;
1905                 }
1906         }
1907
1908         /*
1909          * For a reliable TSC, we can match TSC offsets, and for an unstable
1910          * TSC, we add elapsed time in this computation.  We could let the
1911          * compensation code attempt to catch up if we fall behind, but
1912          * it's better to try to match offsets from the beginning.
1913          */
1914         if (synchronizing &&
1915             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1916                 if (!kvm_check_tsc_unstable()) {
1917                         offset = kvm->arch.cur_tsc_offset;
1918                 } else {
1919                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1920                         data += delta;
1921                         offset = kvm_compute_tsc_offset(vcpu, data);
1922                 }
1923                 matched = true;
1924                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1925         } else {
1926                 /*
1927                  * We split periods of matched TSC writes into generations.
1928                  * For each generation, we track the original measured
1929                  * nanosecond time, offset, and write, so if TSCs are in
1930                  * sync, we can match exact offset, and if not, we can match
1931                  * exact software computation in compute_guest_tsc()
1932                  *
1933                  * These values are tracked in kvm->arch.cur_xxx variables.
1934                  */
1935                 kvm->arch.cur_tsc_generation++;
1936                 kvm->arch.cur_tsc_nsec = ns;
1937                 kvm->arch.cur_tsc_write = data;
1938                 kvm->arch.cur_tsc_offset = offset;
1939                 matched = false;
1940         }
1941
1942         /*
1943          * We also track th most recent recorded KHZ, write and time to
1944          * allow the matching interval to be extended at each write.
1945          */
1946         kvm->arch.last_tsc_nsec = ns;
1947         kvm->arch.last_tsc_write = data;
1948         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1949
1950         vcpu->arch.last_guest_tsc = data;
1951
1952         /* Keep track of which generation this VCPU has synchronized to */
1953         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1954         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1955         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1956
1957         if (!msr->host_initiated && guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST))
1958                 update_ia32_tsc_adjust_msr(vcpu, offset);
1959
1960         kvm_vcpu_write_tsc_offset(vcpu, offset);
1961         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1962
1963         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1964         if (!matched) {
1965                 kvm->arch.nr_vcpus_matched_tsc = 0;
1966         } else if (!already_matched) {
1967                 kvm->arch.nr_vcpus_matched_tsc++;
1968         }
1969
1970         kvm_track_tsc_matching(vcpu);
1971         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1972 }
1973
1974 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1975
1976 static inline void adjust_tsc_offset_guest(struct kvm_vcpu *vcpu,
1977                                            s64 adjustment)
1978 {
1979         u64 tsc_offset = kvm_x86_ops->read_l1_tsc_offset(vcpu);
1980         kvm_vcpu_write_tsc_offset(vcpu, tsc_offset + adjustment);
1981 }
1982
1983 static inline void adjust_tsc_offset_host(struct kvm_vcpu *vcpu, s64 adjustment)
1984 {
1985         if (vcpu->arch.tsc_scaling_ratio != kvm_default_tsc_scaling_ratio)
1986                 WARN_ON(adjustment < 0);
1987         adjustment = kvm_scale_tsc(vcpu, (u64) adjustment);
1988         adjust_tsc_offset_guest(vcpu, adjustment);
1989 }
1990
1991 #ifdef CONFIG_X86_64
1992
1993 static u64 read_tsc(void)
1994 {
1995         u64 ret = (u64)rdtsc_ordered();
1996         u64 last = pvclock_gtod_data.clock.cycle_last;
1997
1998         if (likely(ret >= last))
1999                 return ret;
2000
2001         /*
2002          * GCC likes to generate cmov here, but this branch is extremely
2003          * predictable (it's just a function of time and the likely is
2004          * very likely) and there's a data dependence, so force GCC
2005          * to generate a branch instead.  I don't barrier() because
2006          * we don't actually need a barrier, and if this function
2007          * ever gets inlined it will generate worse code.
2008          */
2009         asm volatile ("");
2010         return last;
2011 }
2012
2013 static inline u64 vgettsc(u64 *tsc_timestamp, int *mode)
2014 {
2015         long v;
2016         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2017         u64 tsc_pg_val;
2018
2019         switch (gtod->clock.vclock_mode) {
2020         case VCLOCK_HVCLOCK:
2021                 tsc_pg_val = hv_read_tsc_page_tsc(hv_get_tsc_page(),
2022                                                   tsc_timestamp);
2023                 if (tsc_pg_val != U64_MAX) {
2024                         /* TSC page valid */
2025                         *mode = VCLOCK_HVCLOCK;
2026                         v = (tsc_pg_val - gtod->clock.cycle_last) &
2027                                 gtod->clock.mask;
2028                 } else {
2029                         /* TSC page invalid */
2030                         *mode = VCLOCK_NONE;
2031                 }
2032                 break;
2033         case VCLOCK_TSC:
2034                 *mode = VCLOCK_TSC;
2035                 *tsc_timestamp = read_tsc();
2036                 v = (*tsc_timestamp - gtod->clock.cycle_last) &
2037                         gtod->clock.mask;
2038                 break;
2039         default:
2040                 *mode = VCLOCK_NONE;
2041         }
2042
2043         if (*mode == VCLOCK_NONE)
2044                 *tsc_timestamp = v = 0;
2045
2046         return v * gtod->clock.mult;
2047 }
2048
2049 static int do_monotonic_boot(s64 *t, u64 *tsc_timestamp)
2050 {
2051         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2052         unsigned long seq;
2053         int mode;
2054         u64 ns;
2055
2056         do {
2057                 seq = read_seqcount_begin(&gtod->seq);
2058                 ns = gtod->nsec_base;
2059                 ns += vgettsc(tsc_timestamp, &mode);
2060                 ns >>= gtod->clock.shift;
2061                 ns += gtod->boot_ns;
2062         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2063         *t = ns;
2064
2065         return mode;
2066 }
2067
2068 static int do_realtime(struct timespec64 *ts, u64 *tsc_timestamp)
2069 {
2070         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
2071         unsigned long seq;
2072         int mode;
2073         u64 ns;
2074
2075         do {
2076                 seq = read_seqcount_begin(&gtod->seq);
2077                 ts->tv_sec = gtod->wall_time_sec;
2078                 ns = gtod->nsec_base;
2079                 ns += vgettsc(tsc_timestamp, &mode);
2080                 ns >>= gtod->clock.shift;
2081         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
2082
2083         ts->tv_sec += __iter_div_u64_rem(ns, NSEC_PER_SEC, &ns);
2084         ts->tv_nsec = ns;
2085
2086         return mode;
2087 }
2088
2089 /* returns true if host is using TSC based clocksource */
2090 static bool kvm_get_time_and_clockread(s64 *kernel_ns, u64 *tsc_timestamp)
2091 {
2092         /* checked again under seqlock below */
2093         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2094                 return false;
2095
2096         return gtod_is_based_on_tsc(do_monotonic_boot(kernel_ns,
2097                                                       tsc_timestamp));
2098 }
2099
2100 /* returns true if host is using TSC based clocksource */
2101 static bool kvm_get_walltime_and_clockread(struct timespec64 *ts,
2102                                            u64 *tsc_timestamp)
2103 {
2104         /* checked again under seqlock below */
2105         if (!gtod_is_based_on_tsc(pvclock_gtod_data.clock.vclock_mode))
2106                 return false;
2107
2108         return gtod_is_based_on_tsc(do_realtime(ts, tsc_timestamp));
2109 }
2110 #endif
2111
2112 /*
2113  *
2114  * Assuming a stable TSC across physical CPUS, and a stable TSC
2115  * across virtual CPUs, the following condition is possible.
2116  * Each numbered line represents an event visible to both
2117  * CPUs at the next numbered event.
2118  *
2119  * "timespecX" represents host monotonic time. "tscX" represents
2120  * RDTSC value.
2121  *
2122  *              VCPU0 on CPU0           |       VCPU1 on CPU1
2123  *
2124  * 1.  read timespec0,tsc0
2125  * 2.                                   | timespec1 = timespec0 + N
2126  *                                      | tsc1 = tsc0 + M
2127  * 3. transition to guest               | transition to guest
2128  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
2129  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
2130  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
2131  *
2132  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
2133  *
2134  *      - ret0 < ret1
2135  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
2136  *              ...
2137  *      - 0 < N - M => M < N
2138  *
2139  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
2140  * always the case (the difference between two distinct xtime instances
2141  * might be smaller then the difference between corresponding TSC reads,
2142  * when updating guest vcpus pvclock areas).
2143  *
2144  * To avoid that problem, do not allow visibility of distinct
2145  * system_timestamp/tsc_timestamp values simultaneously: use a master
2146  * copy of host monotonic time values. Update that master copy
2147  * in lockstep.
2148  *
2149  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
2150  *
2151  */
2152
2153 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
2154 {
2155 #ifdef CONFIG_X86_64
2156         struct kvm_arch *ka = &kvm->arch;
2157         int vclock_mode;
2158         bool host_tsc_clocksource, vcpus_matched;
2159
2160         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
2161                         atomic_read(&kvm->online_vcpus));
2162
2163         /*
2164          * If the host uses TSC clock, then passthrough TSC as stable
2165          * to the guest.
2166          */
2167         host_tsc_clocksource = kvm_get_time_and_clockread(
2168                                         &ka->master_kernel_ns,
2169                                         &ka->master_cycle_now);
2170
2171         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
2172                                 && !ka->backwards_tsc_observed
2173                                 && !ka->boot_vcpu_runs_old_kvmclock;
2174
2175         if (ka->use_master_clock)
2176                 atomic_set(&kvm_guest_has_master_clock, 1);
2177
2178         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
2179         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
2180                                         vcpus_matched);
2181 #endif
2182 }
2183
2184 void kvm_make_mclock_inprogress_request(struct kvm *kvm)
2185 {
2186         kvm_make_all_cpus_request(kvm, KVM_REQ_MCLOCK_INPROGRESS);
2187 }
2188
2189 static void kvm_gen_update_masterclock(struct kvm *kvm)
2190 {
2191 #ifdef CONFIG_X86_64
2192         int i;
2193         struct kvm_vcpu *vcpu;
2194         struct kvm_arch *ka = &kvm->arch;
2195
2196         spin_lock(&ka->pvclock_gtod_sync_lock);
2197         kvm_make_mclock_inprogress_request(kvm);
2198         /* no guest entries from this point */
2199         pvclock_update_vm_gtod_copy(kvm);
2200
2201         kvm_for_each_vcpu(i, vcpu, kvm)
2202                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2203
2204         /* guest entries allowed */
2205         kvm_for_each_vcpu(i, vcpu, kvm)
2206                 kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
2207
2208         spin_unlock(&ka->pvclock_gtod_sync_lock);
2209 #endif
2210 }
2211
2212 u64 get_kvmclock_ns(struct kvm *kvm)
2213 {
2214         struct kvm_arch *ka = &kvm->arch;
2215         struct pvclock_vcpu_time_info hv_clock;
2216         u64 ret;
2217
2218         spin_lock(&ka->pvclock_gtod_sync_lock);
2219         if (!ka->use_master_clock) {
2220                 spin_unlock(&ka->pvclock_gtod_sync_lock);
2221                 return ktime_get_boottime_ns() + ka->kvmclock_offset;
2222         }
2223
2224         hv_clock.tsc_timestamp = ka->master_cycle_now;
2225         hv_clock.system_time = ka->master_kernel_ns + ka->kvmclock_offset;
2226         spin_unlock(&ka->pvclock_gtod_sync_lock);
2227
2228         /* both __this_cpu_read() and rdtsc() should be on the same cpu */
2229         get_cpu();
2230
2231         if (__this_cpu_read(cpu_tsc_khz)) {
2232                 kvm_get_time_scale(NSEC_PER_SEC, __this_cpu_read(cpu_tsc_khz) * 1000LL,
2233                                    &hv_clock.tsc_shift,
2234                                    &hv_clock.tsc_to_system_mul);
2235                 ret = __pvclock_read_cycles(&hv_clock, rdtsc());
2236         } else
2237                 ret = ktime_get_boottime_ns() + ka->kvmclock_offset;
2238
2239         put_cpu();
2240
2241         return ret;
2242 }
2243
2244 static void kvm_setup_pvclock_page(struct kvm_vcpu *v)
2245 {
2246         struct kvm_vcpu_arch *vcpu = &v->arch;
2247         struct pvclock_vcpu_time_info guest_hv_clock;
2248
2249         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
2250                 &guest_hv_clock, sizeof(guest_hv_clock))))
2251                 return;
2252
2253         /* This VCPU is paused, but it's legal for a guest to read another
2254          * VCPU's kvmclock, so we really have to follow the specification where
2255          * it says that version is odd if data is being modified, and even after
2256          * it is consistent.
2257          *
2258          * Version field updates must be kept separate.  This is because
2259          * kvm_write_guest_cached might use a "rep movs" instruction, and
2260          * writes within a string instruction are weakly ordered.  So there
2261          * are three writes overall.
2262          *
2263          * As a small optimization, only write the version field in the first
2264          * and third write.  The vcpu->pv_time cache is still valid, because the
2265          * version field is the first in the struct.
2266          */
2267         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
2268
2269         if (guest_hv_clock.version & 1)
2270                 ++guest_hv_clock.version;  /* first time write, random junk */
2271
2272         vcpu->hv_clock.version = guest_hv_clock.version + 1;
2273         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2274                                 &vcpu->hv_clock,
2275                                 sizeof(vcpu->hv_clock.version));
2276
2277         smp_wmb();
2278
2279         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
2280         vcpu->hv_clock.flags |= (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
2281
2282         if (vcpu->pvclock_set_guest_stopped_request) {
2283                 vcpu->hv_clock.flags |= PVCLOCK_GUEST_STOPPED;
2284                 vcpu->pvclock_set_guest_stopped_request = false;
2285         }
2286
2287         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
2288
2289         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2290                                 &vcpu->hv_clock,
2291                                 sizeof(vcpu->hv_clock));
2292
2293         smp_wmb();
2294
2295         vcpu->hv_clock.version++;
2296         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
2297                                 &vcpu->hv_clock,
2298                                 sizeof(vcpu->hv_clock.version));
2299 }
2300
2301 static int kvm_guest_time_update(struct kvm_vcpu *v)
2302 {
2303         unsigned long flags, tgt_tsc_khz;
2304         struct kvm_vcpu_arch *vcpu = &v->arch;
2305         struct kvm_arch *ka = &v->kvm->arch;
2306         s64 kernel_ns;
2307         u64 tsc_timestamp, host_tsc;
2308         u8 pvclock_flags;
2309         bool use_master_clock;
2310
2311         kernel_ns = 0;
2312         host_tsc = 0;
2313
2314         /*
2315          * If the host uses TSC clock, then passthrough TSC as stable
2316          * to the guest.
2317          */
2318         spin_lock(&ka->pvclock_gtod_sync_lock);
2319         use_master_clock = ka->use_master_clock;
2320         if (use_master_clock) {
2321                 host_tsc = ka->master_cycle_now;
2322                 kernel_ns = ka->master_kernel_ns;
2323         }
2324         spin_unlock(&ka->pvclock_gtod_sync_lock);
2325
2326         /* Keep irq disabled to prevent changes to the clock */
2327         local_irq_save(flags);
2328         tgt_tsc_khz = __this_cpu_read(cpu_tsc_khz);
2329         if (unlikely(tgt_tsc_khz == 0)) {
2330                 local_irq_restore(flags);
2331                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2332                 return 1;
2333         }
2334         if (!use_master_clock) {
2335                 host_tsc = rdtsc();
2336                 kernel_ns = ktime_get_boottime_ns();
2337         }
2338
2339         tsc_timestamp = kvm_read_l1_tsc(v, host_tsc);
2340
2341         /*
2342          * We may have to catch up the TSC to match elapsed wall clock
2343          * time for two reasons, even if kvmclock is used.
2344          *   1) CPU could have been running below the maximum TSC rate
2345          *   2) Broken TSC compensation resets the base at each VCPU
2346          *      entry to avoid unknown leaps of TSC even when running
2347          *      again on the same CPU.  This may cause apparent elapsed
2348          *      time to disappear, and the guest to stand still or run
2349          *      very slowly.
2350          */
2351         if (vcpu->tsc_catchup) {
2352                 u64 tsc = compute_guest_tsc(v, kernel_ns);
2353                 if (tsc > tsc_timestamp) {
2354                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
2355                         tsc_timestamp = tsc;
2356                 }
2357         }
2358
2359         local_irq_restore(flags);
2360
2361         /* With all the info we got, fill in the values */
2362
2363         if (kvm_has_tsc_control)
2364                 tgt_tsc_khz = kvm_scale_tsc(v, tgt_tsc_khz);
2365
2366         if (unlikely(vcpu->hw_tsc_khz != tgt_tsc_khz)) {
2367                 kvm_get_time_scale(NSEC_PER_SEC, tgt_tsc_khz * 1000LL,
2368                                    &vcpu->hv_clock.tsc_shift,
2369                                    &vcpu->hv_clock.tsc_to_system_mul);
2370                 vcpu->hw_tsc_khz = tgt_tsc_khz;
2371         }
2372
2373         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
2374         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
2375         vcpu->last_guest_tsc = tsc_timestamp;
2376
2377         /* If the host uses TSC clocksource, then it is stable */
2378         pvclock_flags = 0;
2379         if (use_master_clock)
2380                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
2381
2382         vcpu->hv_clock.flags = pvclock_flags;
2383
2384         if (vcpu->pv_time_enabled)
2385                 kvm_setup_pvclock_page(v);
2386         if (v == kvm_get_vcpu(v->kvm, 0))
2387                 kvm_hv_setup_tsc_page(v->kvm, &vcpu->hv_clock);
2388         return 0;
2389 }
2390
2391 /*
2392  * kvmclock updates which are isolated to a given vcpu, such as
2393  * vcpu->cpu migration, should not allow system_timestamp from
2394  * the rest of the vcpus to remain static. Otherwise ntp frequency
2395  * correction applies to one vcpu's system_timestamp but not
2396  * the others.
2397  *
2398  * So in those cases, request a kvmclock update for all vcpus.
2399  * We need to rate-limit these requests though, as they can
2400  * considerably slow guests that have a large number of vcpus.
2401  * The time for a remote vcpu to update its kvmclock is bound
2402  * by the delay we use to rate-limit the updates.
2403  */
2404
2405 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
2406
2407 static void kvmclock_update_fn(struct work_struct *work)
2408 {
2409         int i;
2410         struct delayed_work *dwork = to_delayed_work(work);
2411         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2412                                            kvmclock_update_work);
2413         struct kvm *kvm = container_of(ka, struct kvm, arch);
2414         struct kvm_vcpu *vcpu;
2415
2416         kvm_for_each_vcpu(i, vcpu, kvm) {
2417                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2418                 kvm_vcpu_kick(vcpu);
2419         }
2420 }
2421
2422 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
2423 {
2424         struct kvm *kvm = v->kvm;
2425
2426         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
2427         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
2428                                         KVMCLOCK_UPDATE_DELAY);
2429 }
2430
2431 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
2432
2433 static void kvmclock_sync_fn(struct work_struct *work)
2434 {
2435         struct delayed_work *dwork = to_delayed_work(work);
2436         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
2437                                            kvmclock_sync_work);
2438         struct kvm *kvm = container_of(ka, struct kvm, arch);
2439
2440         if (!kvmclock_periodic_sync)
2441                 return;
2442
2443         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
2444         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
2445                                         KVMCLOCK_SYNC_PERIOD);
2446 }
2447
2448 /*
2449  * On AMD, HWCR[McStatusWrEn] controls whether setting MCi_STATUS results in #GP.
2450  */
2451 static bool can_set_mci_status(struct kvm_vcpu *vcpu)
2452 {
2453         /* McStatusWrEn enabled? */
2454         if (guest_cpuid_is_amd(vcpu))
2455                 return !!(vcpu->arch.msr_hwcr & BIT_ULL(18));
2456
2457         return false;
2458 }
2459
2460 static int set_msr_mce(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2461 {
2462         u64 mcg_cap = vcpu->arch.mcg_cap;
2463         unsigned bank_num = mcg_cap & 0xff;
2464         u32 msr = msr_info->index;
2465         u64 data = msr_info->data;
2466
2467         switch (msr) {
2468         case MSR_IA32_MCG_STATUS:
2469                 vcpu->arch.mcg_status = data;
2470                 break;
2471         case MSR_IA32_MCG_CTL:
2472                 if (!(mcg_cap & MCG_CTL_P) &&
2473                     (data || !msr_info->host_initiated))
2474                         return 1;
2475                 if (data != 0 && data != ~(u64)0)
2476                         return 1;
2477                 vcpu->arch.mcg_ctl = data;
2478                 break;
2479         default:
2480                 if (msr >= MSR_IA32_MC0_CTL &&
2481                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2482                         u32 offset = msr - MSR_IA32_MC0_CTL;
2483                         /* only 0 or all 1s can be written to IA32_MCi_CTL
2484                          * some Linux kernels though clear bit 10 in bank 4 to
2485                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
2486                          * this to avoid an uncatched #GP in the guest
2487                          */
2488                         if ((offset & 0x3) == 0 &&
2489                             data != 0 && (data | (1 << 10)) != ~(u64)0)
2490                                 return -1;
2491
2492                         /* MCi_STATUS */
2493                         if (!msr_info->host_initiated &&
2494                             (offset & 0x3) == 1 && data != 0) {
2495                                 if (!can_set_mci_status(vcpu))
2496                                         return -1;
2497                         }
2498
2499                         vcpu->arch.mce_banks[offset] = data;
2500                         break;
2501                 }
2502                 return 1;
2503         }
2504         return 0;
2505 }
2506
2507 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
2508 {
2509         struct kvm *kvm = vcpu->kvm;
2510         int lm = is_long_mode(vcpu);
2511         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
2512                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
2513         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
2514                 : kvm->arch.xen_hvm_config.blob_size_32;
2515         u32 page_num = data & ~PAGE_MASK;
2516         u64 page_addr = data & PAGE_MASK;
2517         u8 *page;
2518         int r;
2519
2520         r = -E2BIG;
2521         if (page_num >= blob_size)
2522                 goto out;
2523         r = -ENOMEM;
2524         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
2525         if (IS_ERR(page)) {
2526                 r = PTR_ERR(page);
2527                 goto out;
2528         }
2529         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
2530                 goto out_free;
2531         r = 0;
2532 out_free:
2533         kfree(page);
2534 out:
2535         return r;
2536 }
2537
2538 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
2539 {
2540         gpa_t gpa = data & ~0x3f;
2541
2542         /* Bits 3:5 are reserved, Should be zero */
2543         if (data & 0x38)
2544                 return 1;
2545
2546         vcpu->arch.apf.msr_val = data;
2547
2548         if (!(data & KVM_ASYNC_PF_ENABLED)) {
2549                 kvm_clear_async_pf_completion_queue(vcpu);
2550                 kvm_async_pf_hash_reset(vcpu);
2551                 return 0;
2552         }
2553
2554         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
2555                                         sizeof(u32)))
2556                 return 1;
2557
2558         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
2559         vcpu->arch.apf.delivery_as_pf_vmexit = data & KVM_ASYNC_PF_DELIVERY_AS_PF_VMEXIT;
2560         kvm_async_pf_wakeup_all(vcpu);
2561         return 0;
2562 }
2563
2564 static void kvmclock_reset(struct kvm_vcpu *vcpu)
2565 {
2566         vcpu->arch.pv_time_enabled = false;
2567         vcpu->arch.time = 0;
2568 }
2569
2570 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu, bool invalidate_gpa)
2571 {
2572         ++vcpu->stat.tlb_flush;
2573         kvm_x86_ops->tlb_flush(vcpu, invalidate_gpa);
2574 }
2575
2576 static void record_steal_time(struct kvm_vcpu *vcpu)
2577 {
2578         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
2579                 return;
2580
2581         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2582                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
2583                 return;
2584
2585         /*
2586          * Doing a TLB flush here, on the guest's behalf, can avoid
2587          * expensive IPIs.
2588          */
2589         trace_kvm_pv_tlb_flush(vcpu->vcpu_id,
2590                 vcpu->arch.st.steal.preempted & KVM_VCPU_FLUSH_TLB);
2591         if (xchg(&vcpu->arch.st.steal.preempted, 0) & KVM_VCPU_FLUSH_TLB)
2592                 kvm_vcpu_flush_tlb(vcpu, false);
2593
2594         if (vcpu->arch.st.steal.version & 1)
2595                 vcpu->arch.st.steal.version += 1;  /* first time write, random junk */
2596
2597         vcpu->arch.st.steal.version += 1;
2598
2599         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2600                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2601
2602         smp_wmb();
2603
2604         vcpu->arch.st.steal.steal += current->sched_info.run_delay -
2605                 vcpu->arch.st.last_steal;
2606         vcpu->arch.st.last_steal = current->sched_info.run_delay;
2607
2608         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2609                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2610
2611         smp_wmb();
2612
2613         vcpu->arch.st.steal.version += 1;
2614
2615         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
2616                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
2617 }
2618
2619 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2620 {
2621         bool pr = false;
2622         u32 msr = msr_info->index;
2623         u64 data = msr_info->data;
2624
2625         switch (msr) {
2626         case MSR_AMD64_NB_CFG:
2627         case MSR_IA32_UCODE_WRITE:
2628         case MSR_VM_HSAVE_PA:
2629         case MSR_AMD64_PATCH_LOADER:
2630         case MSR_AMD64_BU_CFG2:
2631         case MSR_AMD64_DC_CFG:
2632         case MSR_F15H_EX_CFG:
2633                 break;
2634
2635         case MSR_IA32_UCODE_REV:
2636                 if (msr_info->host_initiated)
2637                         vcpu->arch.microcode_version = data;
2638                 break;
2639         case MSR_IA32_ARCH_CAPABILITIES:
2640                 if (!msr_info->host_initiated)
2641                         return 1;
2642                 vcpu->arch.arch_capabilities = data;
2643                 break;
2644         case MSR_EFER:
2645                 return set_efer(vcpu, msr_info);
2646         case MSR_K7_HWCR:
2647                 data &= ~(u64)0x40;     /* ignore flush filter disable */
2648                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
2649                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
2650
2651                 /* Handle McStatusWrEn */
2652                 if (data == BIT_ULL(18)) {
2653                         vcpu->arch.msr_hwcr = data;
2654                 } else if (data != 0) {
2655                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
2656                                     data);
2657                         return 1;
2658                 }
2659                 break;
2660         case MSR_FAM10H_MMIO_CONF_BASE:
2661                 if (data != 0) {
2662                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
2663                                     "0x%llx\n", data);
2664                         return 1;
2665                 }
2666                 break;
2667         case MSR_IA32_DEBUGCTLMSR:
2668                 if (!data) {
2669                         /* We support the non-activated case already */
2670                         break;
2671                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
2672                         /* Values other than LBR and BTF are vendor-specific,
2673                            thus reserved and should throw a #GP */
2674                         return 1;
2675                 }
2676                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
2677                             __func__, data);
2678                 break;
2679         case 0x200 ... 0x2ff:
2680                 return kvm_mtrr_set_msr(vcpu, msr, data);
2681         case MSR_IA32_APICBASE:
2682                 return kvm_set_apic_base(vcpu, msr_info);
2683         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2684                 return kvm_x2apic_msr_write(vcpu, msr, data);
2685         case MSR_IA32_TSCDEADLINE:
2686                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
2687                 break;
2688         case MSR_IA32_TSC_ADJUST:
2689                 if (guest_cpuid_has(vcpu, X86_FEATURE_TSC_ADJUST)) {
2690                         if (!msr_info->host_initiated) {
2691                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
2692                                 adjust_tsc_offset_guest(vcpu, adj);
2693                         }
2694                         vcpu->arch.ia32_tsc_adjust_msr = data;
2695                 }
2696                 break;
2697         case MSR_IA32_MISC_ENABLE:
2698                 if (!kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_MISC_ENABLE_NO_MWAIT) &&
2699                     ((vcpu->arch.ia32_misc_enable_msr ^ data) & MSR_IA32_MISC_ENABLE_MWAIT)) {
2700                         if (!guest_cpuid_has(vcpu, X86_FEATURE_XMM3))
2701                                 return 1;
2702                         vcpu->arch.ia32_misc_enable_msr = data;
2703                         kvm_update_cpuid(vcpu);
2704                 } else {
2705                         vcpu->arch.ia32_misc_enable_msr = data;
2706                 }
2707                 break;
2708         case MSR_IA32_SMBASE:
2709                 if (!msr_info->host_initiated)
2710                         return 1;
2711                 vcpu->arch.smbase = data;
2712                 break;
2713         case MSR_IA32_POWER_CTL:
2714                 vcpu->arch.msr_ia32_power_ctl = data;
2715                 break;
2716         case MSR_IA32_TSC:
2717                 kvm_write_tsc(vcpu, msr_info);
2718                 break;
2719         case MSR_SMI_COUNT:
2720                 if (!msr_info->host_initiated)
2721                         return 1;
2722                 vcpu->arch.smi_count = data;
2723                 break;
2724         case MSR_KVM_WALL_CLOCK_NEW:
2725         case MSR_KVM_WALL_CLOCK:
2726                 vcpu->kvm->arch.wall_clock = data;
2727                 kvm_write_wall_clock(vcpu->kvm, data);
2728                 break;
2729         case MSR_KVM_SYSTEM_TIME_NEW:
2730         case MSR_KVM_SYSTEM_TIME: {
2731                 struct kvm_arch *ka = &vcpu->kvm->arch;
2732
2733                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2734                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2735
2736                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2737                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
2738
2739                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2740                 }
2741
2742                 vcpu->arch.time = data;
2743                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2744
2745                 /* we verify if the enable bit is set... */
2746                 vcpu->arch.pv_time_enabled = false;
2747                 if (!(data & 1))
2748                         break;
2749
2750                 if (!kvm_gfn_to_hva_cache_init(vcpu->kvm,
2751                      &vcpu->arch.pv_time, data & ~1ULL,
2752                      sizeof(struct pvclock_vcpu_time_info)))
2753                         vcpu->arch.pv_time_enabled = true;
2754
2755                 break;
2756         }
2757         case MSR_KVM_ASYNC_PF_EN:
2758                 if (kvm_pv_enable_async_pf(vcpu, data))
2759                         return 1;
2760                 break;
2761         case MSR_KVM_STEAL_TIME:
2762
2763                 if (unlikely(!sched_info_on()))
2764                         return 1;
2765
2766                 if (data & KVM_STEAL_RESERVED_MASK)
2767                         return 1;
2768
2769                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2770                                                 data & KVM_STEAL_VALID_BITS,
2771                                                 sizeof(struct kvm_steal_time)))
2772                         return 1;
2773
2774                 vcpu->arch.st.msr_val = data;
2775
2776                 if (!(data & KVM_MSR_ENABLED))
2777                         break;
2778
2779                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2780
2781                 break;
2782         case MSR_KVM_PV_EOI_EN:
2783                 if (kvm_lapic_enable_pv_eoi(vcpu, data, sizeof(u8)))
2784                         return 1;
2785                 break;
2786
2787         case MSR_KVM_POLL_CONTROL:
2788                 /* only enable bit supported */
2789                 if (data & (-1ULL << 1))
2790                         return 1;
2791
2792                 vcpu->arch.msr_kvm_poll_control = data;
2793                 break;
2794
2795         case MSR_IA32_MCG_CTL:
2796         case MSR_IA32_MCG_STATUS:
2797         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2798                 return set_msr_mce(vcpu, msr_info);
2799
2800         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2801         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2802                 pr = true; /* fall through */
2803         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2804         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2805                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2806                         return kvm_pmu_set_msr(vcpu, msr_info);
2807
2808                 if (pr || data != 0)
2809                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2810                                     "0x%x data 0x%llx\n", msr, data);
2811                 break;
2812         case MSR_K7_CLK_CTL:
2813                 /*
2814                  * Ignore all writes to this no longer documented MSR.
2815                  * Writes are only relevant for old K7 processors,
2816                  * all pre-dating SVM, but a recommended workaround from
2817                  * AMD for these chips. It is possible to specify the
2818                  * affected processor models on the command line, hence
2819                  * the need to ignore the workaround.
2820                  */
2821                 break;
2822         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2823         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2824         case HV_X64_MSR_CRASH_CTL:
2825         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
2826         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
2827         case HV_X64_MSR_TSC_EMULATION_CONTROL:
2828         case HV_X64_MSR_TSC_EMULATION_STATUS:
2829                 return kvm_hv_set_msr_common(vcpu, msr, data,
2830                                              msr_info->host_initiated);
2831         case MSR_IA32_BBL_CR_CTL3:
2832                 /* Drop writes to this legacy MSR -- see rdmsr
2833                  * counterpart for further detail.
2834                  */
2835                 if (report_ignored_msrs)
2836                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data 0x%llx\n",
2837                                 msr, data);
2838                 break;
2839         case MSR_AMD64_OSVW_ID_LENGTH:
2840                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2841                         return 1;
2842                 vcpu->arch.osvw.length = data;
2843                 break;
2844         case MSR_AMD64_OSVW_STATUS:
2845                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
2846                         return 1;
2847                 vcpu->arch.osvw.status = data;
2848                 break;
2849         case MSR_PLATFORM_INFO:
2850                 if (!msr_info->host_initiated ||
2851                     (!(data & MSR_PLATFORM_INFO_CPUID_FAULT) &&
2852                      cpuid_fault_enabled(vcpu)))
2853                         return 1;
2854                 vcpu->arch.msr_platform_info = data;
2855                 break;
2856         case MSR_MISC_FEATURES_ENABLES:
2857                 if (data & ~MSR_MISC_FEATURES_ENABLES_CPUID_FAULT ||
2858                     (data & MSR_MISC_FEATURES_ENABLES_CPUID_FAULT &&
2859                      !supports_cpuid_fault(vcpu)))
2860                         return 1;
2861                 vcpu->arch.msr_misc_features_enables = data;
2862                 break;
2863         default:
2864                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2865                         return xen_hvm_config(vcpu, data);
2866                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2867                         return kvm_pmu_set_msr(vcpu, msr_info);
2868                 if (!ignore_msrs) {
2869                         vcpu_debug_ratelimited(vcpu, "unhandled wrmsr: 0x%x data 0x%llx\n",
2870                                     msr, data);
2871                         return 1;
2872                 } else {
2873                         if (report_ignored_msrs)
2874                                 vcpu_unimpl(vcpu,
2875                                         "ignored wrmsr: 0x%x data 0x%llx\n",
2876                                         msr, data);
2877                         break;
2878                 }
2879         }
2880         return 0;
2881 }
2882 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2883
2884 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata, bool host)
2885 {
2886         u64 data;
2887         u64 mcg_cap = vcpu->arch.mcg_cap;
2888         unsigned bank_num = mcg_cap & 0xff;
2889
2890         switch (msr) {
2891         case MSR_IA32_P5_MC_ADDR:
2892         case MSR_IA32_P5_MC_TYPE:
2893                 data = 0;
2894                 break;
2895         case MSR_IA32_MCG_CAP:
2896                 data = vcpu->arch.mcg_cap;
2897                 break;
2898         case MSR_IA32_MCG_CTL:
2899                 if (!(mcg_cap & MCG_CTL_P) && !host)
2900                         return 1;
2901                 data = vcpu->arch.mcg_ctl;
2902                 break;
2903         case MSR_IA32_MCG_STATUS:
2904                 data = vcpu->arch.mcg_status;
2905                 break;
2906         default:
2907                 if (msr >= MSR_IA32_MC0_CTL &&
2908                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2909                         u32 offset = msr - MSR_IA32_MC0_CTL;
2910                         data = vcpu->arch.mce_banks[offset];
2911                         break;
2912                 }
2913                 return 1;
2914         }
2915         *pdata = data;
2916         return 0;
2917 }
2918
2919 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2920 {
2921         switch (msr_info->index) {
2922         case MSR_IA32_PLATFORM_ID:
2923         case MSR_IA32_EBL_CR_POWERON:
2924         case MSR_IA32_DEBUGCTLMSR:
2925         case MSR_IA32_LASTBRANCHFROMIP:
2926         case MSR_IA32_LASTBRANCHTOIP:
2927         case MSR_IA32_LASTINTFROMIP:
2928         case MSR_IA32_LASTINTTOIP:
2929         case MSR_K8_SYSCFG:
2930         case MSR_K8_TSEG_ADDR:
2931         case MSR_K8_TSEG_MASK:
2932         case MSR_VM_HSAVE_PA:
2933         case MSR_K8_INT_PENDING_MSG:
2934         case MSR_AMD64_NB_CFG:
2935         case MSR_FAM10H_MMIO_CONF_BASE:
2936         case MSR_AMD64_BU_CFG2:
2937         case MSR_IA32_PERF_CTL:
2938         case MSR_AMD64_DC_CFG:
2939         case MSR_F15H_EX_CFG:
2940                 msr_info->data = 0;
2941                 break;
2942         case MSR_F15H_PERF_CTL0 ... MSR_F15H_PERF_CTR5:
2943         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2944         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2945         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2946         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2947                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2948                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2949                 msr_info->data = 0;
2950                 break;
2951         case MSR_IA32_UCODE_REV:
2952                 msr_info->data = vcpu->arch.microcode_version;
2953                 break;
2954         case MSR_IA32_ARCH_CAPABILITIES:
2955                 if (!msr_info->host_initiated &&
2956                     !guest_cpuid_has(vcpu, X86_FEATURE_ARCH_CAPABILITIES))
2957                         return 1;
2958                 msr_info->data = vcpu->arch.arch_capabilities;
2959                 break;
2960         case MSR_IA32_POWER_CTL:
2961                 msr_info->data = vcpu->arch.msr_ia32_power_ctl;
2962                 break;
2963         case MSR_IA32_TSC:
2964                 msr_info->data = kvm_scale_tsc(vcpu, rdtsc()) + vcpu->arch.tsc_offset;
2965                 break;
2966         case MSR_MTRRcap:
2967         case 0x200 ... 0x2ff:
2968                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2969         case 0xcd: /* fsb frequency */
2970                 msr_info->data = 3;
2971                 break;
2972                 /*
2973                  * MSR_EBC_FREQUENCY_ID
2974                  * Conservative value valid for even the basic CPU models.
2975                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2976                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2977                  * and 266MHz for model 3, or 4. Set Core Clock
2978                  * Frequency to System Bus Frequency Ratio to 1 (bits
2979                  * 31:24) even though these are only valid for CPU
2980                  * models > 2, however guests may end up dividing or
2981                  * multiplying by zero otherwise.
2982                  */
2983         case MSR_EBC_FREQUENCY_ID:
2984                 msr_info->data = 1 << 24;
2985                 break;
2986         case MSR_IA32_APICBASE:
2987                 msr_info->data = kvm_get_apic_base(vcpu);
2988                 break;
2989         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2990                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2991                 break;
2992         case MSR_IA32_TSCDEADLINE:
2993                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2994                 break;
2995         case MSR_IA32_TSC_ADJUST:
2996                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2997                 break;
2998         case MSR_IA32_MISC_ENABLE:
2999                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
3000                 break;
3001         case MSR_IA32_SMBASE:
3002                 if (!msr_info->host_initiated)
3003                         return 1;
3004                 msr_info->data = vcpu->arch.smbase;
3005                 break;
3006         case MSR_SMI_COUNT:
3007                 msr_info->data = vcpu->arch.smi_count;
3008                 break;
3009         case MSR_IA32_PERF_STATUS:
3010                 /* TSC increment by tick */
3011                 msr_info->data = 1000ULL;
3012                 /* CPU multiplier */
3013                 msr_info->data |= (((uint64_t)4ULL) << 40);
3014                 break;
3015         case MSR_EFER:
3016                 msr_info->data = vcpu->arch.efer;
3017                 break;
3018         case MSR_KVM_WALL_CLOCK:
3019         case MSR_KVM_WALL_CLOCK_NEW:
3020                 msr_info->data = vcpu->kvm->arch.wall_clock;
3021                 break;
3022         case MSR_KVM_SYSTEM_TIME:
3023         case MSR_KVM_SYSTEM_TIME_NEW:
3024                 msr_info->data = vcpu->arch.time;
3025                 break;
3026         case MSR_KVM_ASYNC_PF_EN:
3027                 msr_info->data = vcpu->arch.apf.msr_val;
3028                 break;
3029         case MSR_KVM_STEAL_TIME:
3030                 msr_info->data = vcpu->arch.st.msr_val;
3031                 break;
3032         case MSR_KVM_PV_EOI_EN:
3033                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
3034                 break;
3035         case MSR_KVM_POLL_CONTROL:
3036                 msr_info->data = vcpu->arch.msr_kvm_poll_control;
3037                 break;
3038         case MSR_IA32_P5_MC_ADDR:
3039         case MSR_IA32_P5_MC_TYPE:
3040         case MSR_IA32_MCG_CAP:
3041         case MSR_IA32_MCG_CTL:
3042         case MSR_IA32_MCG_STATUS:
3043         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
3044                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data,
3045                                    msr_info->host_initiated);
3046         case MSR_K7_CLK_CTL:
3047                 /*
3048                  * Provide expected ramp-up count for K7. All other
3049                  * are set to zero, indicating minimum divisors for
3050                  * every field.
3051                  *
3052                  * This prevents guest kernels on AMD host with CPU
3053                  * type 6, model 8 and higher from exploding due to
3054                  * the rdmsr failing.
3055                  */
3056                 msr_info->data = 0x20000000;
3057                 break;
3058         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
3059         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
3060         case HV_X64_MSR_CRASH_CTL:
3061         case HV_X64_MSR_STIMER0_CONFIG ... HV_X64_MSR_STIMER3_COUNT:
3062         case HV_X64_MSR_REENLIGHTENMENT_CONTROL:
3063         case HV_X64_MSR_TSC_EMULATION_CONTROL:
3064         case HV_X64_MSR_TSC_EMULATION_STATUS:
3065                 return kvm_hv_get_msr_common(vcpu,
3066                                              msr_info->index, &msr_info->data,
3067                                              msr_info->host_initiated);
3068                 break;
3069         case MSR_IA32_BBL_CR_CTL3:
3070                 /* This legacy MSR exists but isn't fully documented in current
3071                  * silicon.  It is however accessed by winxp in very narrow
3072                  * scenarios where it sets bit #19, itself documented as
3073                  * a "reserved" bit.  Best effort attempt to source coherent
3074                  * read data here should the balance of the register be
3075                  * interpreted by the guest:
3076                  *
3077                  * L2 cache control register 3: 64GB range, 256KB size,
3078                  * enabled, latency 0x1, configured
3079                  */
3080                 msr_info->data = 0xbe702111;
3081                 break;
3082         case MSR_AMD64_OSVW_ID_LENGTH:
3083                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3084                         return 1;
3085                 msr_info->data = vcpu->arch.osvw.length;
3086                 break;
3087         case MSR_AMD64_OSVW_STATUS:
3088                 if (!guest_cpuid_has(vcpu, X86_FEATURE_OSVW))
3089                         return 1;
3090                 msr_info->data = vcpu->arch.osvw.status;
3091                 break;
3092         case MSR_PLATFORM_INFO:
3093                 if (!msr_info->host_initiated &&
3094                     !vcpu->kvm->arch.guest_can_read_msr_platform_info)
3095                         return 1;
3096                 msr_info->data = vcpu->arch.msr_platform_info;
3097                 break;
3098         case MSR_MISC_FEATURES_ENABLES:
3099                 msr_info->data = vcpu->arch.msr_misc_features_enables;
3100                 break;
3101         case MSR_K7_HWCR:
3102                 msr_info->data = vcpu->arch.msr_hwcr;
3103                 break;
3104         default:
3105                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
3106                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
3107                 if (!ignore_msrs) {
3108                         vcpu_debug_ratelimited(vcpu, "unhandled rdmsr: 0x%x\n",
3109                                                msr_info->index);
3110                         return 1;
3111                 } else {
3112                         if (report_ignored_msrs)
3113                                 vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n",
3114                                         msr_info->index);
3115                         msr_info->data = 0;
3116                 }
3117                 break;
3118         }
3119         return 0;
3120 }
3121 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
3122
3123 /*
3124  * Read or write a bunch of msrs. All parameters are kernel addresses.
3125  *
3126  * @return number of msrs set successfully.
3127  */
3128 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
3129                     struct kvm_msr_entry *entries,
3130                     int (*do_msr)(struct kvm_vcpu *vcpu,
3131                                   unsigned index, u64 *data))
3132 {
3133         int i;
3134
3135         for (i = 0; i < msrs->nmsrs; ++i)
3136                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
3137                         break;
3138
3139         return i;
3140 }
3141
3142 /*
3143  * Read or write a bunch of msrs. Parameters are user addresses.
3144  *
3145  * @return number of msrs set successfully.
3146  */
3147 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
3148                   int (*do_msr)(struct kvm_vcpu *vcpu,
3149                                 unsigned index, u64 *data),
3150                   int writeback)
3151 {
3152         struct kvm_msrs msrs;
3153         struct kvm_msr_entry *entries;
3154         int r, n;
3155         unsigned size;
3156
3157         r = -EFAULT;
3158         if (copy_from_user(&msrs, user_msrs, sizeof(msrs)))
3159                 goto out;
3160
3161         r = -E2BIG;
3162         if (msrs.nmsrs >= MAX_IO_MSRS)
3163                 goto out;
3164
3165         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
3166         entries = memdup_user(user_msrs->entries, size);
3167         if (IS_ERR(entries)) {
3168                 r = PTR_ERR(entries);
3169                 goto out;
3170         }
3171
3172         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
3173         if (r < 0)
3174                 goto out_free;
3175
3176         r = -EFAULT;
3177         if (writeback && copy_to_user(user_msrs->entries, entries, size))
3178                 goto out_free;
3179
3180         r = n;
3181
3182 out_free:
3183         kfree(entries);
3184 out:
3185         return r;
3186 }
3187
3188 static inline bool kvm_can_mwait_in_guest(void)
3189 {
3190         return boot_cpu_has(X86_FEATURE_MWAIT) &&
3191                 !boot_cpu_has_bug(X86_BUG_MONITOR) &&
3192                 boot_cpu_has(X86_FEATURE_ARAT);
3193 }
3194
3195 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
3196 {
3197         int r = 0;
3198
3199         switch (ext) {
3200         case KVM_CAP_IRQCHIP:
3201         case KVM_CAP_HLT:
3202         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
3203         case KVM_CAP_SET_TSS_ADDR:
3204         case KVM_CAP_EXT_CPUID:
3205         case KVM_CAP_EXT_EMUL_CPUID:
3206         case KVM_CAP_CLOCKSOURCE:
3207         case KVM_CAP_PIT:
3208         case KVM_CAP_NOP_IO_DELAY:
3209         case KVM_CAP_MP_STATE:
3210         case KVM_CAP_SYNC_MMU:
3211         case KVM_CAP_USER_NMI:
3212         case KVM_CAP_REINJECT_CONTROL:
3213         case KVM_CAP_IRQ_INJECT_STATUS:
3214         case KVM_CAP_IOEVENTFD:
3215         case KVM_CAP_IOEVENTFD_NO_LENGTH:
3216         case KVM_CAP_PIT2:
3217         case KVM_CAP_PIT_STATE2:
3218         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
3219         case KVM_CAP_XEN_HVM:
3220         case KVM_CAP_VCPU_EVENTS:
3221         case KVM_CAP_HYPERV:
3222         case KVM_CAP_HYPERV_VAPIC:
3223         case KVM_CAP_HYPERV_SPIN:
3224         case KVM_CAP_HYPERV_SYNIC:
3225         case KVM_CAP_HYPERV_SYNIC2:
3226         case KVM_CAP_HYPERV_VP_INDEX:
3227         case KVM_CAP_HYPERV_EVENTFD:
3228         case KVM_CAP_HYPERV_TLBFLUSH:
3229         case KVM_CAP_HYPERV_SEND_IPI:
3230         case KVM_CAP_HYPERV_CPUID:
3231         case KVM_CAP_PCI_SEGMENT:
3232         case KVM_CAP_DEBUGREGS:
3233         case KVM_CAP_X86_ROBUST_SINGLESTEP:
3234         case KVM_CAP_XSAVE:
3235         case KVM_CAP_ASYNC_PF:
3236         case KVM_CAP_GET_TSC_KHZ:
3237         case KVM_CAP_KVMCLOCK_CTRL:
3238         case KVM_CAP_READONLY_MEM:
3239         case KVM_CAP_HYPERV_TIME:
3240         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
3241         case KVM_CAP_TSC_DEADLINE_TIMER:
3242         case KVM_CAP_DISABLE_QUIRKS:
3243         case KVM_CAP_SET_BOOT_CPU_ID:
3244         case KVM_CAP_SPLIT_IRQCHIP:
3245         case KVM_CAP_IMMEDIATE_EXIT:
3246         case KVM_CAP_PMU_EVENT_FILTER:
3247         case KVM_CAP_GET_MSR_FEATURES:
3248         case KVM_CAP_MSR_PLATFORM_INFO:
3249         case KVM_CAP_EXCEPTION_PAYLOAD:
3250                 r = 1;
3251                 break;
3252         case KVM_CAP_SYNC_REGS:
3253                 r = KVM_SYNC_X86_VALID_FIELDS;
3254                 break;
3255         case KVM_CAP_ADJUST_CLOCK:
3256                 r = KVM_CLOCK_TSC_STABLE;
3257                 break;
3258         case KVM_CAP_X86_DISABLE_EXITS:
3259                 r |=  KVM_X86_DISABLE_EXITS_HLT | KVM_X86_DISABLE_EXITS_PAUSE |
3260                       KVM_X86_DISABLE_EXITS_CSTATE;
3261                 if(kvm_can_mwait_in_guest())
3262                         r |= KVM_X86_DISABLE_EXITS_MWAIT;
3263                 break;
3264         case KVM_CAP_X86_SMM:
3265                 /* SMBASE is usually relocated above 1M on modern chipsets,
3266                  * and SMM handlers might indeed rely on 4G segment limits,
3267                  * so do not report SMM to be available if real mode is
3268                  * emulated via vm86 mode.  Still, do not go to great lengths
3269                  * to avoid userspace's usage of the feature, because it is a
3270                  * fringe case that is not enabled except via specific settings
3271                  * of the module parameters.
3272                  */
3273                 r = kvm_x86_ops->has_emulated_msr(MSR_IA32_SMBASE);
3274                 break;
3275         case KVM_CAP_VAPIC:
3276                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
3277                 break;
3278         case KVM_CAP_NR_VCPUS:
3279                 r = KVM_SOFT_MAX_VCPUS;
3280                 break;
3281         case KVM_CAP_MAX_VCPUS:
3282                 r = KVM_MAX_VCPUS;
3283                 break;
3284         case KVM_CAP_MAX_VCPU_ID:
3285                 r = KVM_MAX_VCPU_ID;
3286                 break;
3287         case KVM_CAP_PV_MMU:    /* obsolete */
3288                 r = 0;
3289                 break;
3290         case KVM_CAP_MCE:
3291                 r = KVM_MAX_MCE_BANKS;
3292                 break;
3293         case KVM_CAP_XCRS:
3294                 r = boot_cpu_has(X86_FEATURE_XSAVE);
3295                 break;
3296         case KVM_CAP_TSC_CONTROL:
3297                 r = kvm_has_tsc_control;
3298                 break;
3299         case KVM_CAP_X2APIC_API:
3300                 r = KVM_X2APIC_API_VALID_FLAGS;
3301                 break;
3302         case KVM_CAP_NESTED_STATE:
3303                 r = kvm_x86_ops->get_nested_state ?
3304                         kvm_x86_ops->get_nested_state(NULL, NULL, 0) : 0;
3305                 break;
3306         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
3307                 r = kvm_x86_ops->enable_direct_tlbflush != NULL;
3308                 break;
3309         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
3310                 r = kvm_x86_ops->nested_enable_evmcs != NULL;
3311                 break;
3312         default:
3313                 break;
3314         }
3315         return r;
3316
3317 }
3318
3319 long kvm_arch_dev_ioctl(struct file *filp,
3320                         unsigned int ioctl, unsigned long arg)
3321 {
3322         void __user *argp = (void __user *)arg;
3323         long r;
3324
3325         switch (ioctl) {
3326         case KVM_GET_MSR_INDEX_LIST: {
3327                 struct kvm_msr_list __user *user_msr_list = argp;
3328                 struct kvm_msr_list msr_list;
3329                 unsigned n;
3330
3331                 r = -EFAULT;
3332                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3333                         goto out;
3334                 n = msr_list.nmsrs;
3335                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
3336                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3337                         goto out;
3338                 r = -E2BIG;
3339                 if (n < msr_list.nmsrs)
3340                         goto out;
3341                 r = -EFAULT;
3342                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
3343                                  num_msrs_to_save * sizeof(u32)))
3344                         goto out;
3345                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
3346                                  &emulated_msrs,
3347                                  num_emulated_msrs * sizeof(u32)))
3348                         goto out;
3349                 r = 0;
3350                 break;
3351         }
3352         case KVM_GET_SUPPORTED_CPUID:
3353         case KVM_GET_EMULATED_CPUID: {
3354                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3355                 struct kvm_cpuid2 cpuid;
3356
3357                 r = -EFAULT;
3358                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
3359                         goto out;
3360
3361                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
3362                                             ioctl);
3363                 if (r)
3364                         goto out;
3365
3366                 r = -EFAULT;
3367                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
3368                         goto out;
3369                 r = 0;
3370                 break;
3371         }
3372         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
3373                 r = -EFAULT;
3374                 if (copy_to_user(argp, &kvm_mce_cap_supported,
3375                                  sizeof(kvm_mce_cap_supported)))
3376                         goto out;
3377                 r = 0;
3378                 break;
3379         case KVM_GET_MSR_FEATURE_INDEX_LIST: {
3380                 struct kvm_msr_list __user *user_msr_list = argp;
3381                 struct kvm_msr_list msr_list;
3382                 unsigned int n;
3383
3384                 r = -EFAULT;
3385                 if (copy_from_user(&msr_list, user_msr_list, sizeof(msr_list)))
3386                         goto out;
3387                 n = msr_list.nmsrs;
3388                 msr_list.nmsrs = num_msr_based_features;
3389                 if (copy_to_user(user_msr_list, &msr_list, sizeof(msr_list)))
3390                         goto out;
3391                 r = -E2BIG;
3392                 if (n < msr_list.nmsrs)
3393                         goto out;
3394                 r = -EFAULT;
3395                 if (copy_to_user(user_msr_list->indices, &msr_based_features,
3396                                  num_msr_based_features * sizeof(u32)))
3397                         goto out;
3398                 r = 0;
3399                 break;
3400         }
3401         case KVM_GET_MSRS:
3402                 r = msr_io(NULL, argp, do_get_msr_feature, 1);
3403                 break;
3404         }
3405         default:
3406                 r = -EINVAL;
3407         }
3408 out:
3409         return r;
3410 }
3411
3412 static void wbinvd_ipi(void *garbage)
3413 {
3414         wbinvd();
3415 }
3416
3417 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
3418 {
3419         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
3420 }
3421
3422 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
3423 {
3424         /* Address WBINVD may be executed by guest */
3425         if (need_emulate_wbinvd(vcpu)) {
3426                 if (kvm_x86_ops->has_wbinvd_exit())
3427                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
3428                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
3429                         smp_call_function_single(vcpu->cpu,
3430                                         wbinvd_ipi, NULL, 1);
3431         }
3432
3433         kvm_x86_ops->vcpu_load(vcpu, cpu);
3434
3435         fpregs_assert_state_consistent();
3436         if (test_thread_flag(TIF_NEED_FPU_LOAD))
3437                 switch_fpu_return();
3438
3439         /* Apply any externally detected TSC adjustments (due to suspend) */
3440         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
3441                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
3442                 vcpu->arch.tsc_offset_adjustment = 0;
3443                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3444         }
3445
3446         if (unlikely(vcpu->cpu != cpu) || kvm_check_tsc_unstable()) {
3447                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
3448                                 rdtsc() - vcpu->arch.last_host_tsc;
3449                 if (tsc_delta < 0)
3450                         mark_tsc_unstable("KVM discovered backwards TSC");
3451
3452                 if (kvm_check_tsc_unstable()) {
3453                         u64 offset = kvm_compute_tsc_offset(vcpu,
3454                                                 vcpu->arch.last_guest_tsc);
3455                         kvm_vcpu_write_tsc_offset(vcpu, offset);
3456                         vcpu->arch.tsc_catchup = 1;
3457                 }
3458
3459                 if (kvm_lapic_hv_timer_in_use(vcpu))
3460                         kvm_lapic_restart_hv_timer(vcpu);
3461
3462                 /*
3463                  * On a host with synchronized TSC, there is no need to update
3464                  * kvmclock on vcpu->cpu migration
3465                  */
3466                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
3467                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
3468                 if (vcpu->cpu != cpu)
3469                         kvm_make_request(KVM_REQ_MIGRATE_TIMER, vcpu);
3470                 vcpu->cpu = cpu;
3471         }
3472
3473         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
3474 }
3475
3476 static void kvm_steal_time_set_preempted(struct kvm_vcpu *vcpu)
3477 {
3478         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
3479                 return;
3480
3481         vcpu->arch.st.steal.preempted = KVM_VCPU_PREEMPTED;
3482
3483         kvm_write_guest_offset_cached(vcpu->kvm, &vcpu->arch.st.stime,
3484                         &vcpu->arch.st.steal.preempted,
3485                         offsetof(struct kvm_steal_time, preempted),
3486                         sizeof(vcpu->arch.st.steal.preempted));
3487 }
3488
3489 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
3490 {
3491         int idx;
3492
3493         if (vcpu->preempted)
3494                 vcpu->arch.preempted_in_kernel = !kvm_x86_ops->get_cpl(vcpu);
3495
3496         /*
3497          * Disable page faults because we're in atomic context here.
3498          * kvm_write_guest_offset_cached() would call might_fault()
3499          * that relies on pagefault_disable() to tell if there's a
3500          * bug. NOTE: the write to guest memory may not go through if
3501          * during postcopy live migration or if there's heavy guest
3502          * paging.
3503          */
3504         pagefault_disable();
3505         /*
3506          * kvm_memslots() will be called by
3507          * kvm_write_guest_offset_cached() so take the srcu lock.
3508          */
3509         idx = srcu_read_lock(&vcpu->kvm->srcu);
3510         kvm_steal_time_set_preempted(vcpu);
3511         srcu_read_unlock(&vcpu->kvm->srcu, idx);
3512         pagefault_enable();
3513         kvm_x86_ops->vcpu_put(vcpu);
3514         vcpu->arch.last_host_tsc = rdtsc();
3515         /*
3516          * If userspace has set any breakpoints or watchpoints, dr6 is restored
3517          * on every vmexit, but if not, we might have a stale dr6 from the
3518          * guest. do_debug expects dr6 to be cleared after it runs, do the same.
3519          */
3520         set_debugreg(0, 6);
3521 }
3522
3523 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
3524                                     struct kvm_lapic_state *s)
3525 {
3526         if (vcpu->arch.apicv_active)
3527                 kvm_x86_ops->sync_pir_to_irr(vcpu);
3528
3529         return kvm_apic_get_state(vcpu, s);
3530 }
3531
3532 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
3533                                     struct kvm_lapic_state *s)
3534 {
3535         int r;
3536
3537         r = kvm_apic_set_state(vcpu, s);
3538         if (r)
3539                 return r;
3540         update_cr8_intercept(vcpu);
3541
3542         return 0;
3543 }
3544
3545 static int kvm_cpu_accept_dm_intr(struct kvm_vcpu *vcpu)
3546 {
3547         return (!lapic_in_kernel(vcpu) ||
3548                 kvm_apic_accept_pic_intr(vcpu));
3549 }
3550
3551 /*
3552  * if userspace requested an interrupt window, check that the
3553  * interrupt window is open.
3554  *
3555  * No need to exit to userspace if we already have an interrupt queued.
3556  */
3557 static int kvm_vcpu_ready_for_interrupt_injection(struct kvm_vcpu *vcpu)
3558 {
3559         return kvm_arch_interrupt_allowed(vcpu) &&
3560                 !kvm_cpu_has_interrupt(vcpu) &&
3561                 !kvm_event_needs_reinjection(vcpu) &&
3562                 kvm_cpu_accept_dm_intr(vcpu);
3563 }
3564
3565 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
3566                                     struct kvm_interrupt *irq)
3567 {
3568         if (irq->irq >= KVM_NR_INTERRUPTS)
3569                 return -EINVAL;
3570
3571         if (!irqchip_in_kernel(vcpu->kvm)) {
3572                 kvm_queue_interrupt(vcpu, irq->irq, false);
3573                 kvm_make_request(KVM_REQ_EVENT, vcpu);
3574                 return 0;
3575         }
3576
3577         /*
3578          * With in-kernel LAPIC, we only use this to inject EXTINT, so
3579          * fail for in-kernel 8259.
3580          */
3581         if (pic_in_kernel(vcpu->kvm))
3582                 return -ENXIO;
3583
3584         if (vcpu->arch.pending_external_vector != -1)
3585                 return -EEXIST;
3586
3587         vcpu->arch.pending_external_vector = irq->irq;
3588         kvm_make_request(KVM_REQ_EVENT, vcpu);
3589         return 0;
3590 }
3591
3592 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
3593 {
3594         kvm_inject_nmi(vcpu);
3595
3596         return 0;
3597 }
3598
3599 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
3600 {
3601         kvm_make_request(KVM_REQ_SMI, vcpu);
3602
3603         return 0;
3604 }
3605
3606 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
3607                                            struct kvm_tpr_access_ctl *tac)
3608 {
3609         if (tac->flags)
3610                 return -EINVAL;
3611         vcpu->arch.tpr_access_reporting = !!tac->enabled;
3612         return 0;
3613 }
3614
3615 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
3616                                         u64 mcg_cap)
3617 {
3618         int r;
3619         unsigned bank_num = mcg_cap & 0xff, bank;
3620
3621         r = -EINVAL;
3622         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
3623                 goto out;
3624         if (mcg_cap & ~(kvm_mce_cap_supported | 0xff | 0xff0000))
3625                 goto out;
3626         r = 0;
3627         vcpu->arch.mcg_cap = mcg_cap;
3628         /* Init IA32_MCG_CTL to all 1s */
3629         if (mcg_cap & MCG_CTL_P)
3630                 vcpu->arch.mcg_ctl = ~(u64)0;
3631         /* Init IA32_MCi_CTL to all 1s */
3632         for (bank = 0; bank < bank_num; bank++)
3633                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
3634
3635         kvm_x86_ops->setup_mce(vcpu);
3636 out:
3637         return r;
3638 }
3639
3640 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
3641                                       struct kvm_x86_mce *mce)
3642 {
3643         u64 mcg_cap = vcpu->arch.mcg_cap;
3644         unsigned bank_num = mcg_cap & 0xff;
3645         u64 *banks = vcpu->arch.mce_banks;
3646
3647         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
3648                 return -EINVAL;
3649         /*
3650          * if IA32_MCG_CTL is not all 1s, the uncorrected error
3651          * reporting is disabled
3652          */
3653         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
3654             vcpu->arch.mcg_ctl != ~(u64)0)
3655                 return 0;
3656         banks += 4 * mce->bank;
3657         /*
3658          * if IA32_MCi_CTL is not all 1s, the uncorrected error
3659          * reporting is disabled for the bank
3660          */
3661         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
3662                 return 0;
3663         if (mce->status & MCI_STATUS_UC) {
3664                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
3665                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
3666                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
3667                         return 0;
3668                 }
3669                 if (banks[1] & MCI_STATUS_VAL)
3670                         mce->status |= MCI_STATUS_OVER;
3671                 banks[2] = mce->addr;
3672                 banks[3] = mce->misc;
3673                 vcpu->arch.mcg_status = mce->mcg_status;
3674                 banks[1] = mce->status;
3675                 kvm_queue_exception(vcpu, MC_VECTOR);
3676         } else if (!(banks[1] & MCI_STATUS_VAL)
3677                    || !(banks[1] & MCI_STATUS_UC)) {
3678                 if (banks[1] & MCI_STATUS_VAL)
3679                         mce->status |= MCI_STATUS_OVER;
3680                 banks[2] = mce->addr;
3681                 banks[3] = mce->misc;
3682                 banks[1] = mce->status;
3683         } else
3684                 banks[1] |= MCI_STATUS_OVER;
3685         return 0;
3686 }
3687
3688 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
3689                                                struct kvm_vcpu_events *events)
3690 {
3691         process_nmi(vcpu);
3692
3693         /*
3694          * The API doesn't provide the instruction length for software
3695          * exceptions, so don't report them. As long as the guest RIP
3696          * isn't advanced, we should expect to encounter the exception
3697          * again.
3698          */
3699         if (kvm_exception_is_soft(vcpu->arch.exception.nr)) {
3700                 events->exception.injected = 0;
3701                 events->exception.pending = 0;
3702         } else {
3703                 events->exception.injected = vcpu->arch.exception.injected;
3704                 events->exception.pending = vcpu->arch.exception.pending;
3705                 /*
3706                  * For ABI compatibility, deliberately conflate
3707                  * pending and injected exceptions when
3708                  * KVM_CAP_EXCEPTION_PAYLOAD isn't enabled.
3709                  */
3710                 if (!vcpu->kvm->arch.exception_payload_enabled)
3711                         events->exception.injected |=
3712                                 vcpu->arch.exception.pending;
3713         }
3714         events->exception.nr = vcpu->arch.exception.nr;
3715         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
3716         events->exception.error_code = vcpu->arch.exception.error_code;
3717         events->exception_has_payload = vcpu->arch.exception.has_payload;
3718         events->exception_payload = vcpu->arch.exception.payload;
3719
3720         events->interrupt.injected =
3721                 vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft;
3722         events->interrupt.nr = vcpu->arch.interrupt.nr;
3723         events->interrupt.soft = 0;
3724         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
3725
3726         events->nmi.injected = vcpu->arch.nmi_injected;
3727         events->nmi.pending = vcpu->arch.nmi_pending != 0;
3728         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
3729         events->nmi.pad = 0;
3730
3731         events->sipi_vector = 0; /* never valid when reporting to user space */
3732
3733         events->smi.smm = is_smm(vcpu);
3734         events->smi.pending = vcpu->arch.smi_pending;
3735         events->smi.smm_inside_nmi =
3736                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
3737         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
3738
3739         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
3740                          | KVM_VCPUEVENT_VALID_SHADOW
3741                          | KVM_VCPUEVENT_VALID_SMM);
3742         if (vcpu->kvm->arch.exception_payload_enabled)
3743                 events->flags |= KVM_VCPUEVENT_VALID_PAYLOAD;
3744
3745         memset(&events->reserved, 0, sizeof(events->reserved));
3746 }
3747
3748 static void kvm_smm_changed(struct kvm_vcpu *vcpu);
3749
3750 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
3751                                               struct kvm_vcpu_events *events)
3752 {
3753         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
3754                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
3755                               | KVM_VCPUEVENT_VALID_SHADOW
3756                               | KVM_VCPUEVENT_VALID_SMM
3757                               | KVM_VCPUEVENT_VALID_PAYLOAD))
3758                 return -EINVAL;
3759
3760         if (events->flags & KVM_VCPUEVENT_VALID_PAYLOAD) {
3761                 if (!vcpu->kvm->arch.exception_payload_enabled)
3762                         return -EINVAL;
3763                 if (events->exception.pending)
3764                         events->exception.injected = 0;
3765                 else
3766                         events->exception_has_payload = 0;
3767         } else {
3768                 events->exception.pending = 0;
3769                 events->exception_has_payload = 0;
3770         }
3771
3772         if ((events->exception.injected || events->exception.pending) &&
3773             (events->exception.nr > 31 || events->exception.nr == NMI_VECTOR))
3774                 return -EINVAL;
3775
3776         /* INITs are latched while in SMM */
3777         if (events->flags & KVM_VCPUEVENT_VALID_SMM &&
3778             (events->smi.smm || events->smi.pending) &&
3779             vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED)
3780                 return -EINVAL;
3781
3782         process_nmi(vcpu);
3783         vcpu->arch.exception.injected = events->exception.injected;
3784         vcpu->arch.exception.pending = events->exception.pending;
3785         vcpu->arch.exception.nr = events->exception.nr;
3786         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
3787         vcpu->arch.exception.error_code = events->exception.error_code;
3788         vcpu->arch.exception.has_payload = events->exception_has_payload;
3789         vcpu->arch.exception.payload = events->exception_payload;
3790
3791         vcpu->arch.interrupt.injected = events->interrupt.injected;
3792         vcpu->arch.interrupt.nr = events->interrupt.nr;
3793         vcpu->arch.interrupt.soft = events->interrupt.soft;
3794         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
3795                 kvm_x86_ops->set_interrupt_shadow(vcpu,
3796                                                   events->interrupt.shadow);
3797
3798         vcpu->arch.nmi_injected = events->nmi.injected;
3799         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
3800                 vcpu->arch.nmi_pending = events->nmi.pending;
3801         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
3802
3803         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
3804             lapic_in_kernel(vcpu))
3805                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
3806
3807         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
3808                 if (!!(vcpu->arch.hflags & HF_SMM_MASK) != events->smi.smm) {
3809                         if (events->smi.smm)
3810                                 vcpu->arch.hflags |= HF_SMM_MASK;
3811                         else
3812                                 vcpu->arch.hflags &= ~HF_SMM_MASK;
3813                         kvm_smm_changed(vcpu);
3814                 }
3815
3816                 vcpu->arch.smi_pending = events->smi.pending;
3817
3818                 if (events->smi.smm) {
3819                         if (events->smi.smm_inside_nmi)
3820                                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
3821                         else
3822                                 vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
3823                         if (lapic_in_kernel(vcpu)) {
3824                                 if (events->smi.latched_init)
3825                                         set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3826                                 else
3827                                         clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
3828                         }
3829                 }
3830         }
3831
3832         kvm_make_request(KVM_REQ_EVENT, vcpu);
3833
3834         return 0;
3835 }
3836
3837 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
3838                                              struct kvm_debugregs *dbgregs)
3839 {
3840         unsigned long val;
3841
3842         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
3843         kvm_get_dr(vcpu, 6, &val);
3844         dbgregs->dr6 = val;
3845         dbgregs->dr7 = vcpu->arch.dr7;
3846         dbgregs->flags = 0;
3847         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
3848 }
3849
3850 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
3851                                             struct kvm_debugregs *dbgregs)
3852 {
3853         if (dbgregs->flags)
3854                 return -EINVAL;
3855
3856         if (dbgregs->dr6 & ~0xffffffffull)
3857                 return -EINVAL;
3858         if (dbgregs->dr7 & ~0xffffffffull)
3859                 return -EINVAL;
3860
3861         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
3862         kvm_update_dr0123(vcpu);
3863         vcpu->arch.dr6 = dbgregs->dr6;
3864         kvm_update_dr6(vcpu);
3865         vcpu->arch.dr7 = dbgregs->dr7;
3866         kvm_update_dr7(vcpu);
3867
3868         return 0;
3869 }
3870
3871 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
3872
3873 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
3874 {
3875         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3876         u64 xstate_bv = xsave->header.xfeatures;
3877         u64 valid;
3878
3879         /*
3880          * Copy legacy XSAVE area, to avoid complications with CPUID
3881          * leaves 0 and 1 in the loop below.
3882          */
3883         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
3884
3885         /* Set XSTATE_BV */
3886         xstate_bv &= vcpu->arch.guest_supported_xcr0 | XFEATURE_MASK_FPSSE;
3887         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
3888
3889         /*
3890          * Copy each region from the possibly compacted offset to the
3891          * non-compacted offset.
3892          */
3893         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3894         while (valid) {
3895                 u64 xfeature_mask = valid & -valid;
3896                 int xfeature_nr = fls64(xfeature_mask) - 1;
3897                 void *src = get_xsave_addr(xsave, xfeature_nr);
3898
3899                 if (src) {
3900                         u32 size, offset, ecx, edx;
3901                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3902                                     &size, &offset, &ecx, &edx);
3903                         if (xfeature_nr == XFEATURE_PKRU)
3904                                 memcpy(dest + offset, &vcpu->arch.pkru,
3905                                        sizeof(vcpu->arch.pkru));
3906                         else
3907                                 memcpy(dest + offset, src, size);
3908
3909                 }
3910
3911                 valid -= xfeature_mask;
3912         }
3913 }
3914
3915 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
3916 {
3917         struct xregs_state *xsave = &vcpu->arch.guest_fpu->state.xsave;
3918         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
3919         u64 valid;
3920
3921         /*
3922          * Copy legacy XSAVE area, to avoid complications with CPUID
3923          * leaves 0 and 1 in the loop below.
3924          */
3925         memcpy(xsave, src, XSAVE_HDR_OFFSET);
3926
3927         /* Set XSTATE_BV and possibly XCOMP_BV.  */
3928         xsave->header.xfeatures = xstate_bv;
3929         if (boot_cpu_has(X86_FEATURE_XSAVES))
3930                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
3931
3932         /*
3933          * Copy each region from the non-compacted offset to the
3934          * possibly compacted offset.
3935          */
3936         valid = xstate_bv & ~XFEATURE_MASK_FPSSE;
3937         while (valid) {
3938                 u64 xfeature_mask = valid & -valid;
3939                 int xfeature_nr = fls64(xfeature_mask) - 1;
3940                 void *dest = get_xsave_addr(xsave, xfeature_nr);
3941
3942                 if (dest) {
3943                         u32 size, offset, ecx, edx;
3944                         cpuid_count(XSTATE_CPUID, xfeature_nr,
3945                                     &size, &offset, &ecx, &edx);
3946                         if (xfeature_nr == XFEATURE_PKRU)
3947                                 memcpy(&vcpu->arch.pkru, src + offset,
3948                                        sizeof(vcpu->arch.pkru));
3949                         else
3950                                 memcpy(dest, src + offset, size);
3951                 }
3952
3953                 valid -= xfeature_mask;
3954         }
3955 }
3956
3957 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
3958                                          struct kvm_xsave *guest_xsave)
3959 {
3960         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3961                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
3962                 fill_xsave((u8 *) guest_xsave->region, vcpu);
3963         } else {
3964                 memcpy(guest_xsave->region,
3965                         &vcpu->arch.guest_fpu->state.fxsave,
3966                         sizeof(struct fxregs_state));
3967                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
3968                         XFEATURE_MASK_FPSSE;
3969         }
3970 }
3971
3972 #define XSAVE_MXCSR_OFFSET 24
3973
3974 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
3975                                         struct kvm_xsave *guest_xsave)
3976 {
3977         u64 xstate_bv =
3978                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
3979         u32 mxcsr = *(u32 *)&guest_xsave->region[XSAVE_MXCSR_OFFSET / sizeof(u32)];
3980
3981         if (boot_cpu_has(X86_FEATURE_XSAVE)) {
3982                 /*
3983                  * Here we allow setting states that are not present in
3984                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
3985                  * with old userspace.
3986                  */
3987                 if (xstate_bv & ~kvm_supported_xcr0() ||
3988                         mxcsr & ~mxcsr_feature_mask)
3989                         return -EINVAL;
3990                 load_xsave(vcpu, (u8 *)guest_xsave->region);
3991         } else {
3992                 if (xstate_bv & ~XFEATURE_MASK_FPSSE ||
3993                         mxcsr & ~mxcsr_feature_mask)
3994                         return -EINVAL;
3995                 memcpy(&vcpu->arch.guest_fpu->state.fxsave,
3996                         guest_xsave->region, sizeof(struct fxregs_state));
3997         }
3998         return 0;
3999 }
4000
4001 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
4002                                         struct kvm_xcrs *guest_xcrs)
4003 {
4004         if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
4005                 guest_xcrs->nr_xcrs = 0;
4006                 return;
4007         }
4008
4009         guest_xcrs->nr_xcrs = 1;
4010         guest_xcrs->flags = 0;
4011         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
4012         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
4013 }
4014
4015 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
4016                                        struct kvm_xcrs *guest_xcrs)
4017 {
4018         int i, r = 0;
4019
4020         if (!boot_cpu_has(X86_FEATURE_XSAVE))
4021                 return -EINVAL;
4022
4023         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
4024                 return -EINVAL;
4025
4026         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
4027                 /* Only support XCR0 currently */
4028                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
4029                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
4030                                 guest_xcrs->xcrs[i].value);
4031                         break;
4032                 }
4033         if (r)
4034                 r = -EINVAL;
4035         return r;
4036 }
4037
4038 /*
4039  * kvm_set_guest_paused() indicates to the guest kernel that it has been
4040  * stopped by the hypervisor.  This function will be called from the host only.
4041  * EINVAL is returned when the host attempts to set the flag for a guest that
4042  * does not support pv clocks.
4043  */
4044 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
4045 {
4046         if (!vcpu->arch.pv_time_enabled)
4047                 return -EINVAL;
4048         vcpu->arch.pvclock_set_guest_stopped_request = true;
4049         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
4050         return 0;
4051 }
4052
4053 static int kvm_vcpu_ioctl_enable_cap(struct kvm_vcpu *vcpu,
4054                                      struct kvm_enable_cap *cap)
4055 {
4056         int r;
4057         uint16_t vmcs_version;
4058         void __user *user_ptr;
4059
4060         if (cap->flags)
4061                 return -EINVAL;
4062
4063         switch (cap->cap) {
4064         case KVM_CAP_HYPERV_SYNIC2:
4065                 if (cap->args[0])
4066                         return -EINVAL;
4067                 /* fall through */
4068
4069         case KVM_CAP_HYPERV_SYNIC:
4070                 if (!irqchip_in_kernel(vcpu->kvm))
4071                         return -EINVAL;
4072                 return kvm_hv_activate_synic(vcpu, cap->cap ==
4073                                              KVM_CAP_HYPERV_SYNIC2);
4074         case KVM_CAP_HYPERV_ENLIGHTENED_VMCS:
4075                 if (!kvm_x86_ops->nested_enable_evmcs)
4076                         return -ENOTTY;
4077                 r = kvm_x86_ops->nested_enable_evmcs(vcpu, &vmcs_version);
4078                 if (!r) {
4079                         user_ptr = (void __user *)(uintptr_t)cap->args[0];
4080                         if (copy_to_user(user_ptr, &vmcs_version,
4081                                          sizeof(vmcs_version)))
4082                                 r = -EFAULT;
4083                 }
4084                 return r;
4085         case KVM_CAP_HYPERV_DIRECT_TLBFLUSH:
4086                 if (!kvm_x86_ops->enable_direct_tlbflush)
4087                         return -ENOTTY;
4088
4089                 return kvm_x86_ops->enable_direct_tlbflush(vcpu);
4090
4091         default:
4092                 return -EINVAL;
4093         }
4094 }
4095
4096 long kvm_arch_vcpu_ioctl(struct file *filp,
4097                          unsigned int ioctl, unsigned long arg)
4098 {
4099         struct kvm_vcpu *vcpu = filp->private_data;
4100         void __user *argp = (void __user *)arg;
4101         int r;
4102         union {
4103                 struct kvm_lapic_state *lapic;
4104                 struct kvm_xsave *xsave;
4105                 struct kvm_xcrs *xcrs;
4106                 void *buffer;
4107         } u;
4108
4109         vcpu_load(vcpu);
4110
4111         u.buffer = NULL;
4112         switch (ioctl) {
4113         case KVM_GET_LAPIC: {
4114                 r = -EINVAL;
4115                 if (!lapic_in_kernel(vcpu))
4116                         goto out;
4117                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state),
4118                                 GFP_KERNEL_ACCOUNT);
4119
4120                 r = -ENOMEM;
4121                 if (!u.lapic)
4122                         goto out;
4123                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
4124                 if (r)
4125                         goto out;
4126                 r = -EFAULT;
4127                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
4128                         goto out;
4129                 r = 0;
4130                 break;
4131         }
4132         case KVM_SET_LAPIC: {
4133                 r = -EINVAL;
4134                 if (!lapic_in_kernel(vcpu))
4135                         goto out;
4136                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
4137                 if (IS_ERR(u.lapic)) {
4138                         r = PTR_ERR(u.lapic);
4139                         goto out_nofree;
4140                 }
4141
4142                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
4143                 break;
4144         }
4145         case KVM_INTERRUPT: {
4146                 struct kvm_interrupt irq;
4147
4148                 r = -EFAULT;
4149                 if (copy_from_user(&irq, argp, sizeof(irq)))
4150                         goto out;
4151                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
4152                 break;
4153         }
4154         case KVM_NMI: {
4155                 r = kvm_vcpu_ioctl_nmi(vcpu);
4156                 break;
4157         }
4158         case KVM_SMI: {
4159                 r = kvm_vcpu_ioctl_smi(vcpu);
4160                 break;
4161         }
4162         case KVM_SET_CPUID: {
4163                 struct kvm_cpuid __user *cpuid_arg = argp;
4164                 struct kvm_cpuid cpuid;
4165
4166                 r = -EFAULT;
4167                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4168                         goto out;
4169                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
4170                 break;
4171         }
4172         case KVM_SET_CPUID2: {
4173                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4174                 struct kvm_cpuid2 cpuid;
4175
4176                 r = -EFAULT;
4177                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4178                         goto out;
4179                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
4180                                               cpuid_arg->entries);
4181                 break;
4182         }
4183         case KVM_GET_CPUID2: {
4184                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4185                 struct kvm_cpuid2 cpuid;
4186
4187                 r = -EFAULT;
4188                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4189                         goto out;
4190                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
4191                                               cpuid_arg->entries);
4192                 if (r)
4193                         goto out;
4194                 r = -EFAULT;
4195                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4196                         goto out;
4197                 r = 0;
4198                 break;
4199         }
4200         case KVM_GET_MSRS: {
4201                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4202                 r = msr_io(vcpu, argp, do_get_msr, 1);
4203                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4204                 break;
4205         }
4206         case KVM_SET_MSRS: {
4207                 int idx = srcu_read_lock(&vcpu->kvm->srcu);
4208                 r = msr_io(vcpu, argp, do_set_msr, 0);
4209                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4210                 break;
4211         }
4212         case KVM_TPR_ACCESS_REPORTING: {
4213                 struct kvm_tpr_access_ctl tac;
4214
4215                 r = -EFAULT;
4216                 if (copy_from_user(&tac, argp, sizeof(tac)))
4217                         goto out;
4218                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
4219                 if (r)
4220                         goto out;
4221                 r = -EFAULT;
4222                 if (copy_to_user(argp, &tac, sizeof(tac)))
4223                         goto out;
4224                 r = 0;
4225                 break;
4226         };
4227         case KVM_SET_VAPIC_ADDR: {
4228                 struct kvm_vapic_addr va;
4229                 int idx;
4230
4231                 r = -EINVAL;
4232                 if (!lapic_in_kernel(vcpu))
4233                         goto out;
4234                 r = -EFAULT;
4235                 if (copy_from_user(&va, argp, sizeof(va)))
4236                         goto out;
4237                 idx = srcu_read_lock(&vcpu->kvm->srcu);
4238                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
4239                 srcu_read_unlock(&vcpu->kvm->srcu, idx);
4240                 break;
4241         }
4242         case KVM_X86_SETUP_MCE: {
4243                 u64 mcg_cap;
4244
4245                 r = -EFAULT;
4246                 if (copy_from_user(&mcg_cap, argp, sizeof(mcg_cap)))
4247                         goto out;
4248                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
4249                 break;
4250         }
4251         case KVM_X86_SET_MCE: {
4252                 struct kvm_x86_mce mce;
4253
4254                 r = -EFAULT;
4255                 if (copy_from_user(&mce, argp, sizeof(mce)))
4256                         goto out;
4257                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
4258                 break;
4259         }
4260         case KVM_GET_VCPU_EVENTS: {
4261                 struct kvm_vcpu_events events;
4262
4263                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
4264
4265                 r = -EFAULT;
4266                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
4267                         break;
4268                 r = 0;
4269                 break;
4270         }
4271         case KVM_SET_VCPU_EVENTS: {
4272                 struct kvm_vcpu_events events;
4273
4274                 r = -EFAULT;
4275                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
4276                         break;
4277
4278                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
4279                 break;
4280         }
4281         case KVM_GET_DEBUGREGS: {
4282                 struct kvm_debugregs dbgregs;
4283
4284                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
4285
4286                 r = -EFAULT;
4287                 if (copy_to_user(argp, &dbgregs,
4288                                  sizeof(struct kvm_debugregs)))
4289                         break;
4290                 r = 0;
4291                 break;
4292         }
4293         case KVM_SET_DEBUGREGS: {
4294                 struct kvm_debugregs dbgregs;
4295
4296                 r = -EFAULT;
4297                 if (copy_from_user(&dbgregs, argp,
4298                                    sizeof(struct kvm_debugregs)))
4299                         break;
4300
4301                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
4302                 break;
4303         }
4304         case KVM_GET_XSAVE: {
4305                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL_ACCOUNT);
4306                 r = -ENOMEM;
4307                 if (!u.xsave)
4308                         break;
4309
4310                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
4311
4312                 r = -EFAULT;
4313                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
4314                         break;
4315                 r = 0;
4316                 break;
4317         }
4318         case KVM_SET_XSAVE: {
4319                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
4320                 if (IS_ERR(u.xsave)) {
4321                         r = PTR_ERR(u.xsave);
4322                         goto out_nofree;
4323                 }
4324
4325                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
4326                 break;
4327         }
4328         case KVM_GET_XCRS: {
4329                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL_ACCOUNT);
4330                 r = -ENOMEM;
4331                 if (!u.xcrs)
4332                         break;
4333
4334                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
4335
4336                 r = -EFAULT;
4337                 if (copy_to_user(argp, u.xcrs,
4338                                  sizeof(struct kvm_xcrs)))
4339                         break;
4340                 r = 0;
4341                 break;
4342         }
4343         case KVM_SET_XCRS: {
4344                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
4345                 if (IS_ERR(u.xcrs)) {
4346                         r = PTR_ERR(u.xcrs);
4347                         goto out_nofree;
4348                 }
4349
4350                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
4351                 break;
4352         }
4353         case KVM_SET_TSC_KHZ: {
4354                 u32 user_tsc_khz;
4355
4356                 r = -EINVAL;
4357                 user_tsc_khz = (u32)arg;
4358
4359                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
4360                         goto out;
4361
4362                 if (user_tsc_khz == 0)
4363                         user_tsc_khz = tsc_khz;
4364
4365                 if (!kvm_set_tsc_khz(vcpu, user_tsc_khz))
4366                         r = 0;
4367
4368                 goto out;
4369         }
4370         case KVM_GET_TSC_KHZ: {
4371                 r = vcpu->arch.virtual_tsc_khz;
4372                 goto out;
4373         }
4374         case KVM_KVMCLOCK_CTRL: {
4375                 r = kvm_set_guest_paused(vcpu);
4376                 goto out;
4377         }
4378         case KVM_ENABLE_CAP: {
4379                 struct kvm_enable_cap cap;
4380
4381                 r = -EFAULT;
4382                 if (copy_from_user(&cap, argp, sizeof(cap)))
4383                         goto out;
4384                 r = kvm_vcpu_ioctl_enable_cap(vcpu, &cap);
4385                 break;
4386         }
4387         case KVM_GET_NESTED_STATE: {
4388                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4389                 u32 user_data_size;
4390
4391                 r = -EINVAL;
4392                 if (!kvm_x86_ops->get_nested_state)
4393                         break;
4394
4395                 BUILD_BUG_ON(sizeof(user_data_size) != sizeof(user_kvm_nested_state->size));
4396                 r = -EFAULT;
4397                 if (get_user(user_data_size, &user_kvm_nested_state->size))
4398                         break;
4399
4400                 r = kvm_x86_ops->get_nested_state(vcpu, user_kvm_nested_state,
4401                                                   user_data_size);
4402                 if (r < 0)
4403                         break;
4404
4405                 if (r > user_data_size) {
4406                         if (put_user(r, &user_kvm_nested_state->size))
4407                                 r = -EFAULT;
4408                         else
4409                                 r = -E2BIG;
4410                         break;
4411                 }
4412
4413                 r = 0;
4414                 break;
4415         }
4416         case KVM_SET_NESTED_STATE: {
4417                 struct kvm_nested_state __user *user_kvm_nested_state = argp;
4418                 struct kvm_nested_state kvm_state;
4419
4420                 r = -EINVAL;
4421                 if (!kvm_x86_ops->set_nested_state)
4422                         break;
4423
4424                 r = -EFAULT;
4425                 if (copy_from_user(&kvm_state, user_kvm_nested_state, sizeof(kvm_state)))
4426                         break;
4427
4428                 r = -EINVAL;
4429                 if (kvm_state.size < sizeof(kvm_state))
4430                         break;
4431
4432                 if (kvm_state.flags &
4433                     ~(KVM_STATE_NESTED_RUN_PENDING | KVM_STATE_NESTED_GUEST_MODE
4434                       | KVM_STATE_NESTED_EVMCS))
4435                         break;
4436
4437                 /* nested_run_pending implies guest_mode.  */
4438                 if ((kvm_state.flags & KVM_STATE_NESTED_RUN_PENDING)
4439                     && !(kvm_state.flags & KVM_STATE_NESTED_GUEST_MODE))
4440                         break;
4441
4442                 r = kvm_x86_ops->set_nested_state(vcpu, user_kvm_nested_state, &kvm_state);
4443                 break;
4444         }
4445         case KVM_GET_SUPPORTED_HV_CPUID: {
4446                 struct kvm_cpuid2 __user *cpuid_arg = argp;
4447                 struct kvm_cpuid2 cpuid;
4448
4449                 r = -EFAULT;
4450                 if (copy_from_user(&cpuid, cpuid_arg, sizeof(cpuid)))
4451                         goto out;
4452
4453                 r = kvm_vcpu_ioctl_get_hv_cpuid(vcpu, &cpuid,
4454                                                 cpuid_arg->entries);
4455                 if (r)
4456                         goto out;
4457
4458                 r = -EFAULT;
4459                 if (copy_to_user(cpuid_arg, &cpuid, sizeof(cpuid)))
4460                         goto out;
4461                 r = 0;
4462                 break;
4463         }
4464         default:
4465                 r = -EINVAL;
4466         }
4467 out:
4468         kfree(u.buffer);
4469 out_nofree:
4470         vcpu_put(vcpu);
4471         return r;
4472 }
4473
4474 vm_fault_t kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
4475 {
4476         return VM_FAULT_SIGBUS;
4477 }
4478
4479 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
4480 {
4481         int ret;
4482
4483         if (addr > (unsigned int)(-3 * PAGE_SIZE))
4484                 return -EINVAL;
4485         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
4486         return ret;
4487 }
4488
4489 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
4490                                               u64 ident_addr)
4491 {
4492         return kvm_x86_ops->set_identity_map_addr(kvm, ident_addr);
4493 }
4494
4495 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
4496                                          unsigned long kvm_nr_mmu_pages)
4497 {
4498         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
4499                 return -EINVAL;
4500
4501         mutex_lock(&kvm->slots_lock);
4502
4503         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
4504         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
4505
4506         mutex_unlock(&kvm->slots_lock);
4507         return 0;
4508 }
4509
4510 static unsigned long kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
4511 {
4512         return kvm->arch.n_max_mmu_pages;
4513 }
4514
4515 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4516 {
4517         struct kvm_pic *pic = kvm->arch.vpic;
4518         int r;
4519
4520         r = 0;
4521         switch (chip->chip_id) {
4522         case KVM_IRQCHIP_PIC_MASTER:
4523                 memcpy(&chip->chip.pic, &pic->pics[0],
4524                         sizeof(struct kvm_pic_state));
4525                 break;
4526         case KVM_IRQCHIP_PIC_SLAVE:
4527                 memcpy(&chip->chip.pic, &pic->pics[1],
4528                         sizeof(struct kvm_pic_state));
4529                 break;
4530         case KVM_IRQCHIP_IOAPIC:
4531                 kvm_get_ioapic(kvm, &chip->chip.ioapic);
4532                 break;
4533         default:
4534                 r = -EINVAL;
4535                 break;
4536         }
4537         return r;
4538 }
4539
4540 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
4541 {
4542         struct kvm_pic *pic = kvm->arch.vpic;
4543         int r;
4544
4545         r = 0;
4546         switch (chip->chip_id) {
4547         case KVM_IRQCHIP_PIC_MASTER:
4548                 spin_lock(&pic->lock);
4549                 memcpy(&pic->pics[0], &chip->chip.pic,
4550                         sizeof(struct kvm_pic_state));
4551                 spin_unlock(&pic->lock);
4552                 break;
4553         case KVM_IRQCHIP_PIC_SLAVE:
4554                 spin_lock(&pic->lock);
4555                 memcpy(&pic->pics[1], &chip->chip.pic,
4556                         sizeof(struct kvm_pic_state));
4557                 spin_unlock(&pic->lock);
4558                 break;
4559         case KVM_IRQCHIP_IOAPIC:
4560                 kvm_set_ioapic(kvm, &chip->chip.ioapic);
4561                 break;
4562         default:
4563                 r = -EINVAL;
4564                 break;
4565         }
4566         kvm_pic_update_irq(pic);
4567         return r;
4568 }
4569
4570 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4571 {
4572         struct kvm_kpit_state *kps = &kvm->arch.vpit->pit_state;
4573
4574         BUILD_BUG_ON(sizeof(*ps) != sizeof(kps->channels));
4575
4576         mutex_lock(&kps->lock);
4577         memcpy(ps, &kps->channels, sizeof(*ps));
4578         mutex_unlock(&kps->lock);
4579         return 0;
4580 }
4581
4582 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
4583 {
4584         int i;
4585         struct kvm_pit *pit = kvm->arch.vpit;
4586
4587         mutex_lock(&pit->pit_state.lock);
4588         memcpy(&pit->pit_state.channels, ps, sizeof(*ps));
4589         for (i = 0; i < 3; i++)
4590                 kvm_pit_load_count(pit, i, ps->channels[i].count, 0);
4591         mutex_unlock(&pit->pit_state.lock);
4592         return 0;
4593 }
4594
4595 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4596 {
4597         mutex_lock(&kvm->arch.vpit->pit_state.lock);
4598         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
4599                 sizeof(ps->channels));
4600         ps->flags = kvm->arch.vpit->pit_state.flags;
4601         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
4602         memset(&ps->reserved, 0, sizeof(ps->reserved));
4603         return 0;
4604 }
4605
4606 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
4607 {
4608         int start = 0;
4609         int i;
4610         u32 prev_legacy, cur_legacy;
4611         struct kvm_pit *pit = kvm->arch.vpit;
4612
4613         mutex_lock(&pit->pit_state.lock);
4614         prev_legacy = pit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
4615         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
4616         if (!prev_legacy && cur_legacy)
4617                 start = 1;
4618         memcpy(&pit->pit_state.channels, &ps->channels,
4619                sizeof(pit->pit_state.channels));
4620         pit->pit_state.flags = ps->flags;
4621         for (i = 0; i < 3; i++)
4622                 kvm_pit_load_count(pit, i, pit->pit_state.channels[i].count,
4623                                    start && i == 0);
4624         mutex_unlock(&pit->pit_state.lock);
4625         return 0;
4626 }
4627
4628 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
4629                                  struct kvm_reinject_control *control)
4630 {
4631         struct kvm_pit *pit = kvm->arch.vpit;
4632
4633         if (!pit)
4634                 return -ENXIO;
4635
4636         /* pit->pit_state.lock was overloaded to prevent userspace from getting
4637          * an inconsistent state after running multiple KVM_REINJECT_CONTROL
4638          * ioctls in parallel.  Use a separate lock if that ioctl isn't rare.
4639          */
4640         mutex_lock(&pit->pit_state.lock);
4641         kvm_pit_set_reinject(pit, control->pit_reinject);
4642         mutex_unlock(&pit->pit_state.lock);
4643
4644         return 0;
4645 }
4646
4647 /**
4648  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
4649  * @kvm: kvm instance
4650  * @log: slot id and address to which we copy the log
4651  *
4652  * Steps 1-4 below provide general overview of dirty page logging. See
4653  * kvm_get_dirty_log_protect() function description for additional details.
4654  *
4655  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
4656  * always flush the TLB (step 4) even if previous step failed  and the dirty
4657  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
4658  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
4659  * writes will be marked dirty for next log read.
4660  *
4661  *   1. Take a snapshot of the bit and clear it if needed.
4662  *   2. Write protect the corresponding page.
4663  *   3. Copy the snapshot to the userspace.
4664  *   4. Flush TLB's if needed.
4665  */
4666 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
4667 {
4668         bool flush = false;
4669         int r;
4670
4671         mutex_lock(&kvm->slots_lock);
4672
4673         /*
4674          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4675          */
4676         if (kvm_x86_ops->flush_log_dirty)
4677                 kvm_x86_ops->flush_log_dirty(kvm);
4678
4679         r = kvm_get_dirty_log_protect(kvm, log, &flush);
4680
4681         /*
4682          * All the TLBs can be flushed out of mmu lock, see the comments in
4683          * kvm_mmu_slot_remove_write_access().
4684          */
4685         lockdep_assert_held(&kvm->slots_lock);
4686         if (flush)
4687                 kvm_flush_remote_tlbs(kvm);
4688
4689         mutex_unlock(&kvm->slots_lock);
4690         return r;
4691 }
4692
4693 int kvm_vm_ioctl_clear_dirty_log(struct kvm *kvm, struct kvm_clear_dirty_log *log)
4694 {
4695         bool flush = false;
4696         int r;
4697
4698         mutex_lock(&kvm->slots_lock);
4699
4700         /*
4701          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
4702          */
4703         if (kvm_x86_ops->flush_log_dirty)
4704                 kvm_x86_ops->flush_log_dirty(kvm);
4705
4706         r = kvm_clear_dirty_log_protect(kvm, log, &flush);
4707
4708         /*
4709          * All the TLBs can be flushed out of mmu lock, see the comments in
4710          * kvm_mmu_slot_remove_write_access().
4711          */
4712         lockdep_assert_held(&kvm->slots_lock);
4713         if (flush)
4714                 kvm_flush_remote_tlbs(kvm);
4715
4716         mutex_unlock(&kvm->slots_lock);
4717         return r;
4718 }
4719
4720 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
4721                         bool line_status)
4722 {
4723         if (!irqchip_in_kernel(kvm))
4724                 return -ENXIO;
4725
4726         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
4727                                         irq_event->irq, irq_event->level,
4728                                         line_status);
4729         return 0;
4730 }
4731
4732 int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
4733                             struct kvm_enable_cap *cap)
4734 {
4735         int r;
4736
4737         if (cap->flags)
4738                 return -EINVAL;
4739
4740         switch (cap->cap) {
4741         case KVM_CAP_DISABLE_QUIRKS:
4742                 kvm->arch.disabled_quirks = cap->args[0];
4743                 r = 0;
4744                 break;
4745         case KVM_CAP_SPLIT_IRQCHIP: {
4746                 mutex_lock(&kvm->lock);
4747                 r = -EINVAL;
4748                 if (cap->args[0] > MAX_NR_RESERVED_IOAPIC_PINS)
4749                         goto split_irqchip_unlock;
4750                 r = -EEXIST;
4751                 if (irqchip_in_kernel(kvm))
4752                         goto split_irqchip_unlock;
4753                 if (kvm->created_vcpus)
4754                         goto split_irqchip_unlock;
4755                 r = kvm_setup_empty_irq_routing(kvm);
4756                 if (r)
4757                         goto split_irqchip_unlock;
4758                 /* Pairs with irqchip_in_kernel. */
4759                 smp_wmb();
4760                 kvm->arch.irqchip_mode = KVM_IRQCHIP_SPLIT;
4761                 kvm->arch.nr_reserved_ioapic_pins = cap->args[0];
4762                 r = 0;
4763 split_irqchip_unlock:
4764                 mutex_unlock(&kvm->lock);
4765                 break;
4766         }
4767         case KVM_CAP_X2APIC_API:
4768                 r = -EINVAL;
4769                 if (cap->args[0] & ~KVM_X2APIC_API_VALID_FLAGS)
4770                         break;
4771
4772                 if (cap->args[0] & KVM_X2APIC_API_USE_32BIT_IDS)
4773                         kvm->arch.x2apic_format = true;
4774                 if (cap->args[0] & KVM_X2APIC_API_DISABLE_BROADCAST_QUIRK)
4775                         kvm->arch.x2apic_broadcast_quirk_disabled = true;
4776
4777                 r = 0;
4778                 break;
4779         case KVM_CAP_X86_DISABLE_EXITS:
4780                 r = -EINVAL;
4781                 if (cap->args[0] & ~KVM_X86_DISABLE_VALID_EXITS)
4782                         break;
4783
4784                 if ((cap->args[0] & KVM_X86_DISABLE_EXITS_MWAIT) &&
4785                         kvm_can_mwait_in_guest())
4786                         kvm->arch.mwait_in_guest = true;
4787                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_HLT)
4788                         kvm->arch.hlt_in_guest = true;
4789                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_PAUSE)
4790                         kvm->arch.pause_in_guest = true;
4791                 if (cap->args[0] & KVM_X86_DISABLE_EXITS_CSTATE)
4792                         kvm->arch.cstate_in_guest = true;
4793                 r = 0;
4794                 break;
4795         case KVM_CAP_MSR_PLATFORM_INFO:
4796                 kvm->arch.guest_can_read_msr_platform_info = cap->args[0];
4797                 r = 0;
4798                 break;
4799         case KVM_CAP_EXCEPTION_PAYLOAD:
4800                 kvm->arch.exception_payload_enabled = cap->args[0];
4801                 r = 0;
4802                 break;
4803         default:
4804                 r = -EINVAL;
4805                 break;
4806         }
4807         return r;
4808 }
4809
4810 long kvm_arch_vm_ioctl(struct file *filp,
4811                        unsigned int ioctl, unsigned long arg)
4812 {
4813         struct kvm *kvm = filp->private_data;
4814         void __user *argp = (void __user *)arg;
4815         int r = -ENOTTY;
4816         /*
4817          * This union makes it completely explicit to gcc-3.x
4818          * that these two variables' stack usage should be
4819          * combined, not added together.
4820          */
4821         union {
4822                 struct kvm_pit_state ps;
4823                 struct kvm_pit_state2 ps2;
4824                 struct kvm_pit_config pit_config;
4825         } u;
4826
4827         switch (ioctl) {
4828         case KVM_SET_TSS_ADDR:
4829                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
4830                 break;
4831         case KVM_SET_IDENTITY_MAP_ADDR: {
4832                 u64 ident_addr;
4833
4834                 mutex_lock(&kvm->lock);
4835                 r = -EINVAL;
4836                 if (kvm->created_vcpus)
4837                         goto set_identity_unlock;
4838                 r = -EFAULT;
4839                 if (copy_from_user(&ident_addr, argp, sizeof(ident_addr)))
4840                         goto set_identity_unlock;
4841                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
4842 set_identity_unlock:
4843                 mutex_unlock(&kvm->lock);
4844                 break;
4845         }
4846         case KVM_SET_NR_MMU_PAGES:
4847                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
4848                 break;
4849         case KVM_GET_NR_MMU_PAGES:
4850                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
4851                 break;
4852         case KVM_CREATE_IRQCHIP: {
4853                 mutex_lock(&kvm->lock);
4854
4855                 r = -EEXIST;
4856                 if (irqchip_in_kernel(kvm))
4857                         goto create_irqchip_unlock;
4858
4859                 r = -EINVAL;
4860                 if (kvm->created_vcpus)
4861                         goto create_irqchip_unlock;
4862
4863                 r = kvm_pic_init(kvm);
4864                 if (r)
4865                         goto create_irqchip_unlock;
4866
4867                 r = kvm_ioapic_init(kvm);
4868                 if (r) {
4869                         kvm_pic_destroy(kvm);
4870                         goto create_irqchip_unlock;
4871                 }
4872
4873                 r = kvm_setup_default_irq_routing(kvm);
4874                 if (r) {
4875                         kvm_ioapic_destroy(kvm);
4876                         kvm_pic_destroy(kvm);
4877                         goto create_irqchip_unlock;
4878                 }
4879                 /* Write kvm->irq_routing before enabling irqchip_in_kernel. */
4880                 smp_wmb();
4881                 kvm->arch.irqchip_mode = KVM_IRQCHIP_KERNEL;
4882         create_irqchip_unlock:
4883                 mutex_unlock(&kvm->lock);
4884                 break;
4885         }
4886         case KVM_CREATE_PIT:
4887                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
4888                 goto create_pit;
4889         case KVM_CREATE_PIT2:
4890                 r = -EFAULT;
4891                 if (copy_from_user(&u.pit_config, argp,
4892                                    sizeof(struct kvm_pit_config)))
4893                         goto out;
4894         create_pit:
4895                 mutex_lock(&kvm->lock);
4896                 r = -EEXIST;
4897                 if (kvm->arch.vpit)
4898                         goto create_pit_unlock;
4899                 r = -ENOMEM;
4900                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
4901                 if (kvm->arch.vpit)
4902                         r = 0;
4903         create_pit_unlock:
4904                 mutex_unlock(&kvm->lock);
4905                 break;
4906         case KVM_GET_IRQCHIP: {
4907                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4908                 struct kvm_irqchip *chip;
4909
4910                 chip = memdup_user(argp, sizeof(*chip));
4911                 if (IS_ERR(chip)) {
4912                         r = PTR_ERR(chip);
4913                         goto out;
4914                 }
4915
4916                 r = -ENXIO;
4917                 if (!irqchip_kernel(kvm))
4918                         goto get_irqchip_out;
4919                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
4920                 if (r)
4921                         goto get_irqchip_out;
4922                 r = -EFAULT;
4923                 if (copy_to_user(argp, chip, sizeof(*chip)))
4924                         goto get_irqchip_out;
4925                 r = 0;
4926         get_irqchip_out:
4927                 kfree(chip);
4928                 break;
4929         }
4930         case KVM_SET_IRQCHIP: {
4931                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
4932                 struct kvm_irqchip *chip;
4933
4934                 chip = memdup_user(argp, sizeof(*chip));
4935                 if (IS_ERR(chip)) {
4936                         r = PTR_ERR(chip);
4937                         goto out;
4938                 }
4939
4940                 r = -ENXIO;
4941                 if (!irqchip_kernel(kvm))
4942                         goto set_irqchip_out;
4943                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
4944                 if (r)
4945                         goto set_irqchip_out;
4946                 r = 0;
4947         set_irqchip_out:
4948                 kfree(chip);
4949                 break;
4950         }
4951         case KVM_GET_PIT: {
4952                 r = -EFAULT;
4953                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
4954                         goto out;
4955                 r = -ENXIO;
4956                 if (!kvm->arch.vpit)
4957                         goto out;
4958                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
4959                 if (r)
4960                         goto out;
4961                 r = -EFAULT;
4962                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
4963                         goto out;
4964                 r = 0;
4965                 break;
4966         }
4967         case KVM_SET_PIT: {
4968                 r = -EFAULT;
4969                 if (copy_from_user(&u.ps, argp, sizeof(u.ps)))
4970                         goto out;
4971                 r = -ENXIO;
4972                 if (!kvm->arch.vpit)
4973                         goto out;
4974                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
4975                 break;
4976         }
4977         case KVM_GET_PIT2: {
4978                 r = -ENXIO;
4979                 if (!kvm->arch.vpit)
4980                         goto out;
4981                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
4982                 if (r)
4983                         goto out;
4984                 r = -EFAULT;
4985                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
4986                         goto out;
4987                 r = 0;
4988                 break;
4989         }
4990         case KVM_SET_PIT2: {
4991                 r = -EFAULT;
4992                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
4993                         goto out;
4994                 r = -ENXIO;
4995                 if (!kvm->arch.vpit)
4996                         goto out;
4997                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
4998                 break;
4999         }
5000         case KVM_REINJECT_CONTROL: {
5001                 struct kvm_reinject_control control;
5002                 r =  -EFAULT;
5003                 if (copy_from_user(&control, argp, sizeof(control)))
5004                         goto out;
5005                 r = kvm_vm_ioctl_reinject(kvm, &control);
5006                 break;
5007         }
5008         case KVM_SET_BOOT_CPU_ID:
5009                 r = 0;
5010                 mutex_lock(&kvm->lock);
5011                 if (kvm->created_vcpus)
5012                         r = -EBUSY;
5013                 else
5014                         kvm->arch.bsp_vcpu_id = arg;
5015                 mutex_unlock(&kvm->lock);
5016                 break;
5017         case KVM_XEN_HVM_CONFIG: {
5018                 struct kvm_xen_hvm_config xhc;
5019                 r = -EFAULT;
5020                 if (copy_from_user(&xhc, argp, sizeof(xhc)))
5021                         goto out;
5022                 r = -EINVAL;
5023                 if (xhc.flags)
5024                         goto out;
5025                 memcpy(&kvm->arch.xen_hvm_config, &xhc, sizeof(xhc));
5026                 r = 0;
5027                 break;
5028         }
5029         case KVM_SET_CLOCK: {
5030                 struct kvm_clock_data user_ns;
5031                 u64 now_ns;
5032
5033                 r = -EFAULT;
5034                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
5035                         goto out;
5036
5037                 r = -EINVAL;
5038                 if (user_ns.flags)
5039                         goto out;
5040
5041                 r = 0;
5042                 /*
5043                  * TODO: userspace has to take care of races with VCPU_RUN, so
5044                  * kvm_gen_update_masterclock() can be cut down to locked
5045                  * pvclock_update_vm_gtod_copy().
5046                  */
5047                 kvm_gen_update_masterclock(kvm);
5048                 now_ns = get_kvmclock_ns(kvm);
5049                 kvm->arch.kvmclock_offset += user_ns.clock - now_ns;
5050                 kvm_make_all_cpus_request(kvm, KVM_REQ_CLOCK_UPDATE);
5051                 break;
5052         }
5053         case KVM_GET_CLOCK: {
5054                 struct kvm_clock_data user_ns;
5055                 u64 now_ns;
5056
5057                 now_ns = get_kvmclock_ns(kvm);
5058                 user_ns.clock = now_ns;
5059                 user_ns.flags = kvm->arch.use_master_clock ? KVM_CLOCK_TSC_STABLE : 0;
5060                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
5061
5062                 r = -EFAULT;
5063                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
5064                         goto out;
5065                 r = 0;
5066                 break;
5067         }
5068         case KVM_MEMORY_ENCRYPT_OP: {
5069                 r = -ENOTTY;
5070                 if (kvm_x86_ops->mem_enc_op)
5071                         r = kvm_x86_ops->mem_enc_op(kvm, argp);
5072                 break;
5073         }
5074         case KVM_MEMORY_ENCRYPT_REG_REGION: {
5075                 struct kvm_enc_region region;
5076
5077                 r = -EFAULT;
5078                 if (copy_from_user(&region, argp, sizeof(region)))
5079                         goto out;
5080
5081                 r = -ENOTTY;
5082                 if (kvm_x86_ops->mem_enc_reg_region)
5083                         r = kvm_x86_ops->mem_enc_reg_region(kvm, &region);
5084                 break;
5085         }
5086         case KVM_MEMORY_ENCRYPT_UNREG_REGION: {
5087                 struct kvm_enc_region region;
5088
5089                 r = -EFAULT;
5090                 if (copy_from_user(&region, argp, sizeof(region)))
5091                         goto out;
5092
5093                 r = -ENOTTY;
5094                 if (kvm_x86_ops->mem_enc_unreg_region)
5095                         r = kvm_x86_ops->mem_enc_unreg_region(kvm, &region);
5096                 break;
5097         }
5098         case KVM_HYPERV_EVENTFD: {
5099                 struct kvm_hyperv_eventfd hvevfd;
5100
5101                 r = -EFAULT;
5102                 if (copy_from_user(&hvevfd, argp, sizeof(hvevfd)))
5103                         goto out;
5104                 r = kvm_vm_ioctl_hv_eventfd(kvm, &hvevfd);
5105                 break;
5106         }
5107         case KVM_SET_PMU_EVENT_FILTER:
5108                 r = kvm_vm_ioctl_set_pmu_event_filter(kvm, argp);
5109                 break;
5110         default:
5111                 r = -ENOTTY;
5112         }
5113 out:
5114         return r;
5115 }
5116
5117 static void kvm_init_msr_list(void)
5118 {
5119         struct x86_pmu_capability x86_pmu;
5120         u32 dummy[2];
5121         unsigned i, j;
5122
5123         BUILD_BUG_ON_MSG(INTEL_PMC_MAX_FIXED != 4,
5124                          "Please update the fixed PMCs in msrs_to_save[]");
5125
5126         perf_get_x86_pmu_capability(&x86_pmu);
5127
5128         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
5129                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
5130                         continue;
5131
5132                 /*
5133                  * Even MSRs that are valid in the host may not be exposed
5134                  * to the guests in some cases.
5135                  */
5136                 switch (msrs_to_save[i]) {
5137                 case MSR_IA32_BNDCFGS:
5138                         if (!kvm_mpx_supported())
5139                                 continue;
5140                         break;
5141                 case MSR_TSC_AUX:
5142                         if (!kvm_x86_ops->rdtscp_supported())
5143                                 continue;
5144                         break;
5145                 case MSR_IA32_RTIT_CTL:
5146                 case MSR_IA32_RTIT_STATUS:
5147                         if (!kvm_x86_ops->pt_supported())
5148                                 continue;
5149                         break;
5150                 case MSR_IA32_RTIT_CR3_MATCH:
5151                         if (!kvm_x86_ops->pt_supported() ||
5152                             !intel_pt_validate_hw_cap(PT_CAP_cr3_filtering))
5153                                 continue;
5154                         break;
5155                 case MSR_IA32_RTIT_OUTPUT_BASE:
5156                 case MSR_IA32_RTIT_OUTPUT_MASK:
5157                         if (!kvm_x86_ops->pt_supported() ||
5158                                 (!intel_pt_validate_hw_cap(PT_CAP_topa_output) &&
5159                                  !intel_pt_validate_hw_cap(PT_CAP_single_range_output)))
5160                                 continue;
5161                         break;
5162                 case MSR_IA32_RTIT_ADDR0_A ... MSR_IA32_RTIT_ADDR3_B: {
5163                         if (!kvm_x86_ops->pt_supported() ||
5164                                 msrs_to_save[i] - MSR_IA32_RTIT_ADDR0_A >=
5165                                 intel_pt_validate_hw_cap(PT_CAP_num_address_ranges) * 2)
5166                                 continue;
5167                         break;
5168                 case MSR_ARCH_PERFMON_PERFCTR0 ... MSR_ARCH_PERFMON_PERFCTR0 + 17:
5169                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_PERFCTR0 >=
5170                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5171                                 continue;
5172                         break;
5173                 case MSR_ARCH_PERFMON_EVENTSEL0 ... MSR_ARCH_PERFMON_EVENTSEL0 + 17:
5174                         if (msrs_to_save[i] - MSR_ARCH_PERFMON_EVENTSEL0 >=
5175                             min(INTEL_PMC_MAX_GENERIC, x86_pmu.num_counters_gp))
5176                                 continue;
5177                 }
5178                 default:
5179                         break;
5180                 }
5181
5182                 if (j < i)
5183                         msrs_to_save[j] = msrs_to_save[i];
5184                 j++;
5185         }
5186         num_msrs_to_save = j;
5187
5188         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
5189                 if (!kvm_x86_ops->has_emulated_msr(emulated_msrs[i]))
5190                         continue;
5191
5192                 if (j < i)
5193                         emulated_msrs[j] = emulated_msrs[i];
5194                 j++;
5195         }
5196         num_emulated_msrs = j;
5197
5198         for (i = j = 0; i < ARRAY_SIZE(msr_based_features); i++) {
5199                 struct kvm_msr_entry msr;
5200
5201                 msr.index = msr_based_features[i];
5202                 if (kvm_get_msr_feature(&msr))
5203                         continue;
5204
5205                 if (j < i)
5206                         msr_based_features[j] = msr_based_features[i];
5207                 j++;
5208         }
5209         num_msr_based_features = j;
5210 }
5211
5212 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
5213                            const void *v)
5214 {
5215         int handled = 0;
5216         int n;
5217
5218         do {
5219                 n = min(len, 8);
5220                 if (!(lapic_in_kernel(vcpu) &&
5221                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
5222                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
5223                         break;
5224                 handled += n;
5225                 addr += n;
5226                 len -= n;
5227                 v += n;
5228         } while (len);
5229
5230         return handled;
5231 }
5232
5233 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
5234 {
5235         int handled = 0;
5236         int n;
5237
5238         do {
5239                 n = min(len, 8);
5240                 if (!(lapic_in_kernel(vcpu) &&
5241                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
5242                                          addr, n, v))
5243                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
5244                         break;
5245                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, v);
5246                 handled += n;
5247                 addr += n;
5248                 len -= n;
5249                 v += n;
5250         } while (len);
5251
5252         return handled;
5253 }
5254
5255 static void kvm_set_segment(struct kvm_vcpu *vcpu,
5256                         struct kvm_segment *var, int seg)
5257 {
5258         kvm_x86_ops->set_segment(vcpu, var, seg);
5259 }
5260
5261 void kvm_get_segment(struct kvm_vcpu *vcpu,
5262                      struct kvm_segment *var, int seg)
5263 {
5264         kvm_x86_ops->get_segment(vcpu, var, seg);
5265 }
5266
5267 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
5268                            struct x86_exception *exception)
5269 {
5270         gpa_t t_gpa;
5271
5272         BUG_ON(!mmu_is_nested(vcpu));
5273
5274         /* NPT walks are always user-walks */
5275         access |= PFERR_USER_MASK;
5276         t_gpa  = vcpu->arch.mmu->gva_to_gpa(vcpu, gpa, access, exception);
5277
5278         return t_gpa;
5279 }
5280
5281 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
5282                               struct x86_exception *exception)
5283 {
5284         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5285         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5286 }
5287
5288  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
5289                                 struct x86_exception *exception)
5290 {
5291         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5292         access |= PFERR_FETCH_MASK;
5293         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5294 }
5295
5296 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
5297                                struct x86_exception *exception)
5298 {
5299         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5300         access |= PFERR_WRITE_MASK;
5301         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5302 }
5303
5304 /* uses this to access any guest's mapped memory without checking CPL */
5305 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
5306                                 struct x86_exception *exception)
5307 {
5308         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
5309 }
5310
5311 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5312                                       struct kvm_vcpu *vcpu, u32 access,
5313                                       struct x86_exception *exception)
5314 {
5315         void *data = val;
5316         int r = X86EMUL_CONTINUE;
5317
5318         while (bytes) {
5319                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
5320                                                             exception);
5321                 unsigned offset = addr & (PAGE_SIZE-1);
5322                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
5323                 int ret;
5324
5325                 if (gpa == UNMAPPED_GVA)
5326                         return X86EMUL_PROPAGATE_FAULT;
5327                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
5328                                                offset, toread);
5329                 if (ret < 0) {
5330                         r = X86EMUL_IO_NEEDED;
5331                         goto out;
5332                 }
5333
5334                 bytes -= toread;
5335                 data += toread;
5336                 addr += toread;
5337         }
5338 out:
5339         return r;
5340 }
5341
5342 /* used for instruction fetching */
5343 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
5344                                 gva_t addr, void *val, unsigned int bytes,
5345                                 struct x86_exception *exception)
5346 {
5347         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5348         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5349         unsigned offset;
5350         int ret;
5351
5352         /* Inline kvm_read_guest_virt_helper for speed.  */
5353         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
5354                                                     exception);
5355         if (unlikely(gpa == UNMAPPED_GVA))
5356                 return X86EMUL_PROPAGATE_FAULT;
5357
5358         offset = addr & (PAGE_SIZE-1);
5359         if (WARN_ON(offset + bytes > PAGE_SIZE))
5360                 bytes = (unsigned)PAGE_SIZE - offset;
5361         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
5362                                        offset, bytes);
5363         if (unlikely(ret < 0))
5364                 return X86EMUL_IO_NEEDED;
5365
5366         return X86EMUL_CONTINUE;
5367 }
5368
5369 int kvm_read_guest_virt(struct kvm_vcpu *vcpu,
5370                                gva_t addr, void *val, unsigned int bytes,
5371                                struct x86_exception *exception)
5372 {
5373         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
5374
5375         /*
5376          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5377          * is returned, but our callers are not ready for that and they blindly
5378          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5379          * uninitialized kernel stack memory into cr2 and error code.
5380          */
5381         memset(exception, 0, sizeof(*exception));
5382         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
5383                                           exception);
5384 }
5385 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
5386
5387 static int emulator_read_std(struct x86_emulate_ctxt *ctxt,
5388                              gva_t addr, void *val, unsigned int bytes,
5389                              struct x86_exception *exception, bool system)
5390 {
5391         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5392         u32 access = 0;
5393
5394         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5395                 access |= PFERR_USER_MASK;
5396
5397         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access, exception);
5398 }
5399
5400 static int kvm_read_guest_phys_system(struct x86_emulate_ctxt *ctxt,
5401                 unsigned long addr, void *val, unsigned int bytes)
5402 {
5403         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5404         int r = kvm_vcpu_read_guest(vcpu, addr, val, bytes);
5405
5406         return r < 0 ? X86EMUL_IO_NEEDED : X86EMUL_CONTINUE;
5407 }
5408
5409 static int kvm_write_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
5410                                       struct kvm_vcpu *vcpu, u32 access,
5411                                       struct x86_exception *exception)
5412 {
5413         void *data = val;
5414         int r = X86EMUL_CONTINUE;
5415
5416         while (bytes) {
5417                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
5418                                                              access,
5419                                                              exception);
5420                 unsigned offset = addr & (PAGE_SIZE-1);
5421                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
5422                 int ret;
5423
5424                 if (gpa == UNMAPPED_GVA)
5425                         return X86EMUL_PROPAGATE_FAULT;
5426                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
5427                 if (ret < 0) {
5428                         r = X86EMUL_IO_NEEDED;
5429                         goto out;
5430                 }
5431
5432                 bytes -= towrite;
5433                 data += towrite;
5434                 addr += towrite;
5435         }
5436 out:
5437         return r;
5438 }
5439
5440 static int emulator_write_std(struct x86_emulate_ctxt *ctxt, gva_t addr, void *val,
5441                               unsigned int bytes, struct x86_exception *exception,
5442                               bool system)
5443 {
5444         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5445         u32 access = PFERR_WRITE_MASK;
5446
5447         if (!system && kvm_x86_ops->get_cpl(vcpu) == 3)
5448                 access |= PFERR_USER_MASK;
5449
5450         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5451                                            access, exception);
5452 }
5453
5454 int kvm_write_guest_virt_system(struct kvm_vcpu *vcpu, gva_t addr, void *val,
5455                                 unsigned int bytes, struct x86_exception *exception)
5456 {
5457         /* kvm_write_guest_virt_system can pull in tons of pages. */
5458         vcpu->arch.l1tf_flush_l1d = true;
5459
5460         /*
5461          * FIXME: this should call handle_emulation_failure if X86EMUL_IO_NEEDED
5462          * is returned, but our callers are not ready for that and they blindly
5463          * call kvm_inject_page_fault.  Ensure that they at least do not leak
5464          * uninitialized kernel stack memory into cr2 and error code.
5465          */
5466         memset(exception, 0, sizeof(*exception));
5467         return kvm_write_guest_virt_helper(addr, val, bytes, vcpu,
5468                                            PFERR_WRITE_MASK, exception);
5469 }
5470 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
5471
5472 int handle_ud(struct kvm_vcpu *vcpu)
5473 {
5474         int emul_type = EMULTYPE_TRAP_UD;
5475         char sig[5]; /* ud2; .ascii "kvm" */
5476         struct x86_exception e;
5477
5478         if (force_emulation_prefix &&
5479             kvm_read_guest_virt(vcpu, kvm_get_linear_rip(vcpu),
5480                                 sig, sizeof(sig), &e) == 0 &&
5481             memcmp(sig, "\xf\xbkvm", sizeof(sig)) == 0) {
5482                 kvm_rip_write(vcpu, kvm_rip_read(vcpu) + sizeof(sig));
5483                 emul_type = EMULTYPE_TRAP_UD_FORCED;
5484         }
5485
5486         return kvm_emulate_instruction(vcpu, emul_type);
5487 }
5488 EXPORT_SYMBOL_GPL(handle_ud);
5489
5490 static int vcpu_is_mmio_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5491                             gpa_t gpa, bool write)
5492 {
5493         /* For APIC access vmexit */
5494         if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5495                 return 1;
5496
5497         if (vcpu_match_mmio_gpa(vcpu, gpa)) {
5498                 trace_vcpu_match_mmio(gva, gpa, write, true);
5499                 return 1;
5500         }
5501
5502         return 0;
5503 }
5504
5505 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
5506                                 gpa_t *gpa, struct x86_exception *exception,
5507                                 bool write)
5508 {
5509         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
5510                 | (write ? PFERR_WRITE_MASK : 0);
5511
5512         /*
5513          * currently PKRU is only applied to ept enabled guest so
5514          * there is no pkey in EPT page table for L1 guest or EPT
5515          * shadow page table for L2 guest.
5516          */
5517         if (vcpu_match_mmio_gva(vcpu, gva)
5518             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
5519                                  vcpu->arch.mmio_access, 0, access)) {
5520                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
5521                                         (gva & (PAGE_SIZE - 1));
5522                 trace_vcpu_match_mmio(gva, *gpa, write, false);
5523                 return 1;
5524         }
5525
5526         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
5527
5528         if (*gpa == UNMAPPED_GVA)
5529                 return -1;
5530
5531         return vcpu_is_mmio_gpa(vcpu, gva, *gpa, write);
5532 }
5533
5534 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
5535                         const void *val, int bytes)
5536 {
5537         int ret;
5538
5539         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
5540         if (ret < 0)
5541                 return 0;
5542         kvm_page_track_write(vcpu, gpa, val, bytes);
5543         return 1;
5544 }
5545
5546 struct read_write_emulator_ops {
5547         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
5548                                   int bytes);
5549         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
5550                                   void *val, int bytes);
5551         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5552                                int bytes, void *val);
5553         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
5554                                     void *val, int bytes);
5555         bool write;
5556 };
5557
5558 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
5559 {
5560         if (vcpu->mmio_read_completed) {
5561                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
5562                                vcpu->mmio_fragments[0].gpa, val);
5563                 vcpu->mmio_read_completed = 0;
5564                 return 1;
5565         }
5566
5567         return 0;
5568 }
5569
5570 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5571                         void *val, int bytes)
5572 {
5573         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
5574 }
5575
5576 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
5577                          void *val, int bytes)
5578 {
5579         return emulator_write_phys(vcpu, gpa, val, bytes);
5580 }
5581
5582 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
5583 {
5584         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, val);
5585         return vcpu_mmio_write(vcpu, gpa, bytes, val);
5586 }
5587
5588 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5589                           void *val, int bytes)
5590 {
5591         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, NULL);
5592         return X86EMUL_IO_NEEDED;
5593 }
5594
5595 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
5596                            void *val, int bytes)
5597 {
5598         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
5599
5600         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
5601         return X86EMUL_CONTINUE;
5602 }
5603
5604 static const struct read_write_emulator_ops read_emultor = {
5605         .read_write_prepare = read_prepare,
5606         .read_write_emulate = read_emulate,
5607         .read_write_mmio = vcpu_mmio_read,
5608         .read_write_exit_mmio = read_exit_mmio,
5609 };
5610
5611 static const struct read_write_emulator_ops write_emultor = {
5612         .read_write_emulate = write_emulate,
5613         .read_write_mmio = write_mmio,
5614         .read_write_exit_mmio = write_exit_mmio,
5615         .write = true,
5616 };
5617
5618 static int emulator_read_write_onepage(unsigned long addr, void *val,
5619                                        unsigned int bytes,
5620                                        struct x86_exception *exception,
5621                                        struct kvm_vcpu *vcpu,
5622                                        const struct read_write_emulator_ops *ops)
5623 {
5624         gpa_t gpa;
5625         int handled, ret;
5626         bool write = ops->write;
5627         struct kvm_mmio_fragment *frag;
5628         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5629
5630         /*
5631          * If the exit was due to a NPF we may already have a GPA.
5632          * If the GPA is present, use it to avoid the GVA to GPA table walk.
5633          * Note, this cannot be used on string operations since string
5634          * operation using rep will only have the initial GPA from the NPF
5635          * occurred.
5636          */
5637         if (vcpu->arch.gpa_available &&
5638             emulator_can_use_gpa(ctxt) &&
5639             (addr & ~PAGE_MASK) == (vcpu->arch.gpa_val & ~PAGE_MASK)) {
5640                 gpa = vcpu->arch.gpa_val;
5641                 ret = vcpu_is_mmio_gpa(vcpu, addr, gpa, write);
5642         } else {
5643                 ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
5644                 if (ret < 0)
5645                         return X86EMUL_PROPAGATE_FAULT;
5646         }
5647
5648         if (!ret && ops->read_write_emulate(vcpu, gpa, val, bytes))
5649                 return X86EMUL_CONTINUE;
5650
5651         /*
5652          * Is this MMIO handled locally?
5653          */
5654         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
5655         if (handled == bytes)
5656                 return X86EMUL_CONTINUE;
5657
5658         gpa += handled;
5659         bytes -= handled;
5660         val += handled;
5661
5662         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
5663         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
5664         frag->gpa = gpa;
5665         frag->data = val;
5666         frag->len = bytes;
5667         return X86EMUL_CONTINUE;
5668 }
5669
5670 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
5671                         unsigned long addr,
5672                         void *val, unsigned int bytes,
5673                         struct x86_exception *exception,
5674                         const struct read_write_emulator_ops *ops)
5675 {
5676         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5677         gpa_t gpa;
5678         int rc;
5679
5680         if (ops->read_write_prepare &&
5681                   ops->read_write_prepare(vcpu, val, bytes))
5682                 return X86EMUL_CONTINUE;
5683
5684         vcpu->mmio_nr_fragments = 0;
5685
5686         /* Crossing a page boundary? */
5687         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
5688                 int now;
5689
5690                 now = -addr & ~PAGE_MASK;
5691                 rc = emulator_read_write_onepage(addr, val, now, exception,
5692                                                  vcpu, ops);
5693
5694                 if (rc != X86EMUL_CONTINUE)
5695                         return rc;
5696                 addr += now;
5697                 if (ctxt->mode != X86EMUL_MODE_PROT64)
5698                         addr = (u32)addr;
5699                 val += now;
5700                 bytes -= now;
5701         }
5702
5703         rc = emulator_read_write_onepage(addr, val, bytes, exception,
5704                                          vcpu, ops);
5705         if (rc != X86EMUL_CONTINUE)
5706                 return rc;
5707
5708         if (!vcpu->mmio_nr_fragments)
5709                 return rc;
5710
5711         gpa = vcpu->mmio_fragments[0].gpa;
5712
5713         vcpu->mmio_needed = 1;
5714         vcpu->mmio_cur_fragment = 0;
5715
5716         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
5717         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
5718         vcpu->run->exit_reason = KVM_EXIT_MMIO;
5719         vcpu->run->mmio.phys_addr = gpa;
5720
5721         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
5722 }
5723
5724 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
5725                                   unsigned long addr,
5726                                   void *val,
5727                                   unsigned int bytes,
5728                                   struct x86_exception *exception)
5729 {
5730         return emulator_read_write(ctxt, addr, val, bytes,
5731                                    exception, &read_emultor);
5732 }
5733
5734 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
5735                             unsigned long addr,
5736                             const void *val,
5737                             unsigned int bytes,
5738                             struct x86_exception *exception)
5739 {
5740         return emulator_read_write(ctxt, addr, (void *)val, bytes,
5741                                    exception, &write_emultor);
5742 }
5743
5744 #define CMPXCHG_TYPE(t, ptr, old, new) \
5745         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
5746
5747 #ifdef CONFIG_X86_64
5748 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
5749 #else
5750 #  define CMPXCHG64(ptr, old, new) \
5751         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
5752 #endif
5753
5754 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
5755                                      unsigned long addr,
5756                                      const void *old,
5757                                      const void *new,
5758                                      unsigned int bytes,
5759                                      struct x86_exception *exception)
5760 {
5761         struct kvm_host_map map;
5762         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5763         gpa_t gpa;
5764         char *kaddr;
5765         bool exchanged;
5766
5767         /* guests cmpxchg8b have to be emulated atomically */
5768         if (bytes > 8 || (bytes & (bytes - 1)))
5769                 goto emul_write;
5770
5771         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
5772
5773         if (gpa == UNMAPPED_GVA ||
5774             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
5775                 goto emul_write;
5776
5777         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
5778                 goto emul_write;
5779
5780         if (kvm_vcpu_map(vcpu, gpa_to_gfn(gpa), &map))
5781                 goto emul_write;
5782
5783         kaddr = map.hva + offset_in_page(gpa);
5784
5785         switch (bytes) {
5786         case 1:
5787                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
5788                 break;
5789         case 2:
5790                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
5791                 break;
5792         case 4:
5793                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
5794                 break;
5795         case 8:
5796                 exchanged = CMPXCHG64(kaddr, old, new);
5797                 break;
5798         default:
5799                 BUG();
5800         }
5801
5802         kvm_vcpu_unmap(vcpu, &map, true);
5803
5804         if (!exchanged)
5805                 return X86EMUL_CMPXCHG_FAILED;
5806
5807         kvm_page_track_write(vcpu, gpa, new, bytes);
5808
5809         return X86EMUL_CONTINUE;
5810
5811 emul_write:
5812         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
5813
5814         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
5815 }
5816
5817 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
5818 {
5819         int r = 0, i;
5820
5821         for (i = 0; i < vcpu->arch.pio.count; i++) {
5822                 if (vcpu->arch.pio.in)
5823                         r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
5824                                             vcpu->arch.pio.size, pd);
5825                 else
5826                         r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
5827                                              vcpu->arch.pio.port, vcpu->arch.pio.size,
5828                                              pd);
5829                 if (r)
5830                         break;
5831                 pd += vcpu->arch.pio.size;
5832         }
5833         return r;
5834 }
5835
5836 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
5837                                unsigned short port, void *val,
5838                                unsigned int count, bool in)
5839 {
5840         vcpu->arch.pio.port = port;
5841         vcpu->arch.pio.in = in;
5842         vcpu->arch.pio.count  = count;
5843         vcpu->arch.pio.size = size;
5844
5845         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
5846                 vcpu->arch.pio.count = 0;
5847                 return 1;
5848         }
5849
5850         vcpu->run->exit_reason = KVM_EXIT_IO;
5851         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
5852         vcpu->run->io.size = size;
5853         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
5854         vcpu->run->io.count = count;
5855         vcpu->run->io.port = port;
5856
5857         return 0;
5858 }
5859
5860 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
5861                                     int size, unsigned short port, void *val,
5862                                     unsigned int count)
5863 {
5864         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5865         int ret;
5866
5867         if (vcpu->arch.pio.count)
5868                 goto data_avail;
5869
5870         memset(vcpu->arch.pio_data, 0, size * count);
5871
5872         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
5873         if (ret) {
5874 data_avail:
5875                 memcpy(val, vcpu->arch.pio_data, size * count);
5876                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
5877                 vcpu->arch.pio.count = 0;
5878                 return 1;
5879         }
5880
5881         return 0;
5882 }
5883
5884 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
5885                                      int size, unsigned short port,
5886                                      const void *val, unsigned int count)
5887 {
5888         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5889
5890         memcpy(vcpu->arch.pio_data, val, size * count);
5891         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
5892         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
5893 }
5894
5895 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
5896 {
5897         return kvm_x86_ops->get_segment_base(vcpu, seg);
5898 }
5899
5900 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
5901 {
5902         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
5903 }
5904
5905 static int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
5906 {
5907         if (!need_emulate_wbinvd(vcpu))
5908                 return X86EMUL_CONTINUE;
5909
5910         if (kvm_x86_ops->has_wbinvd_exit()) {
5911                 int cpu = get_cpu();
5912
5913                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
5914                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
5915                                 wbinvd_ipi, NULL, 1);
5916                 put_cpu();
5917                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
5918         } else
5919                 wbinvd();
5920         return X86EMUL_CONTINUE;
5921 }
5922
5923 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
5924 {
5925         kvm_emulate_wbinvd_noskip(vcpu);
5926         return kvm_skip_emulated_instruction(vcpu);
5927 }
5928 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
5929
5930
5931
5932 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
5933 {
5934         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
5935 }
5936
5937 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
5938                            unsigned long *dest)
5939 {
5940         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
5941 }
5942
5943 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
5944                            unsigned long value)
5945 {
5946
5947         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
5948 }
5949
5950 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
5951 {
5952         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
5953 }
5954
5955 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
5956 {
5957         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5958         unsigned long value;
5959
5960         switch (cr) {
5961         case 0:
5962                 value = kvm_read_cr0(vcpu);
5963                 break;
5964         case 2:
5965                 value = vcpu->arch.cr2;
5966                 break;
5967         case 3:
5968                 value = kvm_read_cr3(vcpu);
5969                 break;
5970         case 4:
5971                 value = kvm_read_cr4(vcpu);
5972                 break;
5973         case 8:
5974                 value = kvm_get_cr8(vcpu);
5975                 break;
5976         default:
5977                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
5978                 return 0;
5979         }
5980
5981         return value;
5982 }
5983
5984 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
5985 {
5986         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5987         int res = 0;
5988
5989         switch (cr) {
5990         case 0:
5991                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
5992                 break;
5993         case 2:
5994                 vcpu->arch.cr2 = val;
5995                 break;
5996         case 3:
5997                 res = kvm_set_cr3(vcpu, val);
5998                 break;
5999         case 4:
6000                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
6001                 break;
6002         case 8:
6003                 res = kvm_set_cr8(vcpu, val);
6004                 break;
6005         default:
6006                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
6007                 res = -1;
6008         }
6009
6010         return res;
6011 }
6012
6013 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
6014 {
6015         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
6016 }
6017
6018 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6019 {
6020         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
6021 }
6022
6023 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6024 {
6025         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
6026 }
6027
6028 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6029 {
6030         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
6031 }
6032
6033 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
6034 {
6035         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
6036 }
6037
6038 static unsigned long emulator_get_cached_segment_base(
6039         struct x86_emulate_ctxt *ctxt, int seg)
6040 {
6041         return get_segment_base(emul_to_vcpu(ctxt), seg);
6042 }
6043
6044 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
6045                                  struct desc_struct *desc, u32 *base3,
6046                                  int seg)
6047 {
6048         struct kvm_segment var;
6049
6050         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
6051         *selector = var.selector;
6052
6053         if (var.unusable) {
6054                 memset(desc, 0, sizeof(*desc));
6055                 if (base3)
6056                         *base3 = 0;
6057                 return false;
6058         }
6059
6060         if (var.g)
6061                 var.limit >>= 12;
6062         set_desc_limit(desc, var.limit);
6063         set_desc_base(desc, (unsigned long)var.base);
6064 #ifdef CONFIG_X86_64
6065         if (base3)
6066                 *base3 = var.base >> 32;
6067 #endif
6068         desc->type = var.type;
6069         desc->s = var.s;
6070         desc->dpl = var.dpl;
6071         desc->p = var.present;
6072         desc->avl = var.avl;
6073         desc->l = var.l;
6074         desc->d = var.db;
6075         desc->g = var.g;
6076
6077         return true;
6078 }
6079
6080 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
6081                                  struct desc_struct *desc, u32 base3,
6082                                  int seg)
6083 {
6084         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6085         struct kvm_segment var;
6086
6087         var.selector = selector;
6088         var.base = get_desc_base(desc);
6089 #ifdef CONFIG_X86_64
6090         var.base |= ((u64)base3) << 32;
6091 #endif
6092         var.limit = get_desc_limit(desc);
6093         if (desc->g)
6094                 var.limit = (var.limit << 12) | 0xfff;
6095         var.type = desc->type;
6096         var.dpl = desc->dpl;
6097         var.db = desc->d;
6098         var.s = desc->s;
6099         var.l = desc->l;
6100         var.g = desc->g;
6101         var.avl = desc->avl;
6102         var.present = desc->p;
6103         var.unusable = !var.present;
6104         var.padding = 0;
6105
6106         kvm_set_segment(vcpu, &var, seg);
6107         return;
6108 }
6109
6110 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
6111                             u32 msr_index, u64 *pdata)
6112 {
6113         return kvm_get_msr(emul_to_vcpu(ctxt), msr_index, pdata);
6114 }
6115
6116 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
6117                             u32 msr_index, u64 data)
6118 {
6119         return kvm_set_msr(emul_to_vcpu(ctxt), msr_index, data);
6120 }
6121
6122 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
6123 {
6124         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6125
6126         return vcpu->arch.smbase;
6127 }
6128
6129 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
6130 {
6131         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6132
6133         vcpu->arch.smbase = smbase;
6134 }
6135
6136 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
6137                               u32 pmc)
6138 {
6139         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
6140 }
6141
6142 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
6143                              u32 pmc, u64 *pdata)
6144 {
6145         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
6146 }
6147
6148 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
6149 {
6150         emul_to_vcpu(ctxt)->arch.halt_request = 1;
6151 }
6152
6153 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
6154                               struct x86_instruction_info *info,
6155                               enum x86_intercept_stage stage)
6156 {
6157         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
6158 }
6159
6160 static bool emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
6161                         u32 *eax, u32 *ebx, u32 *ecx, u32 *edx, bool check_limit)
6162 {
6163         return kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx, check_limit);
6164 }
6165
6166 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
6167 {
6168         return kvm_register_read(emul_to_vcpu(ctxt), reg);
6169 }
6170
6171 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
6172 {
6173         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
6174 }
6175
6176 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
6177 {
6178         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
6179 }
6180
6181 static unsigned emulator_get_hflags(struct x86_emulate_ctxt *ctxt)
6182 {
6183         return emul_to_vcpu(ctxt)->arch.hflags;
6184 }
6185
6186 static void emulator_set_hflags(struct x86_emulate_ctxt *ctxt, unsigned emul_flags)
6187 {
6188         emul_to_vcpu(ctxt)->arch.hflags = emul_flags;
6189 }
6190
6191 static int emulator_pre_leave_smm(struct x86_emulate_ctxt *ctxt,
6192                                   const char *smstate)
6193 {
6194         return kvm_x86_ops->pre_leave_smm(emul_to_vcpu(ctxt), smstate);
6195 }
6196
6197 static void emulator_post_leave_smm(struct x86_emulate_ctxt *ctxt)
6198 {
6199         kvm_smm_changed(emul_to_vcpu(ctxt));
6200 }
6201
6202 static int emulator_set_xcr(struct x86_emulate_ctxt *ctxt, u32 index, u64 xcr)
6203 {
6204         return __kvm_set_xcr(emul_to_vcpu(ctxt), index, xcr);
6205 }
6206
6207 static const struct x86_emulate_ops emulate_ops = {
6208         .read_gpr            = emulator_read_gpr,
6209         .write_gpr           = emulator_write_gpr,
6210         .read_std            = emulator_read_std,
6211         .write_std           = emulator_write_std,
6212         .read_phys           = kvm_read_guest_phys_system,
6213         .fetch               = kvm_fetch_guest_virt,
6214         .read_emulated       = emulator_read_emulated,
6215         .write_emulated      = emulator_write_emulated,
6216         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
6217         .invlpg              = emulator_invlpg,
6218         .pio_in_emulated     = emulator_pio_in_emulated,
6219         .pio_out_emulated    = emulator_pio_out_emulated,
6220         .get_segment         = emulator_get_segment,
6221         .set_segment         = emulator_set_segment,
6222         .get_cached_segment_base = emulator_get_cached_segment_base,
6223         .get_gdt             = emulator_get_gdt,
6224         .get_idt             = emulator_get_idt,
6225         .set_gdt             = emulator_set_gdt,
6226         .set_idt             = emulator_set_idt,
6227         .get_cr              = emulator_get_cr,
6228         .set_cr              = emulator_set_cr,
6229         .cpl                 = emulator_get_cpl,
6230         .get_dr              = emulator_get_dr,
6231         .set_dr              = emulator_set_dr,
6232         .get_smbase          = emulator_get_smbase,
6233         .set_smbase          = emulator_set_smbase,
6234         .set_msr             = emulator_set_msr,
6235         .get_msr             = emulator_get_msr,
6236         .check_pmc           = emulator_check_pmc,
6237         .read_pmc            = emulator_read_pmc,
6238         .halt                = emulator_halt,
6239         .wbinvd              = emulator_wbinvd,
6240         .fix_hypercall       = emulator_fix_hypercall,
6241         .intercept           = emulator_intercept,
6242         .get_cpuid           = emulator_get_cpuid,
6243         .set_nmi_mask        = emulator_set_nmi_mask,
6244         .get_hflags          = emulator_get_hflags,
6245         .set_hflags          = emulator_set_hflags,
6246         .pre_leave_smm       = emulator_pre_leave_smm,
6247         .post_leave_smm      = emulator_post_leave_smm,
6248         .set_xcr             = emulator_set_xcr,
6249 };
6250
6251 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
6252 {
6253         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
6254         /*
6255          * an sti; sti; sequence only disable interrupts for the first
6256          * instruction. So, if the last instruction, be it emulated or
6257          * not, left the system with the INT_STI flag enabled, it
6258          * means that the last instruction is an sti. We should not
6259          * leave the flag on in this case. The same goes for mov ss
6260          */
6261         if (int_shadow & mask)
6262                 mask = 0;
6263         if (unlikely(int_shadow || mask)) {
6264                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
6265                 if (!mask)
6266                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6267         }
6268 }
6269
6270 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
6271 {
6272         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6273         if (ctxt->exception.vector == PF_VECTOR)
6274                 return kvm_propagate_fault(vcpu, &ctxt->exception);
6275
6276         if (ctxt->exception.error_code_valid)
6277                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
6278                                       ctxt->exception.error_code);
6279         else
6280                 kvm_queue_exception(vcpu, ctxt->exception.vector);
6281         return false;
6282 }
6283
6284 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
6285 {
6286         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6287         int cs_db, cs_l;
6288
6289         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
6290
6291         ctxt->eflags = kvm_get_rflags(vcpu);
6292         ctxt->tf = (ctxt->eflags & X86_EFLAGS_TF) != 0;
6293
6294         ctxt->eip = kvm_rip_read(vcpu);
6295         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
6296                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
6297                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
6298                      cs_db                              ? X86EMUL_MODE_PROT32 :
6299                                                           X86EMUL_MODE_PROT16;
6300         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
6301         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
6302         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
6303
6304         init_decode_cache(ctxt);
6305         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6306 }
6307
6308 void kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
6309 {
6310         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6311         int ret;
6312
6313         init_emulate_ctxt(vcpu);
6314
6315         ctxt->op_bytes = 2;
6316         ctxt->ad_bytes = 2;
6317         ctxt->_eip = ctxt->eip + inc_eip;
6318         ret = emulate_int_real(ctxt, irq);
6319
6320         if (ret != X86EMUL_CONTINUE) {
6321                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
6322         } else {
6323                 ctxt->eip = ctxt->_eip;
6324                 kvm_rip_write(vcpu, ctxt->eip);
6325                 kvm_set_rflags(vcpu, ctxt->eflags);
6326         }
6327 }
6328 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
6329
6330 static int handle_emulation_failure(struct kvm_vcpu *vcpu, int emulation_type)
6331 {
6332         ++vcpu->stat.insn_emulation_fail;
6333         trace_kvm_emulate_insn_failed(vcpu);
6334
6335         if (emulation_type & EMULTYPE_VMWARE_GP) {
6336                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6337                 return 1;
6338         }
6339
6340         if (emulation_type & EMULTYPE_SKIP) {
6341                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6342                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6343                 vcpu->run->internal.ndata = 0;
6344                 return 0;
6345         }
6346
6347         kvm_queue_exception(vcpu, UD_VECTOR);
6348
6349         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
6350                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
6351                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
6352                 vcpu->run->internal.ndata = 0;
6353                 return 0;
6354         }
6355
6356         return 1;
6357 }
6358
6359 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
6360                                   bool write_fault_to_shadow_pgtable,
6361                                   int emulation_type)
6362 {
6363         gpa_t gpa = cr2;
6364         kvm_pfn_t pfn;
6365
6366         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6367                 return false;
6368
6369         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6370                 return false;
6371
6372         if (!vcpu->arch.mmu->direct_map) {
6373                 /*
6374                  * Write permission should be allowed since only
6375                  * write access need to be emulated.
6376                  */
6377                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6378
6379                 /*
6380                  * If the mapping is invalid in guest, let cpu retry
6381                  * it to generate fault.
6382                  */
6383                 if (gpa == UNMAPPED_GVA)
6384                         return true;
6385         }
6386
6387         /*
6388          * Do not retry the unhandleable instruction if it faults on the
6389          * readonly host memory, otherwise it will goto a infinite loop:
6390          * retry instruction -> write #PF -> emulation fail -> retry
6391          * instruction -> ...
6392          */
6393         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
6394
6395         /*
6396          * If the instruction failed on the error pfn, it can not be fixed,
6397          * report the error to userspace.
6398          */
6399         if (is_error_noslot_pfn(pfn))
6400                 return false;
6401
6402         kvm_release_pfn_clean(pfn);
6403
6404         /* The instructions are well-emulated on direct mmu. */
6405         if (vcpu->arch.mmu->direct_map) {
6406                 unsigned int indirect_shadow_pages;
6407
6408                 spin_lock(&vcpu->kvm->mmu_lock);
6409                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
6410                 spin_unlock(&vcpu->kvm->mmu_lock);
6411
6412                 if (indirect_shadow_pages)
6413                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6414
6415                 return true;
6416         }
6417
6418         /*
6419          * if emulation was due to access to shadowed page table
6420          * and it failed try to unshadow page and re-enter the
6421          * guest to let CPU execute the instruction.
6422          */
6423         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6424
6425         /*
6426          * If the access faults on its page table, it can not
6427          * be fixed by unprotecting shadow page and it should
6428          * be reported to userspace.
6429          */
6430         return !write_fault_to_shadow_pgtable;
6431 }
6432
6433 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
6434                               unsigned long cr2,  int emulation_type)
6435 {
6436         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
6437         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
6438
6439         last_retry_eip = vcpu->arch.last_retry_eip;
6440         last_retry_addr = vcpu->arch.last_retry_addr;
6441
6442         /*
6443          * If the emulation is caused by #PF and it is non-page_table
6444          * writing instruction, it means the VM-EXIT is caused by shadow
6445          * page protected, we can zap the shadow page and retry this
6446          * instruction directly.
6447          *
6448          * Note: if the guest uses a non-page-table modifying instruction
6449          * on the PDE that points to the instruction, then we will unmap
6450          * the instruction and go to an infinite loop. So, we cache the
6451          * last retried eip and the last fault address, if we meet the eip
6452          * and the address again, we can break out of the potential infinite
6453          * loop.
6454          */
6455         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
6456
6457         if (!(emulation_type & EMULTYPE_ALLOW_RETRY))
6458                 return false;
6459
6460         if (WARN_ON_ONCE(is_guest_mode(vcpu)))
6461                 return false;
6462
6463         if (x86_page_table_writing_insn(ctxt))
6464                 return false;
6465
6466         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
6467                 return false;
6468
6469         vcpu->arch.last_retry_eip = ctxt->eip;
6470         vcpu->arch.last_retry_addr = cr2;
6471
6472         if (!vcpu->arch.mmu->direct_map)
6473                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
6474
6475         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
6476
6477         return true;
6478 }
6479
6480 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
6481 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
6482
6483 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
6484 {
6485         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
6486                 /* This is a good place to trace that we are exiting SMM.  */
6487                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
6488
6489                 /* Process a latched INIT or SMI, if any.  */
6490                 kvm_make_request(KVM_REQ_EVENT, vcpu);
6491         }
6492
6493         kvm_mmu_reset_context(vcpu);
6494 }
6495
6496 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
6497                                 unsigned long *db)
6498 {
6499         u32 dr6 = 0;
6500         int i;
6501         u32 enable, rwlen;
6502
6503         enable = dr7;
6504         rwlen = dr7 >> 16;
6505         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
6506                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
6507                         dr6 |= (1 << i);
6508         return dr6;
6509 }
6510
6511 static int kvm_vcpu_do_singlestep(struct kvm_vcpu *vcpu)
6512 {
6513         struct kvm_run *kvm_run = vcpu->run;
6514
6515         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
6516                 kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 | DR6_RTM;
6517                 kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
6518                 kvm_run->debug.arch.exception = DB_VECTOR;
6519                 kvm_run->exit_reason = KVM_EXIT_DEBUG;
6520                 return 0;
6521         }
6522         kvm_queue_exception_p(vcpu, DB_VECTOR, DR6_BS);
6523         return 1;
6524 }
6525
6526 int kvm_skip_emulated_instruction(struct kvm_vcpu *vcpu)
6527 {
6528         unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6529         int r;
6530
6531         r = kvm_x86_ops->skip_emulated_instruction(vcpu);
6532         if (unlikely(!r))
6533                 return 0;
6534
6535         /*
6536          * rflags is the old, "raw" value of the flags.  The new value has
6537          * not been saved yet.
6538          *
6539          * This is correct even for TF set by the guest, because "the
6540          * processor will not generate this exception after the instruction
6541          * that sets the TF flag".
6542          */
6543         if (unlikely(rflags & X86_EFLAGS_TF))
6544                 r = kvm_vcpu_do_singlestep(vcpu);
6545         return r;
6546 }
6547 EXPORT_SYMBOL_GPL(kvm_skip_emulated_instruction);
6548
6549 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
6550 {
6551         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
6552             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
6553                 struct kvm_run *kvm_run = vcpu->run;
6554                 unsigned long eip = kvm_get_linear_rip(vcpu);
6555                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6556                                            vcpu->arch.guest_debug_dr7,
6557                                            vcpu->arch.eff_db);
6558
6559                 if (dr6 != 0) {
6560                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
6561                         kvm_run->debug.arch.pc = eip;
6562                         kvm_run->debug.arch.exception = DB_VECTOR;
6563                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
6564                         *r = 0;
6565                         return true;
6566                 }
6567         }
6568
6569         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
6570             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
6571                 unsigned long eip = kvm_get_linear_rip(vcpu);
6572                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
6573                                            vcpu->arch.dr7,
6574                                            vcpu->arch.db);
6575
6576                 if (dr6 != 0) {
6577                         vcpu->arch.dr6 &= ~DR_TRAP_BITS;
6578                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
6579                         kvm_queue_exception(vcpu, DB_VECTOR);
6580                         *r = 1;
6581                         return true;
6582                 }
6583         }
6584
6585         return false;
6586 }
6587
6588 static bool is_vmware_backdoor_opcode(struct x86_emulate_ctxt *ctxt)
6589 {
6590         switch (ctxt->opcode_len) {
6591         case 1:
6592                 switch (ctxt->b) {
6593                 case 0xe4:      /* IN */
6594                 case 0xe5:
6595                 case 0xec:
6596                 case 0xed:
6597                 case 0xe6:      /* OUT */
6598                 case 0xe7:
6599                 case 0xee:
6600                 case 0xef:
6601                 case 0x6c:      /* INS */
6602                 case 0x6d:
6603                 case 0x6e:      /* OUTS */
6604                 case 0x6f:
6605                         return true;
6606                 }
6607                 break;
6608         case 2:
6609                 switch (ctxt->b) {
6610                 case 0x33:      /* RDPMC */
6611                         return true;
6612                 }
6613                 break;
6614         }
6615
6616         return false;
6617 }
6618
6619 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
6620                             unsigned long cr2,
6621                             int emulation_type,
6622                             void *insn,
6623                             int insn_len)
6624 {
6625         int r;
6626         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6627         bool writeback = true;
6628         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
6629
6630         vcpu->arch.l1tf_flush_l1d = true;
6631
6632         /*
6633          * Clear write_fault_to_shadow_pgtable here to ensure it is
6634          * never reused.
6635          */
6636         vcpu->arch.write_fault_to_shadow_pgtable = false;
6637         kvm_clear_exception_queue(vcpu);
6638
6639         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
6640                 init_emulate_ctxt(vcpu);
6641
6642                 /*
6643                  * We will reenter on the same instruction since
6644                  * we do not set complete_userspace_io.  This does not
6645                  * handle watchpoints yet, those would be handled in
6646                  * the emulate_ops.
6647                  */
6648                 if (!(emulation_type & EMULTYPE_SKIP) &&
6649                     kvm_vcpu_check_breakpoint(vcpu, &r))
6650                         return r;
6651
6652                 ctxt->interruptibility = 0;
6653                 ctxt->have_exception = false;
6654                 ctxt->exception.vector = -1;
6655                 ctxt->perm_ok = false;
6656
6657                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
6658
6659                 r = x86_decode_insn(ctxt, insn, insn_len);
6660
6661                 trace_kvm_emulate_insn_start(vcpu);
6662                 ++vcpu->stat.insn_emulation;
6663                 if (r != EMULATION_OK)  {
6664                         if ((emulation_type & EMULTYPE_TRAP_UD) ||
6665                             (emulation_type & EMULTYPE_TRAP_UD_FORCED)) {
6666                                 kvm_queue_exception(vcpu, UD_VECTOR);
6667                                 return 1;
6668                         }
6669                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6670                                                 emulation_type))
6671                                 return 1;
6672                         if (ctxt->have_exception) {
6673                                 /*
6674                                  * #UD should result in just EMULATION_FAILED, and trap-like
6675                                  * exception should not be encountered during decode.
6676                                  */
6677                                 WARN_ON_ONCE(ctxt->exception.vector == UD_VECTOR ||
6678                                              exception_type(ctxt->exception.vector) == EXCPT_TRAP);
6679                                 inject_emulated_exception(vcpu);
6680                                 return 1;
6681                         }
6682                         return handle_emulation_failure(vcpu, emulation_type);
6683                 }
6684         }
6685
6686         if ((emulation_type & EMULTYPE_VMWARE_GP) &&
6687             !is_vmware_backdoor_opcode(ctxt)) {
6688                 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
6689                 return 1;
6690         }
6691
6692         /*
6693          * Note, EMULTYPE_SKIP is intended for use *only* by vendor callbacks
6694          * for kvm_skip_emulated_instruction().  The caller is responsible for
6695          * updating interruptibility state and injecting single-step #DBs.
6696          */
6697         if (emulation_type & EMULTYPE_SKIP) {
6698                 kvm_rip_write(vcpu, ctxt->_eip);
6699                 if (ctxt->eflags & X86_EFLAGS_RF)
6700                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
6701                 return 1;
6702         }
6703
6704         if (retry_instruction(ctxt, cr2, emulation_type))
6705                 return 1;
6706
6707         /* this is needed for vmware backdoor interface to work since it
6708            changes registers values  during IO operation */
6709         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
6710                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
6711                 emulator_invalidate_register_cache(ctxt);
6712         }
6713
6714 restart:
6715         /* Save the faulting GPA (cr2) in the address field */
6716         ctxt->exception.address = cr2;
6717
6718         r = x86_emulate_insn(ctxt);
6719
6720         if (r == EMULATION_INTERCEPTED)
6721                 return 1;
6722
6723         if (r == EMULATION_FAILED) {
6724                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
6725                                         emulation_type))
6726                         return 1;
6727
6728                 return handle_emulation_failure(vcpu, emulation_type);
6729         }
6730
6731         if (ctxt->have_exception) {
6732                 r = 1;
6733                 if (inject_emulated_exception(vcpu))
6734                         return r;
6735         } else if (vcpu->arch.pio.count) {
6736                 if (!vcpu->arch.pio.in) {
6737                         /* FIXME: return into emulator if single-stepping.  */
6738                         vcpu->arch.pio.count = 0;
6739                 } else {
6740                         writeback = false;
6741                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
6742                 }
6743                 r = 0;
6744         } else if (vcpu->mmio_needed) {
6745                 ++vcpu->stat.mmio_exits;
6746
6747                 if (!vcpu->mmio_is_write)
6748                         writeback = false;
6749                 r = 0;
6750                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6751         } else if (r == EMULATION_RESTART)
6752                 goto restart;
6753         else
6754                 r = 1;
6755
6756         if (writeback) {
6757                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
6758                 toggle_interruptibility(vcpu, ctxt->interruptibility);
6759                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6760                 if (!ctxt->have_exception ||
6761                     exception_type(ctxt->exception.vector) == EXCPT_TRAP) {
6762                         kvm_rip_write(vcpu, ctxt->eip);
6763                         if (r && ctxt->tf)
6764                                 r = kvm_vcpu_do_singlestep(vcpu);
6765                         __kvm_set_rflags(vcpu, ctxt->eflags);
6766                 }
6767
6768                 /*
6769                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
6770                  * do nothing, and it will be requested again as soon as
6771                  * the shadow expires.  But we still need to check here,
6772                  * because POPF has no interrupt shadow.
6773                  */
6774                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
6775                         kvm_make_request(KVM_REQ_EVENT, vcpu);
6776         } else
6777                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
6778
6779         return r;
6780 }
6781
6782 int kvm_emulate_instruction(struct kvm_vcpu *vcpu, int emulation_type)
6783 {
6784         return x86_emulate_instruction(vcpu, 0, emulation_type, NULL, 0);
6785 }
6786 EXPORT_SYMBOL_GPL(kvm_emulate_instruction);
6787
6788 int kvm_emulate_instruction_from_buffer(struct kvm_vcpu *vcpu,
6789                                         void *insn, int insn_len)
6790 {
6791         return x86_emulate_instruction(vcpu, 0, 0, insn, insn_len);
6792 }
6793 EXPORT_SYMBOL_GPL(kvm_emulate_instruction_from_buffer);
6794
6795 static int complete_fast_pio_out_port_0x7e(struct kvm_vcpu *vcpu)
6796 {
6797         vcpu->arch.pio.count = 0;
6798         return 1;
6799 }
6800
6801 static int complete_fast_pio_out(struct kvm_vcpu *vcpu)
6802 {
6803         vcpu->arch.pio.count = 0;
6804
6805         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip)))
6806                 return 1;
6807
6808         return kvm_skip_emulated_instruction(vcpu);
6809 }
6810
6811 static int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size,
6812                             unsigned short port)
6813 {
6814         unsigned long val = kvm_rax_read(vcpu);
6815         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
6816                                             size, port, &val, 1);
6817         if (ret)
6818                 return ret;
6819
6820         /*
6821          * Workaround userspace that relies on old KVM behavior of %rip being
6822          * incremented prior to exiting to userspace to handle "OUT 0x7e".
6823          */
6824         if (port == 0x7e &&
6825             kvm_check_has_quirk(vcpu->kvm, KVM_X86_QUIRK_OUT_7E_INC_RIP)) {
6826                 vcpu->arch.complete_userspace_io =
6827                         complete_fast_pio_out_port_0x7e;
6828                 kvm_skip_emulated_instruction(vcpu);
6829         } else {
6830                 vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6831                 vcpu->arch.complete_userspace_io = complete_fast_pio_out;
6832         }
6833         return 0;
6834 }
6835
6836 static int complete_fast_pio_in(struct kvm_vcpu *vcpu)
6837 {
6838         unsigned long val;
6839
6840         /* We should only ever be called with arch.pio.count equal to 1 */
6841         BUG_ON(vcpu->arch.pio.count != 1);
6842
6843         if (unlikely(!kvm_is_linear_rip(vcpu, vcpu->arch.pio.linear_rip))) {
6844                 vcpu->arch.pio.count = 0;
6845                 return 1;
6846         }
6847
6848         /* For size less than 4 we merge, else we zero extend */
6849         val = (vcpu->arch.pio.size < 4) ? kvm_rax_read(vcpu) : 0;
6850
6851         /*
6852          * Since vcpu->arch.pio.count == 1 let emulator_pio_in_emulated perform
6853          * the copy and tracing
6854          */
6855         emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, vcpu->arch.pio.size,
6856                                  vcpu->arch.pio.port, &val, 1);
6857         kvm_rax_write(vcpu, val);
6858
6859         return kvm_skip_emulated_instruction(vcpu);
6860 }
6861
6862 static int kvm_fast_pio_in(struct kvm_vcpu *vcpu, int size,
6863                            unsigned short port)
6864 {
6865         unsigned long val;
6866         int ret;
6867
6868         /* For size less than 4 we merge, else we zero extend */
6869         val = (size < 4) ? kvm_rax_read(vcpu) : 0;
6870
6871         ret = emulator_pio_in_emulated(&vcpu->arch.emulate_ctxt, size, port,
6872                                        &val, 1);
6873         if (ret) {
6874                 kvm_rax_write(vcpu, val);
6875                 return ret;
6876         }
6877
6878         vcpu->arch.pio.linear_rip = kvm_get_linear_rip(vcpu);
6879         vcpu->arch.complete_userspace_io = complete_fast_pio_in;
6880
6881         return 0;
6882 }
6883
6884 int kvm_fast_pio(struct kvm_vcpu *vcpu, int size, unsigned short port, int in)
6885 {
6886         int ret;
6887
6888         if (in)
6889                 ret = kvm_fast_pio_in(vcpu, size, port);
6890         else
6891                 ret = kvm_fast_pio_out(vcpu, size, port);
6892         return ret && kvm_skip_emulated_instruction(vcpu);
6893 }
6894 EXPORT_SYMBOL_GPL(kvm_fast_pio);
6895
6896 static int kvmclock_cpu_down_prep(unsigned int cpu)
6897 {
6898         __this_cpu_write(cpu_tsc_khz, 0);
6899         return 0;
6900 }
6901
6902 static void tsc_khz_changed(void *data)
6903 {
6904         struct cpufreq_freqs *freq = data;
6905         unsigned long khz = 0;
6906
6907         if (data)
6908                 khz = freq->new;
6909         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
6910                 khz = cpufreq_quick_get(raw_smp_processor_id());
6911         if (!khz)
6912                 khz = tsc_khz;
6913         __this_cpu_write(cpu_tsc_khz, khz);
6914 }
6915
6916 #ifdef CONFIG_X86_64
6917 static void kvm_hyperv_tsc_notifier(void)
6918 {
6919         struct kvm *kvm;
6920         struct kvm_vcpu *vcpu;
6921         int cpu;
6922
6923         mutex_lock(&kvm_lock);
6924         list_for_each_entry(kvm, &vm_list, vm_list)
6925                 kvm_make_mclock_inprogress_request(kvm);
6926
6927         hyperv_stop_tsc_emulation();
6928
6929         /* TSC frequency always matches when on Hyper-V */
6930         for_each_present_cpu(cpu)
6931                 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
6932         kvm_max_guest_tsc_khz = tsc_khz;
6933
6934         list_for_each_entry(kvm, &vm_list, vm_list) {
6935                 struct kvm_arch *ka = &kvm->arch;
6936
6937                 spin_lock(&ka->pvclock_gtod_sync_lock);
6938
6939                 pvclock_update_vm_gtod_copy(kvm);
6940
6941                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6942                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6943
6944                 kvm_for_each_vcpu(cpu, vcpu, kvm)
6945                         kvm_clear_request(KVM_REQ_MCLOCK_INPROGRESS, vcpu);
6946
6947                 spin_unlock(&ka->pvclock_gtod_sync_lock);
6948         }
6949         mutex_unlock(&kvm_lock);
6950 }
6951 #endif
6952
6953 static void __kvmclock_cpufreq_notifier(struct cpufreq_freqs *freq, int cpu)
6954 {
6955         struct kvm *kvm;
6956         struct kvm_vcpu *vcpu;
6957         int i, send_ipi = 0;
6958
6959         /*
6960          * We allow guests to temporarily run on slowing clocks,
6961          * provided we notify them after, or to run on accelerating
6962          * clocks, provided we notify them before.  Thus time never
6963          * goes backwards.
6964          *
6965          * However, we have a problem.  We can't atomically update
6966          * the frequency of a given CPU from this function; it is
6967          * merely a notifier, which can be called from any CPU.
6968          * Changing the TSC frequency at arbitrary points in time
6969          * requires a recomputation of local variables related to
6970          * the TSC for each VCPU.  We must flag these local variables
6971          * to be updated and be sure the update takes place with the
6972          * new frequency before any guests proceed.
6973          *
6974          * Unfortunately, the combination of hotplug CPU and frequency
6975          * change creates an intractable locking scenario; the order
6976          * of when these callouts happen is undefined with respect to
6977          * CPU hotplug, and they can race with each other.  As such,
6978          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
6979          * undefined; you can actually have a CPU frequency change take
6980          * place in between the computation of X and the setting of the
6981          * variable.  To protect against this problem, all updates of
6982          * the per_cpu tsc_khz variable are done in an interrupt
6983          * protected IPI, and all callers wishing to update the value
6984          * must wait for a synchronous IPI to complete (which is trivial
6985          * if the caller is on the CPU already).  This establishes the
6986          * necessary total order on variable updates.
6987          *
6988          * Note that because a guest time update may take place
6989          * anytime after the setting of the VCPU's request bit, the
6990          * correct TSC value must be set before the request.  However,
6991          * to ensure the update actually makes it to any guest which
6992          * starts running in hardware virtualization between the set
6993          * and the acquisition of the spinlock, we must also ping the
6994          * CPU after setting the request bit.
6995          *
6996          */
6997
6998         smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
6999
7000         mutex_lock(&kvm_lock);
7001         list_for_each_entry(kvm, &vm_list, vm_list) {
7002                 kvm_for_each_vcpu(i, vcpu, kvm) {
7003                         if (vcpu->cpu != cpu)
7004                                 continue;
7005                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7006                         if (vcpu->cpu != raw_smp_processor_id())
7007                                 send_ipi = 1;
7008                 }
7009         }
7010         mutex_unlock(&kvm_lock);
7011
7012         if (freq->old < freq->new && send_ipi) {
7013                 /*
7014                  * We upscale the frequency.  Must make the guest
7015                  * doesn't see old kvmclock values while running with
7016                  * the new frequency, otherwise we risk the guest sees
7017                  * time go backwards.
7018                  *
7019                  * In case we update the frequency for another cpu
7020                  * (which might be in guest context) send an interrupt
7021                  * to kick the cpu out of guest context.  Next time
7022                  * guest context is entered kvmclock will be updated,
7023                  * so the guest will not see stale values.
7024                  */
7025                 smp_call_function_single(cpu, tsc_khz_changed, freq, 1);
7026         }
7027 }
7028
7029 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
7030                                      void *data)
7031 {
7032         struct cpufreq_freqs *freq = data;
7033         int cpu;
7034
7035         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
7036                 return 0;
7037         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
7038                 return 0;
7039
7040         for_each_cpu(cpu, freq->policy->cpus)
7041                 __kvmclock_cpufreq_notifier(freq, cpu);
7042
7043         return 0;
7044 }
7045
7046 static struct notifier_block kvmclock_cpufreq_notifier_block = {
7047         .notifier_call  = kvmclock_cpufreq_notifier
7048 };
7049
7050 static int kvmclock_cpu_online(unsigned int cpu)
7051 {
7052         tsc_khz_changed(NULL);
7053         return 0;
7054 }
7055
7056 static void kvm_timer_init(void)
7057 {
7058         max_tsc_khz = tsc_khz;
7059
7060         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
7061 #ifdef CONFIG_CPU_FREQ
7062                 struct cpufreq_policy policy;
7063                 int cpu;
7064
7065                 memset(&policy, 0, sizeof(policy));
7066                 cpu = get_cpu();
7067                 cpufreq_get_policy(&policy, cpu);
7068                 if (policy.cpuinfo.max_freq)
7069                         max_tsc_khz = policy.cpuinfo.max_freq;
7070                 put_cpu();
7071 #endif
7072                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
7073                                           CPUFREQ_TRANSITION_NOTIFIER);
7074         }
7075
7076         cpuhp_setup_state(CPUHP_AP_X86_KVM_CLK_ONLINE, "x86/kvm/clk:online",
7077                           kvmclock_cpu_online, kvmclock_cpu_down_prep);
7078 }
7079
7080 DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
7081 EXPORT_PER_CPU_SYMBOL_GPL(current_vcpu);
7082
7083 int kvm_is_in_guest(void)
7084 {
7085         return __this_cpu_read(current_vcpu) != NULL;
7086 }
7087
7088 static int kvm_is_user_mode(void)
7089 {
7090         int user_mode = 3;
7091
7092         if (__this_cpu_read(current_vcpu))
7093                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
7094
7095         return user_mode != 0;
7096 }
7097
7098 static unsigned long kvm_get_guest_ip(void)
7099 {
7100         unsigned long ip = 0;
7101
7102         if (__this_cpu_read(current_vcpu))
7103                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
7104
7105         return ip;
7106 }
7107
7108 static void kvm_handle_intel_pt_intr(void)
7109 {
7110         struct kvm_vcpu *vcpu = __this_cpu_read(current_vcpu);
7111
7112         kvm_make_request(KVM_REQ_PMI, vcpu);
7113         __set_bit(MSR_CORE_PERF_GLOBAL_OVF_CTRL_TRACE_TOPA_PMI_BIT,
7114                         (unsigned long *)&vcpu->arch.pmu.global_status);
7115 }
7116
7117 static struct perf_guest_info_callbacks kvm_guest_cbs = {
7118         .is_in_guest            = kvm_is_in_guest,
7119         .is_user_mode           = kvm_is_user_mode,
7120         .get_guest_ip           = kvm_get_guest_ip,
7121         .handle_intel_pt_intr   = kvm_handle_intel_pt_intr,
7122 };
7123
7124 #ifdef CONFIG_X86_64
7125 static void pvclock_gtod_update_fn(struct work_struct *work)
7126 {
7127         struct kvm *kvm;
7128
7129         struct kvm_vcpu *vcpu;
7130         int i;
7131
7132         mutex_lock(&kvm_lock);
7133         list_for_each_entry(kvm, &vm_list, vm_list)
7134                 kvm_for_each_vcpu(i, vcpu, kvm)
7135                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7136         atomic_set(&kvm_guest_has_master_clock, 0);
7137         mutex_unlock(&kvm_lock);
7138 }
7139
7140 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
7141
7142 /*
7143  * Notification about pvclock gtod data update.
7144  */
7145 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
7146                                void *priv)
7147 {
7148         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
7149         struct timekeeper *tk = priv;
7150
7151         update_pvclock_gtod(tk);
7152
7153         /* disable master clock if host does not trust, or does not
7154          * use, TSC based clocksource.
7155          */
7156         if (!gtod_is_based_on_tsc(gtod->clock.vclock_mode) &&
7157             atomic_read(&kvm_guest_has_master_clock) != 0)
7158                 queue_work(system_long_wq, &pvclock_gtod_work);
7159
7160         return 0;
7161 }
7162
7163 static struct notifier_block pvclock_gtod_notifier = {
7164         .notifier_call = pvclock_gtod_notify,
7165 };
7166 #endif
7167
7168 int kvm_arch_init(void *opaque)
7169 {
7170         int r;
7171         struct kvm_x86_ops *ops = opaque;
7172
7173         if (kvm_x86_ops) {
7174                 printk(KERN_ERR "kvm: already loaded the other module\n");
7175                 r = -EEXIST;
7176                 goto out;
7177         }
7178
7179         if (!ops->cpu_has_kvm_support()) {
7180                 printk(KERN_ERR "kvm: no hardware support\n");
7181                 r = -EOPNOTSUPP;
7182                 goto out;
7183         }
7184         if (ops->disabled_by_bios()) {
7185                 printk(KERN_ERR "kvm: disabled by bios\n");
7186                 r = -EOPNOTSUPP;
7187                 goto out;
7188         }
7189
7190         /*
7191          * KVM explicitly assumes that the guest has an FPU and
7192          * FXSAVE/FXRSTOR. For example, the KVM_GET_FPU explicitly casts the
7193          * vCPU's FPU state as a fxregs_state struct.
7194          */
7195         if (!boot_cpu_has(X86_FEATURE_FPU) || !boot_cpu_has(X86_FEATURE_FXSR)) {
7196                 printk(KERN_ERR "kvm: inadequate fpu\n");
7197                 r = -EOPNOTSUPP;
7198                 goto out;
7199         }
7200
7201         r = -ENOMEM;
7202         x86_fpu_cache = kmem_cache_create("x86_fpu", sizeof(struct fpu),
7203                                           __alignof__(struct fpu), SLAB_ACCOUNT,
7204                                           NULL);
7205         if (!x86_fpu_cache) {
7206                 printk(KERN_ERR "kvm: failed to allocate cache for x86 fpu\n");
7207                 goto out;
7208         }
7209
7210         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
7211         if (!shared_msrs) {
7212                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
7213                 goto out_free_x86_fpu_cache;
7214         }
7215
7216         r = kvm_mmu_module_init();
7217         if (r)
7218                 goto out_free_percpu;
7219
7220         kvm_x86_ops = ops;
7221
7222         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
7223                         PT_DIRTY_MASK, PT64_NX_MASK, 0,
7224                         PT_PRESENT_MASK, 0, sme_me_mask);
7225         kvm_timer_init();
7226
7227         perf_register_guest_info_callbacks(&kvm_guest_cbs);
7228
7229         if (boot_cpu_has(X86_FEATURE_XSAVE))
7230                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
7231
7232         kvm_lapic_init();
7233         if (pi_inject_timer == -1)
7234                 pi_inject_timer = housekeeping_enabled(HK_FLAG_TIMER);
7235 #ifdef CONFIG_X86_64
7236         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
7237
7238         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7239                 set_hv_tscchange_cb(kvm_hyperv_tsc_notifier);
7240 #endif
7241
7242         return 0;
7243
7244 out_free_percpu:
7245         free_percpu(shared_msrs);
7246 out_free_x86_fpu_cache:
7247         kmem_cache_destroy(x86_fpu_cache);
7248 out:
7249         return r;
7250 }
7251
7252 void kvm_arch_exit(void)
7253 {
7254 #ifdef CONFIG_X86_64
7255         if (hypervisor_is_type(X86_HYPER_MS_HYPERV))
7256                 clear_hv_tscchange_cb();
7257 #endif
7258         kvm_lapic_exit();
7259         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
7260
7261         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
7262                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
7263                                             CPUFREQ_TRANSITION_NOTIFIER);
7264         cpuhp_remove_state_nocalls(CPUHP_AP_X86_KVM_CLK_ONLINE);
7265 #ifdef CONFIG_X86_64
7266         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
7267 #endif
7268         kvm_x86_ops = NULL;
7269         kvm_mmu_module_exit();
7270         free_percpu(shared_msrs);
7271         kmem_cache_destroy(x86_fpu_cache);
7272 }
7273
7274 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
7275 {
7276         ++vcpu->stat.halt_exits;
7277         if (lapic_in_kernel(vcpu)) {
7278                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
7279                 return 1;
7280         } else {
7281                 vcpu->run->exit_reason = KVM_EXIT_HLT;
7282                 return 0;
7283         }
7284 }
7285 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
7286
7287 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
7288 {
7289         int ret = kvm_skip_emulated_instruction(vcpu);
7290         /*
7291          * TODO: we might be squashing a GUESTDBG_SINGLESTEP-triggered
7292          * KVM_EXIT_DEBUG here.
7293          */
7294         return kvm_vcpu_halt(vcpu) && ret;
7295 }
7296 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
7297
7298 #ifdef CONFIG_X86_64
7299 static int kvm_pv_clock_pairing(struct kvm_vcpu *vcpu, gpa_t paddr,
7300                                 unsigned long clock_type)
7301 {
7302         struct kvm_clock_pairing clock_pairing;
7303         struct timespec64 ts;
7304         u64 cycle;
7305         int ret;
7306
7307         if (clock_type != KVM_CLOCK_PAIRING_WALLCLOCK)
7308                 return -KVM_EOPNOTSUPP;
7309
7310         if (kvm_get_walltime_and_clockread(&ts, &cycle) == false)
7311                 return -KVM_EOPNOTSUPP;
7312
7313         clock_pairing.sec = ts.tv_sec;
7314         clock_pairing.nsec = ts.tv_nsec;
7315         clock_pairing.tsc = kvm_read_l1_tsc(vcpu, cycle);
7316         clock_pairing.flags = 0;
7317         memset(&clock_pairing.pad, 0, sizeof(clock_pairing.pad));
7318
7319         ret = 0;
7320         if (kvm_write_guest(vcpu->kvm, paddr, &clock_pairing,
7321                             sizeof(struct kvm_clock_pairing)))
7322                 ret = -KVM_EFAULT;
7323
7324         return ret;
7325 }
7326 #endif
7327
7328 /*
7329  * kvm_pv_kick_cpu_op:  Kick a vcpu.
7330  *
7331  * @apicid - apicid of vcpu to be kicked.
7332  */
7333 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
7334 {
7335         struct kvm_lapic_irq lapic_irq;
7336
7337         lapic_irq.shorthand = 0;
7338         lapic_irq.dest_mode = 0;
7339         lapic_irq.level = 0;
7340         lapic_irq.dest_id = apicid;
7341         lapic_irq.msi_redir_hint = false;
7342
7343         lapic_irq.delivery_mode = APIC_DM_REMRD;
7344         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
7345 }
7346
7347 void kvm_vcpu_deactivate_apicv(struct kvm_vcpu *vcpu)
7348 {
7349         if (!lapic_in_kernel(vcpu)) {
7350                 WARN_ON_ONCE(vcpu->arch.apicv_active);
7351                 return;
7352         }
7353         if (!vcpu->arch.apicv_active)
7354                 return;
7355
7356         vcpu->arch.apicv_active = false;
7357         kvm_x86_ops->refresh_apicv_exec_ctrl(vcpu);
7358 }
7359
7360 static void kvm_sched_yield(struct kvm *kvm, unsigned long dest_id)
7361 {
7362         struct kvm_vcpu *target = NULL;
7363         struct kvm_apic_map *map;
7364
7365         rcu_read_lock();
7366         map = rcu_dereference(kvm->arch.apic_map);
7367
7368         if (likely(map) && dest_id <= map->max_apic_id && map->phys_map[dest_id])
7369                 target = map->phys_map[dest_id]->vcpu;
7370
7371         rcu_read_unlock();
7372
7373         if (target && READ_ONCE(target->ready))
7374                 kvm_vcpu_yield_to(target);
7375 }
7376
7377 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
7378 {
7379         unsigned long nr, a0, a1, a2, a3, ret;
7380         int op_64_bit;
7381
7382         if (kvm_hv_hypercall_enabled(vcpu->kvm))
7383                 return kvm_hv_hypercall(vcpu);
7384
7385         nr = kvm_rax_read(vcpu);
7386         a0 = kvm_rbx_read(vcpu);
7387         a1 = kvm_rcx_read(vcpu);
7388         a2 = kvm_rdx_read(vcpu);
7389         a3 = kvm_rsi_read(vcpu);
7390
7391         trace_kvm_hypercall(nr, a0, a1, a2, a3);
7392
7393         op_64_bit = is_64_bit_mode(vcpu);
7394         if (!op_64_bit) {
7395                 nr &= 0xFFFFFFFF;
7396                 a0 &= 0xFFFFFFFF;
7397                 a1 &= 0xFFFFFFFF;
7398                 a2 &= 0xFFFFFFFF;
7399                 a3 &= 0xFFFFFFFF;
7400         }
7401
7402         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
7403                 ret = -KVM_EPERM;
7404                 goto out;
7405         }
7406
7407         switch (nr) {
7408         case KVM_HC_VAPIC_POLL_IRQ:
7409                 ret = 0;
7410                 break;
7411         case KVM_HC_KICK_CPU:
7412                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
7413                 kvm_sched_yield(vcpu->kvm, a1);
7414                 ret = 0;
7415                 break;
7416 #ifdef CONFIG_X86_64
7417         case KVM_HC_CLOCK_PAIRING:
7418                 ret = kvm_pv_clock_pairing(vcpu, a0, a1);
7419                 break;
7420 #endif
7421         case KVM_HC_SEND_IPI:
7422                 ret = kvm_pv_send_ipi(vcpu->kvm, a0, a1, a2, a3, op_64_bit);
7423                 break;
7424         case KVM_HC_SCHED_YIELD:
7425                 kvm_sched_yield(vcpu->kvm, a0);
7426                 ret = 0;
7427                 break;
7428         default:
7429                 ret = -KVM_ENOSYS;
7430                 break;
7431         }
7432 out:
7433         if (!op_64_bit)
7434                 ret = (u32)ret;
7435         kvm_rax_write(vcpu, ret);
7436
7437         ++vcpu->stat.hypercalls;
7438         return kvm_skip_emulated_instruction(vcpu);
7439 }
7440 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
7441
7442 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
7443 {
7444         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
7445         char instruction[3];
7446         unsigned long rip = kvm_rip_read(vcpu);
7447
7448         kvm_x86_ops->patch_hypercall(vcpu, instruction);
7449
7450         return emulator_write_emulated(ctxt, rip, instruction, 3,
7451                 &ctxt->exception);
7452 }
7453
7454 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
7455 {
7456         return vcpu->run->request_interrupt_window &&
7457                 likely(!pic_in_kernel(vcpu->kvm));
7458 }
7459
7460 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
7461 {
7462         struct kvm_run *kvm_run = vcpu->run;
7463
7464         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
7465         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
7466         kvm_run->cr8 = kvm_get_cr8(vcpu);
7467         kvm_run->apic_base = kvm_get_apic_base(vcpu);
7468         kvm_run->ready_for_interrupt_injection =
7469                 pic_in_kernel(vcpu->kvm) ||
7470                 kvm_vcpu_ready_for_interrupt_injection(vcpu);
7471 }
7472
7473 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
7474 {
7475         int max_irr, tpr;
7476
7477         if (!kvm_x86_ops->update_cr8_intercept)
7478                 return;
7479
7480         if (!lapic_in_kernel(vcpu))
7481                 return;
7482
7483         if (vcpu->arch.apicv_active)
7484                 return;
7485
7486         if (!vcpu->arch.apic->vapic_addr)
7487                 max_irr = kvm_lapic_find_highest_irr(vcpu);
7488         else
7489                 max_irr = -1;
7490
7491         if (max_irr != -1)
7492                 max_irr >>= 4;
7493
7494         tpr = kvm_lapic_get_cr8(vcpu);
7495
7496         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
7497 }
7498
7499 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
7500 {
7501         int r;
7502
7503         /* try to reinject previous events if any */
7504
7505         if (vcpu->arch.exception.injected)
7506                 kvm_x86_ops->queue_exception(vcpu);
7507         /*
7508          * Do not inject an NMI or interrupt if there is a pending
7509          * exception.  Exceptions and interrupts are recognized at
7510          * instruction boundaries, i.e. the start of an instruction.
7511          * Trap-like exceptions, e.g. #DB, have higher priority than
7512          * NMIs and interrupts, i.e. traps are recognized before an
7513          * NMI/interrupt that's pending on the same instruction.
7514          * Fault-like exceptions, e.g. #GP and #PF, are the lowest
7515          * priority, but are only generated (pended) during instruction
7516          * execution, i.e. a pending fault-like exception means the
7517          * fault occurred on the *previous* instruction and must be
7518          * serviced prior to recognizing any new events in order to
7519          * fully complete the previous instruction.
7520          */
7521         else if (!vcpu->arch.exception.pending) {
7522                 if (vcpu->arch.nmi_injected)
7523                         kvm_x86_ops->set_nmi(vcpu);
7524                 else if (vcpu->arch.interrupt.injected)
7525                         kvm_x86_ops->set_irq(vcpu);
7526         }
7527
7528         /*
7529          * Call check_nested_events() even if we reinjected a previous event
7530          * in order for caller to determine if it should require immediate-exit
7531          * from L2 to L1 due to pending L1 events which require exit
7532          * from L2 to L1.
7533          */
7534         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7535                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7536                 if (r != 0)
7537                         return r;
7538         }
7539
7540         /* try to inject new event if pending */
7541         if (vcpu->arch.exception.pending) {
7542                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
7543                                         vcpu->arch.exception.has_error_code,
7544                                         vcpu->arch.exception.error_code);
7545
7546                 WARN_ON_ONCE(vcpu->arch.exception.injected);
7547                 vcpu->arch.exception.pending = false;
7548                 vcpu->arch.exception.injected = true;
7549
7550                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
7551                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
7552                                              X86_EFLAGS_RF);
7553
7554                 if (vcpu->arch.exception.nr == DB_VECTOR) {
7555                         /*
7556                          * This code assumes that nSVM doesn't use
7557                          * check_nested_events(). If it does, the
7558                          * DR6/DR7 changes should happen before L1
7559                          * gets a #VMEXIT for an intercepted #DB in
7560                          * L2.  (Under VMX, on the other hand, the
7561                          * DR6/DR7 changes should not happen in the
7562                          * event of a VM-exit to L1 for an intercepted
7563                          * #DB in L2.)
7564                          */
7565                         kvm_deliver_exception_payload(vcpu);
7566                         if (vcpu->arch.dr7 & DR7_GD) {
7567                                 vcpu->arch.dr7 &= ~DR7_GD;
7568                                 kvm_update_dr7(vcpu);
7569                         }
7570                 }
7571
7572                 kvm_x86_ops->queue_exception(vcpu);
7573         }
7574
7575         /* Don't consider new event if we re-injected an event */
7576         if (kvm_event_needs_reinjection(vcpu))
7577                 return 0;
7578
7579         if (vcpu->arch.smi_pending && !is_smm(vcpu) &&
7580             kvm_x86_ops->smi_allowed(vcpu)) {
7581                 vcpu->arch.smi_pending = false;
7582                 ++vcpu->arch.smi_count;
7583                 enter_smm(vcpu);
7584         } else if (vcpu->arch.nmi_pending && kvm_x86_ops->nmi_allowed(vcpu)) {
7585                 --vcpu->arch.nmi_pending;
7586                 vcpu->arch.nmi_injected = true;
7587                 kvm_x86_ops->set_nmi(vcpu);
7588         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
7589                 /*
7590                  * Because interrupts can be injected asynchronously, we are
7591                  * calling check_nested_events again here to avoid a race condition.
7592                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
7593                  * proposal and current concerns.  Perhaps we should be setting
7594                  * KVM_REQ_EVENT only on certain events and not unconditionally?
7595                  */
7596                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
7597                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
7598                         if (r != 0)
7599                                 return r;
7600                 }
7601                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
7602                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
7603                                             false);
7604                         kvm_x86_ops->set_irq(vcpu);
7605                 }
7606         }
7607
7608         return 0;
7609 }
7610
7611 static void process_nmi(struct kvm_vcpu *vcpu)
7612 {
7613         unsigned limit = 2;
7614
7615         /*
7616          * x86 is limited to one NMI running, and one NMI pending after it.
7617          * If an NMI is already in progress, limit further NMIs to just one.
7618          * Otherwise, allow two (and we'll inject the first one immediately).
7619          */
7620         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
7621                 limit = 1;
7622
7623         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
7624         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
7625         kvm_make_request(KVM_REQ_EVENT, vcpu);
7626 }
7627
7628 static u32 enter_smm_get_segment_flags(struct kvm_segment *seg)
7629 {
7630         u32 flags = 0;
7631         flags |= seg->g       << 23;
7632         flags |= seg->db      << 22;
7633         flags |= seg->l       << 21;
7634         flags |= seg->avl     << 20;
7635         flags |= seg->present << 15;
7636         flags |= seg->dpl     << 13;
7637         flags |= seg->s       << 12;
7638         flags |= seg->type    << 8;
7639         return flags;
7640 }
7641
7642 static void enter_smm_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
7643 {
7644         struct kvm_segment seg;
7645         int offset;
7646
7647         kvm_get_segment(vcpu, &seg, n);
7648         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
7649
7650         if (n < 3)
7651                 offset = 0x7f84 + n * 12;
7652         else
7653                 offset = 0x7f2c + (n - 3) * 12;
7654
7655         put_smstate(u32, buf, offset + 8, seg.base);
7656         put_smstate(u32, buf, offset + 4, seg.limit);
7657         put_smstate(u32, buf, offset, enter_smm_get_segment_flags(&seg));
7658 }
7659
7660 #ifdef CONFIG_X86_64
7661 static void enter_smm_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
7662 {
7663         struct kvm_segment seg;
7664         int offset;
7665         u16 flags;
7666
7667         kvm_get_segment(vcpu, &seg, n);
7668         offset = 0x7e00 + n * 16;
7669
7670         flags = enter_smm_get_segment_flags(&seg) >> 8;
7671         put_smstate(u16, buf, offset, seg.selector);
7672         put_smstate(u16, buf, offset + 2, flags);
7673         put_smstate(u32, buf, offset + 4, seg.limit);
7674         put_smstate(u64, buf, offset + 8, seg.base);
7675 }
7676 #endif
7677
7678 static void enter_smm_save_state_32(struct kvm_vcpu *vcpu, char *buf)
7679 {
7680         struct desc_ptr dt;
7681         struct kvm_segment seg;
7682         unsigned long val;
7683         int i;
7684
7685         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
7686         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
7687         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
7688         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
7689
7690         for (i = 0; i < 8; i++)
7691                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
7692
7693         kvm_get_dr(vcpu, 6, &val);
7694         put_smstate(u32, buf, 0x7fcc, (u32)val);
7695         kvm_get_dr(vcpu, 7, &val);
7696         put_smstate(u32, buf, 0x7fc8, (u32)val);
7697
7698         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7699         put_smstate(u32, buf, 0x7fc4, seg.selector);
7700         put_smstate(u32, buf, 0x7f64, seg.base);
7701         put_smstate(u32, buf, 0x7f60, seg.limit);
7702         put_smstate(u32, buf, 0x7f5c, enter_smm_get_segment_flags(&seg));
7703
7704         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7705         put_smstate(u32, buf, 0x7fc0, seg.selector);
7706         put_smstate(u32, buf, 0x7f80, seg.base);
7707         put_smstate(u32, buf, 0x7f7c, seg.limit);
7708         put_smstate(u32, buf, 0x7f78, enter_smm_get_segment_flags(&seg));
7709
7710         kvm_x86_ops->get_gdt(vcpu, &dt);
7711         put_smstate(u32, buf, 0x7f74, dt.address);
7712         put_smstate(u32, buf, 0x7f70, dt.size);
7713
7714         kvm_x86_ops->get_idt(vcpu, &dt);
7715         put_smstate(u32, buf, 0x7f58, dt.address);
7716         put_smstate(u32, buf, 0x7f54, dt.size);
7717
7718         for (i = 0; i < 6; i++)
7719                 enter_smm_save_seg_32(vcpu, buf, i);
7720
7721         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
7722
7723         /* revision id */
7724         put_smstate(u32, buf, 0x7efc, 0x00020000);
7725         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
7726 }
7727
7728 #ifdef CONFIG_X86_64
7729 static void enter_smm_save_state_64(struct kvm_vcpu *vcpu, char *buf)
7730 {
7731         struct desc_ptr dt;
7732         struct kvm_segment seg;
7733         unsigned long val;
7734         int i;
7735
7736         for (i = 0; i < 16; i++)
7737                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
7738
7739         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
7740         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
7741
7742         kvm_get_dr(vcpu, 6, &val);
7743         put_smstate(u64, buf, 0x7f68, val);
7744         kvm_get_dr(vcpu, 7, &val);
7745         put_smstate(u64, buf, 0x7f60, val);
7746
7747         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
7748         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
7749         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
7750
7751         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
7752
7753         /* revision id */
7754         put_smstate(u32, buf, 0x7efc, 0x00020064);
7755
7756         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
7757
7758         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
7759         put_smstate(u16, buf, 0x7e90, seg.selector);
7760         put_smstate(u16, buf, 0x7e92, enter_smm_get_segment_flags(&seg) >> 8);
7761         put_smstate(u32, buf, 0x7e94, seg.limit);
7762         put_smstate(u64, buf, 0x7e98, seg.base);
7763
7764         kvm_x86_ops->get_idt(vcpu, &dt);
7765         put_smstate(u32, buf, 0x7e84, dt.size);
7766         put_smstate(u64, buf, 0x7e88, dt.address);
7767
7768         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
7769         put_smstate(u16, buf, 0x7e70, seg.selector);
7770         put_smstate(u16, buf, 0x7e72, enter_smm_get_segment_flags(&seg) >> 8);
7771         put_smstate(u32, buf, 0x7e74, seg.limit);
7772         put_smstate(u64, buf, 0x7e78, seg.base);
7773
7774         kvm_x86_ops->get_gdt(vcpu, &dt);
7775         put_smstate(u32, buf, 0x7e64, dt.size);
7776         put_smstate(u64, buf, 0x7e68, dt.address);
7777
7778         for (i = 0; i < 6; i++)
7779                 enter_smm_save_seg_64(vcpu, buf, i);
7780 }
7781 #endif
7782
7783 static void enter_smm(struct kvm_vcpu *vcpu)
7784 {
7785         struct kvm_segment cs, ds;
7786         struct desc_ptr dt;
7787         char buf[512];
7788         u32 cr0;
7789
7790         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
7791         memset(buf, 0, 512);
7792 #ifdef CONFIG_X86_64
7793         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7794                 enter_smm_save_state_64(vcpu, buf);
7795         else
7796 #endif
7797                 enter_smm_save_state_32(vcpu, buf);
7798
7799         /*
7800          * Give pre_enter_smm() a chance to make ISA-specific changes to the
7801          * vCPU state (e.g. leave guest mode) after we've saved the state into
7802          * the SMM state-save area.
7803          */
7804         kvm_x86_ops->pre_enter_smm(vcpu, buf);
7805
7806         vcpu->arch.hflags |= HF_SMM_MASK;
7807         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
7808
7809         if (kvm_x86_ops->get_nmi_mask(vcpu))
7810                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
7811         else
7812                 kvm_x86_ops->set_nmi_mask(vcpu, true);
7813
7814         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
7815         kvm_rip_write(vcpu, 0x8000);
7816
7817         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
7818         kvm_x86_ops->set_cr0(vcpu, cr0);
7819         vcpu->arch.cr0 = cr0;
7820
7821         kvm_x86_ops->set_cr4(vcpu, 0);
7822
7823         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
7824         dt.address = dt.size = 0;
7825         kvm_x86_ops->set_idt(vcpu, &dt);
7826
7827         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
7828
7829         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
7830         cs.base = vcpu->arch.smbase;
7831
7832         ds.selector = 0;
7833         ds.base = 0;
7834
7835         cs.limit    = ds.limit = 0xffffffff;
7836         cs.type     = ds.type = 0x3;
7837         cs.dpl      = ds.dpl = 0;
7838         cs.db       = ds.db = 0;
7839         cs.s        = ds.s = 1;
7840         cs.l        = ds.l = 0;
7841         cs.g        = ds.g = 1;
7842         cs.avl      = ds.avl = 0;
7843         cs.present  = ds.present = 1;
7844         cs.unusable = ds.unusable = 0;
7845         cs.padding  = ds.padding = 0;
7846
7847         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7848         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
7849         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
7850         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
7851         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
7852         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
7853
7854 #ifdef CONFIG_X86_64
7855         if (guest_cpuid_has(vcpu, X86_FEATURE_LM))
7856                 kvm_x86_ops->set_efer(vcpu, 0);
7857 #endif
7858
7859         kvm_update_cpuid(vcpu);
7860         kvm_mmu_reset_context(vcpu);
7861 }
7862
7863 static void process_smi(struct kvm_vcpu *vcpu)
7864 {
7865         vcpu->arch.smi_pending = true;
7866         kvm_make_request(KVM_REQ_EVENT, vcpu);
7867 }
7868
7869 void kvm_make_scan_ioapic_request(struct kvm *kvm)
7870 {
7871         kvm_make_all_cpus_request(kvm, KVM_REQ_SCAN_IOAPIC);
7872 }
7873
7874 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
7875 {
7876         if (!kvm_apic_present(vcpu))
7877                 return;
7878
7879         bitmap_zero(vcpu->arch.ioapic_handled_vectors, 256);
7880
7881         if (irqchip_split(vcpu->kvm))
7882                 kvm_scan_ioapic_routes(vcpu, vcpu->arch.ioapic_handled_vectors);
7883         else {
7884                 if (vcpu->arch.apicv_active)
7885                         kvm_x86_ops->sync_pir_to_irr(vcpu);
7886                 if (ioapic_in_kernel(vcpu->kvm))
7887                         kvm_ioapic_scan_entry(vcpu, vcpu->arch.ioapic_handled_vectors);
7888         }
7889
7890         if (is_guest_mode(vcpu))
7891                 vcpu->arch.load_eoi_exitmap_pending = true;
7892         else
7893                 kvm_make_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu);
7894 }
7895
7896 static void vcpu_load_eoi_exitmap(struct kvm_vcpu *vcpu)
7897 {
7898         u64 eoi_exit_bitmap[4];
7899
7900         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
7901                 return;
7902
7903         bitmap_or((ulong *)eoi_exit_bitmap, vcpu->arch.ioapic_handled_vectors,
7904                   vcpu_to_synic(vcpu)->vec_bitmap, 256);
7905         kvm_x86_ops->load_eoi_exitmap(vcpu, eoi_exit_bitmap);
7906 }
7907
7908 int kvm_arch_mmu_notifier_invalidate_range(struct kvm *kvm,
7909                 unsigned long start, unsigned long end,
7910                 bool blockable)
7911 {
7912         unsigned long apic_address;
7913
7914         /*
7915          * The physical address of apic access page is stored in the VMCS.
7916          * Update it when it becomes invalid.
7917          */
7918         apic_address = gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7919         if (start <= apic_address && apic_address < end)
7920                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
7921
7922         return 0;
7923 }
7924
7925 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
7926 {
7927         struct page *page = NULL;
7928
7929         if (!lapic_in_kernel(vcpu))
7930                 return;
7931
7932         if (!kvm_x86_ops->set_apic_access_page_addr)
7933                 return;
7934
7935         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
7936         if (is_error_page(page))
7937                 return;
7938         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
7939
7940         /*
7941          * Do not pin apic access page in memory, the MMU notifier
7942          * will call us again if it is migrated or swapped out.
7943          */
7944         put_page(page);
7945 }
7946 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
7947
7948 void __kvm_request_immediate_exit(struct kvm_vcpu *vcpu)
7949 {
7950         smp_send_reschedule(vcpu->cpu);
7951 }
7952 EXPORT_SYMBOL_GPL(__kvm_request_immediate_exit);
7953
7954 /*
7955  * Returns 1 to let vcpu_run() continue the guest execution loop without
7956  * exiting to the userspace.  Otherwise, the value will be returned to the
7957  * userspace.
7958  */
7959 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
7960 {
7961         int r;
7962         bool req_int_win =
7963                 dm_request_for_irq_injection(vcpu) &&
7964                 kvm_cpu_accept_dm_intr(vcpu);
7965
7966         bool req_immediate_exit = false;
7967
7968         if (kvm_request_pending(vcpu)) {
7969                 if (kvm_check_request(KVM_REQ_GET_VMCS12_PAGES, vcpu)) {
7970                         if (unlikely(!kvm_x86_ops->get_vmcs12_pages(vcpu))) {
7971                                 r = 0;
7972                                 goto out;
7973                         }
7974                 }
7975                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
7976                         kvm_mmu_unload(vcpu);
7977                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
7978                         __kvm_migrate_timers(vcpu);
7979                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
7980                         kvm_gen_update_masterclock(vcpu->kvm);
7981                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
7982                         kvm_gen_kvmclock_update(vcpu);
7983                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
7984                         r = kvm_guest_time_update(vcpu);
7985                         if (unlikely(r))
7986                                 goto out;
7987                 }
7988                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
7989                         kvm_mmu_sync_roots(vcpu);
7990                 if (kvm_check_request(KVM_REQ_LOAD_CR3, vcpu))
7991                         kvm_mmu_load_cr3(vcpu);
7992                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
7993                         kvm_vcpu_flush_tlb(vcpu, true);
7994                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
7995                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
7996                         r = 0;
7997                         goto out;
7998                 }
7999                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
8000                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
8001                         vcpu->mmio_needed = 0;
8002                         r = 0;
8003                         goto out;
8004                 }
8005                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
8006                         /* Page is swapped out. Do synthetic halt */
8007                         vcpu->arch.apf.halted = true;
8008                         r = 1;
8009                         goto out;
8010                 }
8011                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
8012                         record_steal_time(vcpu);
8013                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
8014                         process_smi(vcpu);
8015                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
8016                         process_nmi(vcpu);
8017                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
8018                         kvm_pmu_handle_event(vcpu);
8019                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
8020                         kvm_pmu_deliver_pmi(vcpu);
8021                 if (kvm_check_request(KVM_REQ_IOAPIC_EOI_EXIT, vcpu)) {
8022                         BUG_ON(vcpu->arch.pending_ioapic_eoi > 255);
8023                         if (test_bit(vcpu->arch.pending_ioapic_eoi,
8024                                      vcpu->arch.ioapic_handled_vectors)) {
8025                                 vcpu->run->exit_reason = KVM_EXIT_IOAPIC_EOI;
8026                                 vcpu->run->eoi.vector =
8027                                                 vcpu->arch.pending_ioapic_eoi;
8028                                 r = 0;
8029                                 goto out;
8030                         }
8031                 }
8032                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
8033                         vcpu_scan_ioapic(vcpu);
8034                 if (kvm_check_request(KVM_REQ_LOAD_EOI_EXITMAP, vcpu))
8035                         vcpu_load_eoi_exitmap(vcpu);
8036                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
8037                         kvm_vcpu_reload_apic_access_page(vcpu);
8038                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
8039                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8040                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
8041                         r = 0;
8042                         goto out;
8043                 }
8044                 if (kvm_check_request(KVM_REQ_HV_RESET, vcpu)) {
8045                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
8046                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_RESET;
8047                         r = 0;
8048                         goto out;
8049                 }
8050                 if (kvm_check_request(KVM_REQ_HV_EXIT, vcpu)) {
8051                         vcpu->run->exit_reason = KVM_EXIT_HYPERV;
8052                         vcpu->run->hyperv = vcpu->arch.hyperv.exit;
8053                         r = 0;
8054                         goto out;
8055                 }
8056
8057                 /*
8058                  * KVM_REQ_HV_STIMER has to be processed after
8059                  * KVM_REQ_CLOCK_UPDATE, because Hyper-V SynIC timers
8060                  * depend on the guest clock being up-to-date
8061                  */
8062                 if (kvm_check_request(KVM_REQ_HV_STIMER, vcpu))
8063                         kvm_hv_process_stimers(vcpu);
8064         }
8065
8066         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
8067                 ++vcpu->stat.req_event;
8068                 kvm_apic_accept_events(vcpu);
8069                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
8070                         r = 1;
8071                         goto out;
8072                 }
8073
8074                 if (inject_pending_event(vcpu, req_int_win) != 0)
8075                         req_immediate_exit = true;
8076                 else {
8077                         /* Enable SMI/NMI/IRQ window open exits if needed.
8078                          *
8079                          * SMIs have three cases:
8080                          * 1) They can be nested, and then there is nothing to
8081                          *    do here because RSM will cause a vmexit anyway.
8082                          * 2) There is an ISA-specific reason why SMI cannot be
8083                          *    injected, and the moment when this changes can be
8084                          *    intercepted.
8085                          * 3) Or the SMI can be pending because
8086                          *    inject_pending_event has completed the injection
8087                          *    of an IRQ or NMI from the previous vmexit, and
8088                          *    then we request an immediate exit to inject the
8089                          *    SMI.
8090                          */
8091                         if (vcpu->arch.smi_pending && !is_smm(vcpu))
8092                                 if (!kvm_x86_ops->enable_smi_window(vcpu))
8093                                         req_immediate_exit = true;
8094                         if (vcpu->arch.nmi_pending)
8095                                 kvm_x86_ops->enable_nmi_window(vcpu);
8096                         if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
8097                                 kvm_x86_ops->enable_irq_window(vcpu);
8098                         WARN_ON(vcpu->arch.exception.pending);
8099                 }
8100
8101                 if (kvm_lapic_enabled(vcpu)) {
8102                         update_cr8_intercept(vcpu);
8103                         kvm_lapic_sync_to_vapic(vcpu);
8104                 }
8105         }
8106
8107         r = kvm_mmu_reload(vcpu);
8108         if (unlikely(r)) {
8109                 goto cancel_injection;
8110         }
8111
8112         preempt_disable();
8113
8114         kvm_x86_ops->prepare_guest_switch(vcpu);
8115
8116         /*
8117          * Disable IRQs before setting IN_GUEST_MODE.  Posted interrupt
8118          * IPI are then delayed after guest entry, which ensures that they
8119          * result in virtual interrupt delivery.
8120          */
8121         local_irq_disable();
8122         vcpu->mode = IN_GUEST_MODE;
8123
8124         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8125
8126         /*
8127          * 1) We should set ->mode before checking ->requests.  Please see
8128          * the comment in kvm_vcpu_exiting_guest_mode().
8129          *
8130          * 2) For APICv, we should set ->mode before checking PID.ON. This
8131          * pairs with the memory barrier implicit in pi_test_and_set_on
8132          * (see vmx_deliver_posted_interrupt).
8133          *
8134          * 3) This also orders the write to mode from any reads to the page
8135          * tables done while the VCPU is running.  Please see the comment
8136          * in kvm_flush_remote_tlbs.
8137          */
8138         smp_mb__after_srcu_read_unlock();
8139
8140         /*
8141          * This handles the case where a posted interrupt was
8142          * notified with kvm_vcpu_kick.
8143          */
8144         if (kvm_lapic_enabled(vcpu) && vcpu->arch.apicv_active)
8145                 kvm_x86_ops->sync_pir_to_irr(vcpu);
8146
8147         if (vcpu->mode == EXITING_GUEST_MODE || kvm_request_pending(vcpu)
8148             || need_resched() || signal_pending(current)) {
8149                 vcpu->mode = OUTSIDE_GUEST_MODE;
8150                 smp_wmb();
8151                 local_irq_enable();
8152                 preempt_enable();
8153                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8154                 r = 1;
8155                 goto cancel_injection;
8156         }
8157
8158         if (req_immediate_exit) {
8159                 kvm_make_request(KVM_REQ_EVENT, vcpu);
8160                 kvm_x86_ops->request_immediate_exit(vcpu);
8161         }
8162
8163         trace_kvm_entry(vcpu->vcpu_id);
8164         guest_enter_irqoff();
8165
8166         /* The preempt notifier should have taken care of the FPU already.  */
8167         WARN_ON_ONCE(test_thread_flag(TIF_NEED_FPU_LOAD));
8168
8169         if (unlikely(vcpu->arch.switch_db_regs)) {
8170                 set_debugreg(0, 7);
8171                 set_debugreg(vcpu->arch.eff_db[0], 0);
8172                 set_debugreg(vcpu->arch.eff_db[1], 1);
8173                 set_debugreg(vcpu->arch.eff_db[2], 2);
8174                 set_debugreg(vcpu->arch.eff_db[3], 3);
8175                 set_debugreg(vcpu->arch.dr6, 6);
8176                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8177         }
8178
8179         kvm_x86_ops->run(vcpu);
8180
8181         /*
8182          * Do this here before restoring debug registers on the host.  And
8183          * since we do this before handling the vmexit, a DR access vmexit
8184          * can (a) read the correct value of the debug registers, (b) set
8185          * KVM_DEBUGREG_WONT_EXIT again.
8186          */
8187         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
8188                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
8189                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
8190                 kvm_update_dr0123(vcpu);
8191                 kvm_update_dr6(vcpu);
8192                 kvm_update_dr7(vcpu);
8193                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
8194         }
8195
8196         /*
8197          * If the guest has used debug registers, at least dr7
8198          * will be disabled while returning to the host.
8199          * If we don't have active breakpoints in the host, we don't
8200          * care about the messed up debug address registers. But if
8201          * we have some of them active, restore the old state.
8202          */
8203         if (hw_breakpoint_active())
8204                 hw_breakpoint_restore();
8205
8206         vcpu->arch.last_guest_tsc = kvm_read_l1_tsc(vcpu, rdtsc());
8207
8208         vcpu->mode = OUTSIDE_GUEST_MODE;
8209         smp_wmb();
8210
8211         kvm_x86_ops->handle_exit_irqoff(vcpu);
8212
8213         /*
8214          * Consume any pending interrupts, including the possible source of
8215          * VM-Exit on SVM and any ticks that occur between VM-Exit and now.
8216          * An instruction is required after local_irq_enable() to fully unblock
8217          * interrupts on processors that implement an interrupt shadow, the
8218          * stat.exits increment will do nicely.
8219          */
8220         kvm_before_interrupt(vcpu);
8221         local_irq_enable();
8222         ++vcpu->stat.exits;
8223         local_irq_disable();
8224         kvm_after_interrupt(vcpu);
8225
8226         guest_exit_irqoff();
8227         if (lapic_in_kernel(vcpu)) {
8228                 s64 delta = vcpu->arch.apic->lapic_timer.advance_expire_delta;
8229                 if (delta != S64_MIN) {
8230                         trace_kvm_wait_lapic_expire(vcpu->vcpu_id, delta);
8231                         vcpu->arch.apic->lapic_timer.advance_expire_delta = S64_MIN;
8232                 }
8233         }
8234
8235         local_irq_enable();
8236         preempt_enable();
8237
8238         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8239
8240         /*
8241          * Profile KVM exit RIPs:
8242          */
8243         if (unlikely(prof_on == KVM_PROFILING)) {
8244                 unsigned long rip = kvm_rip_read(vcpu);
8245                 profile_hit(KVM_PROFILING, (void *)rip);
8246         }
8247
8248         if (unlikely(vcpu->arch.tsc_always_catchup))
8249                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
8250
8251         if (vcpu->arch.apic_attention)
8252                 kvm_lapic_sync_from_vapic(vcpu);
8253
8254         vcpu->arch.gpa_available = false;
8255         r = kvm_x86_ops->handle_exit(vcpu);
8256         return r;
8257
8258 cancel_injection:
8259         kvm_x86_ops->cancel_injection(vcpu);
8260         if (unlikely(vcpu->arch.apic_attention))
8261                 kvm_lapic_sync_from_vapic(vcpu);
8262 out:
8263         return r;
8264 }
8265
8266 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
8267 {
8268         if (!kvm_arch_vcpu_runnable(vcpu) &&
8269             (!kvm_x86_ops->pre_block || kvm_x86_ops->pre_block(vcpu) == 0)) {
8270                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8271                 kvm_vcpu_block(vcpu);
8272                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8273
8274                 if (kvm_x86_ops->post_block)
8275                         kvm_x86_ops->post_block(vcpu);
8276
8277                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
8278                         return 1;
8279         }
8280
8281         kvm_apic_accept_events(vcpu);
8282         switch(vcpu->arch.mp_state) {
8283         case KVM_MP_STATE_HALTED:
8284                 vcpu->arch.pv.pv_unhalted = false;
8285                 vcpu->arch.mp_state =
8286                         KVM_MP_STATE_RUNNABLE;
8287                 /* fall through */
8288         case KVM_MP_STATE_RUNNABLE:
8289                 vcpu->arch.apf.halted = false;
8290                 break;
8291         case KVM_MP_STATE_INIT_RECEIVED:
8292                 break;
8293         default:
8294                 return -EINTR;
8295                 break;
8296         }
8297         return 1;
8298 }
8299
8300 static inline bool kvm_vcpu_running(struct kvm_vcpu *vcpu)
8301 {
8302         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
8303                 kvm_x86_ops->check_nested_events(vcpu, false);
8304
8305         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
8306                 !vcpu->arch.apf.halted);
8307 }
8308
8309 static int vcpu_run(struct kvm_vcpu *vcpu)
8310 {
8311         int r;
8312         struct kvm *kvm = vcpu->kvm;
8313
8314         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8315         vcpu->arch.l1tf_flush_l1d = true;
8316
8317         for (;;) {
8318                 if (kvm_vcpu_running(vcpu)) {
8319                         r = vcpu_enter_guest(vcpu);
8320                 } else {
8321                         r = vcpu_block(kvm, vcpu);
8322                 }
8323
8324                 if (r <= 0)
8325                         break;
8326
8327                 kvm_clear_request(KVM_REQ_PENDING_TIMER, vcpu);
8328                 if (kvm_cpu_has_pending_timer(vcpu))
8329                         kvm_inject_pending_timer_irqs(vcpu);
8330
8331                 if (dm_request_for_irq_injection(vcpu) &&
8332                         kvm_vcpu_ready_for_interrupt_injection(vcpu)) {
8333                         r = 0;
8334                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
8335                         ++vcpu->stat.request_irq_exits;
8336                         break;
8337                 }
8338
8339                 kvm_check_async_pf_completion(vcpu);
8340
8341                 if (signal_pending(current)) {
8342                         r = -EINTR;
8343                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8344                         ++vcpu->stat.signal_exits;
8345                         break;
8346                 }
8347                 if (need_resched()) {
8348                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8349                         cond_resched();
8350                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
8351                 }
8352         }
8353
8354         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
8355
8356         return r;
8357 }
8358
8359 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
8360 {
8361         int r;
8362
8363         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
8364         r = kvm_emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
8365         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
8366         return r;
8367 }
8368
8369 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
8370 {
8371         BUG_ON(!vcpu->arch.pio.count);
8372
8373         return complete_emulated_io(vcpu);
8374 }
8375
8376 /*
8377  * Implements the following, as a state machine:
8378  *
8379  * read:
8380  *   for each fragment
8381  *     for each mmio piece in the fragment
8382  *       write gpa, len
8383  *       exit
8384  *       copy data
8385  *   execute insn
8386  *
8387  * write:
8388  *   for each fragment
8389  *     for each mmio piece in the fragment
8390  *       write gpa, len
8391  *       copy data
8392  *       exit
8393  */
8394 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
8395 {
8396         struct kvm_run *run = vcpu->run;
8397         struct kvm_mmio_fragment *frag;
8398         unsigned len;
8399
8400         BUG_ON(!vcpu->mmio_needed);
8401
8402         /* Complete previous fragment */
8403         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
8404         len = min(8u, frag->len);
8405         if (!vcpu->mmio_is_write)
8406                 memcpy(frag->data, run->mmio.data, len);
8407
8408         if (frag->len <= 8) {
8409                 /* Switch to the next fragment. */
8410                 frag++;
8411                 vcpu->mmio_cur_fragment++;
8412         } else {
8413                 /* Go forward to the next mmio piece. */
8414                 frag->data += len;
8415                 frag->gpa += len;
8416                 frag->len -= len;
8417         }
8418
8419         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
8420                 vcpu->mmio_needed = 0;
8421
8422                 /* FIXME: return into emulator if single-stepping.  */
8423                 if (vcpu->mmio_is_write)
8424                         return 1;
8425                 vcpu->mmio_read_completed = 1;
8426                 return complete_emulated_io(vcpu);
8427         }
8428
8429         run->exit_reason = KVM_EXIT_MMIO;
8430         run->mmio.phys_addr = frag->gpa;
8431         if (vcpu->mmio_is_write)
8432                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
8433         run->mmio.len = min(8u, frag->len);
8434         run->mmio.is_write = vcpu->mmio_is_write;
8435         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
8436         return 0;
8437 }
8438
8439 /* Swap (qemu) user FPU context for the guest FPU context. */
8440 static void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
8441 {
8442         fpregs_lock();
8443
8444         copy_fpregs_to_fpstate(vcpu->arch.user_fpu);
8445         /* PKRU is separately restored in kvm_x86_ops->run.  */
8446         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu->state,
8447                                 ~XFEATURE_MASK_PKRU);
8448
8449         fpregs_mark_activate();
8450         fpregs_unlock();
8451
8452         trace_kvm_fpu(1);
8453 }
8454
8455 /* When vcpu_run ends, restore user space FPU context. */
8456 static void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
8457 {
8458         fpregs_lock();
8459
8460         copy_fpregs_to_fpstate(vcpu->arch.guest_fpu);
8461         copy_kernel_to_fpregs(&vcpu->arch.user_fpu->state);
8462
8463         fpregs_mark_activate();
8464         fpregs_unlock();
8465
8466         ++vcpu->stat.fpu_reload;
8467         trace_kvm_fpu(0);
8468 }
8469
8470 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
8471 {
8472         int r;
8473
8474         vcpu_load(vcpu);
8475         kvm_sigset_activate(vcpu);
8476         kvm_load_guest_fpu(vcpu);
8477
8478         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
8479                 if (kvm_run->immediate_exit) {
8480                         r = -EINTR;
8481                         goto out;
8482                 }
8483                 kvm_vcpu_block(vcpu);
8484                 kvm_apic_accept_events(vcpu);
8485                 kvm_clear_request(KVM_REQ_UNHALT, vcpu);
8486                 r = -EAGAIN;
8487                 if (signal_pending(current)) {
8488                         r = -EINTR;
8489                         vcpu->run->exit_reason = KVM_EXIT_INTR;
8490                         ++vcpu->stat.signal_exits;
8491                 }
8492                 goto out;
8493         }
8494
8495         if (vcpu->run->kvm_valid_regs & ~KVM_SYNC_X86_VALID_FIELDS) {
8496                 r = -EINVAL;
8497                 goto out;
8498         }
8499
8500         if (vcpu->run->kvm_dirty_regs) {
8501                 r = sync_regs(vcpu);
8502                 if (r != 0)
8503                         goto out;
8504         }
8505
8506         /* re-sync apic's tpr */
8507         if (!lapic_in_kernel(vcpu)) {
8508                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
8509                         r = -EINVAL;
8510                         goto out;
8511                 }
8512         }
8513
8514         if (unlikely(vcpu->arch.complete_userspace_io)) {
8515                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
8516                 vcpu->arch.complete_userspace_io = NULL;
8517                 r = cui(vcpu);
8518                 if (r <= 0)
8519                         goto out;
8520         } else
8521                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
8522
8523         if (kvm_run->immediate_exit)
8524                 r = -EINTR;
8525         else
8526                 r = vcpu_run(vcpu);
8527
8528 out:
8529         kvm_put_guest_fpu(vcpu);
8530         if (vcpu->run->kvm_valid_regs)
8531                 store_regs(vcpu);
8532         post_kvm_run_save(vcpu);
8533         kvm_sigset_deactivate(vcpu);
8534
8535         vcpu_put(vcpu);
8536         return r;
8537 }
8538
8539 static void __get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8540 {
8541         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
8542                 /*
8543                  * We are here if userspace calls get_regs() in the middle of
8544                  * instruction emulation. Registers state needs to be copied
8545                  * back from emulation context to vcpu. Userspace shouldn't do
8546                  * that usually, but some bad designed PV devices (vmware
8547                  * backdoor interface) need this to work
8548                  */
8549                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
8550                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8551         }
8552         regs->rax = kvm_rax_read(vcpu);
8553         regs->rbx = kvm_rbx_read(vcpu);
8554         regs->rcx = kvm_rcx_read(vcpu);
8555         regs->rdx = kvm_rdx_read(vcpu);
8556         regs->rsi = kvm_rsi_read(vcpu);
8557         regs->rdi = kvm_rdi_read(vcpu);
8558         regs->rsp = kvm_rsp_read(vcpu);
8559         regs->rbp = kvm_rbp_read(vcpu);
8560 #ifdef CONFIG_X86_64
8561         regs->r8 = kvm_r8_read(vcpu);
8562         regs->r9 = kvm_r9_read(vcpu);
8563         regs->r10 = kvm_r10_read(vcpu);
8564         regs->r11 = kvm_r11_read(vcpu);
8565         regs->r12 = kvm_r12_read(vcpu);
8566         regs->r13 = kvm_r13_read(vcpu);
8567         regs->r14 = kvm_r14_read(vcpu);
8568         regs->r15 = kvm_r15_read(vcpu);
8569 #endif
8570
8571         regs->rip = kvm_rip_read(vcpu);
8572         regs->rflags = kvm_get_rflags(vcpu);
8573 }
8574
8575 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8576 {
8577         vcpu_load(vcpu);
8578         __get_regs(vcpu, regs);
8579         vcpu_put(vcpu);
8580         return 0;
8581 }
8582
8583 static void __set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8584 {
8585         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
8586         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
8587
8588         kvm_rax_write(vcpu, regs->rax);
8589         kvm_rbx_write(vcpu, regs->rbx);
8590         kvm_rcx_write(vcpu, regs->rcx);
8591         kvm_rdx_write(vcpu, regs->rdx);
8592         kvm_rsi_write(vcpu, regs->rsi);
8593         kvm_rdi_write(vcpu, regs->rdi);
8594         kvm_rsp_write(vcpu, regs->rsp);
8595         kvm_rbp_write(vcpu, regs->rbp);
8596 #ifdef CONFIG_X86_64
8597         kvm_r8_write(vcpu, regs->r8);
8598         kvm_r9_write(vcpu, regs->r9);
8599         kvm_r10_write(vcpu, regs->r10);
8600         kvm_r11_write(vcpu, regs->r11);
8601         kvm_r12_write(vcpu, regs->r12);
8602         kvm_r13_write(vcpu, regs->r13);
8603         kvm_r14_write(vcpu, regs->r14);
8604         kvm_r15_write(vcpu, regs->r15);
8605 #endif
8606
8607         kvm_rip_write(vcpu, regs->rip);
8608         kvm_set_rflags(vcpu, regs->rflags | X86_EFLAGS_FIXED);
8609
8610         vcpu->arch.exception.pending = false;
8611
8612         kvm_make_request(KVM_REQ_EVENT, vcpu);
8613 }
8614
8615 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
8616 {
8617         vcpu_load(vcpu);
8618         __set_regs(vcpu, regs);
8619         vcpu_put(vcpu);
8620         return 0;
8621 }
8622
8623 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
8624 {
8625         struct kvm_segment cs;
8626
8627         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
8628         *db = cs.db;
8629         *l = cs.l;
8630 }
8631 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
8632
8633 static void __get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8634 {
8635         struct desc_ptr dt;
8636
8637         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8638         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8639         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8640         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8641         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8642         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8643
8644         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8645         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8646
8647         kvm_x86_ops->get_idt(vcpu, &dt);
8648         sregs->idt.limit = dt.size;
8649         sregs->idt.base = dt.address;
8650         kvm_x86_ops->get_gdt(vcpu, &dt);
8651         sregs->gdt.limit = dt.size;
8652         sregs->gdt.base = dt.address;
8653
8654         sregs->cr0 = kvm_read_cr0(vcpu);
8655         sregs->cr2 = vcpu->arch.cr2;
8656         sregs->cr3 = kvm_read_cr3(vcpu);
8657         sregs->cr4 = kvm_read_cr4(vcpu);
8658         sregs->cr8 = kvm_get_cr8(vcpu);
8659         sregs->efer = vcpu->arch.efer;
8660         sregs->apic_base = kvm_get_apic_base(vcpu);
8661
8662         memset(sregs->interrupt_bitmap, 0, sizeof(sregs->interrupt_bitmap));
8663
8664         if (vcpu->arch.interrupt.injected && !vcpu->arch.interrupt.soft)
8665                 set_bit(vcpu->arch.interrupt.nr,
8666                         (unsigned long *)sregs->interrupt_bitmap);
8667 }
8668
8669 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
8670                                   struct kvm_sregs *sregs)
8671 {
8672         vcpu_load(vcpu);
8673         __get_sregs(vcpu, sregs);
8674         vcpu_put(vcpu);
8675         return 0;
8676 }
8677
8678 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
8679                                     struct kvm_mp_state *mp_state)
8680 {
8681         vcpu_load(vcpu);
8682
8683         kvm_apic_accept_events(vcpu);
8684         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
8685                                         vcpu->arch.pv.pv_unhalted)
8686                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
8687         else
8688                 mp_state->mp_state = vcpu->arch.mp_state;
8689
8690         vcpu_put(vcpu);
8691         return 0;
8692 }
8693
8694 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
8695                                     struct kvm_mp_state *mp_state)
8696 {
8697         int ret = -EINVAL;
8698
8699         vcpu_load(vcpu);
8700
8701         if (!lapic_in_kernel(vcpu) &&
8702             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
8703                 goto out;
8704
8705         /* INITs are latched while in SMM */
8706         if ((is_smm(vcpu) || vcpu->arch.smi_pending) &&
8707             (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED ||
8708              mp_state->mp_state == KVM_MP_STATE_INIT_RECEIVED))
8709                 goto out;
8710
8711         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
8712                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
8713                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
8714         } else
8715                 vcpu->arch.mp_state = mp_state->mp_state;
8716         kvm_make_request(KVM_REQ_EVENT, vcpu);
8717
8718         ret = 0;
8719 out:
8720         vcpu_put(vcpu);
8721         return ret;
8722 }
8723
8724 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
8725                     int reason, bool has_error_code, u32 error_code)
8726 {
8727         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
8728         int ret;
8729
8730         init_emulate_ctxt(vcpu);
8731
8732         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
8733                                    has_error_code, error_code);
8734         if (ret) {
8735                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
8736                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
8737                 vcpu->run->internal.ndata = 0;
8738                 return 0;
8739         }
8740
8741         kvm_rip_write(vcpu, ctxt->eip);
8742         kvm_set_rflags(vcpu, ctxt->eflags);
8743         kvm_make_request(KVM_REQ_EVENT, vcpu);
8744         return 1;
8745 }
8746 EXPORT_SYMBOL_GPL(kvm_task_switch);
8747
8748 static int kvm_valid_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8749 {
8750         if ((sregs->efer & EFER_LME) && (sregs->cr0 & X86_CR0_PG)) {
8751                 /*
8752                  * When EFER.LME and CR0.PG are set, the processor is in
8753                  * 64-bit mode (though maybe in a 32-bit code segment).
8754                  * CR4.PAE and EFER.LMA must be set.
8755                  */
8756                 if (!(sregs->cr4 & X86_CR4_PAE)
8757                     || !(sregs->efer & EFER_LMA))
8758                         return -EINVAL;
8759         } else {
8760                 /*
8761                  * Not in 64-bit mode: EFER.LMA is clear and the code
8762                  * segment cannot be 64-bit.
8763                  */
8764                 if (sregs->efer & EFER_LMA || sregs->cs.l)
8765                         return -EINVAL;
8766         }
8767
8768         return kvm_valid_cr4(vcpu, sregs->cr4);
8769 }
8770
8771 static int __set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
8772 {
8773         struct msr_data apic_base_msr;
8774         int mmu_reset_needed = 0;
8775         int cpuid_update_needed = 0;
8776         int pending_vec, max_bits, idx;
8777         struct desc_ptr dt;
8778         int ret = -EINVAL;
8779
8780         if (kvm_valid_sregs(vcpu, sregs))
8781                 goto out;
8782
8783         apic_base_msr.data = sregs->apic_base;
8784         apic_base_msr.host_initiated = true;
8785         if (kvm_set_apic_base(vcpu, &apic_base_msr))
8786                 goto out;
8787
8788         dt.size = sregs->idt.limit;
8789         dt.address = sregs->idt.base;
8790         kvm_x86_ops->set_idt(vcpu, &dt);
8791         dt.size = sregs->gdt.limit;
8792         dt.address = sregs->gdt.base;
8793         kvm_x86_ops->set_gdt(vcpu, &dt);
8794
8795         vcpu->arch.cr2 = sregs->cr2;
8796         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
8797         vcpu->arch.cr3 = sregs->cr3;
8798         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
8799
8800         kvm_set_cr8(vcpu, sregs->cr8);
8801
8802         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
8803         kvm_x86_ops->set_efer(vcpu, sregs->efer);
8804
8805         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
8806         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
8807         vcpu->arch.cr0 = sregs->cr0;
8808
8809         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
8810         cpuid_update_needed |= ((kvm_read_cr4(vcpu) ^ sregs->cr4) &
8811                                 (X86_CR4_OSXSAVE | X86_CR4_PKE));
8812         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
8813         if (cpuid_update_needed)
8814                 kvm_update_cpuid(vcpu);
8815
8816         idx = srcu_read_lock(&vcpu->kvm->srcu);
8817         if (is_pae_paging(vcpu)) {
8818                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
8819                 mmu_reset_needed = 1;
8820         }
8821         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8822
8823         if (mmu_reset_needed)
8824                 kvm_mmu_reset_context(vcpu);
8825
8826         max_bits = KVM_NR_INTERRUPTS;
8827         pending_vec = find_first_bit(
8828                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
8829         if (pending_vec < max_bits) {
8830                 kvm_queue_interrupt(vcpu, pending_vec, false);
8831                 pr_debug("Set back pending irq %d\n", pending_vec);
8832         }
8833
8834         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
8835         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
8836         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
8837         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
8838         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
8839         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
8840
8841         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
8842         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
8843
8844         update_cr8_intercept(vcpu);
8845
8846         /* Older userspace won't unhalt the vcpu on reset. */
8847         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
8848             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
8849             !is_protmode(vcpu))
8850                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
8851
8852         kvm_make_request(KVM_REQ_EVENT, vcpu);
8853
8854         ret = 0;
8855 out:
8856         return ret;
8857 }
8858
8859 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
8860                                   struct kvm_sregs *sregs)
8861 {
8862         int ret;
8863
8864         vcpu_load(vcpu);
8865         ret = __set_sregs(vcpu, sregs);
8866         vcpu_put(vcpu);
8867         return ret;
8868 }
8869
8870 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
8871                                         struct kvm_guest_debug *dbg)
8872 {
8873         unsigned long rflags;
8874         int i, r;
8875
8876         vcpu_load(vcpu);
8877
8878         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
8879                 r = -EBUSY;
8880                 if (vcpu->arch.exception.pending)
8881                         goto out;
8882                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
8883                         kvm_queue_exception(vcpu, DB_VECTOR);
8884                 else
8885                         kvm_queue_exception(vcpu, BP_VECTOR);
8886         }
8887
8888         /*
8889          * Read rflags as long as potentially injected trace flags are still
8890          * filtered out.
8891          */
8892         rflags = kvm_get_rflags(vcpu);
8893
8894         vcpu->guest_debug = dbg->control;
8895         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
8896                 vcpu->guest_debug = 0;
8897
8898         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
8899                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
8900                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
8901                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
8902         } else {
8903                 for (i = 0; i < KVM_NR_DB_REGS; i++)
8904                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
8905         }
8906         kvm_update_dr7(vcpu);
8907
8908         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
8909                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
8910                         get_segment_base(vcpu, VCPU_SREG_CS);
8911
8912         /*
8913          * Trigger an rflags update that will inject or remove the trace
8914          * flags.
8915          */
8916         kvm_set_rflags(vcpu, rflags);
8917
8918         kvm_x86_ops->update_bp_intercept(vcpu);
8919
8920         r = 0;
8921
8922 out:
8923         vcpu_put(vcpu);
8924         return r;
8925 }
8926
8927 /*
8928  * Translate a guest virtual address to a guest physical address.
8929  */
8930 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
8931                                     struct kvm_translation *tr)
8932 {
8933         unsigned long vaddr = tr->linear_address;
8934         gpa_t gpa;
8935         int idx;
8936
8937         vcpu_load(vcpu);
8938
8939         idx = srcu_read_lock(&vcpu->kvm->srcu);
8940         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
8941         srcu_read_unlock(&vcpu->kvm->srcu, idx);
8942         tr->physical_address = gpa;
8943         tr->valid = gpa != UNMAPPED_GVA;
8944         tr->writeable = 1;
8945         tr->usermode = 0;
8946
8947         vcpu_put(vcpu);
8948         return 0;
8949 }
8950
8951 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8952 {
8953         struct fxregs_state *fxsave;
8954
8955         vcpu_load(vcpu);
8956
8957         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8958         memcpy(fpu->fpr, fxsave->st_space, 128);
8959         fpu->fcw = fxsave->cwd;
8960         fpu->fsw = fxsave->swd;
8961         fpu->ftwx = fxsave->twd;
8962         fpu->last_opcode = fxsave->fop;
8963         fpu->last_ip = fxsave->rip;
8964         fpu->last_dp = fxsave->rdp;
8965         memcpy(fpu->xmm, fxsave->xmm_space, sizeof(fxsave->xmm_space));
8966
8967         vcpu_put(vcpu);
8968         return 0;
8969 }
8970
8971 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
8972 {
8973         struct fxregs_state *fxsave;
8974
8975         vcpu_load(vcpu);
8976
8977         fxsave = &vcpu->arch.guest_fpu->state.fxsave;
8978
8979         memcpy(fxsave->st_space, fpu->fpr, 128);
8980         fxsave->cwd = fpu->fcw;
8981         fxsave->swd = fpu->fsw;
8982         fxsave->twd = fpu->ftwx;
8983         fxsave->fop = fpu->last_opcode;
8984         fxsave->rip = fpu->last_ip;
8985         fxsave->rdp = fpu->last_dp;
8986         memcpy(fxsave->xmm_space, fpu->xmm, sizeof(fxsave->xmm_space));
8987
8988         vcpu_put(vcpu);
8989         return 0;
8990 }
8991
8992 static void store_regs(struct kvm_vcpu *vcpu)
8993 {
8994         BUILD_BUG_ON(sizeof(struct kvm_sync_regs) > SYNC_REGS_SIZE_BYTES);
8995
8996         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_REGS)
8997                 __get_regs(vcpu, &vcpu->run->s.regs.regs);
8998
8999         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_SREGS)
9000                 __get_sregs(vcpu, &vcpu->run->s.regs.sregs);
9001
9002         if (vcpu->run->kvm_valid_regs & KVM_SYNC_X86_EVENTS)
9003                 kvm_vcpu_ioctl_x86_get_vcpu_events(
9004                                 vcpu, &vcpu->run->s.regs.events);
9005 }
9006
9007 static int sync_regs(struct kvm_vcpu *vcpu)
9008 {
9009         if (vcpu->run->kvm_dirty_regs & ~KVM_SYNC_X86_VALID_FIELDS)
9010                 return -EINVAL;
9011
9012         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_REGS) {
9013                 __set_regs(vcpu, &vcpu->run->s.regs.regs);
9014                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_REGS;
9015         }
9016         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_SREGS) {
9017                 if (__set_sregs(vcpu, &vcpu->run->s.regs.sregs))
9018                         return -EINVAL;
9019                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_SREGS;
9020         }
9021         if (vcpu->run->kvm_dirty_regs & KVM_SYNC_X86_EVENTS) {
9022                 if (kvm_vcpu_ioctl_x86_set_vcpu_events(
9023                                 vcpu, &vcpu->run->s.regs.events))
9024                         return -EINVAL;
9025                 vcpu->run->kvm_dirty_regs &= ~KVM_SYNC_X86_EVENTS;
9026         }
9027
9028         return 0;
9029 }
9030
9031 static void fx_init(struct kvm_vcpu *vcpu)
9032 {
9033         fpstate_init(&vcpu->arch.guest_fpu->state);
9034         if (boot_cpu_has(X86_FEATURE_XSAVES))
9035                 vcpu->arch.guest_fpu->state.xsave.header.xcomp_bv =
9036                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
9037
9038         /*
9039          * Ensure guest xcr0 is valid for loading
9040          */
9041         vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9042
9043         vcpu->arch.cr0 |= X86_CR0_ET;
9044 }
9045
9046 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
9047 {
9048         void *wbinvd_dirty_mask = vcpu->arch.wbinvd_dirty_mask;
9049
9050         kvmclock_reset(vcpu);
9051
9052         kvm_x86_ops->vcpu_free(vcpu);
9053         free_cpumask_var(wbinvd_dirty_mask);
9054 }
9055
9056 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
9057                                                 unsigned int id)
9058 {
9059         struct kvm_vcpu *vcpu;
9060
9061         if (kvm_check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
9062                 printk_once(KERN_WARNING
9063                 "kvm: SMP vm created on host with unstable TSC; "
9064                 "guest TSC will not be reliable\n");
9065
9066         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
9067
9068         return vcpu;
9069 }
9070
9071 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
9072 {
9073         vcpu->arch.arch_capabilities = kvm_get_arch_capabilities();
9074         vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
9075         kvm_vcpu_mtrr_init(vcpu);
9076         vcpu_load(vcpu);
9077         kvm_vcpu_reset(vcpu, false);
9078         kvm_init_mmu(vcpu, false);
9079         vcpu_put(vcpu);
9080         return 0;
9081 }
9082
9083 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
9084 {
9085         struct msr_data msr;
9086         struct kvm *kvm = vcpu->kvm;
9087
9088         kvm_hv_vcpu_postcreate(vcpu);
9089
9090         if (mutex_lock_killable(&vcpu->mutex))
9091                 return;
9092         vcpu_load(vcpu);
9093         msr.data = 0x0;
9094         msr.index = MSR_IA32_TSC;
9095         msr.host_initiated = true;
9096         kvm_write_tsc(vcpu, &msr);
9097         vcpu_put(vcpu);
9098
9099         /* poll control enabled by default */
9100         vcpu->arch.msr_kvm_poll_control = 1;
9101
9102         mutex_unlock(&vcpu->mutex);
9103
9104         if (!kvmclock_periodic_sync)
9105                 return;
9106
9107         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
9108                                         KVMCLOCK_SYNC_PERIOD);
9109 }
9110
9111 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
9112 {
9113         vcpu->arch.apf.msr_val = 0;
9114
9115         vcpu_load(vcpu);
9116         kvm_mmu_unload(vcpu);
9117         vcpu_put(vcpu);
9118
9119         kvm_x86_ops->vcpu_free(vcpu);
9120 }
9121
9122 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
9123 {
9124         kvm_lapic_reset(vcpu, init_event);
9125
9126         vcpu->arch.hflags = 0;
9127
9128         vcpu->arch.smi_pending = 0;
9129         vcpu->arch.smi_count = 0;
9130         atomic_set(&vcpu->arch.nmi_queued, 0);
9131         vcpu->arch.nmi_pending = 0;
9132         vcpu->arch.nmi_injected = false;
9133         kvm_clear_interrupt_queue(vcpu);
9134         kvm_clear_exception_queue(vcpu);
9135         vcpu->arch.exception.pending = false;
9136
9137         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
9138         kvm_update_dr0123(vcpu);
9139         vcpu->arch.dr6 = DR6_INIT;
9140         kvm_update_dr6(vcpu);
9141         vcpu->arch.dr7 = DR7_FIXED_1;
9142         kvm_update_dr7(vcpu);
9143
9144         vcpu->arch.cr2 = 0;
9145
9146         kvm_make_request(KVM_REQ_EVENT, vcpu);
9147         vcpu->arch.apf.msr_val = 0;
9148         vcpu->arch.st.msr_val = 0;
9149
9150         kvmclock_reset(vcpu);
9151
9152         kvm_clear_async_pf_completion_queue(vcpu);
9153         kvm_async_pf_hash_reset(vcpu);
9154         vcpu->arch.apf.halted = false;
9155
9156         if (kvm_mpx_supported()) {
9157                 void *mpx_state_buffer;
9158
9159                 /*
9160                  * To avoid have the INIT path from kvm_apic_has_events() that be
9161                  * called with loaded FPU and does not let userspace fix the state.
9162                  */
9163                 if (init_event)
9164                         kvm_put_guest_fpu(vcpu);
9165                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9166                                         XFEATURE_BNDREGS);
9167                 if (mpx_state_buffer)
9168                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndreg_state));
9169                 mpx_state_buffer = get_xsave_addr(&vcpu->arch.guest_fpu->state.xsave,
9170                                         XFEATURE_BNDCSR);
9171                 if (mpx_state_buffer)
9172                         memset(mpx_state_buffer, 0, sizeof(struct mpx_bndcsr));
9173                 if (init_event)
9174                         kvm_load_guest_fpu(vcpu);
9175         }
9176
9177         if (!init_event) {
9178                 kvm_pmu_reset(vcpu);
9179                 vcpu->arch.smbase = 0x30000;
9180
9181                 vcpu->arch.msr_misc_features_enables = 0;
9182
9183                 vcpu->arch.xcr0 = XFEATURE_MASK_FP;
9184         }
9185
9186         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
9187         vcpu->arch.regs_avail = ~0;
9188         vcpu->arch.regs_dirty = ~0;
9189
9190         vcpu->arch.ia32_xss = 0;
9191
9192         kvm_x86_ops->vcpu_reset(vcpu, init_event);
9193 }
9194
9195 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
9196 {
9197         struct kvm_segment cs;
9198
9199         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
9200         cs.selector = vector << 8;
9201         cs.base = vector << 12;
9202         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
9203         kvm_rip_write(vcpu, 0);
9204 }
9205
9206 int kvm_arch_hardware_enable(void)
9207 {
9208         struct kvm *kvm;
9209         struct kvm_vcpu *vcpu;
9210         int i;
9211         int ret;
9212         u64 local_tsc;
9213         u64 max_tsc = 0;
9214         bool stable, backwards_tsc = false;
9215
9216         kvm_shared_msr_cpu_online();
9217         ret = kvm_x86_ops->hardware_enable();
9218         if (ret != 0)
9219                 return ret;
9220
9221         local_tsc = rdtsc();
9222         stable = !kvm_check_tsc_unstable();
9223         list_for_each_entry(kvm, &vm_list, vm_list) {
9224                 kvm_for_each_vcpu(i, vcpu, kvm) {
9225                         if (!stable && vcpu->cpu == smp_processor_id())
9226                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
9227                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
9228                                 backwards_tsc = true;
9229                                 if (vcpu->arch.last_host_tsc > max_tsc)
9230                                         max_tsc = vcpu->arch.last_host_tsc;
9231                         }
9232                 }
9233         }
9234
9235         /*
9236          * Sometimes, even reliable TSCs go backwards.  This happens on
9237          * platforms that reset TSC during suspend or hibernate actions, but
9238          * maintain synchronization.  We must compensate.  Fortunately, we can
9239          * detect that condition here, which happens early in CPU bringup,
9240          * before any KVM threads can be running.  Unfortunately, we can't
9241          * bring the TSCs fully up to date with real time, as we aren't yet far
9242          * enough into CPU bringup that we know how much real time has actually
9243          * elapsed; our helper function, ktime_get_boottime_ns() will be using boot
9244          * variables that haven't been updated yet.
9245          *
9246          * So we simply find the maximum observed TSC above, then record the
9247          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
9248          * the adjustment will be applied.  Note that we accumulate
9249          * adjustments, in case multiple suspend cycles happen before some VCPU
9250          * gets a chance to run again.  In the event that no KVM threads get a
9251          * chance to run, we will miss the entire elapsed period, as we'll have
9252          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
9253          * loose cycle time.  This isn't too big a deal, since the loss will be
9254          * uniform across all VCPUs (not to mention the scenario is extremely
9255          * unlikely). It is possible that a second hibernate recovery happens
9256          * much faster than a first, causing the observed TSC here to be
9257          * smaller; this would require additional padding adjustment, which is
9258          * why we set last_host_tsc to the local tsc observed here.
9259          *
9260          * N.B. - this code below runs only on platforms with reliable TSC,
9261          * as that is the only way backwards_tsc is set above.  Also note
9262          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
9263          * have the same delta_cyc adjustment applied if backwards_tsc
9264          * is detected.  Note further, this adjustment is only done once,
9265          * as we reset last_host_tsc on all VCPUs to stop this from being
9266          * called multiple times (one for each physical CPU bringup).
9267          *
9268          * Platforms with unreliable TSCs don't have to deal with this, they
9269          * will be compensated by the logic in vcpu_load, which sets the TSC to
9270          * catchup mode.  This will catchup all VCPUs to real time, but cannot
9271          * guarantee that they stay in perfect synchronization.
9272          */
9273         if (backwards_tsc) {
9274                 u64 delta_cyc = max_tsc - local_tsc;
9275                 list_for_each_entry(kvm, &vm_list, vm_list) {
9276                         kvm->arch.backwards_tsc_observed = true;
9277                         kvm_for_each_vcpu(i, vcpu, kvm) {
9278                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
9279                                 vcpu->arch.last_host_tsc = local_tsc;
9280                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
9281                         }
9282
9283                         /*
9284                          * We have to disable TSC offset matching.. if you were
9285                          * booting a VM while issuing an S4 host suspend....
9286                          * you may have some problem.  Solving this issue is
9287                          * left as an exercise to the reader.
9288                          */
9289                         kvm->arch.last_tsc_nsec = 0;
9290                         kvm->arch.last_tsc_write = 0;
9291                 }
9292
9293         }
9294         return 0;
9295 }
9296
9297 void kvm_arch_hardware_disable(void)
9298 {
9299         kvm_x86_ops->hardware_disable();
9300         drop_user_return_notifiers();
9301 }
9302
9303 int kvm_arch_hardware_setup(void)
9304 {
9305         int r;
9306
9307         r = kvm_x86_ops->hardware_setup();
9308         if (r != 0)
9309                 return r;
9310
9311         if (kvm_has_tsc_control) {
9312                 /*
9313                  * Make sure the user can only configure tsc_khz values that
9314                  * fit into a signed integer.
9315                  * A min value is not calculated because it will always
9316                  * be 1 on all machines.
9317                  */
9318                 u64 max = min(0x7fffffffULL,
9319                               __scale_tsc(kvm_max_tsc_scaling_ratio, tsc_khz));
9320                 kvm_max_guest_tsc_khz = max;
9321
9322                 kvm_default_tsc_scaling_ratio = 1ULL << kvm_tsc_scaling_ratio_frac_bits;
9323         }
9324
9325         kvm_init_msr_list();
9326         return 0;
9327 }
9328
9329 void kvm_arch_hardware_unsetup(void)
9330 {
9331         kvm_x86_ops->hardware_unsetup();
9332 }
9333
9334 int kvm_arch_check_processor_compat(void)
9335 {
9336         return kvm_x86_ops->check_processor_compatibility();
9337 }
9338
9339 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
9340 {
9341         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
9342 }
9343 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
9344
9345 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
9346 {
9347         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
9348 }
9349
9350 struct static_key kvm_no_apic_vcpu __read_mostly;
9351 EXPORT_SYMBOL_GPL(kvm_no_apic_vcpu);
9352
9353 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
9354 {
9355         struct page *page;
9356         int r;
9357
9358         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
9359         if (!irqchip_in_kernel(vcpu->kvm) || kvm_vcpu_is_reset_bsp(vcpu))
9360                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
9361         else
9362                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
9363
9364         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
9365         if (!page) {
9366                 r = -ENOMEM;
9367                 goto fail;
9368         }
9369         vcpu->arch.pio_data = page_address(page);
9370
9371         kvm_set_tsc_khz(vcpu, max_tsc_khz);
9372
9373         r = kvm_mmu_create(vcpu);
9374         if (r < 0)
9375                 goto fail_free_pio_data;
9376
9377         if (irqchip_in_kernel(vcpu->kvm)) {
9378                 vcpu->arch.apicv_active = kvm_x86_ops->get_enable_apicv(vcpu);
9379                 r = kvm_create_lapic(vcpu, lapic_timer_advance_ns);
9380                 if (r < 0)
9381                         goto fail_mmu_destroy;
9382         } else
9383                 static_key_slow_inc(&kvm_no_apic_vcpu);
9384
9385         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
9386                                        GFP_KERNEL_ACCOUNT);
9387         if (!vcpu->arch.mce_banks) {
9388                 r = -ENOMEM;
9389                 goto fail_free_lapic;
9390         }
9391         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
9392
9393         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask,
9394                                 GFP_KERNEL_ACCOUNT)) {
9395                 r = -ENOMEM;
9396                 goto fail_free_mce_banks;
9397         }
9398
9399         fx_init(vcpu);
9400
9401         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
9402
9403         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
9404
9405         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
9406
9407         kvm_async_pf_hash_reset(vcpu);
9408         kvm_pmu_init(vcpu);
9409
9410         vcpu->arch.pending_external_vector = -1;
9411         vcpu->arch.preempted_in_kernel = false;
9412
9413         kvm_hv_vcpu_init(vcpu);
9414
9415         return 0;
9416
9417 fail_free_mce_banks:
9418         kfree(vcpu->arch.mce_banks);
9419 fail_free_lapic:
9420         kvm_free_lapic(vcpu);
9421 fail_mmu_destroy:
9422         kvm_mmu_destroy(vcpu);
9423 fail_free_pio_data:
9424         free_page((unsigned long)vcpu->arch.pio_data);
9425 fail:
9426         return r;
9427 }
9428
9429 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
9430 {
9431         int idx;
9432
9433         kvm_hv_vcpu_uninit(vcpu);
9434         kvm_pmu_destroy(vcpu);
9435         kfree(vcpu->arch.mce_banks);
9436         kvm_free_lapic(vcpu);
9437         idx = srcu_read_lock(&vcpu->kvm->srcu);
9438         kvm_mmu_destroy(vcpu);
9439         srcu_read_unlock(&vcpu->kvm->srcu, idx);
9440         free_page((unsigned long)vcpu->arch.pio_data);
9441         if (!lapic_in_kernel(vcpu))
9442                 static_key_slow_dec(&kvm_no_apic_vcpu);
9443 }
9444
9445 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
9446 {
9447         vcpu->arch.l1tf_flush_l1d = true;
9448         kvm_x86_ops->sched_in(vcpu, cpu);
9449 }
9450
9451 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
9452 {
9453         if (type)
9454                 return -EINVAL;
9455
9456         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
9457         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
9458         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
9459         INIT_LIST_HEAD(&kvm->arch.lpage_disallowed_mmu_pages);
9460         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
9461         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
9462
9463         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
9464         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
9465         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
9466         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
9467                 &kvm->arch.irq_sources_bitmap);
9468
9469         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
9470         mutex_init(&kvm->arch.apic_map_lock);
9471         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
9472
9473         kvm->arch.kvmclock_offset = -ktime_get_boottime_ns();
9474         pvclock_update_vm_gtod_copy(kvm);
9475
9476         kvm->arch.guest_can_read_msr_platform_info = true;
9477
9478         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
9479         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
9480
9481         kvm_hv_init_vm(kvm);
9482         kvm_page_track_init(kvm);
9483         kvm_mmu_init_vm(kvm);
9484
9485         return kvm_x86_ops->vm_init(kvm);
9486 }
9487
9488 int kvm_arch_post_init_vm(struct kvm *kvm)
9489 {
9490         return kvm_mmu_post_init_vm(kvm);
9491 }
9492
9493 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
9494 {
9495         vcpu_load(vcpu);
9496         kvm_mmu_unload(vcpu);
9497         vcpu_put(vcpu);
9498 }
9499
9500 static void kvm_free_vcpus(struct kvm *kvm)
9501 {
9502         unsigned int i;
9503         struct kvm_vcpu *vcpu;
9504
9505         /*
9506          * Unpin any mmu pages first.
9507          */
9508         kvm_for_each_vcpu(i, vcpu, kvm) {
9509                 kvm_clear_async_pf_completion_queue(vcpu);
9510                 kvm_unload_vcpu_mmu(vcpu);
9511         }
9512         kvm_for_each_vcpu(i, vcpu, kvm)
9513                 kvm_arch_vcpu_free(vcpu);
9514
9515         mutex_lock(&kvm->lock);
9516         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
9517                 kvm->vcpus[i] = NULL;
9518
9519         atomic_set(&kvm->online_vcpus, 0);
9520         mutex_unlock(&kvm->lock);
9521 }
9522
9523 void kvm_arch_sync_events(struct kvm *kvm)
9524 {
9525         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
9526         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
9527         kvm_free_pit(kvm);
9528 }
9529
9530 int __x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9531 {
9532         int i, r;
9533         unsigned long hva;
9534         struct kvm_memslots *slots = kvm_memslots(kvm);
9535         struct kvm_memory_slot *slot, old;
9536
9537         /* Called with kvm->slots_lock held.  */
9538         if (WARN_ON(id >= KVM_MEM_SLOTS_NUM))
9539                 return -EINVAL;
9540
9541         slot = id_to_memslot(slots, id);
9542         if (size) {
9543                 if (slot->npages)
9544                         return -EEXIST;
9545
9546                 /*
9547                  * MAP_SHARED to prevent internal slot pages from being moved
9548                  * by fork()/COW.
9549                  */
9550                 hva = vm_mmap(NULL, 0, size, PROT_READ | PROT_WRITE,
9551                               MAP_SHARED | MAP_ANONYMOUS, 0);
9552                 if (IS_ERR((void *)hva))
9553                         return PTR_ERR((void *)hva);
9554         } else {
9555                 if (!slot->npages)
9556                         return 0;
9557
9558                 hva = 0;
9559         }
9560
9561         old = *slot;
9562         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
9563                 struct kvm_userspace_memory_region m;
9564
9565                 m.slot = id | (i << 16);
9566                 m.flags = 0;
9567                 m.guest_phys_addr = gpa;
9568                 m.userspace_addr = hva;
9569                 m.memory_size = size;
9570                 r = __kvm_set_memory_region(kvm, &m);
9571                 if (r < 0)
9572                         return r;
9573         }
9574
9575         if (!size)
9576                 vm_munmap(old.userspace_addr, old.npages * PAGE_SIZE);
9577
9578         return 0;
9579 }
9580 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
9581
9582 int x86_set_memory_region(struct kvm *kvm, int id, gpa_t gpa, u32 size)
9583 {
9584         int r;
9585
9586         mutex_lock(&kvm->slots_lock);
9587         r = __x86_set_memory_region(kvm, id, gpa, size);
9588         mutex_unlock(&kvm->slots_lock);
9589
9590         return r;
9591 }
9592 EXPORT_SYMBOL_GPL(x86_set_memory_region);
9593
9594 void kvm_arch_pre_destroy_vm(struct kvm *kvm)
9595 {
9596         kvm_mmu_pre_destroy_vm(kvm);
9597 }
9598
9599 void kvm_arch_destroy_vm(struct kvm *kvm)
9600 {
9601         if (current->mm == kvm->mm) {
9602                 /*
9603                  * Free memory regions allocated on behalf of userspace,
9604                  * unless the the memory map has changed due to process exit
9605                  * or fd copying.
9606                  */
9607                 x86_set_memory_region(kvm, APIC_ACCESS_PAGE_PRIVATE_MEMSLOT, 0, 0);
9608                 x86_set_memory_region(kvm, IDENTITY_PAGETABLE_PRIVATE_MEMSLOT, 0, 0);
9609                 x86_set_memory_region(kvm, TSS_PRIVATE_MEMSLOT, 0, 0);
9610         }
9611         if (kvm_x86_ops->vm_destroy)
9612                 kvm_x86_ops->vm_destroy(kvm);
9613         kvm_pic_destroy(kvm);
9614         kvm_ioapic_destroy(kvm);
9615         kvm_free_vcpus(kvm);
9616         kvfree(rcu_dereference_check(kvm->arch.apic_map, 1));
9617         kfree(srcu_dereference_check(kvm->arch.pmu_event_filter, &kvm->srcu, 1));
9618         kvm_mmu_uninit_vm(kvm);
9619         kvm_page_track_cleanup(kvm);
9620         kvm_hv_destroy_vm(kvm);
9621 }
9622
9623 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
9624                            struct kvm_memory_slot *dont)
9625 {
9626         int i;
9627
9628         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9629                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
9630                         kvfree(free->arch.rmap[i]);
9631                         free->arch.rmap[i] = NULL;
9632                 }
9633                 if (i == 0)
9634                         continue;
9635
9636                 if (!dont || free->arch.lpage_info[i - 1] !=
9637                              dont->arch.lpage_info[i - 1]) {
9638                         kvfree(free->arch.lpage_info[i - 1]);
9639                         free->arch.lpage_info[i - 1] = NULL;
9640                 }
9641         }
9642
9643         kvm_page_track_free_memslot(free, dont);
9644 }
9645
9646 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
9647                             unsigned long npages)
9648 {
9649         int i;
9650
9651         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9652                 struct kvm_lpage_info *linfo;
9653                 unsigned long ugfn;
9654                 int lpages;
9655                 int level = i + 1;
9656
9657                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
9658                                       slot->base_gfn, level) + 1;
9659
9660                 slot->arch.rmap[i] =
9661                         kvcalloc(lpages, sizeof(*slot->arch.rmap[i]),
9662                                  GFP_KERNEL_ACCOUNT);
9663                 if (!slot->arch.rmap[i])
9664                         goto out_free;
9665                 if (i == 0)
9666                         continue;
9667
9668                 linfo = kvcalloc(lpages, sizeof(*linfo), GFP_KERNEL_ACCOUNT);
9669                 if (!linfo)
9670                         goto out_free;
9671
9672                 slot->arch.lpage_info[i - 1] = linfo;
9673
9674                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
9675                         linfo[0].disallow_lpage = 1;
9676                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
9677                         linfo[lpages - 1].disallow_lpage = 1;
9678                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
9679                 /*
9680                  * If the gfn and userspace address are not aligned wrt each
9681                  * other, or if explicitly asked to, disable large page
9682                  * support for this slot
9683                  */
9684                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
9685                     !kvm_largepages_enabled()) {
9686                         unsigned long j;
9687
9688                         for (j = 0; j < lpages; ++j)
9689                                 linfo[j].disallow_lpage = 1;
9690                 }
9691         }
9692
9693         if (kvm_page_track_create_memslot(slot, npages))
9694                 goto out_free;
9695
9696         return 0;
9697
9698 out_free:
9699         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
9700                 kvfree(slot->arch.rmap[i]);
9701                 slot->arch.rmap[i] = NULL;
9702                 if (i == 0)
9703                         continue;
9704
9705                 kvfree(slot->arch.lpage_info[i - 1]);
9706                 slot->arch.lpage_info[i - 1] = NULL;
9707         }
9708         return -ENOMEM;
9709 }
9710
9711 void kvm_arch_memslots_updated(struct kvm *kvm, u64 gen)
9712 {
9713         /*
9714          * memslots->generation has been incremented.
9715          * mmio generation may have reached its maximum value.
9716          */
9717         kvm_mmu_invalidate_mmio_sptes(kvm, gen);
9718 }
9719
9720 int kvm_arch_prepare_memory_region(struct kvm *kvm,
9721                                 struct kvm_memory_slot *memslot,
9722                                 const struct kvm_userspace_memory_region *mem,
9723                                 enum kvm_mr_change change)
9724 {
9725         return 0;
9726 }
9727
9728 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
9729                                      struct kvm_memory_slot *new)
9730 {
9731         /* Still write protect RO slot */
9732         if (new->flags & KVM_MEM_READONLY) {
9733                 kvm_mmu_slot_remove_write_access(kvm, new);
9734                 return;
9735         }
9736
9737         /*
9738          * Call kvm_x86_ops dirty logging hooks when they are valid.
9739          *
9740          * kvm_x86_ops->slot_disable_log_dirty is called when:
9741          *
9742          *  - KVM_MR_CREATE with dirty logging is disabled
9743          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
9744          *
9745          * The reason is, in case of PML, we need to set D-bit for any slots
9746          * with dirty logging disabled in order to eliminate unnecessary GPA
9747          * logging in PML buffer (and potential PML buffer full VMEXT). This
9748          * guarantees leaving PML enabled during guest's lifetime won't have
9749          * any additional overhead from PML when guest is running with dirty
9750          * logging disabled for memory slots.
9751          *
9752          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
9753          * to dirty logging mode.
9754          *
9755          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
9756          *
9757          * In case of write protect:
9758          *
9759          * Write protect all pages for dirty logging.
9760          *
9761          * All the sptes including the large sptes which point to this
9762          * slot are set to readonly. We can not create any new large
9763          * spte on this slot until the end of the logging.
9764          *
9765          * See the comments in fast_page_fault().
9766          */
9767         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
9768                 if (kvm_x86_ops->slot_enable_log_dirty)
9769                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
9770                 else
9771                         kvm_mmu_slot_remove_write_access(kvm, new);
9772         } else {
9773                 if (kvm_x86_ops->slot_disable_log_dirty)
9774                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
9775         }
9776 }
9777
9778 void kvm_arch_commit_memory_region(struct kvm *kvm,
9779                                 const struct kvm_userspace_memory_region *mem,
9780                                 const struct kvm_memory_slot *old,
9781                                 const struct kvm_memory_slot *new,
9782                                 enum kvm_mr_change change)
9783 {
9784         if (!kvm->arch.n_requested_mmu_pages)
9785                 kvm_mmu_change_mmu_pages(kvm,
9786                                 kvm_mmu_calculate_default_mmu_pages(kvm));
9787
9788         /*
9789          * Dirty logging tracks sptes in 4k granularity, meaning that large
9790          * sptes have to be split.  If live migration is successful, the guest
9791          * in the source machine will be destroyed and large sptes will be
9792          * created in the destination. However, if the guest continues to run
9793          * in the source machine (for example if live migration fails), small
9794          * sptes will remain around and cause bad performance.
9795          *
9796          * Scan sptes if dirty logging has been stopped, dropping those
9797          * which can be collapsed into a single large-page spte.  Later
9798          * page faults will create the large-page sptes.
9799          *
9800          * There is no need to do this in any of the following cases:
9801          * CREATE:      No dirty mappings will already exist.
9802          * MOVE/DELETE: The old mappings will already have been cleaned up by
9803          *              kvm_arch_flush_shadow_memslot()
9804          */
9805         if (change == KVM_MR_FLAGS_ONLY &&
9806                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
9807                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
9808                 kvm_mmu_zap_collapsible_sptes(kvm, new);
9809
9810         /*
9811          * Set up write protection and/or dirty logging for the new slot.
9812          *
9813          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
9814          * been zapped so no dirty logging staff is needed for old slot. For
9815          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
9816          * new and it's also covered when dealing with the new slot.
9817          *
9818          * FIXME: const-ify all uses of struct kvm_memory_slot.
9819          */
9820         if (change != KVM_MR_DELETE)
9821                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
9822 }
9823
9824 void kvm_arch_flush_shadow_all(struct kvm *kvm)
9825 {
9826         kvm_mmu_zap_all(kvm);
9827 }
9828
9829 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
9830                                    struct kvm_memory_slot *slot)
9831 {
9832         kvm_page_track_flush_slot(kvm, slot);
9833 }
9834
9835 static inline bool kvm_guest_apic_has_interrupt(struct kvm_vcpu *vcpu)
9836 {
9837         return (is_guest_mode(vcpu) &&
9838                         kvm_x86_ops->guest_apic_has_interrupt &&
9839                         kvm_x86_ops->guest_apic_has_interrupt(vcpu));
9840 }
9841
9842 static inline bool kvm_vcpu_has_events(struct kvm_vcpu *vcpu)
9843 {
9844         if (!list_empty_careful(&vcpu->async_pf.done))
9845                 return true;
9846
9847         if (kvm_apic_has_events(vcpu))
9848                 return true;
9849
9850         if (vcpu->arch.pv.pv_unhalted)
9851                 return true;
9852
9853         if (vcpu->arch.exception.pending)
9854                 return true;
9855
9856         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9857             (vcpu->arch.nmi_pending &&
9858              kvm_x86_ops->nmi_allowed(vcpu)))
9859                 return true;
9860
9861         if (kvm_test_request(KVM_REQ_SMI, vcpu) ||
9862             (vcpu->arch.smi_pending && !is_smm(vcpu)))
9863                 return true;
9864
9865         if (kvm_arch_interrupt_allowed(vcpu) &&
9866             (kvm_cpu_has_interrupt(vcpu) ||
9867             kvm_guest_apic_has_interrupt(vcpu)))
9868                 return true;
9869
9870         if (kvm_hv_has_stimer_pending(vcpu))
9871                 return true;
9872
9873         return false;
9874 }
9875
9876 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
9877 {
9878         return kvm_vcpu_running(vcpu) || kvm_vcpu_has_events(vcpu);
9879 }
9880
9881 bool kvm_arch_dy_runnable(struct kvm_vcpu *vcpu)
9882 {
9883         if (READ_ONCE(vcpu->arch.pv.pv_unhalted))
9884                 return true;
9885
9886         if (kvm_test_request(KVM_REQ_NMI, vcpu) ||
9887                 kvm_test_request(KVM_REQ_SMI, vcpu) ||
9888                  kvm_test_request(KVM_REQ_EVENT, vcpu))
9889                 return true;
9890
9891         if (vcpu->arch.apicv_active && kvm_x86_ops->dy_apicv_has_pending_interrupt(vcpu))
9892                 return true;
9893
9894         return false;
9895 }
9896
9897 bool kvm_arch_vcpu_in_kernel(struct kvm_vcpu *vcpu)
9898 {
9899         return vcpu->arch.preempted_in_kernel;
9900 }
9901
9902 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
9903 {
9904         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
9905 }
9906
9907 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
9908 {
9909         return kvm_x86_ops->interrupt_allowed(vcpu);
9910 }
9911
9912 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
9913 {
9914         if (is_64_bit_mode(vcpu))
9915                 return kvm_rip_read(vcpu);
9916         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
9917                      kvm_rip_read(vcpu));
9918 }
9919 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
9920
9921 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
9922 {
9923         return kvm_get_linear_rip(vcpu) == linear_rip;
9924 }
9925 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
9926
9927 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
9928 {
9929         unsigned long rflags;
9930
9931         rflags = kvm_x86_ops->get_rflags(vcpu);
9932         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
9933                 rflags &= ~X86_EFLAGS_TF;
9934         return rflags;
9935 }
9936 EXPORT_SYMBOL_GPL(kvm_get_rflags);
9937
9938 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9939 {
9940         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
9941             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
9942                 rflags |= X86_EFLAGS_TF;
9943         kvm_x86_ops->set_rflags(vcpu, rflags);
9944 }
9945
9946 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
9947 {
9948         __kvm_set_rflags(vcpu, rflags);
9949         kvm_make_request(KVM_REQ_EVENT, vcpu);
9950 }
9951 EXPORT_SYMBOL_GPL(kvm_set_rflags);
9952
9953 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
9954 {
9955         int r;
9956
9957         if ((vcpu->arch.mmu->direct_map != work->arch.direct_map) ||
9958               work->wakeup_all)
9959                 return;
9960
9961         r = kvm_mmu_reload(vcpu);
9962         if (unlikely(r))
9963                 return;
9964
9965         if (!vcpu->arch.mmu->direct_map &&
9966               work->arch.cr3 != vcpu->arch.mmu->get_cr3(vcpu))
9967                 return;
9968
9969         vcpu->arch.mmu->page_fault(vcpu, work->gva, 0, true);
9970 }
9971
9972 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
9973 {
9974         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
9975 }
9976
9977 static inline u32 kvm_async_pf_next_probe(u32 key)
9978 {
9979         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
9980 }
9981
9982 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
9983 {
9984         u32 key = kvm_async_pf_hash_fn(gfn);
9985
9986         while (vcpu->arch.apf.gfns[key] != ~0)
9987                 key = kvm_async_pf_next_probe(key);
9988
9989         vcpu->arch.apf.gfns[key] = gfn;
9990 }
9991
9992 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
9993 {
9994         int i;
9995         u32 key = kvm_async_pf_hash_fn(gfn);
9996
9997         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
9998                      (vcpu->arch.apf.gfns[key] != gfn &&
9999                       vcpu->arch.apf.gfns[key] != ~0); i++)
10000                 key = kvm_async_pf_next_probe(key);
10001
10002         return key;
10003 }
10004
10005 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10006 {
10007         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
10008 }
10009
10010 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
10011 {
10012         u32 i, j, k;
10013
10014         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
10015         while (true) {
10016                 vcpu->arch.apf.gfns[i] = ~0;
10017                 do {
10018                         j = kvm_async_pf_next_probe(j);
10019                         if (vcpu->arch.apf.gfns[j] == ~0)
10020                                 return;
10021                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
10022                         /*
10023                          * k lies cyclically in ]i,j]
10024                          * |    i.k.j |
10025                          * |....j i.k.| or  |.k..j i...|
10026                          */
10027                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
10028                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
10029                 i = j;
10030         }
10031 }
10032
10033 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
10034 {
10035
10036         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
10037                                       sizeof(val));
10038 }
10039
10040 static int apf_get_user(struct kvm_vcpu *vcpu, u32 *val)
10041 {
10042
10043         return kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, val,
10044                                       sizeof(u32));
10045 }
10046
10047 static bool kvm_can_deliver_async_pf(struct kvm_vcpu *vcpu)
10048 {
10049         if (!vcpu->arch.apf.delivery_as_pf_vmexit && is_guest_mode(vcpu))
10050                 return false;
10051
10052         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
10053             (vcpu->arch.apf.send_user_only &&
10054              kvm_x86_ops->get_cpl(vcpu) == 0))
10055                 return false;
10056
10057         return true;
10058 }
10059
10060 bool kvm_can_do_async_pf(struct kvm_vcpu *vcpu)
10061 {
10062         if (unlikely(!lapic_in_kernel(vcpu) ||
10063                      kvm_event_needs_reinjection(vcpu) ||
10064                      vcpu->arch.exception.pending))
10065                 return false;
10066
10067         if (kvm_hlt_in_guest(vcpu->kvm) && !kvm_can_deliver_async_pf(vcpu))
10068                 return false;
10069
10070         /*
10071          * If interrupts are off we cannot even use an artificial
10072          * halt state.
10073          */
10074         return kvm_x86_ops->interrupt_allowed(vcpu);
10075 }
10076
10077 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
10078                                      struct kvm_async_pf *work)
10079 {
10080         struct x86_exception fault;
10081
10082         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
10083         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
10084
10085         if (kvm_can_deliver_async_pf(vcpu) &&
10086             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
10087                 fault.vector = PF_VECTOR;
10088                 fault.error_code_valid = true;
10089                 fault.error_code = 0;
10090                 fault.nested_page_fault = false;
10091                 fault.address = work->arch.token;
10092                 fault.async_page_fault = true;
10093                 kvm_inject_page_fault(vcpu, &fault);
10094         } else {
10095                 /*
10096                  * It is not possible to deliver a paravirtualized asynchronous
10097                  * page fault, but putting the guest in an artificial halt state
10098                  * can be beneficial nevertheless: if an interrupt arrives, we
10099                  * can deliver it timely and perhaps the guest will schedule
10100                  * another process.  When the instruction that triggered a page
10101                  * fault is retried, hopefully the page will be ready in the host.
10102                  */
10103                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
10104         }
10105 }
10106
10107 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
10108                                  struct kvm_async_pf *work)
10109 {
10110         struct x86_exception fault;
10111         u32 val;
10112
10113         if (work->wakeup_all)
10114                 work->arch.token = ~0; /* broadcast wakeup */
10115         else
10116                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
10117         trace_kvm_async_pf_ready(work->arch.token, work->gva);
10118
10119         if (vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED &&
10120             !apf_get_user(vcpu, &val)) {
10121                 if (val == KVM_PV_REASON_PAGE_NOT_PRESENT &&
10122                     vcpu->arch.exception.pending &&
10123                     vcpu->arch.exception.nr == PF_VECTOR &&
10124                     !apf_put_user(vcpu, 0)) {
10125                         vcpu->arch.exception.injected = false;
10126                         vcpu->arch.exception.pending = false;
10127                         vcpu->arch.exception.nr = 0;
10128                         vcpu->arch.exception.has_error_code = false;
10129                         vcpu->arch.exception.error_code = 0;
10130                         vcpu->arch.exception.has_payload = false;
10131                         vcpu->arch.exception.payload = 0;
10132                 } else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
10133                         fault.vector = PF_VECTOR;
10134                         fault.error_code_valid = true;
10135                         fault.error_code = 0;
10136                         fault.nested_page_fault = false;
10137                         fault.address = work->arch.token;
10138                         fault.async_page_fault = true;
10139                         kvm_inject_page_fault(vcpu, &fault);
10140                 }
10141         }
10142         vcpu->arch.apf.halted = false;
10143         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
10144 }
10145
10146 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
10147 {
10148         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
10149                 return true;
10150         else
10151                 return kvm_can_do_async_pf(vcpu);
10152 }
10153
10154 void kvm_arch_start_assignment(struct kvm *kvm)
10155 {
10156         atomic_inc(&kvm->arch.assigned_device_count);
10157 }
10158 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
10159
10160 void kvm_arch_end_assignment(struct kvm *kvm)
10161 {
10162         atomic_dec(&kvm->arch.assigned_device_count);
10163 }
10164 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
10165
10166 bool kvm_arch_has_assigned_device(struct kvm *kvm)
10167 {
10168         return atomic_read(&kvm->arch.assigned_device_count);
10169 }
10170 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
10171
10172 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
10173 {
10174         atomic_inc(&kvm->arch.noncoherent_dma_count);
10175 }
10176 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
10177
10178 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
10179 {
10180         atomic_dec(&kvm->arch.noncoherent_dma_count);
10181 }
10182 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
10183
10184 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
10185 {
10186         return atomic_read(&kvm->arch.noncoherent_dma_count);
10187 }
10188 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
10189
10190 bool kvm_arch_has_irq_bypass(void)
10191 {
10192         return true;
10193 }
10194
10195 int kvm_arch_irq_bypass_add_producer(struct irq_bypass_consumer *cons,
10196                                       struct irq_bypass_producer *prod)
10197 {
10198         struct kvm_kernel_irqfd *irqfd =
10199                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10200
10201         irqfd->producer = prod;
10202
10203         return kvm_x86_ops->update_pi_irte(irqfd->kvm,
10204                                            prod->irq, irqfd->gsi, 1);
10205 }
10206
10207 void kvm_arch_irq_bypass_del_producer(struct irq_bypass_consumer *cons,
10208                                       struct irq_bypass_producer *prod)
10209 {
10210         int ret;
10211         struct kvm_kernel_irqfd *irqfd =
10212                 container_of(cons, struct kvm_kernel_irqfd, consumer);
10213
10214         WARN_ON(irqfd->producer != prod);
10215         irqfd->producer = NULL;
10216
10217         /*
10218          * When producer of consumer is unregistered, we change back to
10219          * remapped mode, so we can re-use the current implementation
10220          * when the irq is masked/disabled or the consumer side (KVM
10221          * int this case doesn't want to receive the interrupts.
10222         */
10223         ret = kvm_x86_ops->update_pi_irte(irqfd->kvm, prod->irq, irqfd->gsi, 0);
10224         if (ret)
10225                 printk(KERN_INFO "irq bypass consumer (token %p) unregistration"
10226                        " fails: %d\n", irqfd->consumer.token, ret);
10227 }
10228
10229 int kvm_arch_update_irqfd_routing(struct kvm *kvm, unsigned int host_irq,
10230                                    uint32_t guest_irq, bool set)
10231 {
10232         return kvm_x86_ops->update_pi_irte(kvm, host_irq, guest_irq, set);
10233 }
10234
10235 bool kvm_vector_hashing_enabled(void)
10236 {
10237         return vector_hashing;
10238 }
10239 EXPORT_SYMBOL_GPL(kvm_vector_hashing_enabled);
10240
10241 bool kvm_arch_no_poll(struct kvm_vcpu *vcpu)
10242 {
10243         return (vcpu->arch.msr_kvm_poll_control & 1) == 0;
10244 }
10245 EXPORT_SYMBOL_GPL(kvm_arch_no_poll);
10246
10247
10248 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
10249 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_fast_mmio);
10250 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
10251 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
10252 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
10253 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
10254 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
10255 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
10256 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
10257 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
10258 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmenter_failed);
10259 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
10260 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
10261 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
10262 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
10263 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window_update);
10264 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);
10265 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pi_irte_update);
10266 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_unaccelerated_access);
10267 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_avic_incomplete_ipi);