1 # SPDX-License-Identifier: GPL-2.0
4 select ARCH_32BIT_OFF_T
5 select ARCH_HAS_CPU_CACHE_ALIASING
6 select ARCH_ENABLE_MEMORY_HOTPLUG if SPARSEMEM && MMU
7 select ARCH_ENABLE_MEMORY_HOTREMOVE if SPARSEMEM && MMU
8 select ARCH_HAVE_NMI_SAFE_CMPXCHG if (GUSA_RB || CPU_SH4A)
9 select ARCH_HAS_BINFMT_FLAT if !MMU
10 select ARCH_HAS_CPU_FINALIZE_INIT
11 select ARCH_HAS_CURRENT_STACK_POINTER
12 select ARCH_HAS_GIGANTIC_PAGE
13 select ARCH_HAS_GCOV_PROFILE_ALL
14 select ARCH_HAS_PTE_SPECIAL
15 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
16 select ARCH_HIBERNATION_POSSIBLE if MMU
17 select ARCH_MIGHT_HAVE_PC_PARPORT
18 select ARCH_WANT_IPC_PARSE_VERSION
19 select CPU_NO_EFFICIENT_FFS
20 select DMA_DECLARE_COHERENT
21 select GENERIC_ATOMIC64
22 select GENERIC_CMOS_UPDATE if SH_SH03 || SH_DREAMCAST
23 select GENERIC_IDLE_POLL_SETUP
24 select GENERIC_IRQ_SHOW
25 select GENERIC_LIB_ASHLDI3
26 select GENERIC_LIB_ASHRDI3
27 select GENERIC_LIB_LSHRDI3
28 select GENERIC_PCI_IOMAP if PCI
29 select GENERIC_SCHED_CLOCK
30 select GENERIC_SMP_IDLE_THREAD
31 select GUP_GET_PXX_LOW_HIGH if X2TLB
32 select HAS_IOPORT if HAS_IOPORT_MAP
33 select GENERIC_IOREMAP if MMU
34 select HAVE_ARCH_AUDITSYSCALL
36 select HAVE_ARCH_SECCOMP_FILTER
37 select HAVE_ARCH_TRACEHOOK
38 select HAVE_DEBUG_BUGVERBOSE
39 select HAVE_DEBUG_KMEMLEAK
40 select HAVE_DYNAMIC_FTRACE
41 select HAVE_GUP_FAST if MMU
42 select HAVE_FUNCTION_GRAPH_TRACER
43 select HAVE_FUNCTION_TRACER
44 select HAVE_FTRACE_MCOUNT_RECORD
45 select HAVE_HW_BREAKPOINT
46 select HAVE_IOREMAP_PROT if MMU && !X2TLB
47 select HAVE_KERNEL_BZIP2
48 select HAVE_KERNEL_GZIP
49 select HAVE_KERNEL_LZMA
50 select HAVE_KERNEL_LZO
53 select HAVE_KRETPROBES
54 select HAVE_MIXED_BREAKPOINTS_REGS
55 select HAVE_MOD_ARCH_SPECIFIC if DWARF_UNWINDER
57 select HAVE_PATA_PLATFORM
58 select HAVE_PERF_EVENTS
59 select HAVE_REGS_AND_STACK_ACCESS_API
61 select HAVE_SOFTIRQ_ON_OWN_STACK if IRQSTACKS
62 select HAVE_STACKPROTECTOR
63 select HAVE_SYSCALL_TRACEPOINTS
64 select IRQ_FORCED_THREADING
65 select LOCK_MM_AND_FIND_VMA
66 select MODULES_USE_ELF_RELA
67 select NEED_SG_DMA_LENGTH
68 select NO_DMA if !MMU && !DMA_COHERENT
69 select NO_GENERIC_PCI_IOPORT_MAP if PCI
72 select PCI_DOMAINS if PCI
74 select PERF_USE_VMALLOC
77 select TRACE_IRQFLAGS_SUPPORT
79 The SuperH is a RISC processor targeted for use in embedded systems
80 and consumer electronics; it was also used in the Sega Dreamcast
81 gaming console. The SuperH port has a home page at
82 <http://www.linux-sh.org/>.
88 config GENERIC_HWEIGHT
91 config GENERIC_CALIBRATE_DELAY
94 config GENERIC_LOCKBREAK
96 depends on SMP && PREEMPTION
98 config ARCH_SUSPEND_POSSIBLE
101 config ARCH_HIBERNATION_POSSIBLE
104 config SYS_SUPPORTS_APM_EMULATION
106 select ARCH_SUSPEND_POSSIBLE
108 config SYS_SUPPORTS_SMP
111 config SYS_SUPPORTS_NUMA
114 config STACKTRACE_SUPPORT
117 config LOCKDEP_SUPPORT
120 config ARCH_HAS_ILOG2_U32
123 config ARCH_HAS_ILOG2_U64
128 depends on !SH_SHMIN && !SH_HP6XX && !SH_SOLUTION_ENGINE && \
140 config DMA_NONCOHERENT
141 def_bool !NO_DMA && !DMA_COHERENT
142 select ARCH_HAS_DMA_PREP_COHERENT
143 select ARCH_HAS_SYNC_DMA_FOR_DEVICE
144 select DMA_DIRECT_REMAP
146 config PGTABLE_LEVELS
162 select UNCACHED_MAPPING
168 select OF_EARLY_FLATTREE
172 select CPU_HAS_INTEVT
175 select SYS_SUPPORTS_SH_TMU
179 select ARCH_SUPPORTS_HUGETLBFS if MMU
180 select CPU_HAS_INTEVT
182 select CPU_HAS_FPU if !CPU_SH4AL_DSP
184 select SYS_SUPPORTS_SH_TMU
201 select SYS_SUPPORTS_SMP
202 select SYS_SUPPORTS_NUMA
206 select ARCH_SUSPEND_POSSIBLE
210 depends on CPU_SH4 || CPU_SH4A
215 prompt "Processor sub-type selection"
221 # SH-2 Processor Support
223 config CPU_SUBTYPE_SH7619
224 bool "Support SH7619 processor"
226 select SYS_SUPPORTS_SH_CMT
228 config CPU_SUBTYPE_J2
229 bool "Support J2 processor"
231 select SYS_SUPPORTS_SMP
232 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
234 # SH-2A Processor Support
236 config CPU_SUBTYPE_SH7201
237 bool "Support SH7201 processor"
240 select SYS_SUPPORTS_SH_MTU2
242 config CPU_SUBTYPE_SH7203
243 bool "Support SH7203 processor"
246 select SYS_SUPPORTS_SH_CMT
247 select SYS_SUPPORTS_SH_MTU2
250 config CPU_SUBTYPE_SH7206
251 bool "Support SH7206 processor"
253 select SYS_SUPPORTS_SH_CMT
254 select SYS_SUPPORTS_SH_MTU2
256 config CPU_SUBTYPE_SH7263
257 bool "Support SH7263 processor"
260 select SYS_SUPPORTS_SH_CMT
261 select SYS_SUPPORTS_SH_MTU2
263 config CPU_SUBTYPE_SH7264
264 bool "Support SH7264 processor"
267 select SYS_SUPPORTS_SH_CMT
268 select SYS_SUPPORTS_SH_MTU2
271 config CPU_SUBTYPE_SH7269
272 bool "Support SH7269 processor"
275 select SYS_SUPPORTS_SH_CMT
276 select SYS_SUPPORTS_SH_MTU2
279 config CPU_SUBTYPE_MXG
280 bool "Support MX-G processor"
282 select SYS_SUPPORTS_SH_MTU2
284 Select MX-G if running on an R8A03022BG part.
286 # SH-3 Processor Support
288 config CPU_SUBTYPE_SH7705
289 bool "Support SH7705 processor"
292 config CPU_SUBTYPE_SH7706
293 bool "Support SH7706 processor"
296 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
298 config CPU_SUBTYPE_SH7707
299 bool "Support SH7707 processor"
302 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
304 config CPU_SUBTYPE_SH7708
305 bool "Support SH7708 processor"
308 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
309 if you have a 100 Mhz SH-3 HD6417708R CPU.
311 config CPU_SUBTYPE_SH7709
312 bool "Support SH7709 processor"
315 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
317 config CPU_SUBTYPE_SH7710
318 bool "Support SH7710 processor"
322 Select SH7710 if you have a SH3-DSP SH7710 CPU.
324 config CPU_SUBTYPE_SH7712
325 bool "Support SH7712 processor"
329 Select SH7712 if you have a SH3-DSP SH7712 CPU.
331 config CPU_SUBTYPE_SH7720
332 bool "Support SH7720 processor"
335 select SYS_SUPPORTS_SH_CMT
336 select USB_OHCI_SH if USB_OHCI_HCD
339 Select SH7720 if you have a SH3-DSP SH7720 CPU.
341 config CPU_SUBTYPE_SH7721
342 bool "Support SH7721 processor"
345 select SYS_SUPPORTS_SH_CMT
346 select USB_OHCI_SH if USB_OHCI_HCD
348 Select SH7721 if you have a SH3-DSP SH7721 CPU.
350 # SH-4 Processor Support
352 config CPU_SUBTYPE_SH7750
353 bool "Support SH7750 processor"
356 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
358 config CPU_SUBTYPE_SH7091
359 bool "Support SH7091 processor"
362 Select SH7091 if you have an SH-4 based Sega device (such as
363 the Dreamcast, Naomi, and Naomi 2).
365 config CPU_SUBTYPE_SH7750R
366 bool "Support SH7750R processor"
369 config CPU_SUBTYPE_SH7750S
370 bool "Support SH7750S processor"
373 config CPU_SUBTYPE_SH7751
374 bool "Support SH7751 processor"
377 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
378 or if you have a HD6417751R CPU.
380 config CPU_SUBTYPE_SH7751R
381 bool "Support SH7751R processor"
384 config CPU_SUBTYPE_SH7760
385 bool "Support SH7760 processor"
388 # SH-4A Processor Support
390 config CPU_SUBTYPE_SH7723
391 bool "Support SH7723 processor"
395 select ARCH_SPARSEMEM_ENABLE
396 select SYS_SUPPORTS_SH_CMT
399 Select SH7723 if you have an SH-MobileR2 CPU.
401 config CPU_SUBTYPE_SH7724
402 bool "Support SH7724 processor"
406 select ARCH_SPARSEMEM_ENABLE
407 select SYS_SUPPORTS_SH_CMT
410 Select SH7724 if you have an SH-MobileR2R CPU.
412 config CPU_SUBTYPE_SH7734
413 bool "Support SH7734 processor"
418 Select SH7734 if you have a SH4A SH7734 CPU.
420 config CPU_SUBTYPE_SH7757
421 bool "Support SH7757 processor"
426 Select SH7757 if you have a SH4A SH7757 CPU.
428 config CPU_SUBTYPE_SH7763
429 bool "Support SH7763 processor"
431 select USB_OHCI_SH if USB_OHCI_HCD
433 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
435 config CPU_SUBTYPE_SH7770
436 bool "Support SH7770 processor"
439 config CPU_SUBTYPE_SH7780
440 bool "Support SH7780 processor"
443 config CPU_SUBTYPE_SH7785
444 bool "Support SH7785 processor"
447 select ARCH_SPARSEMEM_ENABLE
448 select SYS_SUPPORTS_NUMA
451 config CPU_SUBTYPE_SH7786
452 bool "Support SH7786 processor"
455 select CPU_HAS_PTEAEX
456 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
457 select USB_OHCI_SH if USB_OHCI_HCD
458 select USB_EHCI_SH if USB_EHCI_HCD
461 config CPU_SUBTYPE_SHX3
462 bool "Support SH-X3 processor"
465 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
469 # SH4AL-DSP Processor Support
471 config CPU_SUBTYPE_SH7343
472 bool "Support SH7343 processor"
475 select SYS_SUPPORTS_SH_CMT
477 config CPU_SUBTYPE_SH7722
478 bool "Support SH7722 processor"
482 select ARCH_SPARSEMEM_ENABLE
483 select SYS_SUPPORTS_NUMA
484 select SYS_SUPPORTS_SH_CMT
487 config CPU_SUBTYPE_SH7366
488 bool "Support SH7366 processor"
492 select ARCH_SPARSEMEM_ENABLE
493 select SYS_SUPPORTS_NUMA
494 select SYS_SUPPORTS_SH_CMT
498 source "arch/sh/mm/Kconfig"
500 source "arch/sh/Kconfig.cpu"
502 source "arch/sh/boards/Kconfig"
504 menu "Timer and clock configuration"
507 int "Peripheral clock frequency (in Hz)"
508 depends on SH_CLK_CPG_LEGACY
509 default "31250000" if CPU_SUBTYPE_SH7619
510 default "33333333" if CPU_SUBTYPE_SH7770 || \
511 CPU_SUBTYPE_SH7760 || \
512 CPU_SUBTYPE_SH7705 || \
513 CPU_SUBTYPE_SH7203 || \
514 CPU_SUBTYPE_SH7206 || \
515 CPU_SUBTYPE_SH7263 || \
517 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
520 This option is used to specify the peripheral clock frequency.
521 This is necessary for determining the reference clock value on
522 platforms lacking an RTC.
527 config SH_CLK_CPG_LEGACY
528 depends on SH_CLK_CPG
529 def_bool y if !CPU_SUBTYPE_SH7785 && !ARCH_SHMOBILE && \
530 !CPU_SHX3 && !CPU_SUBTYPE_SH7757 && \
531 !CPU_SUBTYPE_SH7734 && !CPU_SUBTYPE_SH7264 && \
536 menu "CPU Frequency scaling"
537 source "drivers/cpufreq/Kconfig"
540 source "arch/sh/drivers/Kconfig"
544 menu "Kernel features"
546 source "kernel/Kconfig.hz"
548 config ARCH_SUPPORTS_KEXEC
551 config ARCH_SUPPORTS_CRASH_DUMP
552 def_bool BROKEN_ON_SMP
554 config ARCH_SUPPORTS_KEXEC_JUMP
557 config PHYSICAL_START
558 hex "Physical address where the kernel is loaded" if (EXPERT || CRASH_DUMP)
561 This gives the physical address where the kernel is loaded
562 and is ordinarily the same as MEMORY_START.
564 Different values are primarily used in the case of kexec on panic
565 where the fail safe kernel needs to run at a different address
566 than the panic-ed kernel.
569 bool "Symmetric multi-processing support"
570 depends on SYS_SUPPORTS_SMP
572 This enables support for systems with more than one CPU. If you have
573 a system with only one CPU, say N. If you have a system with more
576 If you say N here, the kernel will run on uni- and multiprocessor
577 machines, but will use only one CPU of a multiprocessor machine. If
578 you say Y here, the kernel will run on many, but not all,
579 uniprocessor machines. On a uniprocessor machine, the kernel
580 will run faster if you say N here.
582 People using multiprocessor machines who say Y here should also say
583 Y to "Enhanced Real Time Clock Support", below.
585 See also <file:Documentation/admin-guide/lockup-watchdogs.rst> and the SMP-HOWTO
586 available at <https://www.tldp.org/docs.html#howto>.
588 If you don't know what to do here, say N.
591 int "Maximum number of CPUs (2-32)"
594 default "4" if CPU_SUBTYPE_SHX3
597 This allows you to specify the maximum number of CPUs which this
598 kernel will support. The maximum supported value is 32 and the
599 minimum value which makes sense is 2.
601 This is purely to save memory - each supported CPU adds
602 approximately eight kilobytes to the kernel image.
605 bool "Support for hot-pluggable CPUs (EXPERIMENTAL)"
608 Say Y here to experiment with turning CPUs off and on. CPUs
609 can be controlled through /sys/devices/system/cpu.
615 This enables support for gUSA (general UserSpace Atomicity).
616 This is the default implementation for both UP and non-ll/sc
617 CPUs, and is used by the libc, amongst others.
619 For additional information, design information can be found
620 in <http://lc.linux.or.jp/lc2002/papers/niibe0919p.pdf>.
622 This should only be disabled for special cases where alternate
623 atomicity implementations exist.
626 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
627 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
629 Enabling this option will allow the kernel to implement some
630 atomic operations using a software implementation of load-locked/
631 store-conditional (LLSC). On machines which do not have hardware
632 LLSC, this should be more efficient than the other alternative of
633 disabling interrupts around the atomic sequence.
635 config HW_PERF_EVENTS
636 bool "Enable hardware performance counter support for perf events"
637 depends on PERF_EVENTS && CPU_HAS_PMU
640 Enable hardware performance counter support for perf events. If
641 disabled, perf events will use software events only.
643 source "drivers/sh/Kconfig"
649 config USE_BUILTIN_DTB
650 bool "Use builtin DTB"
652 depends on SH_DEVICE_TREE
654 Link a device tree blob for particular hardware into the kernel,
655 suppressing use of the DTB pointer provided by the bootloader.
656 This option should only be used with legacy bootloaders that are
657 not capable of providing a DTB to the kernel, or for experimental
658 hardware without stable device tree bindings.
660 config BUILTIN_DTB_SOURCE
661 string "Source file for builtin DTB"
663 depends on USE_BUILTIN_DTB
665 Base name (without suffix, relative to arch/sh/boot/dts) for the
666 a DTS file that will be used to produce the DTB linked into the
669 config ZERO_PAGE_OFFSET
671 default "0x00010000" if PAGE_SIZE_64KB || SH_RTS7751R2D || \
672 SH_7751_SOLUTION_ENGINE
673 default "0x00004000" if PAGE_SIZE_16KB || SH_SH03
674 default "0x00002000" if PAGE_SIZE_8KB
677 This sets the default offset of zero page.
679 config BOOT_LINK_OFFSET
681 default "0x00210000" if SH_SHMIN
682 default "0x00810000" if SH_7780_SOLUTION_ENGINE
683 default "0x009e0000" if SH_TITAN
684 default "0x01800000" if SH_SDK7780
685 default "0x02000000" if SH_EDOSK7760
688 This option allows you to set the link address offset of the zImage.
689 This can be useful if you are on a board which has a small amount of
694 default "0x00001000" if PAGE_SIZE_4KB
695 default "0x00002000" if PAGE_SIZE_8KB
696 default "0x00004000" if PAGE_SIZE_16KB
697 default "0x00010000" if PAGE_SIZE_64KB
700 config ROMIMAGE_MMCIF
701 bool "Include MMCIF loader in romImage (EXPERIMENTAL)"
702 depends on CPU_SUBTYPE_SH7724
704 Say Y here to include experimental MMCIF loading code in
705 romImage. With this enabled it is possible to write the romImage
706 kernel image to an MMC card and boot the kernel straight from
707 the reset vector. At reset the processor Mask ROM will load the
708 first part of the romImage which in turn loads the rest the kernel
709 image to RAM using the MMCIF hardware block.
712 prompt "Kernel command line"
713 default CMDLINE_OVERWRITE
715 Setting this option allows the kernel command line arguments
718 config CMDLINE_OVERWRITE
719 bool "Overwrite bootloader kernel arguments"
721 Given string will overwrite any arguments passed in by
724 config CMDLINE_EXTEND
725 bool "Extend bootloader kernel arguments"
727 Given string will be concatenated with arguments passed in
730 config CMDLINE_FROM_BOOTLOADER
731 bool "Use bootloader kernel arguments"
733 Uses the command-line options passed by the boot loader.
738 string "Kernel command line arguments string"
739 depends on CMDLINE_OVERWRITE || CMDLINE_EXTEND
740 default "console=ttySC1,115200"
747 bool "Maple Bus support"
748 depends on SH_DREAMCAST
750 The Maple Bus is SEGA's serial communication bus for peripherals
751 on the Dreamcast. Without this bus support you won't be able to
752 get your Dreamcast keyboard etc to work, so most users
753 probably want to say 'Y' here, unless you are only using the
754 Dreamcast with a serial line terminal or a remote network
759 menu "Power management options (EXPERIMENTAL)"
761 source "kernel/power/Kconfig"
763 source "drivers/cpuidle/Kconfig"