arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27         };
  28
  29         psci {
  30                 compatible = "arm,psci-0.2";
  31                 method = "smc";
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 a57_0: cpu@0 {
  39                         compatible = "arm,cortex-a57", "arm,armv8";
  40                         reg = <0x0>;
  41                         device_type = "cpu";
  42                         next-level-cache = <&L2_CA57>;
  43                         enable-method = "psci";
  44                 };
  45
  46                 a57_1: cpu@1 {
  47                         compatible = "arm,cortex-a57","arm,armv8";
  48                         reg = <0x1>;
  49                         device_type = "cpu";
  50                         next-level-cache = <&L2_CA57>;
  51                         enable-method = "psci";
  52                 };
  53                 a57_2: cpu@2 {
  54                         compatible = "arm,cortex-a57","arm,armv8";
  55                         reg = <0x2>;
  56                         device_type = "cpu";
  57                         next-level-cache = <&L2_CA57>;
  58                         enable-method = "psci";
  59                 };
  60                 a57_3: cpu@3 {
  61                         compatible = "arm,cortex-a57","arm,armv8";
  62                         reg = <0x3>;
  63                         device_type = "cpu";
  64                         next-level-cache = <&L2_CA57>;
  65                         enable-method = "psci";
  66                 };
  67         };
  68
  69         L2_CA57: cache-controller@0 {
  70                 compatible = "cache";
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         L2_CA53: cache-controller@1 {
  76                 compatible = "cache";
  77                 cache-unified;
  78                 cache-level = <2>;
  79         };
  80
  81         extal_clk: extal {
  82                 compatible = "fixed-clock";
  83                 #clock-cells = <0>;
  84                 /* This value must be overridden by the board */
  85                 clock-frequency = <0>;
  86         };
  87
  88         extalr_clk: extalr {
  89                 compatible = "fixed-clock";
  90                 #clock-cells = <0>;
  91                 /* This value must be overridden by the board */
  92                 clock-frequency = <0>;
  93         };
  94
  95         /*
  96          * The external audio clocks are configured as 0 Hz fixed frequency
  97          * clocks by default.
  98          * Boards that provide audio clocks should override them.
  99          */
 100         audio_clk_a: audio_clk_a {
 101                 compatible = "fixed-clock";
 102                 #clock-cells = <0>;
 103                 clock-frequency = <0>;
 104         };
 105
 106         audio_clk_b: audio_clk_b {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 clock-frequency = <0>;
 110         };
 111
 112         audio_clk_c: audio_clk_c {
 113                 compatible = "fixed-clock";
 114                 #clock-cells = <0>;
 115                 clock-frequency = <0>;
 116         };
 117
 118         /* External SCIF clock - to be overridden by boards that provide it */
 119         scif_clk: scif {
 120                 compatible = "fixed-clock";
 121                 #clock-cells = <0>;
 122                 clock-frequency = <0>;
 123         };
 124
 125         soc {
 126                 compatible = "simple-bus";
 127                 interrupt-parent = <&gic>;
 128
 129                 #address-cells = <2>;
 130                 #size-cells = <2>;
 131                 ranges;
 132
 133                 gic: interrupt-controller@0xf1010000 {
 134                         compatible = "arm,gic-400";
 135                         #interrupt-cells = <3>;
 136                         #address-cells = <0>;
 137                         interrupt-controller;
 138                         reg = <0x0 0xf1010000 0 0x1000>,
 139                               <0x0 0xf1020000 0 0x2000>,
 140                               <0x0 0xf1040000 0 0x20000>,
 141                               <0x0 0xf1060000 0 0x2000>;
 142                         interrupts = <GIC_PPI 9
 143                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 144                 };
 145
 146                 gpio0: gpio@e6050000 {
 147                         compatible = "renesas,gpio-r8a7795",
 148                                      "renesas,gpio-rcar";
 149                         reg = <0 0xe6050000 0 0x50>;
 150                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 151                         #gpio-cells = <2>;
 152                         gpio-controller;
 153                         gpio-ranges = <&pfc 0 0 16>;
 154                         #interrupt-cells = <2>;
 155                         interrupt-controller;
 156                         clocks = <&cpg CPG_MOD 912>;
 157                         power-domains = <&cpg>;
 158                 };
 159
 160                 gpio1: gpio@e6051000 {
 161                         compatible = "renesas,gpio-r8a7795",
 162                                      "renesas,gpio-rcar";
 163                         reg = <0 0xe6051000 0 0x50>;
 164                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 165                         #gpio-cells = <2>;
 166                         gpio-controller;
 167                         gpio-ranges = <&pfc 0 32 28>;
 168                         #interrupt-cells = <2>;
 169                         interrupt-controller;
 170                         clocks = <&cpg CPG_MOD 911>;
 171                         power-domains = <&cpg>;
 172                 };
 173
 174                 gpio2: gpio@e6052000 {
 175                         compatible = "renesas,gpio-r8a7795",
 176                                      "renesas,gpio-rcar";
 177                         reg = <0 0xe6052000 0 0x50>;
 178                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 179                         #gpio-cells = <2>;
 180                         gpio-controller;
 181                         gpio-ranges = <&pfc 0 64 15>;
 182                         #interrupt-cells = <2>;
 183                         interrupt-controller;
 184                         clocks = <&cpg CPG_MOD 910>;
 185                         power-domains = <&cpg>;
 186                 };
 187
 188                 gpio3: gpio@e6053000 {
 189                         compatible = "renesas,gpio-r8a7795",
 190                                      "renesas,gpio-rcar";
 191                         reg = <0 0xe6053000 0 0x50>;
 192                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 193                         #gpio-cells = <2>;
 194                         gpio-controller;
 195                         gpio-ranges = <&pfc 0 96 16>;
 196                         #interrupt-cells = <2>;
 197                         interrupt-controller;
 198                         clocks = <&cpg CPG_MOD 909>;
 199                         power-domains = <&cpg>;
 200                 };
 201
 202                 gpio4: gpio@e6054000 {
 203                         compatible = "renesas,gpio-r8a7795",
 204                                      "renesas,gpio-rcar";
 205                         reg = <0 0xe6054000 0 0x50>;
 206                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 207                         #gpio-cells = <2>;
 208                         gpio-controller;
 209                         gpio-ranges = <&pfc 0 128 18>;
 210                         #interrupt-cells = <2>;
 211                         interrupt-controller;
 212                         clocks = <&cpg CPG_MOD 908>;
 213                         power-domains = <&cpg>;
 214                 };
 215
 216                 gpio5: gpio@e6055000 {
 217                         compatible = "renesas,gpio-r8a7795",
 218                                      "renesas,gpio-rcar";
 219                         reg = <0 0xe6055000 0 0x50>;
 220                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 221                         #gpio-cells = <2>;
 222                         gpio-controller;
 223                         gpio-ranges = <&pfc 0 160 26>;
 224                         #interrupt-cells = <2>;
 225                         interrupt-controller;
 226                         clocks = <&cpg CPG_MOD 907>;
 227                         power-domains = <&cpg>;
 228                 };
 229
 230                 gpio6: gpio@e6055400 {
 231                         compatible = "renesas,gpio-r8a7795",
 232                                      "renesas,gpio-rcar";
 233                         reg = <0 0xe6055400 0 0x50>;
 234                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 235                         #gpio-cells = <2>;
 236                         gpio-controller;
 237                         gpio-ranges = <&pfc 0 192 32>;
 238                         #interrupt-cells = <2>;
 239                         interrupt-controller;
 240                         clocks = <&cpg CPG_MOD 906>;
 241                         power-domains = <&cpg>;
 242                 };
 243
 244                 gpio7: gpio@e6055800 {
 245                         compatible = "renesas,gpio-r8a7795",
 246                                      "renesas,gpio-rcar";
 247                         reg = <0 0xe6055800 0 0x50>;
 248                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 249                         #gpio-cells = <2>;
 250                         gpio-controller;
 251                         gpio-ranges = <&pfc 0 224 4>;
 252                         #interrupt-cells = <2>;
 253                         interrupt-controller;
 254                         clocks = <&cpg CPG_MOD 905>;
 255                         power-domains = <&cpg>;
 256                 };
 257
 258                 pmu_a57 {
 259                         compatible = "arm,cortex-a57-pmu";
 260                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 261                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 262                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 263                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 264                         interrupt-affinity = <&a57_0>,
 265                                              <&a57_1>,
 266                                              <&a57_2>,
 267                                              <&a57_3>;
 268                 };
 269
 270                 timer {
 271                         compatible = "arm,armv8-timer";
 272                         interrupts = <GIC_PPI 13
 273                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 274                                      <GIC_PPI 14
 275                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 276                                      <GIC_PPI 11
 277                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 278                                      <GIC_PPI 10
 279                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 280                 };
 281
 282                 cpg: clock-controller@e6150000 {
 283                         compatible = "renesas,r8a7795-cpg-mssr";
 284                         reg = <0 0xe6150000 0 0x1000>;
 285                         clocks = <&extal_clk>, <&extalr_clk>;
 286                         clock-names = "extal", "extalr";
 287                         #clock-cells = <2>;
 288                         #power-domain-cells = <0>;
 289                 };
 290
 291                 audma0: dma-controller@ec700000 {
 292                         compatible = "renesas,rcar-dmac";
 293                         reg = <0 0xec700000 0 0x10000>;
 294                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 295                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 296                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 297                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 298                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 299                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 300                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 301                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 302                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 303                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 304                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 305                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 306                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 307                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 308                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 311                         interrupt-names = "error",
 312                                         "ch0", "ch1", "ch2", "ch3",
 313                                         "ch4", "ch5", "ch6", "ch7",
 314                                         "ch8", "ch9", "ch10", "ch11",
 315                                         "ch12", "ch13", "ch14", "ch15";
 316                         clocks = <&cpg CPG_MOD 502>;
 317                         clock-names = "fck";
 318                         power-domains = <&cpg>;
 319                         #dma-cells = <1>;
 320                         dma-channels = <16>;
 321                 };
 322
 323                 audma1: dma-controller@ec720000 {
 324                         compatible = "renesas,rcar-dmac";
 325                         reg = <0 0xec720000 0 0x10000>;
 326                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 327                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 328                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 329                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 330                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 331                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 332                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 333                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 334                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 335                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 336                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 337                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 338                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 339                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 340                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 343                         interrupt-names = "error",
 344                                         "ch0", "ch1", "ch2", "ch3",
 345                                         "ch4", "ch5", "ch6", "ch7",
 346                                         "ch8", "ch9", "ch10", "ch11",
 347                                         "ch12", "ch13", "ch14", "ch15";
 348                         clocks = <&cpg CPG_MOD 501>;
 349                         clock-names = "fck";
 350                         power-domains = <&cpg>;
 351                         #dma-cells = <1>;
 352                         dma-channels = <16>;
 353                 };
 354
 355                 pfc: pfc@e6060000 {
 356                         compatible = "renesas,pfc-r8a7795";
 357                         reg = <0 0xe6060000 0 0x50c>;
 358                 };
 359
 360                 intc_ex: interrupt-controller@e61c0000 {
 361                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 362                         #interrupt-cells = <2>;
 363                         interrupt-controller;
 364                         reg = <0 0xe61c0000 0 0x200>;
 365                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 366                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 367                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 368                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 369                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 370                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 371                         clocks = <&cpg CPG_MOD 407>;
 372                         power-domains = <&cpg>;
 373                 };
 374
 375                 dmac0: dma-controller@e6700000 {
 376                         compatible = "renesas,dmac-r8a7795",
 377                                      "renesas,rcar-dmac";
 378                         reg = <0 0xe6700000 0 0x10000>;
 379                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 384                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 385                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 386                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 387                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 388                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 389                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 390                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 391                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 392                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 393                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 394                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 395                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 396                         interrupt-names = "error",
 397                                         "ch0", "ch1", "ch2", "ch3",
 398                                         "ch4", "ch5", "ch6", "ch7",
 399                                         "ch8", "ch9", "ch10", "ch11",
 400                                         "ch12", "ch13", "ch14", "ch15";
 401                         clocks = <&cpg CPG_MOD 219>;
 402                         clock-names = "fck";
 403                         power-domains = <&cpg>;
 404                         #dma-cells = <1>;
 405                         dma-channels = <16>;
 406                 };
 407
 408                 dmac1: dma-controller@e7300000 {
 409                         compatible = "renesas,dmac-r8a7795",
 410                                      "renesas,rcar-dmac";
 411                         reg = <0 0xe7300000 0 0x10000>;
 412                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 413                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 414                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 415                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 416                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 417                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 418                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 419                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 420                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 421                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 422                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 423                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 424                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 425                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 426                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 429                         interrupt-names = "error",
 430                                         "ch0", "ch1", "ch2", "ch3",
 431                                         "ch4", "ch5", "ch6", "ch7",
 432                                         "ch8", "ch9", "ch10", "ch11",
 433                                         "ch12", "ch13", "ch14", "ch15";
 434                         clocks = <&cpg CPG_MOD 218>;
 435                         clock-names = "fck";
 436                         power-domains = <&cpg>;
 437                         #dma-cells = <1>;
 438                         dma-channels = <16>;
 439                 };
 440
 441                 dmac2: dma-controller@e7310000 {
 442                         compatible = "renesas,dmac-r8a7795",
 443                                      "renesas,rcar-dmac";
 444                         reg = <0 0xe7310000 0 0x10000>;
 445                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 446                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 447                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 448                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 449                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 450                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 451                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 452                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 453                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 454                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 455                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 456                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 457                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 458                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 459                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 462                         interrupt-names = "error",
 463                                         "ch0", "ch1", "ch2", "ch3",
 464                                         "ch4", "ch5", "ch6", "ch7",
 465                                         "ch8", "ch9", "ch10", "ch11",
 466                                         "ch12", "ch13", "ch14", "ch15";
 467                         clocks = <&cpg CPG_MOD 217>;
 468                         clock-names = "fck";
 469                         power-domains = <&cpg>;
 470                         #dma-cells = <1>;
 471                         dma-channels = <16>;
 472                 };
 473
 474                 avb: ethernet@e6800000 {
 475                         compatible = "renesas,etheravb-r8a7795",
 476                                      "renesas,etheravb-rcar-gen3";
 477                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 478                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 479                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 480                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 481                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 482                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 483                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 484                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 485                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 486                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 487                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 488                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 489                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 490                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 491                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 492                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 502                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 503                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 504                                           "ch4", "ch5", "ch6", "ch7",
 505                                           "ch8", "ch9", "ch10", "ch11",
 506                                           "ch12", "ch13", "ch14", "ch15",
 507                                           "ch16", "ch17", "ch18", "ch19",
 508                                           "ch20", "ch21", "ch22", "ch23",
 509                                           "ch24";
 510                         clocks = <&cpg CPG_MOD 812>;
 511                         power-domains = <&cpg>;
 512                         phy-mode = "rgmii-id";
 513                         #address-cells = <1>;
 514                         #size-cells = <0>;
 515                 };
 516
 517                 hscif0: serial@e6540000 {
 518                         compatible = "renesas,hscif-r8a7795",
 519                                      "renesas,rcar-gen3-hscif",
 520                                      "renesas,hscif";
 521                         reg = <0 0xe6540000 0 96>;
 522                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 523                         clocks = <&cpg CPG_MOD 520>,
 524                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 525                                  <&scif_clk>;
 526                         clock-names = "fck", "brg_int", "scif_clk";
 527                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 528                         dma-names = "tx", "rx";
 529                         power-domains = <&cpg>;
 530                         status = "disabled";
 531                 };
 532
 533                 hscif1: serial@e6550000 {
 534                         compatible = "renesas,hscif-r8a7795",
 535                                      "renesas,rcar-gen3-hscif",
 536                                      "renesas,hscif";
 537                         reg = <0 0xe6550000 0 96>;
 538                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 539                         clocks = <&cpg CPG_MOD 519>,
 540                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 541                                  <&scif_clk>;
 542                         clock-names = "fck", "brg_int", "scif_clk";
 543                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 544                         dma-names = "tx", "rx";
 545                         power-domains = <&cpg>;
 546                         status = "disabled";
 547                 };
 548
 549                 hscif2: serial@e6560000 {
 550                         compatible = "renesas,hscif-r8a7795",
 551                                      "renesas,rcar-gen3-hscif",
 552                                      "renesas,hscif";
 553                         reg = <0 0xe6560000 0 96>;
 554                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 555                         clocks = <&cpg CPG_MOD 518>,
 556                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 557                                  <&scif_clk>;
 558                         clock-names = "fck", "brg_int", "scif_clk";
 559                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 560                         dma-names = "tx", "rx";
 561                         power-domains = <&cpg>;
 562                         status = "disabled";
 563                 };
 564
 565                 hscif3: serial@e66a0000 {
 566                         compatible = "renesas,hscif-r8a7795",
 567                                      "renesas,rcar-gen3-hscif",
 568                                      "renesas,hscif";
 569                         reg = <0 0xe66a0000 0 96>;
 570                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 571                         clocks = <&cpg CPG_MOD 517>,
 572                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 573                                  <&scif_clk>;
 574                         clock-names = "fck", "brg_int", "scif_clk";
 575                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 576                         dma-names = "tx", "rx";
 577                         power-domains = <&cpg>;
 578                         status = "disabled";
 579                 };
 580
 581                 hscif4: serial@e66b0000 {
 582                         compatible = "renesas,hscif-r8a7795",
 583                                      "renesas,rcar-gen3-hscif",
 584                                      "renesas,hscif";
 585                         reg = <0 0xe66b0000 0 96>;
 586                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 587                         clocks = <&cpg CPG_MOD 516>,
 588                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 589                                  <&scif_clk>;
 590                         clock-names = "fck", "brg_int", "scif_clk";
 591                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 592                         dma-names = "tx", "rx";
 593                         power-domains = <&cpg>;
 594                         status = "disabled";
 595                 };
 596
 597                 scif0: serial@e6e60000 {
 598                         compatible = "renesas,scif-r8a7795",
 599                                      "renesas,rcar-gen3-scif", "renesas,scif";
 600                         reg = <0 0xe6e60000 0 64>;
 601                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 602                         clocks = <&cpg CPG_MOD 207>,
 603                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 604                                  <&scif_clk>;
 605                         clock-names = "fck", "brg_int", "scif_clk";
 606                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 607                         dma-names = "tx", "rx";
 608                         power-domains = <&cpg>;
 609                         status = "disabled";
 610                 };
 611
 612                 scif1: serial@e6e68000 {
 613                         compatible = "renesas,scif-r8a7795",
 614                                      "renesas,rcar-gen3-scif", "renesas,scif";
 615                         reg = <0 0xe6e68000 0 64>;
 616                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 617                         clocks = <&cpg CPG_MOD 206>,
 618                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 619                                  <&scif_clk>;
 620                         clock-names = "fck", "brg_int", "scif_clk";
 621                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 622                         dma-names = "tx", "rx";
 623                         power-domains = <&cpg>;
 624                         status = "disabled";
 625                 };
 626
 627                 scif2: serial@e6e88000 {
 628                         compatible = "renesas,scif-r8a7795",
 629                                      "renesas,rcar-gen3-scif", "renesas,scif";
 630                         reg = <0 0xe6e88000 0 64>;
 631                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 632                         clocks = <&cpg CPG_MOD 310>,
 633                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 634                                  <&scif_clk>;
 635                         clock-names = "fck", "brg_int", "scif_clk";
 636                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 637                         dma-names = "tx", "rx";
 638                         power-domains = <&cpg>;
 639                         status = "disabled";
 640                 };
 641
 642                 scif3: serial@e6c50000 {
 643                         compatible = "renesas,scif-r8a7795",
 644                                      "renesas,rcar-gen3-scif", "renesas,scif";
 645                         reg = <0 0xe6c50000 0 64>;
 646                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 647                         clocks = <&cpg CPG_MOD 204>,
 648                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 649                                  <&scif_clk>;
 650                         clock-names = "fck", "brg_int", "scif_clk";
 651                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 652                         dma-names = "tx", "rx";
 653                         power-domains = <&cpg>;
 654                         status = "disabled";
 655                 };
 656
 657                 scif4: serial@e6c40000 {
 658                         compatible = "renesas,scif-r8a7795",
 659                                      "renesas,rcar-gen3-scif", "renesas,scif";
 660                         reg = <0 0xe6c40000 0 64>;
 661                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 662                         clocks = <&cpg CPG_MOD 203>,
 663                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 664                                  <&scif_clk>;
 665                         clock-names = "fck", "brg_int", "scif_clk";
 666                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 667                         dma-names = "tx", "rx";
 668                         power-domains = <&cpg>;
 669                         status = "disabled";
 670                 };
 671
 672                 scif5: serial@e6f30000 {
 673                         compatible = "renesas,scif-r8a7795",
 674                                      "renesas,rcar-gen3-scif", "renesas,scif";
 675                         reg = <0 0xe6f30000 0 64>;
 676                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 677                         clocks = <&cpg CPG_MOD 202>,
 678                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 679                                  <&scif_clk>;
 680                         clock-names = "fck", "brg_int", "scif_clk";
 681                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 682                         dma-names = "tx", "rx";
 683                         power-domains = <&cpg>;
 684                         status = "disabled";
 685                 };
 686
 687                 i2c0: i2c@e6500000 {
 688                         #address-cells = <1>;
 689                         #size-cells = <0>;
 690                         compatible = "renesas,i2c-r8a7795";
 691                         reg = <0 0xe6500000 0 0x40>;
 692                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 693                         clocks = <&cpg CPG_MOD 931>;
 694                         power-domains = <&cpg>;
 695                         i2c-scl-internal-delay-ns = <110>;
 696                         status = "disabled";
 697                 };
 698
 699                 i2c1: i2c@e6508000 {
 700                         #address-cells = <1>;
 701                         #size-cells = <0>;
 702                         compatible = "renesas,i2c-r8a7795";
 703                         reg = <0 0xe6508000 0 0x40>;
 704                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 705                         clocks = <&cpg CPG_MOD 930>;
 706                         power-domains = <&cpg>;
 707                         i2c-scl-internal-delay-ns = <6>;
 708                         status = "disabled";
 709                 };
 710
 711                 i2c2: i2c@e6510000 {
 712                         #address-cells = <1>;
 713                         #size-cells = <0>;
 714                         compatible = "renesas,i2c-r8a7795";
 715                         reg = <0 0xe6510000 0 0x40>;
 716                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 717                         clocks = <&cpg CPG_MOD 929>;
 718                         power-domains = <&cpg>;
 719                         i2c-scl-internal-delay-ns = <6>;
 720                         status = "disabled";
 721                 };
 722
 723                 i2c3: i2c@e66d0000 {
 724                         #address-cells = <1>;
 725                         #size-cells = <0>;
 726                         compatible = "renesas,i2c-r8a7795";
 727                         reg = <0 0xe66d0000 0 0x40>;
 728                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 729                         clocks = <&cpg CPG_MOD 928>;
 730                         power-domains = <&cpg>;
 731                         i2c-scl-internal-delay-ns = <110>;
 732                         status = "disabled";
 733                 };
 734
 735                 i2c4: i2c@e66d8000 {
 736                         #address-cells = <1>;
 737                         #size-cells = <0>;
 738                         compatible = "renesas,i2c-r8a7795";
 739                         reg = <0 0xe66d8000 0 0x40>;
 740                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 741                         clocks = <&cpg CPG_MOD 927>;
 742                         power-domains = <&cpg>;
 743                         i2c-scl-internal-delay-ns = <110>;
 744                         status = "disabled";
 745                 };
 746
 747                 i2c5: i2c@e66e0000 {
 748                         #address-cells = <1>;
 749                         #size-cells = <0>;
 750                         compatible = "renesas,i2c-r8a7795";
 751                         reg = <0 0xe66e0000 0 0x40>;
 752                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 753                         clocks = <&cpg CPG_MOD 919>;
 754                         power-domains = <&cpg>;
 755                         i2c-scl-internal-delay-ns = <110>;
 756                         status = "disabled";
 757                 };
 758
 759                 i2c6: i2c@e66e8000 {
 760                         #address-cells = <1>;
 761                         #size-cells = <0>;
 762                         compatible = "renesas,i2c-r8a7795";
 763                         reg = <0 0xe66e8000 0 0x40>;
 764                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 765                         clocks = <&cpg CPG_MOD 918>;
 766                         power-domains = <&cpg>;
 767                         i2c-scl-internal-delay-ns = <6>;
 768                         status = "disabled";
 769                 };
 770
 771                 rcar_sound: sound@ec500000 {
 772                         /*
 773                          * #sound-dai-cells is required
 774                          *
 775                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 776                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 777                          */
 778                         /*
 779                          * #clock-cells is required for audio_clkout0/1/2/3
 780                          *
 781                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 782                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 783                          */
 784                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 785                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 786                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 787                                 <0 0xec540000 0 0x1000>, /* SSIU */
 788                                 <0 0xec541000 0 0x280>,  /* SSI */
 789                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 790                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 791
 792                         clocks = <&cpg CPG_MOD 1005>,
 793                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 794                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 795                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 796                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 797                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 798                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 799                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 800                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 801                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 802                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 803                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 804                                  <&audio_clk_a>, <&audio_clk_b>,
 805                                  <&audio_clk_c>,
 806                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 807                         clock-names = "ssi-all",
 808                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 809                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 810                                       "ssi.1", "ssi.0",
 811                                       "src.9", "src.8", "src.7", "src.6",
 812                                       "src.5", "src.4", "src.3", "src.2",
 813                                       "src.1", "src.0",
 814                                       "dvc.0", "dvc.1",
 815                                       "clk_a", "clk_b", "clk_c", "clk_i";
 816                         power-domains = <&cpg>;
 817                         status = "disabled";
 818
 819                         rcar_sound,dvc {
 820                                 dvc0: dvc@0 {
 821                                         dmas = <&audma0 0xbc>;
 822                                         dma-names = "tx";
 823                                 };
 824                                 dvc1: dvc@1 {
 825                                         dmas = <&audma0 0xbe>;
 826                                         dma-names = "tx";
 827                                 };
 828                         };
 829
 830                         rcar_sound,src {
 831                                 src0: src@0 {
 832                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 833                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 834                                         dma-names = "rx", "tx";
 835                                 };
 836                                 src1: src@1 {
 837                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 838                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 839                                         dma-names = "rx", "tx";
 840                                 };
 841                                 src2: src@2 {
 842                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 843                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 844                                         dma-names = "rx", "tx";
 845                                 };
 846                                 src3: src@3 {
 847                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 848                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 849                                         dma-names = "rx", "tx";
 850                                 };
 851                                 src4: src@4 {
 852                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 853                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 854                                         dma-names = "rx", "tx";
 855                                 };
 856                                 src5: src@5 {
 857                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 858                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 859                                         dma-names = "rx", "tx";
 860                                 };
 861                                 src6: src@6 {
 862                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 863                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 864                                         dma-names = "rx", "tx";
 865                                 };
 866                                 src7: src@7 {
 867                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 868                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 869                                         dma-names = "rx", "tx";
 870                                 };
 871                                 src8: src@8 {
 872                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 873                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 874                                         dma-names = "rx", "tx";
 875                                 };
 876                                 src9: src@9 {
 877                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 878                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 879                                         dma-names = "rx", "tx";
 880                                 };
 881                         };
 882
 883                         rcar_sound,ssi {
 884                                 ssi0: ssi@0 {
 885                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 886                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 887                                         dma-names = "rx", "tx", "rxu", "txu";
 888                                 };
 889                                 ssi1: ssi@1 {
 890                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
 891                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
 892                                         dma-names = "rx", "tx", "rxu", "txu";
 893                                 };
 894                                 ssi2: ssi@2 {
 895                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
 896                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
 897                                         dma-names = "rx", "tx", "rxu", "txu";
 898                                 };
 899                                 ssi3: ssi@3 {
 900                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
 901                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
 902                                         dma-names = "rx", "tx", "rxu", "txu";
 903                                 };
 904                                 ssi4: ssi@4 {
 905                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
 906                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
 907                                         dma-names = "rx", "tx", "rxu", "txu";
 908                                 };
 909                                 ssi5: ssi@5 {
 910                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
 911                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
 912                                         dma-names = "rx", "tx", "rxu", "txu";
 913                                 };
 914                                 ssi6: ssi@6 {
 915                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
 916                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
 917                                         dma-names = "rx", "tx", "rxu", "txu";
 918                                 };
 919                                 ssi7: ssi@7 {
 920                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
 921                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
 922                                         dma-names = "rx", "tx", "rxu", "txu";
 923                                 };
 924                                 ssi8: ssi@8 {
 925                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
 926                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
 927                                         dma-names = "rx", "tx", "rxu", "txu";
 928                                 };
 929                                 ssi9: ssi@9 {
 930                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
 931                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
 932                                         dma-names = "rx", "tx", "rxu", "txu";
 933                                 };
 934                         };
 935                 };
 936
 937                 sata: sata@ee300000 {
 938                         compatible = "renesas,sata-r8a7795";
 939                         reg = <0 0xee300000 0 0x1fff>;
 940                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 941                         clocks = <&cpg CPG_MOD 815>;
 942                         status = "disabled";
 943                 };
 944
 945                 xhci0: usb@ee000000 {
 946                         compatible = "renesas,xhci-r8a7795";
 947                         reg = <0 0xee000000 0 0xc00>;
 948                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 949                         clocks = <&cpg CPG_MOD 328>;
 950                         power-domains = <&cpg>;
 951                         status = "disabled";
 952                 };
 953
 954                 xhci1: usb@ee0400000 {
 955                         compatible = "renesas,xhci-r8a7795";
 956                         reg = <0 0xee040000 0 0xc00>;
 957                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
 958                         clocks = <&cpg CPG_MOD 327>;
 959                         power-domains = <&cpg>;
 960                         status = "disabled";
 961                 };
 962
 963                 usb_dmac0: dma-controller@e65a0000 {
 964                         compatible = "renesas,r8a7795-usb-dmac",
 965                                      "renesas,usb-dmac";
 966                         reg = <0 0xe65a0000 0 0x100>;
 967                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
 968                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
 969                         interrupt-names = "ch0", "ch1";
 970                         clocks = <&cpg CPG_MOD 330>;
 971                         power-domains = <&cpg>;
 972                         #dma-cells = <1>;
 973                         dma-channels = <2>;
 974                 };
 975
 976                 usb_dmac1: dma-controller@e65b0000 {
 977                         compatible = "renesas,r8a7795-usb-dmac",
 978                                      "renesas,usb-dmac";
 979                         reg = <0 0xe65b0000 0 0x100>;
 980                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
 981                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
 982                         interrupt-names = "ch0", "ch1";
 983                         clocks = <&cpg CPG_MOD 331>;
 984                         power-domains = <&cpg>;
 985                         #dma-cells = <1>;
 986                         dma-channels = <2>;
 987                 };
 988
 989                 sdhi0: sd@ee100000 {
 990                         compatible = "renesas,sdhi-r8a7795";
 991                         reg = <0 0xee100000 0 0x2000>;
 992                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
 993                         clocks = <&cpg CPG_MOD 314>;
 994                         power-domains = <&cpg>;
 995                         status = "disabled";
 996                 };
 997
 998                 sdhi1: sd@ee120000 {
 999                         compatible = "renesas,sdhi-r8a7795";
1000                         reg = <0 0xee120000 0 0x2000>;
1001                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1002                         clocks = <&cpg CPG_MOD 313>;
1003                         power-domains = <&cpg>;
1004                         status = "disabled";
1005                 };
1006
1007                 sdhi2: sd@ee140000 {
1008                         compatible = "renesas,sdhi-r8a7795";
1009                         reg = <0 0xee140000 0 0x2000>;
1010                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1011                         clocks = <&cpg CPG_MOD 312>;
1012                         power-domains = <&cpg>;
1013                         cap-mmc-highspeed;
1014                         status = "disabled";
1015                 };
1016
1017                 sdhi3: sd@ee160000 {
1018                         compatible = "renesas,sdhi-r8a7795";
1019                         reg = <0 0xee160000 0 0x2000>;
1020                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1021                         clocks = <&cpg CPG_MOD 311>;
1022                         power-domains = <&cpg>;
1023                         cap-mmc-highspeed;
1024                         status = "disabled";
1025                 };
1026
1027                 usb2_phy0: usb-phy@ee080200 {
1028                         compatible = "renesas,usb2-phy-r8a7795";
1029                         reg = <0 0xee080200 0 0x700>;
1030                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1031                         clocks = <&cpg CPG_MOD 703>;
1032                         power-domains = <&cpg>;
1033                         #phy-cells = <0>;
1034                         status = "disabled";
1035                 };
1036
1037                 usb2_phy1: usb-phy@ee0a0200 {
1038                         compatible = "renesas,usb2-phy-r8a7795";
1039                         reg = <0 0xee0a0200 0 0x700>;
1040                         clocks = <&cpg CPG_MOD 702>;
1041                         power-domains = <&cpg>;
1042                         #phy-cells = <0>;
1043                         status = "disabled";
1044                 };
1045
1046                 usb2_phy2: usb-phy@ee0c0200 {
1047                         compatible = "renesas,usb2-phy-r8a7795";
1048                         reg = <0 0xee0c0200 0 0x700>;
1049                         clocks = <&cpg CPG_MOD 701>;
1050                         power-domains = <&cpg>;
1051                         #phy-cells = <0>;
1052                         status = "disabled";
1053                 };
1054
1055                 ehci0: usb@ee080100 {
1056                         compatible = "generic-ehci";
1057                         reg = <0 0xee080100 0 0x100>;
1058                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1059                         clocks = <&cpg CPG_MOD 703>;
1060                         phys = <&usb2_phy0>;
1061                         phy-names = "usb";
1062                         power-domains = <&cpg>;
1063                         status = "disabled";
1064                 };
1065
1066                 ehci1: usb@ee0a0100 {
1067                         compatible = "generic-ehci";
1068                         reg = <0 0xee0a0100 0 0x100>;
1069                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1070                         clocks = <&cpg CPG_MOD 702>;
1071                         phys = <&usb2_phy1>;
1072                         phy-names = "usb";
1073                         power-domains = <&cpg>;
1074                         status = "disabled";
1075                 };
1076
1077                 ehci2: usb@ee0c0100 {
1078                         compatible = "generic-ehci";
1079                         reg = <0 0xee0c0100 0 0x100>;
1080                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1081                         clocks = <&cpg CPG_MOD 701>;
1082                         phys = <&usb2_phy2>;
1083                         phy-names = "usb";
1084                         power-domains = <&cpg>;
1085                         status = "disabled";
1086                 };
1087
1088                 ohci0: usb@ee080000 {
1089                         compatible = "generic-ohci";
1090                         reg = <0 0xee080000 0 0x100>;
1091                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1092                         clocks = <&cpg CPG_MOD 703>;
1093                         phys = <&usb2_phy0>;
1094                         phy-names = "usb";
1095                         power-domains = <&cpg>;
1096                         status = "disabled";
1097                 };
1098
1099                 ohci1: usb@ee0a0000 {
1100                         compatible = "generic-ohci";
1101                         reg = <0 0xee0a0000 0 0x100>;
1102                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1103                         clocks = <&cpg CPG_MOD 702>;
1104                         phys = <&usb2_phy1>;
1105                         phy-names = "usb";
1106                         power-domains = <&cpg>;
1107                         status = "disabled";
1108                 };
1109
1110                 ohci2: usb@ee0c0000 {
1111                         compatible = "generic-ohci";
1112                         reg = <0 0xee0c0000 0 0x100>;
1113                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1114                         clocks = <&cpg CPG_MOD 701>;
1115                         phys = <&usb2_phy2>;
1116                         phy-names = "usb";
1117                         power-domains = <&cpg>;
1118                         status = "disabled";
1119                 };
1120         };
1121 };