arch/arm/plat-omap/usb.c

   1  /*
   2  * arch/arm/plat-omap/usb.c -- platform level USB initialization
   3  *
   4  * Copyright (C) 2004 Texas Instruments, Inc.
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  19  */
  20
  21 #undef  DEBUG
  22
  23 #include <linux/module.h>
  24 #include <linux/kernel.h>
  25 #include <linux/types.h>
  26 #include <linux/errno.h>
  27 #include <linux/init.h>
  28 #include <linux/platform_device.h>
  29 #include <linux/usb/otg.h>
  30 #include <linux/io.h>
  31
  32 #include <asm/irq.h>
  33 #include <asm/system.h>
  34 #include <mach/hardware.h>
  35
  36 #include <plat/control.h>
  37 #include <plat/mux.h>
  38 #include <plat/usb.h>
  39 #include <plat/board.h>
  40
  41 #ifdef CONFIG_ARCH_OMAP1
  42
  43 #define INT_USB_IRQ_GEN         IH2_BASE + 20
  44 #define INT_USB_IRQ_NISO        IH2_BASE + 30
  45 #define INT_USB_IRQ_ISO         IH2_BASE + 29
  46 #define INT_USB_IRQ_HGEN        INT_USB_HHC_1
  47 #define INT_USB_IRQ_OTG         IH2_BASE + 8
  48
  49 #else
  50
  51 #define INT_USB_IRQ_GEN         INT_24XX_USB_IRQ_GEN
  52 #define INT_USB_IRQ_NISO        INT_24XX_USB_IRQ_NISO
  53 #define INT_USB_IRQ_ISO         INT_24XX_USB_IRQ_ISO
  54 #define INT_USB_IRQ_HGEN        INT_24XX_USB_IRQ_HGEN
  55 #define INT_USB_IRQ_OTG         INT_24XX_USB_IRQ_OTG
  56
  57 #endif
  58
  59
  60 /* These routines should handle the standard chip-specific modes
  61  * for usb0/1/2 ports, covering basic mux and transceiver setup.
  62  *
  63  * Some board-*.c files will need to set up additional mux options,
  64  * like for suspend handling, vbus sensing, GPIOs, and the D+ pullup.
  65  */
  66
  67 /* TESTED ON:
  68  *  - 1611B H2 (with usb1 mini-AB) using standard Mini-B or OTG cables
  69  *  - 5912 OSK OHCI (with usb0 standard-A), standard A-to-B cables
  70  *  - 5912 OSK UDC, with *nonstandard* A-to-A cable
  71  *  - 1510 Innovator UDC with bundled usb0 cable
  72  *  - 1510 Innovator OHCI with bundled usb1/usb2 cable
  73  *  - 1510 Innovator OHCI with custom usb0 cable, feeding 5V VBUS
  74  *  - 1710 custom development board using alternate pin group
  75  *  - 1710 H3 (with usb1 mini-AB) using standard Mini-B or OTG cables
  76  */
  77
  78 /*-------------------------------------------------------------------------*/
  79
  80 #if defined(CONFIG_ARCH_OMAP_OTG) || defined(CONFIG_ARCH_OMAP15XX)
  81
  82 static void omap2_usb_devconf_clear(u8 port, u32 mask)
  83 {
  84         u32 r;
  85
  86         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  87         r &= ~USBTXWRMODEI(port, mask);
  88         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  89 }
  90
  91 static void omap2_usb_devconf_set(u8 port, u32 mask)
  92 {
  93         u32 r;
  94
  95         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
  96         r |= USBTXWRMODEI(port, mask);
  97         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
  98 }
  99
 100 static void omap2_usb2_disable_5pinbitll(void)
 101 {
 102         u32 r;
 103
 104         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 105         r &= ~(USBTXWRMODEI(2, USB_BIDIR_TLL) | USBT2TLL5PI);
 106         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 107 }
 108
 109 static void omap2_usb2_enable_5pinunitll(void)
 110 {
 111         u32 r;
 112
 113         r = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 114         r |= USBTXWRMODEI(2, USB_UNIDIR_TLL) | USBT2TLL5PI;
 115         omap_ctrl_writel(r, OMAP2_CONTROL_DEVCONF0);
 116 }
 117
 118 static u32 __init omap_usb0_init(unsigned nwires, unsigned is_device)
 119 {
 120         u32     syscon1 = 0;
 121
 122         if (cpu_is_omap24xx())
 123                 omap2_usb_devconf_clear(0, USB_BIDIR_TLL);
 124
 125         if (nwires == 0) {
 126                 if (cpu_class_is_omap1() && !cpu_is_omap15xx()) {
 127                         u32 l;
 128
 129                         /* pulldown D+/D- */
 130                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 131                         l &= ~(3 << 1);
 132                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 133                 }
 134                 return 0;
 135         }
 136
 137         if (is_device) {
 138                 if (cpu_is_omap24xx())
 139                         omap_cfg_reg(J20_24XX_USB0_PUEN);
 140                 else
 141                         omap_cfg_reg(W4_USB_PUEN);
 142         }
 143
 144         /* internal transceiver (unavailable on 17xx, 24xx) */
 145         if (!cpu_class_is_omap2() && nwires == 2) {
 146                 u32 l;
 147
 148                 // omap_cfg_reg(P9_USB_DP);
 149                 // omap_cfg_reg(R8_USB_DM);
 150
 151                 if (cpu_is_omap15xx()) {
 152                         /* This works on 1510-Innovator */
 153                         return 0;
 154                 }
 155
 156                 /* NOTES:
 157                  *  - peripheral should configure VBUS detection!
 158                  *  - only peripherals may use the internal D+/D- pulldowns
 159                  *  - OTG support on this port not yet written
 160                  */
 161
 162                 /* Don't do this for omap7xx -- it causes USB to not work correctly */
 163                 if (!cpu_is_omap7xx()) {
 164                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 165                         l &= ~(7 << 4);
 166                         if (!is_device)
 167                                 l |= (3 << 1);
 168                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 169                 }
 170
 171                 return 3 << 16;
 172         }
 173
 174         /* alternate pin config, external transceiver */
 175         if (cpu_is_omap15xx()) {
 176                 printk(KERN_ERR "no usb0 alt pin config on 15xx\n");
 177                 return 0;
 178         }
 179
 180         if (cpu_is_omap24xx()) {
 181                 omap_cfg_reg(K18_24XX_USB0_DAT);
 182                 omap_cfg_reg(K19_24XX_USB0_TXEN);
 183                 omap_cfg_reg(J14_24XX_USB0_SE0);
 184                 if (nwires != 3)
 185                         omap_cfg_reg(J18_24XX_USB0_RCV);
 186         } else {
 187                 omap_cfg_reg(V6_USB0_TXD);
 188                 omap_cfg_reg(W9_USB0_TXEN);
 189                 omap_cfg_reg(W5_USB0_SE0);
 190                 if (nwires != 3)
 191                         omap_cfg_reg(Y5_USB0_RCV);
 192         }
 193
 194         /* NOTE:  SPEED and SUSP aren't configured here.  OTG hosts
 195          * may be able to use I2C requests to set those bits along
 196          * with VBUS switching and overcurrent detection.
 197          */
 198
 199         if (cpu_class_is_omap1() && nwires != 6) {
 200                 u32 l;
 201
 202                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 203                 l &= ~CONF_USB2_UNI_R;
 204                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 205         }
 206
 207         switch (nwires) {
 208         case 3:
 209                 syscon1 = 2;
 210                 if (cpu_is_omap24xx())
 211                         omap2_usb_devconf_set(0, USB_BIDIR);
 212                 break;
 213         case 4:
 214                 syscon1 = 1;
 215                 if (cpu_is_omap24xx())
 216                         omap2_usb_devconf_set(0, USB_BIDIR);
 217                 break;
 218         case 6:
 219                 syscon1 = 3;
 220                 if (cpu_is_omap24xx()) {
 221                         omap_cfg_reg(J19_24XX_USB0_VP);
 222                         omap_cfg_reg(K20_24XX_USB0_VM);
 223                         omap2_usb_devconf_set(0, USB_UNIDIR);
 224                 } else {
 225                         u32 l;
 226
 227                         omap_cfg_reg(AA9_USB0_VP);
 228                         omap_cfg_reg(R9_USB0_VM);
 229                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 230                         l |= CONF_USB2_UNI_R;
 231                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 232                 }
 233                 break;
 234         default:
 235                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 236                         0, nwires);
 237         }
 238         return syscon1 << 16;
 239 }
 240
 241 static u32 __init omap_usb1_init(unsigned nwires)
 242 {
 243         u32     syscon1 = 0;
 244
 245         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 246                 u32 l;
 247
 248                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 249                 l &= ~CONF_USB1_UNI_R;
 250                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 251         }
 252         if (cpu_is_omap24xx())
 253                 omap2_usb_devconf_clear(1, USB_BIDIR_TLL);
 254
 255         if (nwires == 0)
 256                 return 0;
 257
 258         /* external transceiver */
 259         if (cpu_class_is_omap1()) {
 260                 omap_cfg_reg(USB1_TXD);
 261                 omap_cfg_reg(USB1_TXEN);
 262                 if (nwires != 3)
 263                         omap_cfg_reg(USB1_RCV);
 264         }
 265
 266         if (cpu_is_omap15xx()) {
 267                 omap_cfg_reg(USB1_SEO);
 268                 omap_cfg_reg(USB1_SPEED);
 269                 // SUSP
 270         } else if (cpu_is_omap1610() || cpu_is_omap5912()) {
 271                 omap_cfg_reg(W13_1610_USB1_SE0);
 272                 omap_cfg_reg(R13_1610_USB1_SPEED);
 273                 // SUSP
 274         } else if (cpu_is_omap1710()) {
 275                 omap_cfg_reg(R13_1710_USB1_SE0);
 276                 // SUSP
 277         } else if (cpu_is_omap24xx()) {
 278                 /* NOTE:  board-specific code must set up pin muxing for usb1,
 279                  * since each signal could come out on either of two balls.
 280                  */
 281         } else {
 282                 pr_debug("usb%d cpu unrecognized\n", 1);
 283                 return 0;
 284         }
 285
 286         switch (nwires) {
 287         case 2:
 288                 if (!cpu_is_omap24xx())
 289                         goto bad;
 290                 /* NOTE: board-specific code must override this setting if
 291                  * this TLL link is not using DP/DM
 292                  */
 293                 syscon1 = 1;
 294                 omap2_usb_devconf_set(1, USB_BIDIR_TLL);
 295                 break;
 296         case 3:
 297                 syscon1 = 2;
 298                 if (cpu_is_omap24xx())
 299                         omap2_usb_devconf_set(1, USB_BIDIR);
 300                 break;
 301         case 4:
 302                 syscon1 = 1;
 303                 if (cpu_is_omap24xx())
 304                         omap2_usb_devconf_set(1, USB_BIDIR);
 305                 break;
 306         case 6:
 307                 if (cpu_is_omap24xx())
 308                         goto bad;
 309                 syscon1 = 3;
 310                 omap_cfg_reg(USB1_VP);
 311                 omap_cfg_reg(USB1_VM);
 312                 if (!cpu_is_omap15xx()) {
 313                         u32 l;
 314
 315                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 316                         l |= CONF_USB1_UNI_R;
 317                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 318                 }
 319                 break;
 320         default:
 321 bad:
 322                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 323                         1, nwires);
 324         }
 325         return syscon1 << 20;
 326 }
 327
 328 static u32 __init omap_usb2_init(unsigned nwires, unsigned alt_pingroup)
 329 {
 330         u32     syscon1 = 0;
 331
 332         if (cpu_is_omap24xx()) {
 333                 omap2_usb2_disable_5pinbitll();
 334                 alt_pingroup = 0;
 335         }
 336
 337         /* NOTE omap1 erratum: must leave USB2_UNI_R set if usb0 in use */
 338         if (alt_pingroup || nwires == 0)
 339                 return 0;
 340
 341         if (cpu_class_is_omap1() && !cpu_is_omap15xx() && nwires != 6) {
 342                 u32 l;
 343
 344                 l = omap_readl(USB_TRANSCEIVER_CTRL);
 345                 l &= ~CONF_USB2_UNI_R;
 346                 omap_writel(l, USB_TRANSCEIVER_CTRL);
 347         }
 348
 349         /* external transceiver */
 350         if (cpu_is_omap15xx()) {
 351                 omap_cfg_reg(USB2_TXD);
 352                 omap_cfg_reg(USB2_TXEN);
 353                 omap_cfg_reg(USB2_SEO);
 354                 if (nwires != 3)
 355                         omap_cfg_reg(USB2_RCV);
 356                 /* there is no USB2_SPEED */
 357         } else if (cpu_is_omap16xx()) {
 358                 omap_cfg_reg(V6_USB2_TXD);
 359                 omap_cfg_reg(W9_USB2_TXEN);
 360                 omap_cfg_reg(W5_USB2_SE0);
 361                 if (nwires != 3)
 362                         omap_cfg_reg(Y5_USB2_RCV);
 363                 // FIXME omap_cfg_reg(USB2_SPEED);
 364         } else if (cpu_is_omap24xx()) {
 365                 omap_cfg_reg(Y11_24XX_USB2_DAT);
 366                 omap_cfg_reg(AA10_24XX_USB2_SE0);
 367                 if (nwires > 2)
 368                         omap_cfg_reg(AA12_24XX_USB2_TXEN);
 369                 if (nwires > 3)
 370                         omap_cfg_reg(AA6_24XX_USB2_RCV);
 371         } else {
 372                 pr_debug("usb%d cpu unrecognized\n", 1);
 373                 return 0;
 374         }
 375         // if (cpu_class_is_omap1()) omap_cfg_reg(USB2_SUSP);
 376
 377         switch (nwires) {
 378         case 2:
 379                 if (!cpu_is_omap24xx())
 380                         goto bad;
 381                 /* NOTE: board-specific code must override this setting if
 382                  * this TLL link is not using DP/DM
 383                  */
 384                 syscon1 = 1;
 385                 omap2_usb_devconf_set(2, USB_BIDIR_TLL);
 386                 break;
 387         case 3:
 388                 syscon1 = 2;
 389                 if (cpu_is_omap24xx())
 390                         omap2_usb_devconf_set(2, USB_BIDIR);
 391                 break;
 392         case 4:
 393                 syscon1 = 1;
 394                 if (cpu_is_omap24xx())
 395                         omap2_usb_devconf_set(2, USB_BIDIR);
 396                 break;
 397         case 5:
 398                 if (!cpu_is_omap24xx())
 399                         goto bad;
 400                 omap_cfg_reg(AA4_24XX_USB2_TLLSE0);
 401                 /* NOTE: board-specific code must override this setting if
 402                  * this TLL link is not using DP/DM.  Something must also
 403                  * set up OTG_SYSCON2.HMC_TLL{ATTACH,SPEED}
 404                  */
 405                 syscon1 = 3;
 406                 omap2_usb2_enable_5pinunitll();
 407                 break;
 408         case 6:
 409                 if (cpu_is_omap24xx())
 410                         goto bad;
 411                 syscon1 = 3;
 412                 if (cpu_is_omap15xx()) {
 413                         omap_cfg_reg(USB2_VP);
 414                         omap_cfg_reg(USB2_VM);
 415                 } else {
 416                         u32 l;
 417
 418                         omap_cfg_reg(AA9_USB2_VP);
 419                         omap_cfg_reg(R9_USB2_VM);
 420                         l = omap_readl(USB_TRANSCEIVER_CTRL);
 421                         l |= CONF_USB2_UNI_R;
 422                         omap_writel(l, USB_TRANSCEIVER_CTRL);
 423                 }
 424                 break;
 425         default:
 426 bad:
 427                 printk(KERN_ERR "illegal usb%d %d-wire transceiver\n",
 428                         2, nwires);
 429         }
 430         return syscon1 << 24;
 431 }
 432
 433 #endif
 434
 435 /*-------------------------------------------------------------------------*/
 436
 437 #ifdef  CONFIG_USB_GADGET_OMAP
 438
 439 static struct resource udc_resources[] = {
 440         /* order is significant! */
 441         {               /* registers */
 442                 .start          = UDC_BASE,
 443                 .end            = UDC_BASE + 0xff,
 444                 .flags          = IORESOURCE_MEM,
 445         }, {            /* general IRQ */
 446                 .start          = INT_USB_IRQ_GEN,
 447                 .flags          = IORESOURCE_IRQ,
 448         }, {            /* PIO IRQ */
 449                 .start          = INT_USB_IRQ_NISO,
 450                 .flags          = IORESOURCE_IRQ,
 451         }, {            /* SOF IRQ */
 452                 .start          = INT_USB_IRQ_ISO,
 453                 .flags          = IORESOURCE_IRQ,
 454         },
 455 };
 456
 457 static u64 udc_dmamask = ~(u32)0;
 458
 459 static struct platform_device udc_device = {
 460         .name           = "omap_udc",
 461         .id             = -1,
 462         .dev = {
 463                 .dma_mask               = &udc_dmamask,
 464                 .coherent_dma_mask      = 0xffffffff,
 465         },
 466         .num_resources  = ARRAY_SIZE(udc_resources),
 467         .resource       = udc_resources,
 468 };
 469
 470 #endif
 471
 472 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 473
 474 /* The dmamask must be set for OHCI to work */
 475 static u64 ohci_dmamask = ~(u32)0;
 476
 477 static struct resource ohci_resources[] = {
 478         {
 479                 .start  = OMAP_OHCI_BASE,
 480                 .end    = OMAP_OHCI_BASE + 0xff,
 481                 .flags  = IORESOURCE_MEM,
 482         },
 483         {
 484                 .start  = INT_USB_IRQ_HGEN,
 485                 .flags  = IORESOURCE_IRQ,
 486         },
 487 };
 488
 489 static struct platform_device ohci_device = {
 490         .name                   = "ohci",
 491         .id                     = -1,
 492         .dev = {
 493                 .dma_mask               = &ohci_dmamask,
 494                 .coherent_dma_mask      = 0xffffffff,
 495         },
 496         .num_resources  = ARRAY_SIZE(ohci_resources),
 497         .resource               = ohci_resources,
 498 };
 499
 500 #endif
 501
 502 #if     defined(CONFIG_USB_OTG) && defined(CONFIG_ARCH_OMAP_OTG)
 503
 504 static struct resource otg_resources[] = {
 505         /* order is significant! */
 506         {
 507                 .start          = OTG_BASE,
 508                 .end            = OTG_BASE + 0xff,
 509                 .flags          = IORESOURCE_MEM,
 510         }, {
 511                 .start          = INT_USB_IRQ_OTG,
 512                 .flags          = IORESOURCE_IRQ,
 513         },
 514 };
 515
 516 static struct platform_device otg_device = {
 517         .name           = "omap_otg",
 518         .id             = -1,
 519         .num_resources  = ARRAY_SIZE(otg_resources),
 520         .resource       = otg_resources,
 521 };
 522
 523 #endif
 524
 525 /*-------------------------------------------------------------------------*/
 526
 527 // FIXME correct answer depends on hmc_mode,
 528 // as does (on omap1) any nonzero value for config->otg port number
 529 #ifdef  CONFIG_USB_GADGET_OMAP
 530 #define is_usb0_device(config)  1
 531 #else
 532 #define is_usb0_device(config)  0
 533 #endif
 534
 535 /*-------------------------------------------------------------------------*/
 536
 537 #ifdef  CONFIG_ARCH_OMAP_OTG
 538
 539 void __init
 540 omap_otg_init(struct omap_usb_config *config)
 541 {
 542         u32             syscon;
 543         int             status;
 544         int             alt_pingroup = 0;
 545
 546         /* NOTE:  no bus or clock setup (yet?) */
 547
 548         syscon = omap_readl(OTG_SYSCON_1) & 0xffff;
 549         if (!(syscon & OTG_RESET_DONE))
 550                 pr_debug("USB resets not complete?\n");
 551
 552         //omap_writew(0, OTG_IRQ_EN);
 553
 554         /* pin muxing and transceiver pinouts */
 555         if (config->pins[0] > 2)        /* alt pingroup 2 */
 556                 alt_pingroup = 1;
 557         syscon |= omap_usb0_init(config->pins[0], is_usb0_device(config));
 558         syscon |= omap_usb1_init(config->pins[1]);
 559         syscon |= omap_usb2_init(config->pins[2], alt_pingroup);
 560         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 561         omap_writel(syscon, OTG_SYSCON_1);
 562
 563         syscon = config->hmc_mode;
 564         syscon |= USBX_SYNCHRO | (4 << 16) /* B_ASE0_BRST */;
 565 #ifdef  CONFIG_USB_OTG
 566         if (config->otg)
 567                 syscon |= OTG_EN;
 568 #endif
 569         if (cpu_class_is_omap1())
 570                 pr_debug("USB_TRANSCEIVER_CTRL = %03x\n",
 571                          omap_readl(USB_TRANSCEIVER_CTRL));
 572         pr_debug("OTG_SYSCON_2 = %08x\n", omap_readl(OTG_SYSCON_2));
 573         omap_writel(syscon, OTG_SYSCON_2);
 574
 575         printk("USB: hmc %d", config->hmc_mode);
 576         if (!alt_pingroup)
 577                 printk(", usb2 alt %d wires", config->pins[2]);
 578         else if (config->pins[0])
 579                 printk(", usb0 %d wires%s", config->pins[0],
 580                         is_usb0_device(config) ? " (dev)" : "");
 581         if (config->pins[1])
 582                 printk(", usb1 %d wires", config->pins[1]);
 583         if (!alt_pingroup && config->pins[2])
 584                 printk(", usb2 %d wires", config->pins[2]);
 585         if (config->otg)
 586                 printk(", Mini-AB on usb%d", config->otg - 1);
 587         printk("\n");
 588
 589         if (cpu_class_is_omap1()) {
 590                 u16 w;
 591
 592                 /* leave USB clocks/controllers off until needed */
 593                 w = omap_readw(ULPD_SOFT_REQ);
 594                 w &= ~SOFT_USB_CLK_REQ;
 595                 omap_writew(w, ULPD_SOFT_REQ);
 596
 597                 w = omap_readw(ULPD_CLOCK_CTRL);
 598                 w &= ~USB_MCLK_EN;
 599                 w |= DIS_USB_PVCI_CLK;
 600                 omap_writew(w, ULPD_CLOCK_CTRL);
 601         }
 602         syscon = omap_readl(OTG_SYSCON_1);
 603         syscon |= HST_IDLE_EN|DEV_IDLE_EN|OTG_IDLE_EN;
 604
 605 #ifdef  CONFIG_USB_GADGET_OMAP
 606         if (config->otg || config->register_dev) {
 607                 syscon &= ~DEV_IDLE_EN;
 608                 udc_device.dev.platform_data = config;
 609                 /* IRQ numbers for omap7xx */
 610                 if(cpu_is_omap7xx()) {
 611                         udc_resources[1].start = INT_7XX_USB_GENI;
 612                         udc_resources[2].start = INT_7XX_USB_NON_ISO;
 613                         udc_resources[3].start = INT_7XX_USB_ISO;
 614                 }
 615                 status = platform_device_register(&udc_device);
 616                 if (status)
 617                         pr_debug("can't register UDC device, %d\n", status);
 618         }
 619 #endif
 620
 621 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 622         if (config->otg || config->register_host) {
 623                 syscon &= ~HST_IDLE_EN;
 624                 ohci_device.dev.platform_data = config;
 625                 if (cpu_is_omap7xx())
 626                         ohci_resources[1].start = INT_7XX_USB_HHC_1;
 627                 status = platform_device_register(&ohci_device);
 628                 if (status)
 629                         pr_debug("can't register OHCI device, %d\n", status);
 630         }
 631 #endif
 632
 633 #ifdef  CONFIG_USB_OTG
 634         if (config->otg) {
 635                 syscon &= ~OTG_IDLE_EN;
 636                 otg_device.dev.platform_data = config;
 637                 if (cpu_is_omap7xx())
 638                         otg_resources[1].start = INT_7XX_USB_OTG;
 639                 status = platform_device_register(&otg_device);
 640                 if (status)
 641                         pr_debug("can't register OTG device, %d\n", status);
 642         }
 643 #endif
 644         pr_debug("OTG_SYSCON_1 = %08x\n", omap_readl(OTG_SYSCON_1));
 645         omap_writel(syscon, OTG_SYSCON_1);
 646
 647         status = 0;
 648 }
 649
 650 #else
 651 static inline void omap_otg_init(struct omap_usb_config *config) {}
 652 #endif
 653
 654 /*-------------------------------------------------------------------------*/
 655
 656 #ifdef  CONFIG_ARCH_OMAP15XX
 657
 658 /* ULPD_DPLL_CTRL */
 659 #define DPLL_IOB                (1 << 13)
 660 #define DPLL_PLL_ENABLE         (1 << 4)
 661 #define DPLL_LOCK               (1 << 0)
 662
 663 /* ULPD_APLL_CTRL */
 664 #define APLL_NDPLL_SWITCH       (1 << 0)
 665
 666
 667 static void __init omap_1510_usb_init(struct omap_usb_config *config)
 668 {
 669         unsigned int val;
 670         u16 w;
 671
 672         omap_usb0_init(config->pins[0], is_usb0_device(config));
 673         omap_usb1_init(config->pins[1]);
 674         omap_usb2_init(config->pins[2], 0);
 675
 676         val = omap_readl(MOD_CONF_CTRL_0) & ~(0x3f << 1);
 677         val |= (config->hmc_mode << 1);
 678         omap_writel(val, MOD_CONF_CTRL_0);
 679
 680         printk("USB: hmc %d", config->hmc_mode);
 681         if (config->pins[0])
 682                 printk(", usb0 %d wires%s", config->pins[0],
 683                         is_usb0_device(config) ? " (dev)" : "");
 684         if (config->pins[1])
 685                 printk(", usb1 %d wires", config->pins[1]);
 686         if (config->pins[2])
 687                 printk(", usb2 %d wires", config->pins[2]);
 688         printk("\n");
 689
 690         /* use DPLL for 48 MHz function clock */
 691         pr_debug("APLL %04x DPLL %04x REQ %04x\n", omap_readw(ULPD_APLL_CTRL),
 692                         omap_readw(ULPD_DPLL_CTRL), omap_readw(ULPD_SOFT_REQ));
 693
 694         w = omap_readw(ULPD_APLL_CTRL);
 695         w &= ~APLL_NDPLL_SWITCH;
 696         omap_writew(w, ULPD_APLL_CTRL);
 697
 698         w = omap_readw(ULPD_DPLL_CTRL);
 699         w |= DPLL_IOB | DPLL_PLL_ENABLE;
 700         omap_writew(w, ULPD_DPLL_CTRL);
 701
 702         w = omap_readw(ULPD_SOFT_REQ);
 703         w |= SOFT_UDC_REQ | SOFT_DPLL_REQ;
 704         omap_writew(w, ULPD_SOFT_REQ);
 705
 706         while (!(omap_readw(ULPD_DPLL_CTRL) & DPLL_LOCK))
 707                 cpu_relax();
 708
 709 #ifdef  CONFIG_USB_GADGET_OMAP
 710         if (config->register_dev) {
 711                 int status;
 712
 713                 udc_device.dev.platform_data = config;
 714                 status = platform_device_register(&udc_device);
 715                 if (status)
 716                         pr_debug("can't register UDC device, %d\n", status);
 717                 /* udc driver gates 48MHz by D+ pullup */
 718         }
 719 #endif
 720
 721 #if     defined(CONFIG_USB_OHCI_HCD) || defined(CONFIG_USB_OHCI_HCD_MODULE)
 722         if (config->register_host) {
 723                 int status;
 724
 725                 ohci_device.dev.platform_data = config;
 726                 status = platform_device_register(&ohci_device);
 727                 if (status)
 728                         pr_debug("can't register OHCI device, %d\n", status);
 729                 /* hcd explicitly gates 48MHz */
 730         }
 731 #endif
 732 }
 733
 734 #else
 735 static inline void omap_1510_usb_init(struct omap_usb_config *config) {}
 736 #endif
 737
 738 /*-------------------------------------------------------------------------*/
 739
 740 void __init omap_usb_init(struct omap_usb_config *pdata)
 741 {
 742         if (cpu_is_omap7xx() || cpu_is_omap16xx() || cpu_is_omap24xx())
 743                 omap_otg_init(pdata);
 744         else if (cpu_is_omap15xx())
 745                 omap_1510_usb_init(pdata);
 746         else
 747                 printk(KERN_ERR "USB: No init for your chip yet\n");
 748 }
 749